ARM: imx6: disable bandgap self-bias after boot

The self-bias circuit is used by the bandgap during startup.
Once the bandgap has stabilized, the self-bias circuit should
be disabled for best noise performance of analog blocks.
Also this bit should be disabled before the chip enters STOP mode or
when ever the regular bandgap is disabled.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index ee035c576e695e9c4afceb379d31e087cdb60b48..2fe069ec24e47e8ce8c708eba976779985b7c586 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -450,6 +450,22 @@ static void clear_mmdc_ch_mask(void)
        writel(0, &mxc_ccm->ccdr);
 }
 
        writel(0, &mxc_ccm->ccdr);
 }
 

+static void init_bandgap(void)
+{
+       struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+       /*
+        * Ensure the bandgap has stabilized.
+        */
+       while (!(readl(&anatop->ana_misc0) & 0x80))
+               ;
+       /*
+        * For best noise performance of the analog blocks using the
+        * outputs of the bandgap, the reftop_selfbiasoff bit should
+        * be set.
+        */
+       writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
+}
+

 #ifdef CONFIG_SOC_MX6SL
 static void set_preclk_from_osc(void)
 {
 #ifdef CONFIG_SOC_MX6SL
 static void set_preclk_from_osc(void)
 {


@@ -469,6 +485,13 @@ int arch_cpu_init(void)
        /* Need to clear MMDC_CHx_MASK to make warm reset work. */
        clear_mmdc_ch_mask();
 
        /* Need to clear MMDC_CHx_MASK to make warm reset work. */
        clear_mmdc_ch_mask();
 

+       /*
+        * Disable self-bias circuit in the analog bandap.
+        * The self-bias circuit is used by the bandgap during startup.
+        * This bit should be set after the bandgap has initialized.
+        */
+       init_bandgap();
+

        /*
         * When low freq boot is enabled, ROM will not set AHB
         * freq, so we need to ensure AHB freq is 132MHz in such
        /*
         * When low freq boot is enabled, ROM will not set AHB
         * freq, so we need to ensure AHB freq is 132MHz in such

diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
index ce465c617904c1ac1ee1c79bd3a898124c744f92..89481a1a863102e0deda299ee9da3ae7f20091b5 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -1352,4 +1352,6 @@ struct mxc_ccm_reg {
        (((v) << BP_ANADIG_PFD_528_PFD0_FRAC) & \
                BM_ANADIG_PFD_528_PFD0_FRAC)
 
        (((v) << BP_ANADIG_PFD_528_PFD0_FRAC) & \
                BM_ANADIG_PFD_528_PFD0_FRAC)
 

+#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x00000008
+

 #endif /*__ARCH_ARM_MACH_MX6_CCM_REGS_H__ */
 #endif /*__ARCH_ARM_MACH_MX6_CCM_REGS_H__ */