Don't set up the CPSR for SPL_BUILD

In SPL_BUILD the ROM code will have set up the CPSR correctly and
Booting from USB may require interrupts to be enabled.
Also enhance the comment to reflect the fact, that interrupts will be
disabled when setting up the CPSR.

Remove bits that will be asserted from the clear mask

diff --git a/arch/arm/cpu/arm926ejs/mx28/start.S b/arch/arm/cpu/arm926ejs/mx28/start.S
index 2cd4d73354fce1f191a64d48e0254bd53eaa6337..76780385db23782e7ac11ae39e23aef34df96c7c 100644 (file)
--- a/arch/arm/cpu/arm926ejs/mx28/start.S
+++ b/arch/arm/cpu/arm926ejs/mx28/start.S
@@ -167,14 +167,15 @@ _reset:
         */
        push    {r0-r12,r14}
 
+#ifndef CONFIG_SPL_BUILD
        /*
-        * set the cpu to SVC32 mode
+        * set the cpu to SVC32 mode and disable interrupts
         */
        mrs     r0,cpsr
-       bic     r0,r0,#0x1f
+       bic     r0,r0,#0x0c
        orr     r0,r0,#0xd3
        msr     cpsr,r0
-
+#endif
        /*
         * we do sys-critical inits only at reboot,
         * not when booting from ram!