]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
arm: dra7xx: Add DDR related data for DRA752 ES1.0
authorLokesh Vutla <lokeshvutla@ti.com>
Tue, 12 Feb 2013 21:29:07 +0000 (21:29 +0000)
committerTom Rini <trini@ti.com>
Mon, 11 Mar 2013 15:06:11 +0000 (11:06 -0400)
DRA752 uses DDR3. Populating the corresponding structures
with DDR3 data.
Writing into MA registers if only MA is present in that soc.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
arch/arm/cpu/armv7/omap-common/emif-common.c
arch/arm/cpu/armv7/omap4/sdram_elpida.c
arch/arm/cpu/armv7/omap5/hw_data.c
arch/arm/cpu/armv7/omap5/sdram.c
arch/arm/include/asm/emif.h

index 0683b9f74de25d3ac5110653e8652422f6c2c056..9eb1279d4112699d93c9ca511d267b7af1aaeeba 100644 (file)
@@ -1191,7 +1191,7 @@ void dmm_init(u32 base)
        writel(lisa_map_regs->dmm_lisa_map_0,
                &hw_lisa_map_regs->dmm_lisa_map_0);
 
-       if (omap_revision() >= OMAP4460_ES1_0) {
+       if (lisa_map_regs->is_ma_present) {
                hw_lisa_map_regs =
                    (struct dmm_lisa_map_regs *)MA_BASE;
 
index 01da790e3bb27580f02c5158ca72047950102592..20fc55216a1fb6aeca590695f55da5760dc88b8f 100644 (file)
@@ -94,14 +94,24 @@ const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2 = {
        .dmm_lisa_map_0 = 0xFF020100,
        .dmm_lisa_map_1 = 0,
        .dmm_lisa_map_2 = 0,
-       .dmm_lisa_map_3 = 0x80540300
+       .dmm_lisa_map_3 = 0x80540300,
+       .is_ma_present  = 0x0
 };
 
 const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2 = {
        .dmm_lisa_map_0 = 0xFF020100,
        .dmm_lisa_map_1 = 0,
        .dmm_lisa_map_2 = 0,
-       .dmm_lisa_map_3 = 0x80640300
+       .dmm_lisa_map_3 = 0x80640300,
+       .is_ma_present  = 0x0
+};
+
+const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2 = {
+       .dmm_lisa_map_0 = 0xFF020100,
+       .dmm_lisa_map_1 = 0,
+       .dmm_lisa_map_2 = 0,
+       .dmm_lisa_map_3 = 0x80640300,
+       .is_ma_present  = 0x1
 };
 
 static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
@@ -126,8 +136,10 @@ static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
 
        if (omap_rev == OMAP4430_ES1_0)
                *dmm_lisa_regs = &lisa_map_2G_x_1_x_2;
-       else
+       else if (omap_rev < OMAP4460_ES1_0)
                *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
+       else
+               *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2;
 }
 
 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
index 7f1808ca71ff7803782969ddb2885944b3c16cca..ced274e4db451a3a732851736fae6398a7654f0a 100644 (file)
@@ -586,6 +586,7 @@ void get_ioregs(const struct ctrl_ioregs **regs)
                *regs = &ioregs_omap5432_es1;
        break;
        case OMAP5432_ES2_0:
+       case DRA752_ES1_0:
                *regs = &ioregs_omap5432_es2;
        break;
 
index 2ef7fcdf4c68f4bcf33ac4418f792332feb6ee5d..6b461e4846021fee9899e77cbd23ae870382d76a 100644 (file)
@@ -155,7 +155,16 @@ const struct dmm_lisa_map_regs lisa_map_4G_x_2_x_2 = {
        .dmm_lisa_map_0 = 0x0,
        .dmm_lisa_map_1 = 0x0,
        .dmm_lisa_map_2 = 0x80740300,
-       .dmm_lisa_map_3 = 0xFF020100
+       .dmm_lisa_map_3 = 0xFF020100,
+       .is_ma_present  = 0x1
+};
+
+const struct dmm_lisa_map_regs lisa_map_512M_x_1 = {
+       .dmm_lisa_map_0 = 0x0,
+       .dmm_lisa_map_1 = 0x0,
+       .dmm_lisa_map_2 = 0x0,
+       .dmm_lisa_map_3 = 0x80500100,
+       .is_ma_present  = 0x1
 };
 
 static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
@@ -171,6 +180,7 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
                *regs = &emif_regs_532_mhz_2cs_es2;
                break;
        case OMAP5432_ES2_0:
+       case DRA752_ES1_0:
        default:
                *regs = &emif_regs_ddr3_532_mhz_1cs_es2;
        }
@@ -182,7 +192,18 @@ void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
 static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
                                                **dmm_lisa_regs)
 {
-       *dmm_lisa_regs = &lisa_map_4G_x_2_x_2;
+       switch (omap_revision()) {
+       case OMAP5430_ES1_0:
+       case OMAP5430_ES2_0:
+       case OMAP5432_ES1_0:
+       case OMAP5432_ES2_0:
+               *dmm_lisa_regs = &lisa_map_4G_x_2_x_2;
+               break;
+       case DRA752_ES1_0:
+       default:
+               *dmm_lisa_regs = &lisa_map_512M_x_1;
+       }
+
 }
 
 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
@@ -297,6 +318,7 @@ static void emif_get_ext_phy_ctrl_const_regs(const u32 **regs)
                *regs = ddr3_ext_phy_ctrl_const_base_es1;
                break;
        case OMAP5432_ES2_0:
+       case DRA752_ES1_0:
        default:
                *regs = ddr3_ext_phy_ctrl_const_base_es2;
 
index 9d72fe34fc71bc3ccf97176e5aac16450f553053..c5d1e6c837b976631b272cc4f51e851efdc90cf4 100644 (file)
@@ -697,6 +697,7 @@ struct dmm_lisa_map_regs {
        u32 dmm_lisa_map_1;
        u32 dmm_lisa_map_2;
        u32 dmm_lisa_map_3;
+       u8 is_ma_present;
 };
 
 #define CS0    0