am33xx/ddr.c: Fix regression on DDR2 platforms
authorTom Rini <trini@konsulko.com>
Thu, 2 Apr 2015 20:01:33 +0000 (16:01 -0400)
committerLothar Waßmann <LW@KARO-electronics.de>
Tue, 1 Sep 2015 12:38:16 +0000 (14:38 +0200)
Back in fc46bae a "clean up" was introduced that intended to reconcile
some of the AM335x codepaths based on how AM43xx operates.
Unfortunately this introduced a regression on the DDR2 platforms.  This
was un-noticed on DDR3 (everything except for Beaglebone White) as we
had already populated sdram_config correctly in sequence.  This change
brings us back to the older behavior and is fine on all platforms.

Tested on Beaglebone White, Beaglebone Black and AM335x GP EVM

Reported-by: Matt Ranostay <mranostay@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
arch/arm/cpu/armv7/am33xx/ddr.c

index 07a88c2..906cdb0 100644 (file)
@@ -167,9 +167,9 @@ void config_sdram(const struct emif_regs *regs, int nr)
                writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
                writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
        }
-       writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
        writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
        writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
+       writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
 }
 
 /**