]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
XPedite5200 board support
authorPeter Tyser <ptyser@xes-inc.com>
Mon, 1 Dec 2008 19:47:13 +0000 (13:47 -0600)
committerAndrew Fleming-AFLEMING <afleming@freescale.com>
Sat, 20 Dec 2008 00:18:51 +0000 (18:18 -0600)
Initial support for Extreme Engineering Solutions XPedite5200 -
a MPC8548-based PMC single board computer.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
MAINTAINERS
MAKEALL
Makefile
board/xes/common/Makefile
board/xes/common/fsl_85xx_pci.c

index be10eb49a0c73d34dc71d36dfcb092bc4269079d..60def0c34d7775cb6b3cfbe610a224da075d2bf2 100644 (file)
@@ -413,6 +413,7 @@ Rune Torgersen <runet@innovsys.com>
 
 Peter Tyser <ptyser@xes-inc.com>
 
+       XPEDITE5200     MPC8548
        XPEDITE5370     MPC8572
 
 David Updegraff <dave@cray.com>
diff --git a/MAKEALL b/MAKEALL
index a136bad7a8a5af32c4e367ca74c8896ec48650ed..5ce3f3112c94ad251586801741bcfa96acf8fddb 100755 (executable)
--- a/MAKEALL
+++ b/MAKEALL
@@ -385,6 +385,7 @@ LIST_85xx="         \
        TQM8548         \
        TQM8555         \
        TQM8560         \
+       XPEDITE5200     \
        XPEDITE5370     \
 "
 
index 752a370669fab3c96d33b70a73fe28f8a7991b7e..c532e5b146d2ffefabb936e056aaefe29db5cba3 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -2463,6 +2463,9 @@ TQM8560_config:           unconfig
        echo "#define CONFIG_BOARDNAME \"TQM$${CTYPE}\"">>$(obj)include/config.h;
        @$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx tqc
 
+XPEDITE5200_config:    unconfig
+       @$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5200 xes
+
 XPEDITE5370_config:    unconfig
        @$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5370 xes
 
index c5cd6331ef77c8fb525d53a472ec44015db7eefc..e7620f447f65c9754ddeb137ae312fc00bca90a0 100644 (file)
@@ -29,9 +29,10 @@ endif
 
 LIB    = $(obj)lib$(VENDOR).a
 
+COBJS-$(CONFIG_FSL_PCI_INIT)   += fsl_85xx_pci.o
 COBJS-$(CONFIG_MPC8572)                += fsl_8572_clk.o
 COBJS-$(CONFIG_MPC85xx)                += fsl_85xx_ddr.o
-COBJS-$(CONFIG_FSL_PCI_INIT)   += fsl_85xx_pci.o
+COBJS-$(CONFIG_NAND_ACTL)      += actl_nand.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS-y))
index 4b048814e89d8ae019a66a7f4f37a2223595155d..56f344795826bcfc98caa4275b0eb56a7abce586 100644 (file)
@@ -34,6 +34,9 @@ extern void fsl_pci_init(struct pci_controller *hose);
 
 int first_free_busno = 0;
 
+#ifdef CONFIG_PCI1
+static struct pci_controller pci1_hose;
+#endif
 #ifdef CONFIG_PCIE1
 static struct pci_controller pcie1_hose;
 #endif
@@ -44,6 +47,7 @@ static struct pci_controller pcie2_hose;
 static struct pci_controller pcie3_hose;
 #endif
 
+#ifdef CONFIG_MPC8572
 /* Correlate host/agent POR bits to usable info. Table 4-14 */
 struct host_agent_cfg_t {
        uchar pcie_root[3];
@@ -81,6 +85,38 @@ struct io_port_cfg_t {
        {{0, 0, 0}, 4},
        {{8, 0, 0}, 0},
 };
+#elif defined CONFIG_MPC8548
+/* Correlate host/agent POR bits to usable info. Table 4-12 */
+struct host_agent_cfg_t {
+       uchar pci_host[2];
+       uchar pcie_root[1];
+       uchar rio_host;
+} host_agent_cfg[8] = {
+       {{1, 1}, {0}, 0},
+       {{1, 1}, {1}, 0},
+       {{1, 1}, {0}, 1},
+       {{0, 0}, {0}, 0}, /* reserved */
+       {{0, 1}, {1}, 0},
+       {{1, 1}, {1}, 0},
+       {{0, 1}, {1}, 1},
+       {{1, 1}, {1}, 1}
+};
+
+/* Correlate port width POR bits to usable info. Table 4-13 */
+struct io_port_cfg_t {
+       uchar pcie_width[1];
+       uchar rio_width;
+} io_port_cfg[8] = {
+       {{0}, 0},
+       {{0}, 0},
+       {{0}, 0},
+       {{4}, 4},
+       {{4}, 4},
+       {{0}, 4},
+       {{0}, 4},
+       {{8}, 0},
+};
+#endif
 
 void pci_init_board(void)
 {
@@ -94,9 +130,65 @@ void pci_init_board(void)
        uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
        struct pci_region *r;
 
-       debug("   pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n",
-                       devdisr, io_sel, host_agent);
+#ifdef CONFIG_PCI1
+       uint pci_spd_norm = (gur->pordevsr & MPC85xx_PORDEVSR_PCI1_SPD);
+       uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32;
+       uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;
+       uint pcix = gur->pordevsr & MPC85xx_PORDEVSR_PCI1;
+       uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000;
+
+       width = 0; /* Silence compiler warning... */
+       io_sel &= 0xf; /* Silence compiler warning... */
+       pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
+       hose = &pci1_hose;
+       host = host_agent_cfg[host_agent].pci_host[0];
+       r = hose->regions;
+
+
+       if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
+               printf("\n    PCI1: %d bit %s, %s %d MHz, %s, %s\n",
+                       pci_32 ? 32 : 64,
+                       pcix ? "PCIX" : "PCI",
+                       pci_spd_norm ?  ">=" : "<=",
+                       pcix ? freq * 2 : freq,
+                       host ? "host" : "agent",
+                       pci_arb ? "arbiter" : "external-arbiter");
 
+               /* inbound */
+               r += fsl_pci_setup_inbound_windows(r);
+
+               /* outbound memory */
+               pci_set_region(r++,
+                               CONFIG_SYS_PCI1_MEM_BASE,
+                               CONFIG_SYS_PCI1_MEM_PHYS,
+                               CONFIG_SYS_PCI1_MEM_SIZE,
+                               PCI_REGION_MEM);
+
+               /* outbound io */
+               pci_set_region(r++,
+                               CONFIG_SYS_PCI1_IO_BASE,
+                               CONFIG_SYS_PCI1_IO_PHYS,
+                               CONFIG_SYS_PCI1_IO_SIZE,
+                               PCI_REGION_IO);
+
+               hose->region_count = r - hose->regions;
+
+               hose->first_busno = first_free_busno;
+               pci_setup_indirect(hose, (int)&pci->cfg_addr,
+                                  (int)&pci->cfg_data);
+
+               fsl_pci_init(hose);
+
+               first_free_busno = hose->last_busno+1;
+               printf("    PCI1 on bus %02x - %02x\n",
+                       hose->first_busno, hose->last_busno);
+       } else {
+               printf("    PCI1: disabled\n");
+       }
+#elif defined CONFIG_MPC8548
+       /* PCI1 not present on MPC8572 */
+       gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */
+#endif
 #ifdef CONFIG_PCIE1
        pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
        hose = &pcie1_hose;
@@ -143,7 +235,7 @@ void pci_init_board(void)
                if (!host)
                        fsl_pci_config_unlock(hose);
 
-               first_free_busno = hose->last_busno+1;
+               first_free_busno = hose->last_busno + 1;
                printf("    PCIE1 on bus %02x - %02x\n",
                                hose->first_busno, hose->last_busno);
        }
@@ -200,7 +292,6 @@ void pci_init_board(void)
                first_free_busno = hose->last_busno+1;
                printf("    PCIE2 on bus %02x - %02x\n",
                                hose->first_busno, hose->last_busno);
-
        }
 #else
        gur->devdisr |= MPC85xx_DEVDISR_PCIE2; /* disable */
@@ -267,6 +358,10 @@ extern void ft_fsl_pci_setup(void *blob, const char *pci_alias,
 
 void ft_board_pci_setup(void *blob, bd_t *bd)
 {
+       /* TODO - make node name (eg pci0) dynamic */
+#ifdef CONFIG_PCI1
+       ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
+#endif
 #ifdef CONFIG_PCIE1
        ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
 #endif