* Patch by Hans-Joerg Frieden, 06 Dec 2002

  Fix misc problems with AmigaOne support

* Patch by Chris Hallinan, 3 Dec 2002:
  minor cleanup to the MPC8245 EPIC driver

* Patch by Pierre Aubert , 28 Nov 2002
  Add support for external (SIU) interrupts on MPC8xx

* Patch by Pierre Aubert , 28 Nov 2002
  Fix nested syscalls bug in standalone applications

* Patch by David Müller, 27 Nov 2002:
  fix output of "pciinfo" command for CardBus bridge devices.

* Fix bug in TQM8260 board detection - boards got stuck when board ID
  was not readable

diff --git a/CHANGELOG b/CHANGELOG
index 7519b8f01a68c3e2ef2bf6da6e8f62be5d72d4c8..eb87e46f6db62a22ad59211b1b0b62cdcfe341d5 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,24 @@
 Changes since for U-Boot 0.1.0:
 ======================================================================
 
 Changes since for U-Boot 0.1.0:
 ======================================================================
 

+* Patch by Hans-Joerg Frieden, 06 Dec 2002
+  Fix misc problems with AmigaOne support
+
+* Patch by Chris Hallinan, 3 Dec 2002:
+  minor cleanup to the MPC8245 EPIC driver
+
+* Patch by Pierre Aubert , 28 Nov 2002
+  Add support for external (SIU) interrupts on MPC8xx
+
+* Patch by Pierre Aubert , 28 Nov 2002
+  Fix nested syscalls bug in standalone applications
+
+* Patch by David Müller, 27 Nov 2002:
+  fix output of "pciinfo" command for CardBus bridge devices.
+
+* Fix bug in TQM8260 board detection - boards got stuck when board ID
+  was not readable
+

 * Add LED indication for IDE activity on KUP4K board
 
 * Fix startup problems with VFD display on TRAB
 * Add LED indication for IDE activity on KUP4K board
 
 * Fix startup problems with VFD display on TRAB

diff --git a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
index 0cf5388a4336504aa500820a66082d0e481857b6..9d5c24e2fc3e718904cafe5c91f16b03d58ea9e0 100644 (file)
--- a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
+++ b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
@@ -76,9 +76,8 @@ __asm(" .globl send_kb                                      \n
 
 int checkboard (void)
 {
 
 int checkboard (void)
 {

-       printf ("AmigaOneG3SE\n");
-
-       return 1;
+       printf ("Board: AmigaOneG3SE\n");
+       return 0;

 }
 
 long initdram (int board_type)
 }
 
 long initdram (int board_type)


@@ -88,9 +87,9 @@ long initdram (int board_type)
 
 
 
 
 
 

-void after_reloc (ulong dest_addr)
+void after_reloc (ulong dest_addr, gd_t *gd)

 {
 {

-       DECLARE_GLOBAL_DATA_PTR;
+/* HJF:        DECLARE_GLOBAL_DATA_PTR; */

 
        board_init_r (gd, dest_addr);
 }
 
        board_init_r (gd, dest_addr);
 }

diff --git a/board/MAI/AmigaOneG3SE/Makefile b/board/MAI/AmigaOneG3SE/Makefile
index 727174640a7c7c9a45083f8721f92d9174852768..785f01f6cc1e5ddb8d144c5513030bc85f74777f 100644 (file)
--- a/board/MAI/AmigaOneG3SE/Makefile
+++ b/board/MAI/AmigaOneG3SE/Makefile
@@ -35,13 +35,16 @@ AOBJS       = board_asm_init.o memio.o
 
 OBJS   = $(COBJS) $(AOBJS) 
 
 
 OBJS   = $(COBJS) $(AOBJS) 
 

-## FIXME !!!
-# EMUOBJS = ../bios_emulator/scitech/src/x86emu/*.o
+EMUDIR  = ../bios_emulator/scitech/src/x86emu/
+EMUOBJ  = $(EMUDIR)decode.o $(EMUDIR)ops2.o $(EMUDIR)fpu.o $(EMUDIR)prim_ops.o \
+               $(EMUDIR)ops.o $(EMUDIR)sys.o
+EMUSRC = $(EMUOBJ:.o=.c)

 
 

-
-$(LIB):        .depend $(OBJS) $(EMUOBJS)
+$(LIB):        .depend $(OBJS) $(EMUSRC) 
+       make libx86emu.a -C ../bios_emulator/scitech/src/x86emu -f makefile.uboot CROSS_COMPILE=$(CROSS_COMPILE)

        -rm $(LIB)
        -rm $(LIB)

-       $(AR) crv $@ $(OBJS) $(EMUOBJS)
+       $(AR) crv $@ $(OBJS) $(EMUOBJ)
+

 
 #########################################################################
 
 
 #########################################################################
 

diff --git a/board/MAI/AmigaOneG3SE/articiaS.c b/board/MAI/AmigaOneG3SE/articiaS.c
index af85444f485c7c2437e6396034ab0add7dc6ab2d..5eddfc6ea749147ad601d5d0848f25805b1d85e8 100644 (file)
--- a/board/MAI/AmigaOneG3SE/articiaS.c
+++ b/board/MAI/AmigaOneG3SE/articiaS.c
@@ -82,8 +82,9 @@ static inline unsigned short NSto10PS (unsigned char spd_byte)
 
 long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks)
 {
 
 long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks)
 {

+    DECLARE_GLOBAL_DATA_PTR;

        int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR;
        int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR;

-       uint32 busclock = get_bus_freq (0);
+       uint32 busclock = gd->bus_clk;

        uint32 memclock = busclock;
        uint32 tmemclock = 1000000000 / (memclock / 100);
        uint32 datawidth;
        uint32 memclock = busclock;
        uint32 tmemclock = 1000000000 / (memclock / 100);
        uint32 datawidth;


@@ -404,7 +405,7 @@ long articiaS_ram_init (void)
        uint32 total_ram = 0;
 
        struct dimm_bank banks[4];      /* FIXME: Move to initram */
        uint32 total_ram = 0;
 
        struct dimm_bank banks[4];      /* FIXME: Move to initram */

-       uint32 busclock = get_bus_freq (0);
+       uint32 busclock = gd->bus_clk;

        uint32 memclock = busclock;
        uint32 reg32;
        uint32 refresh_clocks;
        uint32 memclock = busclock;
        uint32 reg32;
        uint32 refresh_clocks;

diff --git a/board/MAI/AmigaOneG3SE/articiaS_pci.c b/board/MAI/AmigaOneG3SE/articiaS_pci.c
index 774c32dd08c8901255884fb656c141a5718c3fdf..2a7763d84551fc0ed155a3c308bda0e252199997 100644 (file)
--- a/board/MAI/AmigaOneG3SE/articiaS_pci.c
+++ b/board/MAI/AmigaOneG3SE/articiaS_pci.c
@@ -26,7 +26,7 @@
 #include "memio.h"
 #include "articiaS.h"
 
 #include "memio.h"
 #include "articiaS.h"
 

-//#define ARTICIA_PCI_DEBUG
+#undef ARTICIA_PCI_DEBUG

 
 #ifdef  ARTICIA_PCI_DEBUG
 #define PRINTF(fmt,args...)     printf (fmt ,##args)
 
 #ifdef  ARTICIA_PCI_DEBUG
 #define PRINTF(fmt,args...)     printf (fmt ,##args)


@@ -512,7 +512,11 @@ int articiaS_init_vga (void)
        PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr);
        /* Find the first of this class on this bus */
        dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0);
        PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr);
        /* Find the first of this class on this bus */
        dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0);

-       if (dev != ~0) break;
+       if (dev != ~0) 
+       {
+           PRINTF("Found VGA Card at %02x:%02x:%02x\n", PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
+           break;
+       }

        busnr++;
        if (busnr > articiaS_hose.last_busno)
        {
        busnr++;
        if (busnr > articiaS_hose.last_busno)
        {


@@ -552,7 +556,7 @@ int articiaS_init_vga (void)
     /*
      * Now try to run the bios
      */
     /*
      * Now try to run the bios
      */

-
+    PRINTF("Trying to run bios now\n");

     if (execute_bios(dev, gd->relocaddr))
     {
        printf("OK\n");
     if (execute_bios(dev, gd->relocaddr))
     {
        printf("OK\n");

diff --git a/board/MAI/AmigaOneG3SE/config.mk b/board/MAI/AmigaOneG3SE/config.mk
index 0537cd977adb72eaf14317dedacd2dfe06cdb3df..d7d0e6bde22ae2490f13433a3ab1c17a3e671bd6 100644 (file)
--- a/board/MAI/AmigaOneG3SE/config.mk
+++ b/board/MAI/AmigaOneG3SE/config.mk
@@ -29,5 +29,5 @@ X86EMU =  -I../bios_emulator/scitech/include -I../bios_emulator/scitech/src/x86e
 
 TEXT_BASE = 0xfff00000
 
 
 TEXT_BASE = 0xfff00000
 

-PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) #-DDEBUG
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG 

 
 

diff --git a/board/MAI/AmigaOneG3SE/video.c b/board/MAI/AmigaOneG3SE/video.c
index d0e366c2ed54a84caf7ae24112f63a3da030cc46..e80288b12926f1976c50fcc6fd495fc9859bebb7 100644 (file)
--- a/board/MAI/AmigaOneG3SE/video.c
+++ b/board/MAI/AmigaOneG3SE/video.c
@@ -474,13 +474,13 @@ void video_easteregg(void)
 }
 #endif
 
 }
 #endif
 

-extern bd_t *bd_global;

 extern block_dev_desc_t * ide_get_dev(int dev);
 extern char version_string[];
 
 void video_banner(void)
 {
     block_dev_desc_t *ide;
 extern block_dev_desc_t * ide_get_dev(int dev);
 extern char version_string[];
 
 void video_banner(void)
 {
     block_dev_desc_t *ide;

+    DECLARE_GLOBAL_DATA_PTR;

     int i;
     char *s;
     int maxdev;
     int i;
     char *s;
     int maxdev;


@@ -513,8 +513,8 @@ void video_banner(void)
        video_clear();
        printf("%s\n\nCPU: ", version_string);
        checkcpu();
        video_clear();
        printf("%s\n\nCPU: ", version_string);
        checkcpu();

-       printf("DRAM: %ld MB\n", bd_global->bi_memsize/(1024*1024));
-       printf("FSB: %ld MHz\n", bd_global->bi_busfreq/1000000);
+       printf("DRAM: %ld MB\n", gd->bd->bi_memsize/(1024*1024));
+       printf("FSB: %ld MHz\n", gd->bd->bi_busfreq/1000000);

 
        printf("\n---- Disk summary ----\n");
        for (i = 0; i < maxdev; i++)
 
        printf("\n---- Disk summary ----\n");
        for (i = 0; i < maxdev; i++)

diff --git a/board/MAI/bios_emulator/glue.c b/board/MAI/bios_emulator/glue.c
index b765ed54c98f46b951d53dbf127895dd5db3e307..f59ffaa56d618a87f6b190aaa7940a277f044eae 100644 (file)
--- a/board/MAI/bios_emulator/glue.c
+++ b/board/MAI/bios_emulator/glue.c
@@ -271,9 +271,9 @@ int attempt_map_rom(pci_dev_t dev, void *copy_address)
     pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
     pci_write_config_dword(dev, i, bar_backup);
 
     pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
     pci_write_config_dword(dev, i, bar_backup);
 

-    /*  FIXME: */
-    bat_map(2, 0x80000000, 256*1024*1024);
-    show_bat_mapping();
+    /*  FIXME: Shouldn't be needed anymore*/
+    /* bat_map(2, 0x80000000, 256*1024*1024);
+       show_bat_mapping(); */

 
     /*
      * Since most cards can probably only do 16 bit IO addressing, we
 
     /*
      * Since most cards can probably only do 16 bit IO addressing, we


@@ -436,7 +436,6 @@ int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size)
 
 void show_bat_mapping(void)
 {
 
 void show_bat_mapping(void)
 {

-#ifdef DEBUG

     u32 dbat0u, dbat0l, ibat0u, ibat0l;
     u32 dbat1u, dbat1l, ibat1u, ibat1l;
     u32 dbat2u, dbat2l, ibat2u, ibat2l;
     u32 dbat0u, dbat0l, ibat0u, ibat0l;
     u32 dbat1u, dbat1l, ibat1u, ibat1l;
     u32 dbat2u, dbat2l, ibat2u, ibat2l;


@@ -477,7 +476,6 @@ void show_bat_mapping(void)
           dbat3u, dbat3l, ibat3u, ibat3l);
 
     printf("\nMSR: %08x   HID0: %08x   L2CR: %08x \n", msr,hid0, l2cr_reg);
           dbat3u, dbat3l, ibat3u, ibat3l);
 
     printf("\nMSR: %08x   HID0: %08x   L2CR: %08x \n", msr,hid0, l2cr_reg);

-#endif

 }
 
 
 }
 
 


@@ -485,44 +483,34 @@ void show_bat_mapping(void)
 void remove_init_data(void)
 {
     char *s;
 void remove_init_data(void)
 {
     char *s;

-    u32 batl = ((CFG_SDRAM_BASE+0x100000) | BATL_PP_RW);
-    u32 batu =((CFG_SDRAM_BASE+0x100000) | BATU_BL_256M | BATU_VS | BATU_VP);
-#if 0  /* already done in board_init_r() */
-    void *data = (void *)(CFG_INIT_RAM_ADDR+CFG_INIT_DATA_OFFSET);
-    unsigned char data2[CFG_INIT_DATA_SIZE];
-
-    /*  Make a copy of the data */
-    memcpy(data2, data, CFG_INIT_DATA_SIZE);
-#endif /* 0 */

 
     /*  Invalidate and disable data cache */
     invalidate_l1_data_cache();
     dcache_disable();
 
 
     /*  Invalidate and disable data cache */
     invalidate_l1_data_cache();
     dcache_disable();
 

-#if 0
-    /*  Copy to the real RAM address */
-    memcpy(data, data2, CFG_INIT_DATA_SIZE);
-#endif
-
-    /*printf("Before ICache enable\n");
-      show_bat_mapping();*/
-
-    __asm volatile ("isync        \n"
-                   "mtdbatu 2,%2 \n"
-                   "mtdbatl 2,%2 \n"
-                   "mtdbatu 1,%0 \n"
-                   "mtdbatl 1,%1 \n"
-                   "sync         \n"
-                   "isync        \n"
-                   : : "r" (batu), "r" (batl), "r" (0));
-
-    /* show_bat_mapping(); */

     s = getenv("x86_cache");
 
     s = getenv("x86_cache");
 

-    if (!s || (s && strcmp(s, "on")==0))
+    if (!s)

     {
        icache_enable();
        dcache_enable();
     }
     {
        icache_enable();
        dcache_enable();
     }

+    else if (s)
+    {
+        if (strcmp(s, "dcache")==0)
+        {
+            dcache_enable();
+        }
+        else if (strcmp(s, "icache") == 0)
+        {
+            icache_enable();
+        }
+        else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
+        {
+            dcache_enable();
+            icache_enable();
+        }
+    }

 
 

+    /*   show_bat_mapping();*/

 }
 }

diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.uboot b/board/MAI/bios_emulator/scitech/src/x86emu/makefile.uboot
new file mode 100644 (file)
index 0000000..d011cf5
--- /dev/null
+++ b/board/MAI/bios_emulator/scitech/src/x86emu/makefile.uboot
@@ -0,0 +1,80 @@
+#############################################################################
+#
+#                                              Realmode X86 Emulator Library
+#
+#              Copyright (C) 1996-1999 SciTech Software, Inc.
+#
+#  ========================================================================
+#
+#  Permission to use, copy, modify, distribute, and sell this software and
+#  its documentation for any purpose is hereby granted without fee,
+#  provided that the above copyright notice appear in all copies and that
+#  both that copyright notice and this permission notice appear in
+#  supporting documentation, and that the name of the authors not be used
+#  in advertising or publicity pertaining to distribution of the software
+#  without specific, written prior permission.  The authors makes no
+#  representations about the suitability of this software for any purpose.
+#  It is provided "as is" without express or implied warranty.
+#
+#  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+#  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+#  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+#  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+#  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+#  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+#  PERFORMANCE OF THIS SOFTWARE.
+#
+#  ========================================================================
+#
+# Descripton:   Linux specific makefile for the x86emu library.
+#
+#############################################################################
+CC = $(CROSS_COMPILE)gcc
+AR = $(CROSS_COMPILE)ar
+TARGETLIB = libx86emu.a
+TARGETDEBUGLIB =libx86emud.a
+
+OBJS=\
+decode.o \
+fpu.o \
+ops.o \
+ops2.o \
+prim_ops.o \
+sys.o
+
+DEBUGOBJS=debug.d \
+          decode.d \
+         fpu.d \
+         ops.d \
+         ops2.d \
+         prim_ops.d \
+         sys.d
+
+.SUFFIXES: .d
+
+all: $(TARGETLIB) $(TARGETDEBUGLIB)
+
+$(TARGETLIB): $(OBJS)
+       $(AR) rv $(TARGETLIB) $(OBJS)
+
+$(TARGETDEBUGLIB): $(DEBUGOBJS)
+       $(AR) rv $(TARGETDEBUGLIB) $(DEBUGOBJS)
+
+INCS   = -I. -Ix86emu -I../../include
+CFLAGS = -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG -Dprintk=printf -fsigned-char  -fomit-frame-pointer -mrelocatable -ffixed-r14 -meabi -mrelocatable -ffixed-r14 -meabi
+CDEBUGFLAGS = -DDEBUG
+
+.c.o:
+       $(CC) -g -O2 -Wall -c $(CFLAGS) $(INCS) $*.c
+
+.c.d:
+       $(CC) -g -O2 -Wall -c -o$*.d $(CFLAGS) $(CDEBUGFLAGS) $(INCS) $*.c
+
+.cpp.o:
+       $(CC) -c $(CFLAGS) $(INCS) $*.cpp
+
+clean:
+       rm -f *.a *.o *.d
+
+validate:      validate.o libx86emu.a
+       $(CC) -o validate validate.o -lx86emu -L.

diff --git a/board/MAI/bios_emulator/x86interface.c b/board/MAI/bios_emulator/x86interface.c
index b1ad61a6a0414a4ee2060e60c922d000c96ca796..e90ec5a67296b4f76bd62e0cac2812014100964b 100644 (file)
--- a/board/MAI/bios_emulator/x86interface.c
+++ b/board/MAI/bios_emulator/x86interface.c
@@ -398,9 +398,7 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
     u8 cfg;
     int i;
     char c;
     u8 cfg;
     int i;
     char c;

-#ifdef DEBUG

     char *s;
     char *s;

-#endif

 #ifdef EASTEREGG
     int easteregg_active = 0;
 #endif
 #ifdef EASTEREGG
     int easteregg_active = 0;
 #endif


@@ -409,6 +407,7 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
     unsigned char *msg;
     unsigned char current_attr;
 
     unsigned char *msg;
     unsigned char current_attr;
 

+    PRINTF("Trying to remove init data\n");

     remove_init_data();
     PRINTF("Removed init data from cache, now in RAM\n");
 
     remove_init_data();
     PRINTF("Removed init data from cache, now in RAM\n");
 


@@ -438,7 +437,7 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
        return 0;
     }
 
        return 0;
     }
 

-#ifdef DEBUG
+#if 1 /*def DEBUG*/

     s = getenv("x86_ask_start");
     if (s)
     {
     s = getenv("x86_ask_start");
     if (s)
     {


@@ -646,7 +645,7 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
     if (getenv("x86_do_inout")) do_inout();
 #endif
 
     if (getenv("x86_do_inout")) do_inout();
 #endif
 

-    dcache_disable();
+//FIXME:    dcache_disable();

     return 1;
 }
 
     return 1;
 }
 

diff --git a/board/MAI/menu/cmd_menu.c b/board/MAI/menu/cmd_menu.c
index a24ab492679a399679e6e7fdf8cbdba593d64866..178817374b3e6c5a2b9982a8eac669de947036c2 100644 (file)
--- a/board/MAI/menu/cmd_menu.c
+++ b/board/MAI/menu/cmd_menu.c
@@ -2,7 +2,7 @@
 #include <command.h>
 #include <cmd_menu.h>
 
 #include <command.h>
 #include <cmd_menu.h>
 

-int do_menu( cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[] )
+int do_menu( cmd_tbl_t *cmdtp, /*bd_t *bd,*/ int flag, int argc, char *argv[] )

 {
 //    printf("<NOT YET IMPLEMENTED>\n");
     return 0;
 {
 //    printf("<NOT YET IMPLEMENTED>\n");
     return 0;

diff --git a/board/hermes/u-boot.lds b/board/hermes/u-boot.lds
index 517a354ba67ee6716026d174791eb997ca6bdb49..11f55f3bcbf5b11e315e431825fc2e41f756df2f 100644 (file)
--- a/board/hermes/u-boot.lds
+++ b/board/hermes/u-boot.lds
@@ -56,11 +56,13 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within */
     /* the sector layout of our flash chips!   XXX FIXME XXX   */
 
     /* WARNING - the following is hand-optimized to fit within */
     /* the sector layout of our flash chips!   XXX FIXME XXX   */
 

-    cpu/mpc8xx/start.o (.text)
-    common/dlmalloc.o  (.text)
-    lib_ppc/ppcstring.o        (.text)
-    cpu/mpc8xx/interrupts.o (.text)
+    cpu/mpc8xx/start.o         (.text)
+    common/dlmalloc.o          (.text)
+    cpu/mpc8xx/interrupts.o    (.text)

     lib_ppc/time.o             (.text)
     lib_ppc/time.o             (.text)

+    lib_ppc/ticks.o            (.text)
+    lib_ppc/cache.o            (.text)
+    lib_generic/crc32.o                (.text)

     . = env_offset;
     common/environment.o(.text)
 
     . = env_offset;
     common/environment.o(.text)
 

diff --git a/board/tqm8260/tqm8260.c b/board/tqm8260/tqm8260.c
index 19229b7361075422fd6484b724f1e8a14cac23a1..784d72e3301a8af5ec1d2118fd88058c3bc5b3e4 100644 (file)
--- a/board/tqm8260/tqm8260.c
+++ b/board/tqm8260/tqm8260.c
@@ -202,7 +202,7 @@ int checkboard (void)
 
        if (!i || strncmp (str, "TQM8260", 7)) {
                puts ("### No HW ID - assuming TQM8260\n");
 
        if (!i || strncmp (str, "TQM8260", 7)) {
                puts ("### No HW ID - assuming TQM8260\n");

-               return (1);
+               return (0);

        }
 
        puts (str);
        }
 
        puts (str);

diff --git a/board/trab/vfd.c b/board/trab/vfd.c
index 7377b4df1a3fc2d6df72ec1ad8c5326df478d83e..234a9d4c02788908221a2bfea305266df5568720 100644 (file)
--- a/board/trab/vfd.c
+++ b/board/trab/vfd.c
@@ -344,7 +344,7 @@ int drv_vfd_init(void)
        DECLARE_GLOBAL_DATA_PTR;
 
        if (vfd_init_done != 0)
        DECLARE_GLOBAL_DATA_PTR;
 
        if (vfd_init_done != 0)

-               return;
+               return (0);

        vfd_init_done = 1;
 
        vfdbase = gd->fb_base;
        vfd_init_done = 1;
 
        vfdbase = gd->fb_base;

diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 300ac020046af060cb17a7ae3f4f9decfaa3b5f2..5a3b5574ee995c5ee33c3e2303b46ec8d8488e48 100644 (file)
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -205,9 +205,27 @@ void pci_header_show(pci_dev_t dev)
        PRINT ("  header type =                 0x%.2x\n", byte, PCI_HEADER_TYPE);
        PRINT ("  BIST =                        0x%.2x\n", byte, PCI_BIST);
        PRINT ("  base address 0 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_0);
        PRINT ("  header type =                 0x%.2x\n", byte, PCI_HEADER_TYPE);
        PRINT ("  BIST =                        0x%.2x\n", byte, PCI_BIST);
        PRINT ("  base address 0 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_0);

-       PRINT ("  base address 1 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_1);

 
 

-       if (header_type & 0x01) {               /* PCI-to-PCI bridge */
+       switch (header_type & 0x03) {
+       case PCI_HEADER_TYPE_NORMAL:    /* "normal" PCI device */
+               PRINT ("  base address 1 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_1);
+               PRINT ("  base address 2 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_2);
+               PRINT ("  base address 3 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_3);
+               PRINT ("  base address 4 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_4);
+               PRINT ("  base address 5 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_5);
+               PRINT ("  cardBus CIS pointer =         0x%.8x\n", dword, PCI_CARDBUS_CIS);
+               PRINT ("  sub system vendor ID =        0x%.4x\n", word, PCI_SUBSYSTEM_VENDOR_ID);
+               PRINT ("  sub system ID =               0x%.4x\n", word, PCI_SUBSYSTEM_ID);
+               PRINT ("  expansion ROM base address =  0x%.8x\n", dword, PCI_ROM_ADDRESS);
+               PRINT ("  interrupt line =              0x%.2x\n", byte, PCI_INTERRUPT_LINE);
+               PRINT ("  interrupt pin =               0x%.2x\n", byte, PCI_INTERRUPT_PIN);
+               PRINT ("  min Grant =                   0x%.2x\n", byte, PCI_MIN_GNT);
+               PRINT ("  max Latency =                 0x%.2x\n", byte, PCI_MAX_LAT);
+               break;
+               
+       case PCI_HEADER_TYPE_BRIDGE:    /* PCI-to-PCI bridge */
+
+               PRINT ("  base address 1 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_1);

                PRINT ("  primary bus number =          0x%.2x\n", byte, PCI_PRIMARY_BUS);
                PRINT ("  secondary bus number =        0x%.2x\n", byte, PCI_SECONDARY_BUS);
                PRINT ("  subordinate bus number =      0x%.2x\n", byte, PCI_SUBORDINATE_BUS);
                PRINT ("  primary bus number =          0x%.2x\n", byte, PCI_PRIMARY_BUS);
                PRINT ("  secondary bus number =        0x%.2x\n", byte, PCI_SECONDARY_BUS);
                PRINT ("  subordinate bus number =      0x%.2x\n", byte, PCI_SUBORDINATE_BUS);


@@ -227,19 +245,39 @@ void pci_header_show(pci_dev_t dev)
                PRINT ("  interrupt line =              0x%.2x\n", byte, PCI_INTERRUPT_LINE);
                PRINT ("  interrupt pin =               0x%.2x\n", byte, PCI_INTERRUPT_PIN);
                PRINT ("  bridge control =              0x%.4x\n", word, PCI_BRIDGE_CONTROL);
                PRINT ("  interrupt line =              0x%.2x\n", byte, PCI_INTERRUPT_LINE);
                PRINT ("  interrupt pin =               0x%.2x\n", byte, PCI_INTERRUPT_PIN);
                PRINT ("  bridge control =              0x%.4x\n", word, PCI_BRIDGE_CONTROL);

-    } else {                                   /* PCI device */
-               PRINT("  base address 2 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_2);
-               PRINT("  base address 3 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_3);
-               PRINT("  base address 4 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_4);
-               PRINT("  base address 5 =              0x%.8x\n", dword, PCI_BASE_ADDRESS_5);
-               PRINT("  cardBus CIS pointer =         0x%.8x\n", dword, PCI_CARDBUS_CIS);
-               PRINT("  sub system vendor ID =        0x%.4x\n", word, PCI_SUBSYSTEM_VENDOR_ID);
-               PRINT("  sub system ID =               0x%.4x\n", word, PCI_SUBSYSTEM_ID);
-               PRINT("  expansion ROM base address =  0x%.8x\n", dword, PCI_ROM_ADDRESS);
-               PRINT("  interrupt line =              0x%.2x\n", byte, PCI_INTERRUPT_LINE);
-               PRINT("  interrupt pin =               0x%.2x\n", byte, PCI_INTERRUPT_PIN);
-               PRINT("  min Grant =                   0x%.2x\n", byte, PCI_MIN_GNT);
-               PRINT("  max Latency =                 0x%.2x\n", byte, PCI_MAX_LAT);
+               break;
+
+       case PCI_HEADER_TYPE_CARDBUS:   /* PCI-to-CardBus bridge */
+
+               PRINT ("  capabilities =                0x%.2x\n", byte, PCI_CB_CAPABILITY_LIST);
+               PRINT ("  secondary status =            0x%.4x\n", word, PCI_CB_SEC_STATUS);
+               PRINT ("  primary bus number =          0x%.2x\n", byte, PCI_CB_PRIMARY_BUS);
+               PRINT ("  CardBus number =              0x%.2x\n", byte, PCI_CB_CARD_BUS);
+               PRINT ("  subordinate bus number =      0x%.2x\n", byte, PCI_CB_SUBORDINATE_BUS);
+               PRINT ("  CardBus latency timer =       0x%.2x\n", byte, PCI_CB_LATENCY_TIMER);         
+               PRINT ("  CardBus memory base 0 =       0x%.8x\n", dword, PCI_CB_MEMORY_BASE_0);
+               PRINT ("  CardBus memory limit 0 =      0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_0);
+               PRINT ("  CardBus memory base 1 =       0x%.8x\n", dword, PCI_CB_MEMORY_BASE_1);
+               PRINT ("  CardBus memory limit 1 =      0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_1);
+               PRINT ("  CardBus IO base 0 =           0x%.4x\n", word, PCI_CB_IO_BASE_0);
+               PRINT ("  CardBus IO base high 0 =      0x%.4x\n", word, PCI_CB_IO_BASE_0_HI);
+               PRINT ("  CardBus IO limit 0 =          0x%.4x\n", word, PCI_CB_IO_LIMIT_0);
+               PRINT ("  CardBus IO limit high 0 =     0x%.4x\n", word, PCI_CB_IO_LIMIT_0_HI);
+               PRINT ("  CardBus IO base 1 =           0x%.4x\n", word, PCI_CB_IO_BASE_1);
+               PRINT ("  CardBus IO base high 1 =      0x%.4x\n", word, PCI_CB_IO_BASE_1_HI);
+               PRINT ("  CardBus IO limit 1 =          0x%.4x\n", word, PCI_CB_IO_LIMIT_1);
+               PRINT ("  CardBus IO limit high 1 =     0x%.4x\n", word, PCI_CB_IO_LIMIT_1_HI);
+               PRINT ("  interrupt line =              0x%.2x\n", byte, PCI_INTERRUPT_LINE);
+               PRINT ("  interrupt pin =               0x%.2x\n", byte, PCI_INTERRUPT_PIN);
+               PRINT ("  bridge control =              0x%.4x\n", word, PCI_CB_BRIDGE_CONTROL);
+               PRINT ("  subvendor ID =                0x%.4x\n", word, PCI_CB_SUBSYSTEM_VENDOR_ID);
+               PRINT ("  subdevice ID =                0x%.4x\n", word, PCI_CB_SUBSYSTEM_ID);
+               PRINT ("  PC Card 16bit base address =  0x%.8x\n", dword, PCI_CB_LEGACY_MODE_BASE);
+               break;
+               
+       default:
+               printf("unknown header\n");
+               break;  

     }
 
 #undef PRINT
     }
 
 #undef PRINT

diff --git a/common/env_common.c b/common/env_common.c
index bd22e154281b26cbe4ff7af243c100db3c20d9c5..4f618d633fd76811406d35d35519ff8322c6dd57 100644 (file)
--- a/common/env_common.c
+++ b/common/env_common.c
@@ -156,6 +156,21 @@ static uchar env_get_char_init (int index)
        return (c);
 }
 
        return (c);
 }
 

+#ifdef CONFIG_AMIGAONEG3SE
+uchar env_get_char_memory (int index)
+{
+       DECLARE_GLOBAL_DATA_PTR;
+       uchar retval;
+       enable_nvram();
+       if (gd->env_valid) {
+               retval = ( *((uchar *)(gd->env_addr + index)) );
+       } else {
+               retval = ( default_environment[index] );
+       }
+       disable_nvram();
+       return retval;
+}
+#else

 uchar env_get_char_memory (int index)
 {
        DECLARE_GLOBAL_DATA_PTR;
 uchar env_get_char_memory (int index)
 {
        DECLARE_GLOBAL_DATA_PTR;


@@ -166,6 +181,7 @@ uchar env_get_char_memory (int index)
                return ( default_environment[index] );
        }
 }
                return ( default_environment[index] );
        }
 }

+#endif

 
 uchar *env_get_addr (int index)
 {
 
 uchar *env_get_addr (int index)
 {

diff --git a/common/env_nvram.c b/common/env_nvram.c
index fdfa4fcb65f8c23dc5faab8f919388cc2471a68f..76e84383d51aa4be81f5999ee4a929f9f4066503 100644 (file)
--- a/common/env_nvram.c
+++ b/common/env_nvram.c
@@ -66,7 +66,25 @@ extern int default_environment_size;
 extern uchar (*env_get_char)(int);
 extern uchar env_get_char_memory (int index);
 
 extern uchar (*env_get_char)(int);
 extern uchar env_get_char_memory (int index);
 

+#ifdef CONFIG_AMIGAONEG3SE
+uchar env_get_char_spec (int index)
+{
+#ifdef CFG_NVRAM_ACCESS_ROUTINE
+       uchar c;
+
+       nvram_read(&c, CFG_ENV_ADDR+index, 1);

 
 

+       return c;
+#else
+       DECLARE_GLOBAL_DATA_PTR;
+       uchar retval;
+       enable_nvram();
+       retval = *((uchar *)(gd->env_addr + index));
+       disable_nvram();
+       return retval;
+#endif
+}
+#else

 uchar env_get_char_spec (int index)
 {
 #ifdef CFG_NVRAM_ACCESS_ROUTINE
 uchar env_get_char_spec (int index)
 {
 #ifdef CFG_NVRAM_ACCESS_ROUTINE


@@ -81,6 +99,7 @@ uchar env_get_char_spec (int index)
        return *((uchar *)(gd->env_addr + index));
 #endif
 }
        return *((uchar *)(gd->env_addr + index));
 #endif
 }

+#endif

 
 void env_relocate_spec (void)
 {
 
 void env_relocate_spec (void)
 {


@@ -94,12 +113,18 @@ void env_relocate_spec (void)
 int saveenv (void)
 {
        int rcode = 0;
 int saveenv (void)
 {
        int rcode = 0;

-
+#ifdef CONFIG_AMIGAONEG3SE
+       enable_nvram();
+#endif

 #ifdef CFG_NVRAM_ACCESS_ROUTINE
        nvram_write(CFG_ENV_ADDR, env_ptr, CFG_ENV_SIZE);
 #else
        if (memcpy ((char *)CFG_ENV_ADDR, env_ptr, CFG_ENV_SIZE) == NULL)
                    rcode = 1 ;
 #ifdef CFG_NVRAM_ACCESS_ROUTINE
        nvram_write(CFG_ENV_ADDR, env_ptr, CFG_ENV_SIZE);
 #else
        if (memcpy ((char *)CFG_ENV_ADDR, env_ptr, CFG_ENV_SIZE) == NULL)
                    rcode = 1 ;

+#endif
+#ifdef CONFIG_AMIGAONEG3SE
+       udelay(10000);
+       disable_nvram();

 #endif
        return rcode;
 }
 #endif
        return rcode;
 }


@@ -113,7 +138,9 @@ int saveenv (void)
 int env_init (void)
 {
        DECLARE_GLOBAL_DATA_PTR;
 int env_init (void)
 {
        DECLARE_GLOBAL_DATA_PTR;

-
+#ifdef CONFIG_AMIGAONEG3SE
+       enable_nvram();
+#endif

 #if defined(CFG_NVRAM_ACCESS_ROUTINE)
        ulong crc;
        uchar data[ENV_SIZE];
 #if defined(CFG_NVRAM_ACCESS_ROUTINE)
        ulong crc;
        uchar data[ENV_SIZE];


@@ -131,7 +158,9 @@ int env_init (void)
                gd->env_addr  = (ulong)&default_environment[0];
                gd->env_valid = 0;
        }
                gd->env_addr  = (ulong)&default_environment[0];
                gd->env_valid = 0;
        }

-
+#ifdef CONFIG_AMIGAONEG3SE
+       disable_nvram();
+#endif

        return (0);
 }
 
        return (0);
 }
 

diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
index fe08f8e8379df5657872f59f2437ab0217ffced6..0d63144356f01d130da131f362e4f08c767f4929 100644 (file)
--- a/cpu/74xx_7xx/start.S
+++ b/cpu/74xx_7xx/start.S
@@ -177,7 +177,14 @@ SystemCall:
        add     r11,r11,r0
        lwz     r11,0(r11)
 
        add     r11,r11,r0
        lwz     r11,0(r11)
 

-       li      r12,0xd00-4*3           /* save LR & SRRx */
+       li      r20,0xd00-4             /* Get stack pointer */
+       lwz     r12,0(r20)
+       subi    r12,r12,12              /* Adjust stack pointer */
+       li      r0,0xc00+_end_back-SystemCall
+       cmplw   0, r0, r12              /* Check stack overflow */
+       bgt     1f
+       stw     r12,0(r20)
+

        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0
        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0


@@ -202,7 +209,9 @@ _back:
        mtmsr   r11
        SYNC
 
        mtmsr   r11
        SYNC
 

-       li      r12,0xd00-4*3           /* restore regs */
+       li      r12,0xd00-4             /* restore regs */
+       lwz     r12,0(r12)
+

        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)
        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)


@@ -210,8 +219,13 @@ _back:
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 

+       addi    r12,r12,12              /* Adjust stack pointer */
+       li      r20,0xd00-4
+       stw     r12,0(r20)
+

        SYNC
        rfi
        SYNC
        rfi

+_end_back:

 
        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 
 
        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 


@@ -716,6 +730,9 @@ in_ram:
        bne     5b
 6:
        mr      r3, r10         /* Destination Address          */
        bne     5b
 6:
        mr      r3, r10         /* Destination Address          */

+#ifdef CONFIG_AMIGAONEG3SE
+       mr      r4, r9          /* Use RAM copy of the global data */
+#endif

        bl      after_reloc
 
        /* not reached - end relocate_code */
        bl      after_reloc
 
        /* not reached - end relocate_code */

diff --git a/cpu/mpc824x/drivers/epic/epic.h b/cpu/mpc824x/drivers/epic/epic.h
index 7751db2e7ab6efc310c9296166ab742f11d32df1..17e4afb6faf862f87d8959545654a8be06becd64 100644 (file)
--- a/cpu/mpc824x/drivers/epic/epic.h
+++ b/cpu/mpc824x/drivers/epic/epic.h
@@ -108,6 +108,9 @@
 #define EPIC_PROC_INT_ACK_REG (EPIC_EUMBBAR + 0x200a0)/* Int. acknowledge */
 #define EPIC_PROC_EOI_REG (EPIC_EUMBBAR + 0x200b0)/* End of interrupt */
 
 #define EPIC_PROC_INT_ACK_REG (EPIC_EUMBBAR + 0x200a0)/* Int. acknowledge */
 #define EPIC_PROC_EOI_REG (EPIC_EUMBBAR + 0x200b0)/* End of interrupt */
 

+#define EPIC_VEC_PRI_MASK      0x80000000 /* Mask Interrupt bit in IVPR */
+#define EPIC_VEC_PRI_DFLT_PRI  8          /* Interrupt Priority in IVPR */
+

 /* Error code */
 
 #define OK       0
 /* Error code */
 
 #define OK       0

diff --git a/cpu/mpc824x/drivers/epic/epic1.c b/cpu/mpc824x/drivers/epic/epic1.c
index 362e12970d2ef03620ad298e08cbffc03080a674..eb7ed4017d43523415214007c4a63693904e579e 100644 (file)
--- a/cpu/mpc824x/drivers/epic/epic1.c
+++ b/cpu/mpc824x/drivers/epic/epic1.c
@@ -70,6 +70,10 @@ void epicInit
     tmp = sysEUMBBARRead(EPIC_GLOBAL_REG);
     tmp |= 0xa0000000;                  /* Set the Global Conf. register */
     sysEUMBBARWrite(EPIC_GLOBAL_REG, tmp);
     tmp = sysEUMBBARRead(EPIC_GLOBAL_REG);
     tmp |= 0xa0000000;                  /* Set the Global Conf. register */
     sysEUMBBARWrite(EPIC_GLOBAL_REG, tmp);

+       /*
+        * Wait for EPIC to reset - CLH
+        */
+    while( (sysEUMBBARRead(EPIC_GLOBAL_REG) & 0x80000000) == 1);

     sysEUMBBARWrite(EPIC_GLOBAL_REG, 0x20000000);
     tmp = sysEUMBBARRead(EPIC_INT_CONF_REG);    /* Read interrupt conf. reg */
 
     sysEUMBBARWrite(EPIC_GLOBAL_REG, 0x20000000);
     tmp = sysEUMBBARRead(EPIC_INT_CONF_REG);    /* Read interrupt conf. reg */
 


@@ -81,7 +85,8 @@ void epicInit
         sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp);
         }
 
         sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp);
         }
 

-    while (epicIntAck() != 0xff);       /* Clear all pending interrupts */
+    while (epicIntAck() != 0xff)       /* Clear all pending interrupts */
+               epicEOI();

 }
 
 /****************************************************************************
 }
 
 /****************************************************************************


@@ -92,18 +97,18 @@ void epicInit
  *
  *  RETURNS:  None
  */
  *
  *  RETURNS:  None
  */

-void epicIntEnable
-    (
-    int intVec        /* Interrupt Vector Number */
-    )
-    {
+void epicIntEnable(int intVec)
+{

     ULONG tmp;
     ULONG srAddr;
 
     srAddr = SrcVecTable[intVec].srcAddr;  /* Retrieve src Vec/Prio register */
     tmp = sysEUMBBARRead(srAddr);
     ULONG tmp;
     ULONG srAddr;
 
     srAddr = SrcVecTable[intVec].srcAddr;  /* Retrieve src Vec/Prio register */
     tmp = sysEUMBBARRead(srAddr);

-    tmp &= 0x7fffffff;             /* Clear the mask bit */
+    tmp &= ~EPIC_VEC_PRI_MASK;             /* Clear the mask bit */
+    tmp |= (EPIC_VEC_PRI_DFLT_PRI << 16);   /* Set priority to Default - CLH */
+    tmp |= intVec;                                        /* Set Vector number */

     sysEUMBBARWrite(srAddr, tmp);
     sysEUMBBARWrite(srAddr, tmp);

+

     return;
     }
 
     return;
     }
 

diff --git a/cpu/mpc824x/interrupts.c b/cpu/mpc824x/interrupts.c
index 2011671724b65f3ff5877097312097f7c91f9e49..12841b3079f05ab49ecb280984db55100ba4fe7b 100644 (file)
--- a/cpu/mpc824x/interrupts.c
+++ b/cpu/mpc824x/interrupts.c
@@ -92,6 +92,8 @@ int interrupt_init (void)
         */
 
        epicInit (EPIC_DIRECT_IRQ, 0);
         */
 
        epicInit (EPIC_DIRECT_IRQ, 0);

+       /* EPIC won't generate INT unless Current Task Pri < 15 */
+       epicCurTaskPrioSet(0);

 
        set_dec (decrementer_count);
 
 
        set_dec (decrementer_count);
 

diff --git a/cpu/mpc824x/start.S b/cpu/mpc824x/start.S
index bd9706de7c6c15362ae395916bbd44b162408433..18b8e612608790909c5d57f7f63bc07ce31a8606 100644 (file)
--- a/cpu/mpc824x/start.S
+++ b/cpu/mpc824x/start.S
@@ -278,7 +278,14 @@ SystemCall:
        add     r11,r11,r0
        lwz     r11,0(r11)
 
        add     r11,r11,r0
        lwz     r11,0(r11)
 

-       li      r12,0xd00-4*3           /* save LR & SRRx */
+       li      r20,0xd00-4             /* Get stack pointer */
+       lwz     r12,0(r20)
+       subi    r12,r12,12              /* Adjust stack pointer */
+       li      r0,0xc00+_end_back-SystemCall
+       cmplw   0, r0, r12              /* Check stack overflow */
+       bgt     1f
+       stw     r12,0(r20)
+

        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0
        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0


@@ -303,7 +310,9 @@ _back:
        mtmsr   r11
        SYNC
 
        mtmsr   r11
        SYNC
 

-       li      r12,0xd00-4*3           /* restore regs */
+       li      r12,0xd00-4             /* restore regs */
+       lwz     r12,0(r12)
+

        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)
        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)


@@ -311,8 +320,13 @@ _back:
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 

+       addi    r12,r12,12              /* Adjust stack pointer */
+       li      r20,0xd00-4
+       stw     r12,0(r20)
+

        SYNC
        rfi
        SYNC
        rfi

+_end_back:

 
        STD_EXCEPTION(EXC_OFF_TRACE, SingleStep, UnknownException)
 
 
        STD_EXCEPTION(EXC_OFF_TRACE, SingleStep, UnknownException)
 

diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S
index 10a8988ee855925fd0f05ffce10064bc5dc2b203..d79c5789f78d5f7117ec63a10753d31215b71420 100644 (file)
--- a/cpu/mpc8260/start.S
+++ b/cpu/mpc8260/start.S
@@ -324,7 +324,14 @@ SystemCall:
        add     r11,r11,r0
        lwz     r11,0(r11)
 
        add     r11,r11,r0
        lwz     r11,0(r11)
 

-       li      r12,0xd00-4*3           /* save LR & SRRx */
+       li      r20,0xd00-4             /* Get stack pointer */
+       lwz     r12,0(r20)
+       subi    r12,r12,12              /* Adjust stack pointer */
+       li      r0,0xc00+_end_back-SystemCall
+       cmplw   0, r0, r12              /* Check stack overflow */
+       bgt     1f
+       stw     r12,0(r20)
+

        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0
        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0


@@ -349,7 +356,9 @@ _back:
        mtmsr   r11
        SYNC
 
        mtmsr   r11
        SYNC
 

-       li      r12,0xd00-4*3           /* restore regs */
+       li      r12,0xd00-4             /* restore regs */
+       lwz     r12,0(r12)
+

        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)
        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)


@@ -357,8 +366,13 @@ _back:
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 

+       addi    r12,r12,12              /* Adjust stack pointer */
+       li      r20,0xd00-4
+       stw     r12,0(r20)
+

        SYNC
        rfi
        SYNC
        rfi

+_end_back:

 
        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 
 
        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 

diff --git a/cpu/mpc8xx/interrupts.c b/cpu/mpc8xx/interrupts.c
index 57ff4ddf6bac6471ff05c8ca7c0351f3008ddba5..866482600fc79d380ee1a43ae144bc2868427d6f 100644 (file)
--- a/cpu/mpc8xx/interrupts.c
+++ b/cpu/mpc8xx/interrupts.c
@@ -28,99 +28,104 @@
 #include <asm/processor.h>
 #include <commproc.h>
 
 #include <asm/processor.h>
 #include <commproc.h>
 

-/****************************************************************************/
+/************************************************************************/

 
 

-unsigned decrementer_count;            /* count value for 1e6/HZ microseconds */
+unsigned decrementer_count;    /* count value for 1e6/HZ microseconds  */

 
 

-/****************************************************************************/
+/************************************************************************/

 
 /*
  * CPM interrupt vector functions.
  */
 
 /*
  * CPM interrupt vector functions.
  */

-struct cpm_action {
-        interrupt_handler_t *handler;
-        void *arg;
+struct interrupt_action {
+       interrupt_handler_t *handler;
+       void *arg;

 };
 
 };
 

-static struct cpm_action cpm_vecs[CPMVEC_NR];
+static struct interrupt_action cpm_vecs[CPMVEC_NR];
+static struct interrupt_action irq_vecs[NR_IRQS];

 
 static void cpm_interrupt_init (void);
 
 static void cpm_interrupt_init (void);

-static void cpm_interrupt(int irq, struct pt_regs * regs);
+static void cpm_interrupt (void *regs);

 
 

-/****************************************************************************/
+/************************************************************************/

 
 

-static __inline__ unsigned long get_msr(void)
+static __inline__ unsigned long get_msr (void)

 {
 {

-    unsigned long msr;
+       unsigned long msr;

 
 

-    asm volatile("mfmsr %0" : "=r" (msr) :);
-    return msr;
+       asm volatile ("mfmsr %0":"=r" (msr):);
+
+       return msr;

 }
 
 }
 

-static __inline__ void set_msr(unsigned long msr)
+static __inline__ void set_msr (unsigned long msr)

 {
 {

-    asm volatile("mtmsr %0" : : "r" (msr));
+       asm volatile ("mtmsr %0"::"r" (msr));

 }
 
 }
 

-static __inline__ unsigned long get_dec(void)
+static __inline__ unsigned long get_dec (void)

 {
 {

-    unsigned long val;
+       unsigned long val;
+
+       asm volatile ("mfdec %0":"=r" (val):);

 
 

-    asm volatile("mfdec %0" : "=r" (val) :);
-    return val;
+       return val;

 }
 
 
 }
 
 

-static __inline__ void set_dec(unsigned long val)
+static __inline__ void set_dec (unsigned long val)

 {
 {

-    asm volatile("mtdec %0" : : "r" (val));
+       asm volatile ("mtdec %0"::"r" (val));

 }
 
 
 void enable_interrupts (void)
 {
 }
 
 
 void enable_interrupts (void)
 {

-       set_msr (get_msr() | MSR_EE);
+       set_msr (get_msr () | MSR_EE);

 }
 
 /* returns flag if MSR_EE was set before */
 int disable_interrupts (void)
 {
 }
 
 /* returns flag if MSR_EE was set before */
 int disable_interrupts (void)
 {

-       ulong msr = get_msr();
+       ulong msr = get_msr ();
+

        set_msr (msr & ~MSR_EE);
        return ((msr & MSR_EE) != 0);
 }
 
        set_msr (msr & ~MSR_EE);
        return ((msr & MSR_EE) != 0);
 }
 

-/****************************************************************************/
+/************************************************************************/

 
 

-int interrupt_init(void)
+int interrupt_init (void)

 {
 {

-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile immap_t *immr = (immap_t *) CFG_IMMR;

 
 

-       decrementer_count = get_tbclk() / CFG_HZ;
+       decrementer_count = get_tbclk () / CFG_HZ;

 
 

-       cpm_interrupt_init();
+       /* disable all interrupts */
+       immr->im_siu_conf.sc_simask = 0;

 
 

-       /* disable all interrupts except for the CPM interrupt */
-       immr->im_siu_conf.sc_simask = 1 << (31-CPM_INTERRUPT);
+       /* Configure CPM interrupts */
+       cpm_interrupt_init ();

 
        set_dec (decrementer_count);
 
 
        set_dec (decrementer_count);
 

-       set_msr (get_msr() | MSR_EE);
+       set_msr (get_msr () | MSR_EE);

 
        return (0);
 }
 
 
        return (0);
 }
 

-/****************************************************************************/
+/************************************************************************/

 
 /*
  * Handle external interrupts
  */
 
 /*
  * Handle external interrupts
  */

-void external_interrupt(struct pt_regs *regs)
+void external_interrupt (struct pt_regs *regs)

 {
 {

-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
-       int     irq;
-       ulong   simask, newmask;
-       ulong   vec, v_bit;
+       volatile immap_t *immr = (immap_t *) CFG_IMMR;
+       int irq;
+       ulong simask, newmask;
+       ulong vec, v_bit;

 
        /*
         * read the SIVEC register and shift the bits down
 
        /*
         * read the SIVEC register and shift the bits down


@@ -137,14 +142,15 @@ void external_interrupt(struct pt_regs *regs)
        newmask = simask & (~(0xFFFF0000 >> irq));
        immr->im_siu_conf.sc_simask = newmask;
 
        newmask = simask & (~(0xFFFF0000 >> irq));
        immr->im_siu_conf.sc_simask = newmask;
 

-       if (!(irq & 0x1)) {                     /* External Interrupt ?         */
+       if (!(irq & 0x1)) {             /* External Interrupt ?     */

                ulong siel;
                ulong siel;

+

                /*
                 * Read Interrupt Edge/Level Register
                 */
                siel = immr->im_siu_conf.sc_siel;
 
                /*
                 * Read Interrupt Edge/Level Register
                 */
                siel = immr->im_siu_conf.sc_siel;
 

-               if (siel & v_bit) {             /* edge triggered interrupt ?   */
+               if (siel & v_bit) {     /* edge triggered interrupt ?   */

                        /*
                         * Rewrite SIPEND Register to clear interrupt
                         */
                        /*
                         * Rewrite SIPEND Register to clear interrupt
                         */


@@ -152,34 +158,29 @@ void external_interrupt(struct pt_regs *regs)
                }
        }
 
                }
        }
 

-       switch (irq) {
-       case CPM_INTERRUPT:
-               cpm_interrupt (irq, regs);
-               break;
-       default:
+       if (irq_vecs[irq].handler != NULL) {
+               irq_vecs[irq].handler (irq_vecs[irq].arg);
+       } else {

                printf ("\nBogus External Interrupt IRQ %d Vector %ld\n",
                printf ("\nBogus External Interrupt IRQ %d Vector %ld\n",

-                       irq, vec);
+                               irq, vec);

                /* turn off the bogus interrupt to avoid it from now */
                simask &= ~v_bit;
                /* turn off the bogus interrupt to avoid it from now */
                simask &= ~v_bit;

-               break;

        }
        }

-

        /*
         * Re-Enable old Interrupt Mask
         */
        immr->im_siu_conf.sc_simask = simask;
 }
 
        /*
         * Re-Enable old Interrupt Mask
         */
        immr->im_siu_conf.sc_simask = simask;
 }
 

-/****************************************************************************/
+/************************************************************************/

 
 /*
  * CPM interrupt handler
  */
 
 /*
  * CPM interrupt handler
  */

-static void
-cpm_interrupt(int irq, struct pt_regs * regs)
+static void cpm_interrupt (void *regs)

 {
 {

-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
-       uint    vec;
+       volatile immap_t *immr = (immap_t *) CFG_IMMR;
+       uint vec;

 
        /*
         * Get the vector by setting the ACK bit
 
        /*
         * Get the vector by setting the ACK bit


@@ -190,13 +191,14 @@ cpm_interrupt(int irq, struct pt_regs * regs)
        vec >>= 11;
 
        if (cpm_vecs[vec].handler != NULL) {
        vec >>= 11;
 
        if (cpm_vecs[vec].handler != NULL) {

-               (*cpm_vecs[vec].handler)(cpm_vecs[vec].arg);
+               (*cpm_vecs[vec].handler) (cpm_vecs[vec].arg);

        } else {
                immr->im_cpic.cpic_cimr &= ~(1 << vec);
                printf ("Masking bogus CPM interrupt vector 0x%x\n", vec);
        }
        /*
        } else {
                immr->im_cpic.cpic_cimr &= ~(1 << vec);
                printf ("Masking bogus CPM interrupt vector 0x%x\n", vec);
        }
        /*

-        * After servicing the interrupt, we have to remove the status indicator.
+        * After servicing the interrupt,
+        * we have to remove the status indicator.

         */
        immr->im_cpic.cpic_cisr |= (1 << vec);
 }
         */
        immr->im_cpic.cpic_cisr |= (1 << vec);
 }


@@ -207,75 +209,110 @@ cpm_interrupt(int irq, struct pt_regs * regs)
  * to do is ACK it and return. This is a no-op function so we don't
  * need any special tests in the interrupt handler.
  */
  * to do is ACK it and return. This is a no-op function so we don't
  * need any special tests in the interrupt handler.
  */

-static void
-cpm_error_interrupt (void *dummy)
+static void cpm_error_interrupt (void *dummy)

 {
 }
 
 {
 }
 

-/****************************************************************************/
-
+/************************************************************************/

 /*
 /*

- * Install and free a CPM interrupt handler.
+ * Install and free an interrupt handler

  */
  */

-
-void
-irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
+void irq_install_handler (int vec, interrupt_handler_t * handler,
+                                                 void *arg)

 {
 {

-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
-
-       if (cpm_vecs[vec].handler != NULL) {
-               printf ("CPM interrupt 0x%x replacing 0x%x\n",
-                       (uint)handler, (uint)cpm_vecs[vec].handler);
-       }
-       cpm_vecs[vec].handler = handler;
-       cpm_vecs[vec].arg     = arg;
-       immr->im_cpic.cpic_cimr |= (1 << vec);
+       volatile immap_t *immr = (immap_t *) CFG_IMMR;
+
+       if ((vec & CPMVEC_OFFSET) != 0) {
+               /* CPM interrupt */
+               vec &= 0xffff;
+               if (cpm_vecs[vec].handler != NULL) {
+                       printf ("CPM interrupt 0x%x replacing 0x%x\n",
+                               (uint) handler,
+                               (uint) cpm_vecs[vec].handler);
+               }
+               cpm_vecs[vec].handler = handler;
+               cpm_vecs[vec].arg = arg;
+               immr->im_cpic.cpic_cimr |= (1 << vec);
+#if 0
+               printf ("Install CPM interrupt for vector %d ==> %p\n",
+                       vec, handler);
+#endif
+       } else {
+               /* SIU interrupt */
+               if (irq_vecs[vec].handler != NULL) {
+                       printf ("SIU interrupt %d 0x%x replacing 0x%x\n",
+                               vec,
+                               (uint) handler,
+                               (uint) cpm_vecs[vec].handler);
+               }
+               irq_vecs[vec].handler = handler;
+               irq_vecs[vec].arg = arg;
+               immr->im_siu_conf.sc_simask |= 1 << (31 - vec);

 #if 0
 #if 0

-       printf ("Install CPM interrupt for vector %d ==> %p\n", vec, handler);
+               printf ("Install SIU interrupt for vector %d ==> %p\n",
+                       vec, handler);

 #endif
 #endif

+       }

 }
 
 }
 

-void
-irq_free_handler(int vec)
+void irq_free_handler (int vec)

 {
 {

-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile immap_t *immr = (immap_t *) CFG_IMMR;
+
+       if ((vec & CPMVEC_OFFSET) != 0) {
+               /* CPM interrupt */
+               vec &= 0xffff;
+#if 0
+               printf ("Free CPM interrupt for vector %d ==> %p\n",
+                       vec, cpm_vecs[vec].handler);
+#endif
+               immr->im_cpic.cpic_cimr &= ~(1 << vec);
+               cpm_vecs[vec].handler = NULL;
+               cpm_vecs[vec].arg = NULL;
+       } else {
+               /* SIU interrupt */

 #if 0
 #if 0

-       printf ("Free CPM interrupt for vector %d ==> %p\n",
-               vec, cpm_vecs[vec].handler);
+               printf ("Free CPM interrupt for vector %d ==> %p\n",
+                       vec, cpm_vecs[vec].handler);

 #endif
 #endif

-       immr->im_cpic.cpic_cimr &= ~(1 << vec);
-       cpm_vecs[vec].handler = NULL;
-       cpm_vecs[vec].arg     = NULL;
+               immr->im_siu_conf.sc_simask &= ~(1 << (31 - vec));
+               irq_vecs[vec].handler = NULL;
+               irq_vecs[vec].arg = NULL;
+       }

 }
 
 }
 

-/****************************************************************************/
+/************************************************************************/

 
 

-static void
-cpm_interrupt_init (void)
+static void cpm_interrupt_init (void)

 {
 {

-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile immap_t *immr = (immap_t *) CFG_IMMR;

 
        /*
         * Initialize the CPM interrupt controller.
         */
 
        immr->im_cpic.cpic_cicr =
 
        /*
         * Initialize the CPM interrupt controller.
         */
 
        immr->im_cpic.cpic_cicr =

-               ( CICR_SCD_SCC4 |
-                 CICR_SCC_SCC3 |
-                 CICR_SCB_SCC2 |
-                 CICR_SCA_SCC1 ) | ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK;
+               (CICR_SCD_SCC4 |
+                CICR_SCC_SCC3 |
+                CICR_SCB_SCC2 |
+                CICR_SCA_SCC1) | ((CPM_INTERRUPT / 2) << 13) | CICR_HP_MASK;

 
        immr->im_cpic.cpic_cimr = 0;
 
        /*
         * Install the error handler.
         */
 
        immr->im_cpic.cpic_cimr = 0;
 
        /*
         * Install the error handler.
         */

-       irq_install_handler(CPMVEC_ERROR, cpm_error_interrupt, NULL);
+       irq_install_handler (CPMVEC_ERROR, cpm_error_interrupt, NULL);

 
        immr->im_cpic.cpic_cicr |= CICR_IEN;
 
        immr->im_cpic.cpic_cicr |= CICR_IEN;

+
+       /*
+        * Install the cpm interrupt handler
+        */
+       irq_install_handler (CPM_INTERRUPT, cpm_interrupt, NULL);

 }
 
 }
 

-/****************************************************************************/
+/************************************************************************/

 
 volatile ulong timestamp = 0;
 
 
 volatile ulong timestamp = 0;
 


@@ -284,18 +321,19 @@ volatile ulong timestamp = 0;
  * with interrupts disabled.
  * Trivial implementation - no need to be really accurate.
  */
  * with interrupts disabled.
  * Trivial implementation - no need to be really accurate.
  */

-void timer_interrupt(struct pt_regs *regs)
+void timer_interrupt (struct pt_regs *regs)

 {
 {

-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile immap_t *immr = (immap_t *) CFG_IMMR;
+

 #ifdef CONFIG_STATUS_LED
 #ifdef CONFIG_STATUS_LED

-       extern void status_led_tick (ulong);
+       extern void status_led_tick (ulong);

 #endif
 #if 0
        printf ("*** Timer Interrupt *** ");
 #endif
        /* Reset Timer Expired and Timers Interrupt Status */
        immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
 #endif
 #if 0
        printf ("*** Timer Interrupt *** ");
 #endif
        /* Reset Timer Expired and Timers Interrupt Status */
        immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;

-       __asm__("nop");
+       __asm__ ("nop");

        immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS | PLPRCR_TMIST;
        /* Restore Decrementer Count */
        set_dec (decrementer_count);
        immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS | PLPRCR_TMIST;
        /* Restore Decrementer Count */
        set_dec (decrementer_count);


@@ -304,11 +342,10 @@ void timer_interrupt(struct pt_regs *regs)
 
 #ifdef CONFIG_STATUS_LED
        status_led_tick (timestamp);
 
 #ifdef CONFIG_STATUS_LED
        status_led_tick (timestamp);

-#endif /* CONFIG_STATUS_LED */
+#endif /* CONFIG_STATUS_LED */

 
 #if defined(CONFIG_WATCHDOG) || defined(CFG_CMA_LCD_HEARTBEAT)
 
 
 #if defined(CONFIG_WATCHDOG) || defined(CFG_CMA_LCD_HEARTBEAT)
 

-

        /*
         * The shortest watchdog period of all boards (except LWMON)
         * is approx. 1 sec, thus re-trigger watchdog at least
        /*
         * The shortest watchdog period of all boards (except LWMON)
         * is approx. 1 sec, thus re-trigger watchdog at least


@@ -321,20 +358,20 @@ void timer_interrupt(struct pt_regs *regs)
 #endif
 
 #if defined(CFG_CMA_LCD_HEARTBEAT)
 #endif
 
 #if defined(CFG_CMA_LCD_HEARTBEAT)

-               extern void lcd_heartbeat(void);
-               lcd_heartbeat();
+               extern void lcd_heartbeat (void);
+
+               lcd_heartbeat ();

 #endif /* CFG_CMA_LCD_HEARTBEAT */
 
 #if defined(CONFIG_WATCHDOG)
 #endif /* CFG_CMA_LCD_HEARTBEAT */
 
 #if defined(CONFIG_WATCHDOG)

-               reset_8xx_watchdog(immr);
+               reset_8xx_watchdog (immr);

 #endif /* CONFIG_WATCHDOG */
 
        }
 #endif /* CONFIG_WATCHDOG */
 
        }

-

 #endif /* CONFIG_WATCHDOG || CFG_CMA_LCD_HEARTBEAT */
 }
 
 #endif /* CONFIG_WATCHDOG || CFG_CMA_LCD_HEARTBEAT */
 }
 

-/****************************************************************************/
+/************************************************************************/

 
 void reset_timer (void)
 {
 
 void reset_timer (void)
 {


@@ -351,4 +388,4 @@ void set_timer (ulong t)
        timestamp = t;
 }
 
        timestamp = t;
 }
 

-/****************************************************************************/
+/************************************************************************/

diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S
index a430061808f1147433cdd4451c8774a5ebd34594..a1b7effe8f6620ab1165c9a50c457ab604287c11 100644 (file)
--- a/cpu/mpc8xx/start.S
+++ b/cpu/mpc8xx/start.S
@@ -285,7 +285,14 @@ SystemCall:
        add     r11,r11,r0
        lwz     r11,0(r11)
 
        add     r11,r11,r0
        lwz     r11,0(r11)
 

-       li      r12,0xd00-4*3           /* save LR & SRRx */
+       li      r20,0xd00-4             /* Get stack pointer */
+       lwz     r12,0(r20)
+       subi    r12,r12,12              /* Adjust stack pointer */
+       li      r0,0xc00+_end_back-SystemCall
+       cmplw   0, r0, r12              /* Check stack overflow */
+       bgt     1f
+       stw     r12,0(r20)
+

        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0
        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0


@@ -310,7 +317,9 @@ _back:
        mtmsr   r11
        SYNC
 
        mtmsr   r11
        SYNC
 

-       li      r12,0xd00-4*3           /* restore regs */
+       li      r12,0xd00-4             /* restore regs */
+       lwz     r12,0(r12)
+

        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)
        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)


@@ -318,8 +327,13 @@ _back:
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 

+       addi    r12,r12,12              /* Adjust stack pointer */
+       li      r20,0xd00-4
+       stw     r12,0(r20)
+

        SYNC
        rfi
        SYNC
        rfi

+_end_back:

 
        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 
 
        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 

diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index baaaba4fab15c2a7236d92797d22d39483c125e4..c40a8dba8b160c506f64148cfc05993005072ee9 100644 (file)
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -775,7 +775,14 @@ SystemCall:
        add     r11,r11,r0
        lwz     r11,0(r11)
 
        add     r11,r11,r0
        lwz     r11,0(r11)
 

-       li      r12,0xd00-4*3           /* save LR & SRRx */
+       li      r20,0xd00-4             /* Get stack pointer */
+       lwz     r12,0(r20)
+       subi    r12,r12,12              /* Adjust stack pointer */
+       li      r0,0xc00+_end_back-SystemCall
+       cmplw   0, r0, r12              /* Check stack overflow */
+       bgt     1f
+       stw     r12,0(r20)
+

        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0
        mflr    r0
        stw     r0,0(r12)
        mfspr   r0,SRR0


@@ -800,7 +807,9 @@ _back:
        mtmsr   r11
        SYNC
 
        mtmsr   r11
        SYNC
 

-       li      r12,0xd00-4*3           /* restore regs */
+       li      r12,0xd00-4             /* restore regs */
+       lwz     r12,0(r12)
+

        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)
        lwz     r11,0(r12)
        mtlr    r11
        lwz     r11,4(r12)


@@ -808,8 +817,13 @@ _back:
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 
        lwz     r11,8(r12)
        mtspr   SRR1,r11
 

+       addi    r12,r12,12              /* Adjust stack pointer */
+       li      r20,0xd00-4
+       stw     r12,0(r20)
+

        SYNC
        rfi
        SYNC
        rfi

+_end_back:

 
        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 
 
        STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 

diff --git a/examples/timer.c b/examples/timer.c
index 8d60fc882689fa4d0765740ad56aebb40024d058..33f53c0726ded0d6c909d62e06e59ffe57faa680 100644 (file)
--- a/examples/timer.c
+++ b/examples/timer.c
@@ -122,6 +122,7 @@ int timer (int argc, char *argv[])
        tid_8xx_cpmtimer_t hw;
        tid_8xx_cpmtimer_t *hwp = &hw;
        int c;
        tid_8xx_cpmtimer_t hw;
        tid_8xx_cpmtimer_t *hwp = &hw;
        int c;

+       int running;

 
        /* Pointer to CPM Timer structure */
        cpmtimerp = &((immap_t *) gd->bd->bi_immr_base)->im_cpmtimer;
 
        /* Pointer to CPM Timer structure */
        cpmtimerp = &((immap_t *) gd->bd->bi_immr_base)->im_cpmtimer;


@@ -185,6 +186,7 @@ int timer (int argc, char *argv[])
        *hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
 
        mon_printf (usage);
        *hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
 
        mon_printf (usage);

+       running = 0;

        while ((c = mon_getc()) != 'q') {
            if (c == 'b') {
 
        while ((c = mon_getc()) != 'q') {
            if (c == 'b') {
 


@@ -197,6 +199,7 @@ int timer (int argc, char *argv[])
 
                /* enable timer */
                *hwp->tgcrp |= (CPMT_GCR_RST << TID_TIMER_ID);
 
                /* enable timer */
                *hwp->tgcrp |= (CPMT_GCR_RST << TID_TIMER_ID);

+               running = 1;

 
 #ifdef DEBUG
                mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 
 #ifdef DEBUG
                mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"


@@ -210,6 +213,7 @@ int timer (int argc, char *argv[])
                mon_printf ("Stopping timer\n");
 
                *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
                mon_printf ("Stopping timer\n");
 
                *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);

+               running = 0;

 
 #ifdef DEBUG
                mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 
 #ifdef DEBUG
                mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"


@@ -252,6 +256,12 @@ int timer (int argc, char *argv[])
            }
            mon_printf (usage);
        }
            }
            mon_printf (usage);
        }

+       if (running) {
+               mon_printf ("Stopping timer\n");
+               *hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
+               mon_free_hdlr (hwp->cpm_vec);
+       }
+

        return (0);
 }
 
        return (0);
 }
 

diff --git a/include/commproc.h b/include/commproc.h
index 9608c4687d19e5c547f923c3bb52812aca3cc15a..42db99897a3bcf99956bc19a59ad89dcec9f8b0c 100644 (file)
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -22,10 +22,10 @@
 
 /* CPM Command register.
 */
 
 /* CPM Command register.
 */

-#define CPM_CR_RST     ((ushort)0x8000)
-#define CPM_CR_OPCODE  ((ushort)0x0f00)
-#define CPM_CR_CHAN    ((ushort)0x00f0)
-#define CPM_CR_FLG     ((ushort)0x0001)
+#define CPM_CR_RST             ((ushort)0x8000)
+#define CPM_CR_OPCODE          ((ushort)0x0f00)
+#define CPM_CR_CHAN            ((ushort)0x00f0)
+#define CPM_CR_FLG             ((ushort)0x0001)

 
 /* Some commands (there are more...later)
 */
 
 /* Some commands (there are more...later)
 */


@@ -39,14 +39,14 @@
 
 /* Channel numbers.
 */
 
 /* Channel numbers.
 */

-#define CPM_CR_CH_SCC1 ((ushort)0x0000)
-#define CPM_CR_CH_I2C  ((ushort)0x0001)        /* I2C and IDMA1 */
-#define CPM_CR_CH_SCC2 ((ushort)0x0004)
-#define CPM_CR_CH_SPI  ((ushort)0x0005)        /* SPI / IDMA2 / Timers */
-#define CPM_CR_CH_SCC3 ((ushort)0x0008)
-#define CPM_CR_CH_SMC1 ((ushort)0x0009)        /* SMC1 / DSP1 */
-#define CPM_CR_CH_SCC4 ((ushort)0x000c)
-#define CPM_CR_CH_SMC2 ((ushort)0x000d)        /* SMC2 / DSP2 */
+#define CPM_CR_CH_SCC1         ((ushort)0x0000)
+#define CPM_CR_CH_I2C          ((ushort)0x0001)    /* I2C and IDMA1 */
+#define CPM_CR_CH_SCC2         ((ushort)0x0004)
+#define CPM_CR_CH_SPI          ((ushort)0x0005)    /* SPI/IDMA2/Timers */
+#define CPM_CR_CH_SCC3         ((ushort)0x0008)
+#define CPM_CR_CH_SMC1         ((ushort)0x0009)    /* SMC1 / DSP1 */
+#define CPM_CR_CH_SCC4         ((ushort)0x000c)
+#define CPM_CR_CH_SMC2         ((ushort)0x000d)    /* SMC2 / DSP2 */

 
 #define mk_cr_cmd(CH, CMD)     ((CMD << 8) | (CH << 4))
 
 
 #define mk_cr_cmd(CH, CMD)     ((CMD << 8) | (CH << 4))
 


@@ -523,8 +523,8 @@ typedef struct scc_enet {
 #define        PROFF_ENET      PROFF_SCC2
 #define        CPM_CR_ENET     CPM_CR_CH_SCC2
 #define        SCC_ENET        1
 #define        PROFF_ENET      PROFF_SCC2
 #define        CPM_CR_ENET     CPM_CR_CH_SCC2
 #define        SCC_ENET        1

-#define PA_ENET_RXD            ((ushort)0x0004)
-#define PA_ENET_TXD            ((ushort)0x0008)
+#define PA_ENET_RXD    ((ushort)0x0004)
+#define PA_ENET_TXD    ((ushort)0x0008)

 #define PA_ENET_TCLK   ((ushort)0x0100)
 #define PA_ENET_RCLK   ((ushort)0x0400)
 #define PB_ENET_TENA   ((uint)0x00002000)
 #define PA_ENET_TCLK   ((ushort)0x0100)
 #define PA_ENET_RCLK   ((ushort)0x0400)
 #define PB_ENET_TENA   ((uint)0x00002000)


@@ -1034,21 +1034,21 @@ typedef struct scc_enet {
 #define PROFF_ENET     PROFF_SCC2
 #define CPM_CR_ENET    CPM_CR_CH_SCC2
 #define SCC_ENET       1
 #define PROFF_ENET     PROFF_SCC2
 #define CPM_CR_ENET    CPM_CR_CH_SCC2
 #define SCC_ENET       1

-#define PA_ENET_RXD  ((ushort)0x0004)  /* PA 13 */
-#define PA_ENET_TXD  ((ushort)0x0008)  /* PA 12 */
-#define PA_ENET_RCLK ((ushort)0x0200)  /* PA  6 */
-#define PA_ENET_TCLK ((ushort)0x0800)  /* PA  4 */
+#define PA_ENET_RXD    ((ushort)0x0004)  /* PA 13 */
+#define PA_ENET_TXD    ((ushort)0x0008)  /* PA 12 */
+#define PA_ENET_RCLK   ((ushort)0x0200)  /* PA  6 */
+#define PA_ENET_TCLK   ((ushort)0x0800)  /* PA  4 */

 
 

-#define PB_ENET_TENA ((uint)0x00002000)   /* PB 18 */
+#define PB_ENET_TENA   ((uint)0x00002000)   /* PB 18 */

 
 

-#define PC_ENET_CLSN ((ushort)0x0040)  /* PC  9 */
-#define PC_ENET_RENA ((ushort)0x0080)  /* PC  8 */
+#define PC_ENET_CLSN   ((ushort)0x0040)  /* PC  9 */
+#define PC_ENET_RENA   ((ushort)0x0080)  /* PC  8 */

 
 /* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
  * SCC2.  Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
  */
 
 /* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
  * SCC2.  Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
  */

-#define SICR_ENET_MASK  ((uint)0x0000ff00)
-#define SICR_ENET_CLKRT ((uint)0x00002f00)
+#define SICR_ENET_MASK ((uint)0x0000ff00)
+#define SICR_ENET_CLKRT        ((uint)0x00002f00)

 
 #endif   /* CONFIG_NX823 */
 
 
 #endif   /* CONFIG_NX823 */
 


@@ -1583,35 +1583,36 @@ typedef struct hdlc_pram_s {
  * priority and SCC1 == SCCa, etc...).
  */
 #define CPMVEC_NR              32
  * priority and SCC1 == SCCa, etc...).
  */
 #define CPMVEC_NR              32

-#define        CPMVEC_PIO_PC15         ((ushort)0x1f)
-#define        CPMVEC_SCC1             ((ushort)0x1e)
-#define        CPMVEC_SCC2             ((ushort)0x1d)
-#define        CPMVEC_SCC3             ((ushort)0x1c)
-#define        CPMVEC_SCC4             ((ushort)0x1b)
-#define        CPMVEC_PIO_PC14         ((ushort)0x1a)
-#define        CPMVEC_TIMER1           ((ushort)0x19)
-#define        CPMVEC_PIO_PC13         ((ushort)0x18)
-#define        CPMVEC_PIO_PC12         ((ushort)0x17)
-#define        CPMVEC_SDMA_CB_ERR      ((ushort)0x16)
-#define CPMVEC_IDMA1           ((ushort)0x15)
-#define CPMVEC_IDMA2           ((ushort)0x14)
-#define CPMVEC_TIMER2          ((ushort)0x12)
-#define CPMVEC_RISCTIMER       ((ushort)0x11)
-#define CPMVEC_I2C             ((ushort)0x10)
-#define        CPMVEC_PIO_PC11         ((ushort)0x0f)
-#define        CPMVEC_PIO_PC10         ((ushort)0x0e)
-#define CPMVEC_TIMER3          ((ushort)0x0c)
-#define        CPMVEC_PIO_PC9          ((ushort)0x0b)
-#define        CPMVEC_PIO_PC8          ((ushort)0x0a)
-#define        CPMVEC_PIO_PC7          ((ushort)0x09)
-#define CPMVEC_TIMER4          ((ushort)0x07)
-#define        CPMVEC_PIO_PC6          ((ushort)0x06)
-#define        CPMVEC_SPI              ((ushort)0x05)
-#define        CPMVEC_SMC1             ((ushort)0x04)
-#define        CPMVEC_SMC2             ((ushort)0x03)
-#define        CPMVEC_PIO_PC5          ((ushort)0x02)
-#define        CPMVEC_PIO_PC4          ((ushort)0x01)
-#define        CPMVEC_ERROR            ((ushort)0x00)
+#define CPMVEC_OFFSET           0x00010000
+#define CPMVEC_PIO_PC15                ((ushort)0x1f | CPMVEC_OFFSET)
+#define CPMVEC_SCC1            ((ushort)0x1e | CPMVEC_OFFSET)
+#define CPMVEC_SCC2            ((ushort)0x1d | CPMVEC_OFFSET)
+#define CPMVEC_SCC3            ((ushort)0x1c | CPMVEC_OFFSET)
+#define CPMVEC_SCC4            ((ushort)0x1b | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC14                ((ushort)0x1a | CPMVEC_OFFSET)
+#define CPMVEC_TIMER1          ((ushort)0x19 | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC13                ((ushort)0x18 | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC12                ((ushort)0x17 | CPMVEC_OFFSET)
+#define CPMVEC_SDMA_CB_ERR     ((ushort)0x16 | CPMVEC_OFFSET)
+#define CPMVEC_IDMA1           ((ushort)0x15 | CPMVEC_OFFSET)
+#define CPMVEC_IDMA2           ((ushort)0x14 | CPMVEC_OFFSET)
+#define CPMVEC_TIMER2          ((ushort)0x12 | CPMVEC_OFFSET)
+#define CPMVEC_RISCTIMER       ((ushort)0x11 | CPMVEC_OFFSET)
+#define CPMVEC_I2C             ((ushort)0x10 | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC11                ((ushort)0x0f | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC10                ((ushort)0x0e | CPMVEC_OFFSET)
+#define CPMVEC_TIMER3          ((ushort)0x0c | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC9         ((ushort)0x0b | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC8         ((ushort)0x0a | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC7         ((ushort)0x09 | CPMVEC_OFFSET)
+#define CPMVEC_TIMER4          ((ushort)0x07 | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC6         ((ushort)0x06 | CPMVEC_OFFSET)
+#define CPMVEC_SPI             ((ushort)0x05 | CPMVEC_OFFSET)
+#define CPMVEC_SMC1            ((ushort)0x04 | CPMVEC_OFFSET)
+#define CPMVEC_SMC2            ((ushort)0x03 | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC5         ((ushort)0x02 | CPMVEC_OFFSET)
+#define CPMVEC_PIO_PC4         ((ushort)0x01 | CPMVEC_OFFSET)
+#define CPMVEC_ERROR           ((ushort)0x00 | CPMVEC_OFFSET)

 
 extern void irq_install_handler(int vec, void (*handler)(void *), void *dev_id);
 
 
 extern void irq_install_handler(int vec, void (*handler)(void *), void *dev_id);
 

diff --git a/include/configs/AmigaOneG3SE.h b/include/configs/AmigaOneG3SE.h
index 7e40c533482faece6f1c2ad51c0f641d75f4950c..009636b36ab9f007ee82549ad2155603c4a156ef 100644 (file)
--- a/include/configs/AmigaOneG3SE.h
+++ b/include/configs/AmigaOneG3SE.h
@@ -93,7 +93,7 @@
  * Miscellaneous configurable options
  */
 #define CFG_LONGHELP                   /* undef to save memory         */
  * Miscellaneous configurable options
  */
 #define CFG_LONGHELP                   /* undef to save memory         */

-#define CFG_PROMPT     "=> "           /* Monitor Command Prompt       */
+#define CFG_PROMPT     "] "            /* Monitor Command Prompt       */

 
 #define CFG_HUSH_PARSER                1       /* use "hush" command parser    */
 /* #undef CFG_HUSH_PARSER */
 
 #define CFG_HUSH_PARSER                1       /* use "hush" command parser    */
 /* #undef CFG_HUSH_PARSER */


@@ -145,7 +145,8 @@
 
 /* Size in bytes reserved for initial data
  */
 
 /* Size in bytes reserved for initial data
  */

-#define CFG_INIT_RAM_ADDR      0x400000
+/* HJF: used to be 0x400000 */
+#define CFG_INIT_RAM_ADDR      0x40000000 

 #define CFG_INIT_RAM_END       0x8000
 #define CFG_GBL_DATA_SIZE      128
 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_RAM_END       0x8000
 #define CFG_GBL_DATA_SIZE      128
 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)


@@ -163,24 +164,37 @@
 /* SDRAM 0 - 256MB
  */
 
 /* SDRAM 0 - 256MB
  */
 

-#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+/*HJF: #define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)

 #define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_4M | BATU_VS | BATU_VP)
 #define CFG_DBAT0L (CFG_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
 #define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_4M | BATU_VS | BATU_VP)
 #define CFG_DBAT0L (CFG_SDRAM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)

-#define CFG_DBAT0U CFG_IBAT0U
+#define CFG_DBAT0U CFG_IBAT0U*/

 
 

-/* SDRAM 1 - 256MB
+#define CFG_DBAT0L           (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_DBAT0U           (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT0L      (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT0U      (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+/* PCI Range

  */
  */

-#define CFG_IBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR) | BATL_PP_RW) /* | BATL_CACHEINHIBIT) */
+#define CFG_DBAT1L      (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT1U      (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT1L      (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT1U      (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+/* HJF:
+#define CFG_IBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR) | BATL_PP_RW) 

 #define CFG_IBAT1U ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR) | BATU_BL_256M | BATU_VS | BATU_VP)
 #define CFG_IBAT1U ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR) | BATU_BL_256M | BATU_VS | BATU_VP)

-#define CFG_DBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR + 0x20000) | BATL_PP_RW ) /* | BATL_CACHEINHIBIT) */
+#define CFG_DBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR + 0x20000) | BATL_PP_RW ) 

 #define CFG_DBAT1U ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR + 0x20000) | BATU_BL_256M | BATU_VS | BATU_VP)
 #define CFG_DBAT1U ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR + 0x20000) | BATU_BL_256M | BATU_VS | BATU_VP)

+*/

 
 /* Init RAM in the CPU DCache (no backing memory)
  */
 #define CFG_DBAT2L     (CFG_INIT_RAM_ADDR | BATL_PP_RW | BATL_MEMCOHERENCE)
 #define CFG_DBAT2U     (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
 
 /* Init RAM in the CPU DCache (no backing memory)
  */
 #define CFG_DBAT2L     (CFG_INIT_RAM_ADDR | BATL_PP_RW | BATL_MEMCOHERENCE)
 #define CFG_DBAT2U     (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)

-#define CFG_IBAT2L     0 /* CFG_DBAT2L */
-#define CFG_IBAT2U     0 /* CFG_DBAT2U */
+/* This used to be commented out */
+#define CFG_IBAT2L       CFG_DBAT2L 
+/* This here too */
+#define CFG_IBAT2U       CFG_DBAT2U 
+

 
 /* I/O and PCI memory at 0xf0000000
  */
 
 /* I/O and PCI memory at 0xf0000000
  */


@@ -372,7 +386,7 @@
        "pci_irqb_select=edge\0"                \
        "pci_irqc=11\0"                         \
        "pci_irqc_select=edge\0"                \
        "pci_irqb_select=edge\0"                \
        "pci_irqc=11\0"                         \
        "pci_irqc_select=edge\0"                \

-       "pci_irqd=12\0"                         \
+       "pci_irqd=7\0"                          \

        "pci_irqd_select=edge\0"
 
 
        "pci_irqd_select=edge\0"
 
 

diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index 2541a54e3aac632372c641570de543c108d1f076..0b4147f42b0f131af8c87ee47754c6b96f7a3cb1 100644 (file)
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -161,6 +161,11 @@ static void syscalls_init (void)
        *addr++ |= NR_SYSCALLS & 0xFFFF;
 
        flush_cache (0x0C00, 0x10);
        *addr++ |= NR_SYSCALLS & 0xFFFF;
 
        flush_cache (0x0C00, 0x10);

+
+       /* Initialize syscalls stack pointer                                 */
+       addr = (ulong *) 0xCFC;
+       *addr = (ulong)addr;
+       flush_cache ((ulong)addr, 0x10);

 }
 
 /*
 }
 
 /*