sunxi_nand_spl: Use SYS_NAND_SELF_INIT and only do nand init when necessary

Use SYS_NAND_SELF_INIT and only setup the pinmux and clocks when we are
actually using the nand.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 680523ac63a24b3628a1d5f87a4ce1a05da610c3..b76bb832511e193fbacc06d3dc05381fdb0c279d 100644 (file)
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -31,6 +31,7 @@
 #include <asm/arch/usb_phy.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/usb_phy.h>
 #include <asm/gpio.h>
 #include <asm/io.h>

+#include <nand.h>

 #include <net.h>
 
 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
 #include <net.h>
 
 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)


@@ -127,6 +128,12 @@ static void nand_clock_setup(void)
        setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0));
        setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1);
 }
        setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0));
        setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1);
 }

+
+void board_nand_init(void)
+{
+       nand_pinmux_setup();
+       nand_clock_setup();
+}

 #endif
 
 #ifdef CONFIG_GENERIC_MMC
 #endif
 
 #ifdef CONFIG_GENERIC_MMC


@@ -453,11 +460,6 @@ void sunxi_board_init(void)
        power_failed |= axp221_set_eldo(3, CONFIG_AXP221_ELDO3_VOLT);
 #endif
 
        power_failed |= axp221_set_eldo(3, CONFIG_AXP221_ELDO3_VOLT);
 #endif
 

-#ifdef CONFIG_SPL_NAND_SUNXI
-       nand_pinmux_setup();
-       nand_clock_setup();
-#endif
-

        printf("DRAM:");
        ramsize = sunxi_dram_init();
        printf(" %lu MiB\n", ramsize >> 20);
        printf("DRAM:");
        ramsize = sunxi_dram_init();
        printf(" %lu MiB\n", ramsize >> 20);

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index efd8fd58f02160d13df4288855ee36e80b3d985b..50b91c452d77ededb7f46fc634dd1d5e9fdabca1 100644 (file)
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -101,6 +101,7 @@ config SPL_NAND_DENALI
 config SPL_NAND_SUNXI
        bool "Support for NAND on Allwinner A20 in SPL"
        depends on MACH_SUN7I
 config SPL_NAND_SUNXI
        bool "Support for NAND on Allwinner A20 in SPL"
        depends on MACH_SUN7I

+       select SYS_NAND_SELF_INIT

        ---help---
        Enable support for NAND. This option allows SPL to read from
        sunxi NAND using DMA transfers.
        ---help---
        Enable support for NAND. This option allows SPL to read from
        sunxi NAND using DMA transfers.

diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index f6f49289f8f69a3ad47965fab482d222256a27fa..9efe904cc7fdc3631fb7ebe57f7252cc01a6e036 100644 (file)
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -153,6 +153,8 @@ void nand_init(void)
 {
        uint32_t val;
 
 {
        uint32_t val;
 

+       board_nand_init();
+

        val = readl(SUNXI_NFC_BASE + NFC_CTL);
        /* enable and reset CTL */
        writel(val | NFC_CTL_EN | NFC_CTL_RESET,
        val = readl(SUNXI_NFC_BASE + NFC_CTL);
        /* enable and reset CTL */
        writel(val | NFC_CTL_EN | NFC_CTL_RESET,