Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
authorAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sun, 14 Apr 2013 08:38:37 +0000 (10:38 +0200)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sun, 14 Apr 2013 08:38:37 +0000 (10:38 +0200)
869 files changed:
.checkpatch.conf
.gitignore
MAINTAINERS
MAKEALL
Makefile
README
api/api_display.c
arch/arm/config.mk
arch/arm/cpu/arm1136/config.mk
arch/arm/cpu/arm1136/omap24xx/timer.c
arch/arm/cpu/arm1136/start.S
arch/arm/cpu/arm1136/u-boot-spl.lds
arch/arm/cpu/arm1176/bcm2835/Makefile
arch/arm/cpu/arm1176/bcm2835/mbox.c [new file with mode: 0644]
arch/arm/cpu/arm1176/bcm2835/timer.c
arch/arm/cpu/arm1176/s3c64xx/config.mk [deleted file]
arch/arm/cpu/arm1176/s3c64xx/cpu_init.S [deleted file]
arch/arm/cpu/arm1176/s3c64xx/speed.c [deleted file]
arch/arm/cpu/arm1176/s3c64xx/timer.c [deleted file]
arch/arm/cpu/arm1176/start.S
arch/arm/cpu/arm720t/start.S
arch/arm/cpu/arm920t/ep93xx/u-boot.lds
arch/arm/cpu/arm920t/start.S
arch/arm/cpu/arm925t/start.S
arch/arm/cpu/arm926ejs/config.mk
arch/arm/cpu/arm926ejs/davinci/spl.c
arch/arm/cpu/arm926ejs/mxs/start.S
arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
arch/arm/cpu/arm926ejs/omap/timer.c
arch/arm/cpu/arm926ejs/spear/spear600.c
arch/arm/cpu/arm926ejs/spear/spl_boot.c
arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
arch/arm/cpu/arm926ejs/start.S
arch/arm/cpu/arm946es/start.S
arch/arm/cpu/arm_intcm/start.S
arch/arm/cpu/armv7/Makefile
arch/arm/cpu/armv7/am33xx/Makefile
arch/arm/cpu/armv7/am33xx/board.c
arch/arm/cpu/armv7/am33xx/clock_am33xx.c [moved from arch/arm/cpu/armv7/am33xx/clock.c with 90% similarity]
arch/arm/cpu/armv7/am33xx/clock_ti814x.c [new file with mode: 0644]
arch/arm/cpu/armv7/am33xx/ddr.c
arch/arm/cpu/armv7/am33xx/elm.c
arch/arm/cpu/armv7/am33xx/emif4.c
arch/arm/cpu/armv7/am33xx/mem.c
arch/arm/cpu/armv7/am33xx/sys_info.c
arch/arm/cpu/armv7/am33xx/u-boot-spl.lds
arch/arm/cpu/armv7/cache_v7.c
arch/arm/cpu/armv7/config.mk
arch/arm/cpu/armv7/exynos/clock.c
arch/arm/cpu/armv7/exynos/power.c
arch/arm/cpu/armv7/exynos/soc.c
arch/arm/cpu/armv7/mx5/lowlevel_init.S
arch/arm/cpu/armv7/omap-common/Makefile
arch/arm/cpu/armv7/omap-common/clocks-common.c
arch/arm/cpu/armv7/omap-common/emif-common.c
arch/arm/cpu/armv7/omap-common/hwinit-common.c
arch/arm/cpu/armv7/omap-common/lowlevel_init.S
arch/arm/cpu/armv7/omap-common/timer.c
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
arch/arm/cpu/armv7/omap3/board.c
arch/arm/cpu/armv7/omap3/sys_info.c
arch/arm/cpu/armv7/omap4/emif.c
arch/arm/cpu/armv7/omap4/hw_data.c
arch/arm/cpu/armv7/omap5/emif.c
arch/arm/cpu/armv7/s5p-common/pwm.c
arch/arm/cpu/armv7/s5p-common/timer.c
arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
arch/arm/cpu/armv7/start.S
arch/arm/cpu/ixp/start.S
arch/arm/cpu/ixp/u-boot.lds
arch/arm/cpu/pxa/Makefile
arch/arm/cpu/pxa/start.S
arch/arm/cpu/s3c44b0/start.S
arch/arm/cpu/sa1100/start.S
arch/arm/cpu/u-boot-spl.lds
arch/arm/cpu/u-boot.lds
arch/arm/dts/exynos5250.dtsi
arch/arm/dts/tegra114.dtsi
arch/arm/imx-common/Makefile
arch/arm/include/asm/arch-am33xx/clock.h
arch/arm/include/asm/arch-am33xx/clocks_am33xx.h
arch/arm/include/asm/arch-am33xx/cpu.h
arch/arm/include/asm/arch-am33xx/ddr_defs.h
arch/arm/include/asm/arch-am33xx/hardware.h
arch/arm/include/asm/arch-am33xx/hardware_am33xx.h [new file with mode: 0644]
arch/arm/include/asm/arch-am33xx/hardware_ti814x.h [new file with mode: 0644]
arch/arm/include/asm/arch-am33xx/mmc_host_def.h
arch/arm/include/asm/arch-am33xx/mux.h
arch/arm/include/asm/arch-am33xx/mux_am33xx.h [new file with mode: 0644]
arch/arm/include/asm/arch-am33xx/mux_ti814x.h [new file with mode: 0644]
arch/arm/include/asm/arch-am33xx/omap.h
arch/arm/include/asm/arch-am33xx/omap_gpmc.h
arch/arm/include/asm/arch-am33xx/spl.h
arch/arm/include/asm/arch-am33xx/sys_proto.h
arch/arm/include/asm/arch-bcm2835/mbox.h [new file with mode: 0644]
arch/arm/include/asm/arch-bcm2835/sdhci.h [new file with mode: 0644]
arch/arm/include/asm/arch-bcm2835/timer.h
arch/arm/include/asm/arch-exynos/clk.h
arch/arm/include/asm/arch-exynos/cpu.h
arch/arm/include/asm/arch-exynos/dp_info.h
arch/arm/include/asm/arch-exynos/periph.h
arch/arm/include/asm/arch-exynos/power.h
arch/arm/include/asm/arch-exynos/spl.h
arch/arm/include/asm/arch-exynos/tmu.h [new file with mode: 0644]
arch/arm/include/asm/arch-omap24xx/omap2420.h
arch/arm/include/asm/arch-omap3/cpu.h
arch/arm/include/asm/arch-omap3/omap_gpmc.h
arch/arm/include/asm/arch-omap3/spl.h
arch/arm/include/asm/arch-omap3/sys_proto.h
arch/arm/include/asm/arch-omap4/omap.h
arch/arm/include/asm/arch-omap4/spl.h
arch/arm/include/asm/arch-omap5/omap.h
arch/arm/include/asm/arch-omap5/spl.h
arch/arm/include/asm/arch-s3c64xx/hardware.h [deleted file]
arch/arm/include/asm/arch-s3c64xx/s3c6400.h [deleted file]
arch/arm/include/asm/arch-s3c64xx/s3c64x0.h [deleted file]
arch/arm/include/asm/arch-tegra/board.h
arch/arm/include/asm/arch-tegra/tegra_slink.h [deleted file]
arch/arm/include/asm/arch-tegra/tegra_spi.h [deleted file]
arch/arm/include/asm/arch-tegra114/gp_padctrl.h
arch/arm/include/asm/arch-tegra114/tegra114_spi.h [new file with mode: 0644]
arch/arm/include/asm/arch-tegra20/tegra20_sflash.h [new file with mode: 0644]
arch/arm/include/asm/arch-tegra20/tegra20_slink.h [new file with mode: 0644]
arch/arm/include/asm/arch-tegra20/uart-spi-switch.h [deleted file]
arch/arm/include/asm/cache.h
arch/arm/include/asm/emif.h
arch/arm/include/asm/mach-types.h
arch/arm/include/asm/omap_gpmc.h [new file with mode: 0644]
arch/arm/include/asm/sections.h [moved from board/pcippc2/i2c.h with 70% similarity]
arch/arm/include/asm/spl.h
arch/arm/include/asm/system.h
arch/arm/include/asm/u-boot-arm.h
arch/arm/include/asm/u-boot.h
arch/arm/lib/Makefile
arch/arm/lib/board.c
arch/arm/lib/bss.c
arch/arm/lib/cache-cp15.c
arch/arm/lib/crt0.S
arch/arm/lib/spl.c
arch/avr32/cpu/start.S
arch/avr32/cpu/u-boot.lds
arch/avr32/include/asm/sections.h
arch/avr32/lib/board.c
arch/blackfin/cpu/cpu.c
arch/blackfin/include/asm/global_data.h
arch/blackfin/include/asm/posix_types.h
arch/blackfin/include/asm/sections.h [moved from board/pcippc2/fpga_serial.h with 66% similarity]
arch/blackfin/lib/board.c
arch/m68k/include/asm/sections.h [new file with mode: 0644]
arch/m68k/lib/board.c
arch/m68k/lib/interrupts.c
arch/microblaze/include/asm/sections.h [new file with mode: 0644]
arch/mips/include/asm/sections.h [new file with mode: 0644]
arch/mips/include/asm/u-boot-mips.h
arch/nds32/cpu/n1213/start.S
arch/nds32/cpu/n1213/u-boot.lds
arch/nds32/include/asm/sections.h [new file with mode: 0644]
arch/nds32/include/asm/u-boot-nds32.h
arch/nds32/lib/board.c
arch/nds32/lib/interrupts.c
arch/nios2/cpu/start.S
arch/nios2/cpu/u-boot.lds
arch/nios2/include/asm/sections.h [new file with mode: 0644]
arch/openrisc/include/asm/sections.h [new file with mode: 0644]
arch/powerpc/config.mk
arch/powerpc/cpu/74xx_7xx/cpu.c
arch/powerpc/cpu/74xx_7xx/start.S
arch/powerpc/cpu/74xx_7xx/u-boot.lds
arch/powerpc/cpu/mpc512x/cpu_init.c
arch/powerpc/cpu/mpc512x/fixed_sdram.c
arch/powerpc/cpu/mpc512x/iopin.c
arch/powerpc/cpu/mpc512x/start.S
arch/powerpc/cpu/mpc512x/u-boot.lds
arch/powerpc/cpu/mpc5xx/start.S
arch/powerpc/cpu/mpc5xx/u-boot.lds
arch/powerpc/cpu/mpc5xxx/spl_boot.c
arch/powerpc/cpu/mpc5xxx/start.S
arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds
arch/powerpc/cpu/mpc5xxx/u-boot-spl.lds
arch/powerpc/cpu/mpc5xxx/u-boot.lds
arch/powerpc/cpu/mpc8220/start.S
arch/powerpc/cpu/mpc8220/u-boot.lds
arch/powerpc/cpu/mpc824x/start.S
arch/powerpc/cpu/mpc824x/u-boot.lds
arch/powerpc/cpu/mpc8260/start.S
arch/powerpc/cpu/mpc8260/u-boot.lds
arch/powerpc/cpu/mpc83xx/start.S
arch/powerpc/cpu/mpc83xx/u-boot-spl.lds
arch/powerpc/cpu/mpc83xx/u-boot.lds
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
arch/powerpc/cpu/mpc85xx/start.S
arch/powerpc/cpu/mpc85xx/u-boot-nand.lds
arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
arch/powerpc/cpu/mpc85xx/u-boot.lds
arch/powerpc/cpu/mpc86xx/start.S
arch/powerpc/cpu/mpc86xx/u-boot.lds
arch/powerpc/cpu/mpc8xx/Makefile
arch/powerpc/cpu/mpc8xx/start.S
arch/powerpc/cpu/mpc8xxx/fdt.c
arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c
arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
arch/powerpc/cpu/ppc4xx/start.S
arch/powerpc/cpu/ppc4xx/u-boot.lds
arch/powerpc/include/asm/immap_512x.h
arch/powerpc/include/asm/sections.h [new file with mode: 0644]
arch/powerpc/include/asm/spl.h
arch/powerpc/include/asm/u-boot.h
arch/powerpc/lib/Makefile
arch/powerpc/lib/board.c
arch/powerpc/lib/ticks.S
arch/sandbox/include/asm/sections.h
arch/sh/cpu/sh2/u-boot.lds
arch/sh/cpu/sh3/u-boot.lds
arch/sh/cpu/sh4/u-boot.lds
arch/sh/include/asm/sections.h [new file with mode: 0644]
arch/sh/lib/board.c
arch/sparc/cpu/leon2/Makefile
arch/sparc/cpu/leon2/serial.c
arch/sparc/cpu/leon3/Makefile
arch/sparc/cpu/leon3/serial.c
arch/sparc/include/asm/sections.h [new file with mode: 0644]
arch/x86/config.mk
arch/x86/cpu/coreboot/sdram.c
arch/x86/cpu/u-boot.lds
arch/x86/include/asm/config.h
arch/x86/include/asm/sections.h [new file with mode: 0644]
arch/x86/include/asm/u-boot-x86.h
arch/x86/include/asm/u-boot.h
arch/x86/lib/Makefile
arch/x86/lib/board.c
arch/x86/lib/init_helpers.c
arch/x86/lib/relocate.c
board/BuS/eb_cpu5282/u-boot.lds
board/LEOX/elpt860/u-boot.lds
board/LEOX/elpt860/u-boot.lds.debug
board/Marvell/common/memory.c
board/Marvell/db64360/mpsc.c
board/Marvell/db64360/mv_eth.h
board/Marvell/db64460/mpsc.c
board/Marvell/db64460/mv_eth.h
board/Marvell/include/core.h
board/RPXClassic/u-boot.lds
board/RPXClassic/u-boot.lds.debug
board/RPXlite/u-boot.lds
board/RPXlite/u-boot.lds.debug
board/RPXlite_dw/u-boot.lds
board/RPXlite_dw/u-boot.lds.debug
board/RRvision/u-boot.lds
board/a3m071/README
board/a3m071/a3m071.c
board/a3m071/is46r16320d.h [moved from arch/arm/cpu/arm1176/s3c64xx/init.c with 53% similarity]
board/actux1/u-boot.lds
board/actux2/u-boot.lds
board/actux3/u-boot.lds
board/adder/u-boot.lds
board/ait/cam_enc_4xx/cam_enc_4xx.c
board/ait/cam_enc_4xx/u-boot-spl.lds
board/altera/nios2-generic/u-boot.lds
board/amcc/acadia/u-boot-nand.lds
board/amcc/bamboo/bamboo.c
board/amcc/bamboo/bamboo.h
board/amcc/bamboo/u-boot-nand.lds
board/amcc/canyonlands/u-boot-nand.lds
board/amcc/kilauea/u-boot-nand.lds
board/amcc/sequoia/u-boot-nand.lds
board/amcc/sequoia/u-boot-ram.lds
board/amcc/yucca/yucca.c
board/astro/mcf5373l/u-boot.lds
board/bf533-ezkit/flash-defines.h
board/bf533-ezkit/flash.c
board/bf533-stamp/video.h
board/chromebook-x86/dts/link.dts
board/cm4008/flash.c
board/cm41xx/flash.c
board/cm_t35/cm_t35.c
board/cm_t35/display.c
board/cobra5272/u-boot.lds
board/cogent/u-boot.lds
board/cogent/u-boot.lds.debug
board/cray/L1/u-boot.lds.debug
board/dave/PPChameleonEVB/u-boot.lds
board/davedenx/aria/aria.c
board/davinci/da8xxevm/u-boot-spl-da850evm.lds
board/davinci/da8xxevm/u-boot-spl-hawk.lds
board/dvlhost/u-boot.lds
board/eltec/mhpc/u-boot.lds
board/eltec/mhpc/u-boot.lds.debug
board/emk/top860/u-boot.lds
board/emk/top860/u-boot.lds.debug
board/ep88x/u-boot.lds
board/esd/common/lcd.c
board/esd/common/lcd.h
board/esd/cpci750/mpsc.c
board/esd/cpci750/mv_eth.h
board/esd/dasa_sim/cmd_dasa_sim.c
board/esd/dasa_sim/u-boot.lds
board/esd/mecp5123/mecp5123.c
board/esd/pmc440/fpga.c
board/esd/pmc440/u-boot-nand.lds
board/esd/tasreg/u-boot.lds
board/esteem192e/u-boot.lds
board/evb64260/eth_addrtbl.c
board/evb64260/u-boot.lds
board/fads/u-boot.lds
board/flagadm/u-boot.lds
board/flagadm/u-boot.lds.debug
board/freescale/m5208evbe/u-boot.lds
board/freescale/m52277evb/u-boot.lds
board/freescale/m5235evb/u-boot.lds
board/freescale/m5249evb/u-boot.lds
board/freescale/m5253demo/u-boot.lds
board/freescale/m5253evbe/u-boot.lds
board/freescale/m5271evb/u-boot.lds
board/freescale/m5272c3/u-boot.lds
board/freescale/m5275evb/u-boot.lds
board/freescale/m5282evb/u-boot.lds
board/freescale/m53017evb/u-boot.lds
board/freescale/m5329evb/u-boot.lds
board/freescale/m5373evb/u-boot.lds
board/freescale/m54418twr/u-boot.lds
board/freescale/m54451evb/u-boot.lds
board/freescale/m54455evb/u-boot.lds
board/freescale/m547xevb/u-boot.lds
board/freescale/m548xevb/u-boot.lds
board/freescale/mpc5121ads/mpc5121ads.c
board/freescale/mx31ads/u-boot.lds
board/freescale/mx31pdk/Makefile
board/freescale/mx31pdk/config.mk [deleted file]
board/freescale/mx31pdk/mx31pdk.c
board/freescale/mx53ard/mx53ard.c
board/gaisler/gr_cpci_ax2000/u-boot.lds
board/gaisler/gr_ep2s60/u-boot.lds
board/gaisler/gr_xc3s_1500/u-boot.lds
board/gaisler/grsim/u-boot.lds
board/gaisler/grsim_leon2/u-boot.lds
board/gen860t/fpga.c
board/gen860t/u-boot-flashenv.lds
board/gen860t/u-boot.lds
board/genietv/u-boot.lds
board/genietv/u-boot.lds.debug
board/hermes/u-boot.lds
board/hermes/u-boot.lds.debug
board/hymod/u-boot.lds
board/hymod/u-boot.lds.debug
board/icu862/u-boot.lds
board/icu862/u-boot.lds.debug
board/idmr/u-boot.lds
board/ifm/ac14xx/Makefile [new file with mode: 0644]
board/ifm/ac14xx/ac14xx.c [new file with mode: 0644]
board/ip860/u-boot.lds
board/ip860/u-boot.lds.debug
board/isee/igep00x0/igep00x0.c
board/ivm/u-boot.lds
board/ivm/u-boot.lds.debug
board/karo/tx25/Makefile
board/karo/tx25/config.mk [deleted file]
board/karo/tx25/tx25.c
board/keymile/km82xx/km82xx.c
board/korat/u-boot-F7FC.lds
board/kup/kup4k/u-boot.lds
board/kup/kup4k/u-boot.lds.debug
board/kup/kup4x/u-boot.lds
board/kup/kup4x/u-boot.lds.debug
board/lwmon/u-boot.lds
board/lwmon/u-boot.lds.debug
board/manroland/uc100/u-boot.lds
board/matrix_vision/mvblx/mvblx.c
board/matrix_vision/mvsmr/u-boot.lds
board/mbx8xx/u-boot.lds
board/mbx8xx/u-boot.lds.debug
board/mcc200/lcd.c
board/mousse/flash.c
board/mousse/u-boot.lds
board/mousse/u-boot.lds.ram
board/mousse/u-boot.lds.rom
board/mpl/common/isa.c
board/mpl/mip405/mip405.c
board/mpl/pip405/pip405.c
board/mpl/pip405/u-boot.lds.debug
board/mvblue/u-boot.lds
board/netphone/u-boot.lds
board/netphone/u-boot.lds.debug
board/netta/u-boot.lds
board/netta/u-boot.lds.debug
board/netta2/u-boot.lds
board/netta2/u-boot.lds.debug
board/netvia/u-boot.lds
board/netvia/u-boot.lds.debug
board/nvidia/common/board.c
board/nvidia/common/common.mk
board/nvidia/common/uart-spi-switch.c [deleted file]
board/nvidia/dalmore/dalmore.c
board/nvidia/dalmore/pinmux-config-dalmore.h
board/nvidia/dts/tegra114-dalmore.dts
board/nvidia/seaboard/seaboard.c
board/nx823/u-boot.lds
board/nx823/u-boot.lds.debug
board/overo/overo.c
board/pcippc2/cpc710.h [deleted file]
board/pcippc2/cpc710_init_ram.c [deleted file]
board/pcippc2/cpc710_pci.c [deleted file]
board/pcippc2/cpc710_pci.h [deleted file]
board/pcippc2/flash.c [deleted file]
board/pcippc2/fpga_serial.c [deleted file]
board/pcippc2/hardware.h [deleted file]
board/pcippc2/i2c.c [deleted file]
board/pcippc2/ns16550.h [deleted file]
board/pcippc2/pcippc2.c [deleted file]
board/pcippc2/pcippc2.h [deleted file]
board/pcippc2/pcippc2_fpga.c [deleted file]
board/pcippc2/pcippc2_fpga.h [deleted file]
board/pcippc2/sconsole.c [deleted file]
board/pcippc2/sconsole.h [deleted file]
board/pdm360ng/pdm360ng.c
board/phytec/pcm051/board.c
board/prodrive/p3mx/mpsc.c
board/prodrive/p3mx/mv_eth.h
board/quantum/u-boot.lds
board/quantum/u-boot.lds.debug
board/r360mpi/u-boot.lds
board/raspberrypi/rpi_b/rpi_b.c
board/rbc823/u-boot.lds
board/renesas/sh7752evb/u-boot.lds
board/renesas/sh7757lcr/u-boot.lds
board/rsdproto/u-boot.lds
board/sacsng/clkinit.c
board/sacsng/clkinit.h
board/samsung/dts/exynos5250-smdk5250.dts
board/samsung/dts/exynos5250-snow.dts [new file with mode: 0644]
board/samsung/smdk5250/clock_init.c
board/samsung/smdk5250/setup.h
board/samsung/smdk5250/smdk5250-uboot-spl.lds
board/samsung/smdk5250/smdk5250.c
board/samsung/smdk6400/.gitignore [deleted file]
board/samsung/smdk6400/Makefile [deleted file]
board/samsung/smdk6400/config.mk [deleted file]
board/samsung/smdk6400/lowlevel_init.S [deleted file]
board/samsung/smdk6400/smdk6400.c [deleted file]
board/samsung/smdk6400/u-boot-nand.lds [deleted file]
board/samsung/trats/trats.c
board/samsung/universal_c210/universal.c
board/sandburst/karef/u-boot.lds.debug
board/sandburst/metrobox/u-boot.lds.debug
board/sandpoint/u-boot.lds
board/sixnet/u-boot.lds
board/snmc/qs850/u-boot.lds
board/snmc/qs860t/u-boot.lds
board/spc1920/u-boot.lds
board/spd8xx/u-boot.lds
board/spd8xx/u-boot.lds.debug
board/spear/x600/fpga.c
board/stx/stxxtc/u-boot.lds
board/stx/stxxtc/u-boot.lds.debug
board/svm_sc8xx/u-boot.lds
board/svm_sc8xx/u-boot.lds.debug
board/teejet/mt_ventoux/mt_ventoux.c
board/ti/am335x/board.c
board/ti/omap2420h4/config.mk
board/ti/omap2420h4/mem.c
board/ti/omap2420h4/omap2420h4.c
board/ti/omap5912osk/config.mk
board/ti/omap5912osk/lowlevel_init.S
board/ti/omap5912osk/omap5912osk.c
board/ti/omap5_uevm/Makefile [moved from board/ti/omap5_evm/Makefile with 100% similarity]
board/ti/omap5_uevm/evm.c [moved from board/ti/omap5_evm/evm.c with 100% similarity]
board/ti/omap5_uevm/mux_data.h [moved from board/ti/omap5_evm/mux_data.h with 100% similarity]
board/ti/ti814x/Makefile [moved from board/pcippc2/Makefile with 54% similarity]
board/ti/ti814x/evm.c [new file with mode: 0644]
board/ti/ti814x/evm.h [new file with mode: 0644]
board/ti/ti814x/mux.c [new file with mode: 0644]
board/tqc/tqm8xx/u-boot.lds
board/v37/u-boot.lds
board/vpac270/u-boot-spl.lds
board/w7o/u-boot.lds.debug
board/woodburn/woodburn.c
board/xes/xpedite1000/u-boot.lds.debug
boards.cfg
common/Makefile
common/bedbug.c
common/board_f.c [new file with mode: 0644]
common/board_r.c [new file with mode: 0644]
common/cmd_bedbug.c
common/cmd_bootm.c
common/cmd_bootmenu.c [new file with mode: 0644]
common/cmd_df.c [deleted file]
common/cmd_dfu.c
common/cmd_dtt.c
common/cmd_ext4.c
common/cmd_fat.c
common/cmd_fdc.c
common/cmd_mem.c
common/cmd_mmc.c
common/cmd_mtdparts.c
common/cmd_nand.c
common/cmd_nvedit.c
common/cmd_part.c
common/cmd_pxe.c
common/cmd_scsi.c
common/cmd_sf.c
common/cmd_test.c
common/cmd_ubi.c
common/cmd_usb_mass_storage.c [new file with mode: 0644]
common/dlmalloc.c
common/dlmalloc.src
common/env_callback.c
common/env_nand.c
common/env_ubi.c [new file with mode: 0644]
common/hash.c
common/image.c
common/lcd.c
common/main.c
common/menu.c
config.mk
disk/part_efi.c
doc/README.arm-relocation
doc/README.bootmenu [new file with mode: 0644]
doc/README.fdt-control
doc/README.memory-test [new file with mode: 0644]
doc/README.menu
doc/README.omap3
doc/README.scrapyard
doc/README.silent
doc/device-tree-bindings/exynos/tmu.txt [new file with mode: 0644]
doc/device-tree-bindings/video/exynos-dp.txt [new file with mode: 0644]
doc/device-tree-bindings/video/exynos-fb.txt [new file with mode: 0644]
doc/driver-model/UDM-pci.txt
doc/driver-model/UDM-serial.txt
doc/driver-model/UDM-watchdog.txt
doc/feature-removal-schedule.txt
drivers/bios_emulator/atibios.c
drivers/bios_emulator/besys.c
drivers/bios_emulator/bios.c
drivers/bios_emulator/include/biosemu.h
drivers/bios_emulator/x86emu/debug.c
drivers/block/ahci.c
drivers/block/mvsata_ide.c
drivers/block/sata_dwc.c
drivers/block/sata_dwc.h
drivers/block/sym53c8xx.c
drivers/crypto/Makefile [moved from arch/arm/cpu/arm1176/s3c64xx/Makefile with 69% similarity]
drivers/crypto/ace_sha.c [new file with mode: 0644]
drivers/crypto/ace_sha.h [new file with mode: 0644]
drivers/dfu/Makefile
drivers/dfu/dfu.c
drivers/dfu/dfu_mmc.c
drivers/dfu/dfu_nand.c [new file with mode: 0644]
drivers/fpga/ACEX1K.c
drivers/fpga/altera.c
drivers/fpga/cyclon2.c
drivers/fpga/lattice.c
drivers/fpga/spartan2.c
drivers/fpga/spartan3.c
drivers/fpga/virtex2.c
drivers/fpga/xilinx.c
drivers/i2c/s3c24x0_i2c.c
drivers/mmc/Makefile
drivers/mmc/bcm2835_sdhci.c [new file with mode: 0644]
drivers/mmc/mmc.c
drivers/mmc/omap_hsmmc.c
drivers/mmc/sdhci.c
drivers/mtd/cfi_flash.c
drivers/mtd/mtdpart.c
drivers/mtd/nand/Makefile
drivers/mtd/nand/kirkwood_nand.c
drivers/mtd/nand/mxc_nand.c
drivers/mtd/nand/mxc_nand.h [new file with mode: 0644]
drivers/mtd/nand/mxc_nand_spl.c [moved from nand_spl/nand_boot_fsl_nfc.c with 65% similarity]
drivers/mtd/nand/nand_util.c
drivers/mtd/nand/ndfc.c
drivers/mtd/nand/omap_gpmc.c
drivers/mtd/nand/s3c64xx.c [deleted file]
drivers/mtd/onenand/onenand_base.c
drivers/mtd/onenand/samsung.c
drivers/mtd/spi/atmel.c
drivers/mtd/spi/eon.c
drivers/mtd/spi/macronix.c
drivers/mtd/spi/ramtron.c
drivers/mtd/spi/spansion.c
drivers/mtd/spi/spi_flash.c
drivers/mtd/spi/sst.c
drivers/mtd/spi/stmicro.c
drivers/mtd/spi/winbond.c
drivers/mtd/ubi/build.c
drivers/mtd/ubi/ubi.h
drivers/mtd/ubi/wl.c
drivers/net/armada100_fec.c
drivers/net/armada100_fec.h
drivers/net/cpsw.c
drivers/net/e1000.c
drivers/net/e1000.h
drivers/net/e1000_spi.c
drivers/net/ne2000_base.h
drivers/net/npe/IxEthAcc.c
drivers/net/npe/IxEthAccCommon.c
drivers/net/npe/IxEthAccDataPlane.c
drivers/net/npe/IxEthAccMac.c
drivers/net/npe/IxEthDBAPI.c
drivers/net/npe/IxEthDBAPISupport.c
drivers/net/npe/IxEthDBCore.c
drivers/net/npe/IxEthDBEvents.c
drivers/net/npe/IxEthDBFeatures.c
drivers/net/npe/IxEthDBFirewall.c
drivers/net/npe/IxEthDBLearning.c
drivers/net/npe/IxEthDBNPEAdaptor.c
drivers/net/npe/IxEthDBPortUpdate.c
drivers/net/npe/IxEthDBReports.c
drivers/net/npe/IxEthDBSearch.c
drivers/net/npe/IxEthDBSpanningTree.c
drivers/net/npe/IxEthDBUtil.c
drivers/net/npe/IxEthDBVlan.c
drivers/net/npe/IxEthMii.c
drivers/net/npe/IxFeatureCtrl.c
drivers/net/npe/IxNpeDl.c
drivers/net/npe/IxNpeDlImageMgr.c
drivers/net/npe/IxNpeDlNpeMgr.c
drivers/net/npe/IxNpeMh.c
drivers/net/npe/IxNpeMhConfig.c
drivers/net/npe/IxNpeMhSend.c
drivers/net/npe/IxOsalOsSemaphore.c
drivers/net/npe/IxQMgrDispatcher.c
drivers/net/npe/IxQMgrInit.c
drivers/net/npe/IxQMgrQCfg.c
drivers/net/npe/include/IxAtmdAccCtrl.h
drivers/net/npe/include/IxEthAcc_p.h
drivers/net/npe/include/IxEthDB.h
drivers/net/npe/include/IxEthDB_p.h
drivers/net/npe/include/IxEthMii.h
drivers/net/npe/include/IxFeatureCtrl.h
drivers/net/npe/include/IxHssAcc.h
drivers/net/npe/include/IxNpeDl.h
drivers/net/npe/include/IxNpeDlNpeMgrUtils_p.h
drivers/net/npe/include/IxNpeDlNpeMgr_p.h
drivers/net/npe/include/IxNpeMhConfig_p.h
drivers/net/npe/include/IxOsal.h
drivers/net/npe/include/IxOsalTypes.h
drivers/net/npe/include/IxPerfProfAcc.h
drivers/net/npe/include/IxQMgrAqmIf_p.h
drivers/net/npe/include/IxSspAcc.h
drivers/net/npe/include/IxTimeSyncAcc.h
drivers/net/npe/npe.c
drivers/power/Makefile
drivers/power/exynos-tmu.c [new file with mode: 0644]
drivers/rtc/ds1374.c
drivers/rtc/mk48t59.c
drivers/serial/Makefile
drivers/serial/ns16550.c
drivers/serial/s3c64xx.c [deleted file]
drivers/serial/serial.c
drivers/serial/usbtty.c
drivers/sound/Makefile
drivers/sound/max98095.c [new file with mode: 0644]
drivers/sound/max98095.h [new file with mode: 0644]
drivers/sound/sound.c
drivers/spi/Makefile
drivers/spi/altera_spi.c
drivers/spi/andes_spi.c
drivers/spi/armada100_spi.c
drivers/spi/atmel_spi.c
drivers/spi/bfin_spi.c
drivers/spi/bfin_spi6xx.c
drivers/spi/cf_qspi.c
drivers/spi/cf_spi.c
drivers/spi/davinci_spi.c
drivers/spi/exynos_spi.c
drivers/spi/fdt_spi.c [new file with mode: 0644]
drivers/spi/fsl_espi.c
drivers/spi/ich.c [new file with mode: 0644]
drivers/spi/ich.h [new file with mode: 0644]
drivers/spi/kirkwood_spi.c
drivers/spi/mpc52xx_spi.c
drivers/spi/mpc8xxx_spi.c
drivers/spi/mxc_spi.c
drivers/spi/mxs_spi.c
drivers/spi/oc_tiny_spi.c
drivers/spi/omap3_spi.c
drivers/spi/sh_spi.c
drivers/spi/soft_spi.c
drivers/spi/spi.c [new file with mode: 0644]
drivers/spi/tegra114_spi.c [new file with mode: 0644]
drivers/spi/tegra20_sflash.c [moved from drivers/spi/tegra_spi.c with 56% similarity]
drivers/spi/tegra20_slink.c [moved from drivers/spi/tegra_slink.c with 71% similarity]
drivers/spi/xilinx_spi.c
drivers/usb/eth/smsc95xx.c
drivers/usb/gadget/Makefile
drivers/usb/gadget/composite.c
drivers/usb/gadget/f_dfu.c
drivers/usb/gadget/f_mass_storage.c [new file with mode: 0644]
drivers/usb/gadget/g_dnl.c
drivers/usb/gadget/storage_common.c [new file with mode: 0644]
drivers/usb/host/Makefile
drivers/usb/host/ehci-exynos.c
drivers/usb/host/ehci-hcd.c
drivers/usb/host/ehci-pci.c
drivers/usb/host/ehci-spear.c [new file with mode: 0644]
drivers/usb/host/ehci.h
drivers/usb/host/ohci-hcd.c
drivers/usb/musb-new/linux-compat.h
drivers/usb/musb-new/musb_core.c
drivers/usb/musb-new/musb_uboot.c
drivers/video/Makefile
drivers/video/amba.c [deleted file]
drivers/video/atmel_hlcdfb.c
drivers/video/atmel_lcdfb.c
drivers/video/bcm2835.c [new file with mode: 0644]
drivers/video/cfb_console.c
drivers/video/exynos_dp.c
drivers/video/exynos_dp_lowlevel.c
drivers/video/exynos_dp_lowlevel.h
drivers/video/exynos_fb.c
drivers/video/exynos_fimd.c
drivers/video/mpc8xx_lcd.c [moved from arch/powerpc/cpu/mpc8xx/lcd.c with 92% similarity]
drivers/video/pxa_lcd.c [moved from arch/arm/cpu/pxa/pxafb.c with 93% similarity]
drivers/video/tegra.c
dts/Makefile
examples/standalone/stubs.c
fs/ext4/ext4_common.h
fs/ext4/ext4_journal.c
fs/ubifs/ubifs.h
include/ansi.h [moved from board/samsung/smdk6400/smdk6400_nand_spl.c with 55% similarity]
include/asm-generic/global_data.h
include/asm-generic/sections.h [new file with mode: 0644]
include/asm-generic/u-boot.h [new file with mode: 0644]
include/at91rm9200_net.h
include/bedbug/ppc.h
include/common.h
include/config_cmd_all.h
include/config_cmd_default.h
include/config_defaults.h
include/config_fallbacks.h
include/configs/MPC8313ERDB.h
include/configs/PCIPPC2.h [deleted file]
include/configs/PCIPPC6.h [deleted file]
include/configs/R360MPI.h
include/configs/RBC823.h
include/configs/RPXlite_DW.h
include/configs/RRvision.h
include/configs/TQM823L.h
include/configs/TQM823M.h
include/configs/VCMA9.h
include/configs/a3m071.h
include/configs/ac14xx.h [new file with mode: 0644]
include/configs/am335x_evm.h
include/configs/aria.h
include/configs/cardhu.h
include/configs/cm_t35.h
include/configs/coreboot.h
include/configs/dalmore.h
include/configs/dra7xx_evm.h
include/configs/exynos5250-dt.h
include/configs/igep00x0.h
include/configs/integrator-common.h
include/configs/km/keymile-common.h
include/configs/km/km-powerpc.h
include/configs/km/km_arm.h
include/configs/km_kirkwood.h
include/configs/lubbock.h
include/configs/lwmon.h
include/configs/mecp5123.h
include/configs/mpc5121ads.h
include/configs/mx31pdk.h
include/configs/mx53ard.h
include/configs/nokia_rx51.h
include/configs/omap2420h4.h
include/configs/omap4_common.h
include/configs/omap5912osk.h
include/configs/omap5_common.h
include/configs/omap5_uevm.h [moved from include/configs/omap5_evm.h with 71% similarity]
include/configs/p1_p2_rdb_pc.h
include/configs/palmld.h
include/configs/palmtc.h
include/configs/pcm051.h
include/configs/pdm360ng.h
include/configs/pxa255_idp.h
include/configs/rpi_b.h
include/configs/smdk6400.h [deleted file]
include/configs/snow.h [new file with mode: 0644]
include/configs/svm_sc8xx.h
include/configs/tegra-common-post.h
include/configs/tegra-common.h
include/configs/tegra20-common.h
include/configs/ti814x_evm.h [new file with mode: 0644]
include/configs/trats.h
include/configs/tricorder.h
include/configs/trimslice.h
include/configs/tx25.h
include/configs/v37.h
include/configs/zipitz2.h
include/dfu.h
include/env_callback.h
include/environment.h
include/fdtdec.h
include/fpga.h
include/fsl_nfc.h [deleted file]
include/galileo/core.h
include/hw_sha.h [new file with mode: 0644]
include/ide.h
include/image.h
include/initcall.h [moved from arch/arm/cpu/arm1176/s3c64xx/reset.S with 66% similarity]
include/lcd.h
include/linux/mtd/nand.h
include/linux/types.h
include/linux/usb/gadget.h
include/malloc.h
include/menu.h
include/mtd/cfi_flash.h
include/nand.h
include/onenand_uboot.h
include/power/max77686_pmic.h
include/scsi.h
include/sound.h
include/spi.h
include/spi_flash.h
include/sym53c8xx.h
include/tmu.h [new file with mode: 0644]
include/ubi_uboot.h
include/usb_mass_storage.h [new file with mode: 0644]
include/usbdevice.h
include/watchdog.h
include/xyzModem.h
lib/Makefile
lib/display_options.c
lib/fdtdec.c
lib/initcall.c [moved from drivers/usb/host/s3c64xx-hcd.c with 67% similarity]
mkconfig
nand_spl/board/amcc/acadia/u-boot.lds
nand_spl/board/amcc/bamboo/u-boot.lds
nand_spl/board/amcc/canyonlands/u-boot.lds
nand_spl/board/amcc/kilauea/u-boot.lds
nand_spl/board/amcc/sequoia/u-boot.lds
nand_spl/board/freescale/mpc8315erdb/u-boot.lds
nand_spl/board/freescale/mx31pdk/Makefile [deleted file]
nand_spl/board/freescale/mx31pdk/u-boot.lds [deleted file]
nand_spl/board/karo/tx25/Makefile [deleted file]
nand_spl/board/karo/tx25/config.mk [deleted file]
nand_spl/board/karo/tx25/u-boot.lds [deleted file]
nand_spl/board/samsung/smdk6400/Makefile [deleted file]
nand_spl/board/samsung/smdk6400/config.mk [deleted file]
nand_spl/board/samsung/smdk6400/u-boot.lds [deleted file]
nand_spl/board/sheldon/simpc8313/u-boot.lds
spl/Makefile
tools/buildman/.gitignore [new file with mode: 0644]
tools/buildman/README [new file with mode: 0644]
tools/buildman/board.py [new file with mode: 0644]
tools/buildman/bsettings.py [new file with mode: 0644]
tools/buildman/builder.py [new file with mode: 0644]
tools/buildman/buildman [new symlink]
tools/buildman/buildman.py [new file with mode: 0755]
tools/buildman/control.py [new file with mode: 0644]
tools/buildman/test.py [new file with mode: 0644]
tools/buildman/toolchain.py [new file with mode: 0644]
tools/checkpatch.pl
tools/env/README
tools/env/fw_env.c
tools/env/fw_env.config
tools/logos/atmel.bmp
tools/patman/README
tools/patman/checkpatch.py
tools/patman/command.py
tools/patman/commit.py
tools/patman/cros_subprocess.py [new file with mode: 0644]
tools/patman/gitutil.py
tools/patman/patchstream.py
tools/patman/patman.py
tools/patman/series.py
tools/patman/terminal.py
tools/patman/test.py
tools/scripts/define2mk.sed

index 977db9e..d88af57 100644 (file)
@@ -12,3 +12,9 @@
 
 # For min/max
 --ignore MINMAX
+
+# enable more tests
+--strict
+
+# Not Linux, so we don't recommend usleep_range() over udelay()
+--ignore USLEEP_RANGE
index be09894..ed21203 100644 (file)
 #
 
 /MLO
+/SPL
 /System.map
 /u-boot
 /u-boot.hex
 /u-boot.imx
+/u-boot-with-spl.imx
+/u-boot-with-nand-spl.imx
 /u-boot.map
 /u-boot.srec
 /u-boot.ldr
index 0f19078..bbab5fe 100644 (file)
@@ -150,9 +150,6 @@ Wolfgang Denk <wd@denx.de>
 
        P3G4            MPC7410
 
-       PCIPPC2         MPC750
-       PCIPPC6         MPC750
-
 Phil Edworthy <phil.edworthy@renesas.com>
 
        rsk7264         SH7264
@@ -234,6 +231,7 @@ Wolfgang Grandegger <wg@denx.de>
 
 Anatolij Gustschin <agust@denx.de>
 
+       ac14xx          MPC5121e
        O2D             MPC5200
        O2D300          MPC5200
        O2DNT2          MPC5200
@@ -397,6 +395,7 @@ Ricardo Ribalda <ricardo.ribalda@uam.es>
 Stefan Roese <sr@denx.de>
 
        a3m071          MPC5200
+       a4m2k           MPC5200
 
        P3M7448         MPC7448
 
@@ -690,6 +689,10 @@ Stefan Herbrechtsmeier <stefan@code.herbrechtsmeier.net>
 
        dns325          ARM926EJS (Kirkwood SoC)
 
+Lauri Hintsala <lauri.hintsala@bluegiga.com>
+
+       apx4devkit      i.MX28
+
 Vaibhav Hiremath <hvaibhav@ti.com>
 
        am3517_evm      ARM ARMV7 (AM35x SoC)
@@ -808,10 +811,6 @@ Linus Walleij <linus.walleij@linaro.org>
        integratorap    various
        integratorcp    various
 
-Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
-
-       apx4devkit      i.MX28
-
 Luka Perkov <luka@openwrt.org>
 
        ib62x0          ARM926EJS
@@ -835,6 +834,10 @@ Stelian Pop <stelian@popies.net>
        at91sam9263ek   ARM926EJS (AT91SAM9263 SoC)
        at91sam9rlek    ARM926EJS (AT91SAM9RL SoC)
 
+Matt Porter <mporter@ti.com>
+
+       ti814x_evm      ARM ARMV7 (TI814x Soc)
+
 Dave Purdy <david.c.purdy@gmail.com>
 
        pogo_e02        ARM926EJS (Kirkwood SoC)
@@ -912,6 +915,10 @@ Matt Sealey <matt@genesi-usa.com>
 Bo Shen <voice.shen@atmel.com>
        at91sam9x5ek            ARM926EJS (AT91SAM9G15,G25,G35,X25,X35 SoC)
 
+Rajeshwari Shinde <rajeshwari.s@samsung.com>
+
+       snow                    ARM ARMV7 (EXYNOS5250 SoC)
+
 Michal Simek <monstr@monstr.eu>
 
        zynq            ARM ARMV7 (Zynq SoC)
@@ -1023,10 +1030,6 @@ Vladimir Zapolskiy <vz@mleia.com>
 
        devkit3250      lpc32xx
 
-Zhong Hongbo <bocui107@gmail.com>
-
-       SMDK6400        ARM1176 (S3C6400 SoC)
-
 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
 Tetsuyuki Kobayashi <koba@kmckk.co.jp>
 
diff --git a/MAKEALL b/MAKEALL
index 397adef..2737eab 100755 (executable)
--- a/MAKEALL
+++ b/MAKEALL
@@ -104,9 +104,9 @@ while true ; do
        -s|--soc)
                # echo "Option SoC: argument \`$2'"
                if [ "$opt_s" ] ; then
-                       opt_s="${opt_s%)} || \$6 == \"$2\")"
+                       opt_s="${opt_s%)} || \$6 == \"$2\" || \$6 ~ /$2/)"
                else
-                       opt_s="(\$6 == \"$2\")"
+                       opt_s="(\$6 == \"$2\" || \$6 ~ /$2/)"
                fi
                SELECTED='y'
                shift 2 ;;
@@ -664,7 +664,7 @@ build_target() {
        export BUILD_DIR="${output_dir}"
 
        target_arch=$(get_target_arch ${target})
-       eval cross_toolchain=\$CROSS_COMPILE_${target_arch^^}
+       eval cross_toolchain=\$CROSS_COMPILE_`echo $target_arch | tr '[:lower:]' '[:upper:]'`
        if [ "${cross_toolchain}" ] ; then
            MAKE="make CROSS_COMPILE=${cross_toolchain}"
        elif [ "${CROSS_COMPILE}" ] ; then
@@ -802,8 +802,20 @@ build_targets() {
 #-----------------------------------------------------------------------
 
 kill_children() {
-       local pgid=`ps -p $$ --no-headers -o "%r" | tr -d ' '`
-       local children=`pgrep -g $pgid | grep -v $$ | grep -v $pgid`
+       local OS=$(uname -s)
+       local children=""
+       case "${OS}" in
+               "Darwin")
+                       # Mac OS X is known to have BSD style ps
+                       local pgid=$(ps -p $$ -o pgid | sed -e "/PGID/d")
+                       children=$(ps -g $pgid -o pid | sed -e "/PID\|$$\|$pgid/d")
+                       ;;
+               *)
+                       # everything else tries the GNU style
+                       local pgid=$(ps -p $$ --no-headers -o "%r" | tr -d ' ')
+                       children=$(pgrep -g $pgid | sed -e "/$$\|$pgid/d")
+                       ;;
+       esac
 
        kill $children 2> /dev/null
        wait $children 2> /dev/null
index 12763ce..84b0c43 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -24,7 +24,7 @@
 VERSION = 2013
 PATCHLEVEL = 04
 SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc2
 ifneq "$(SUBLEVEL)" ""
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 else
@@ -46,12 +46,7 @@ HOSTARCH := $(shell uname -m | \
 HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
            sed -e 's/\(cygwin\).*/cygwin/')
 
-# Set shell to bash if possible, otherwise fall back to sh
-SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
-       else if [ -x /bin/bash ]; then echo /bin/bash; \
-       else echo sh; fi; fi)
-
-export HOSTARCH HOSTOS SHELL
+export HOSTARCH HOSTOS
 
 # Deal with colliding definitions from tcsh etc.
 VENDOR=
@@ -273,6 +268,7 @@ LIBS-y += disk/libdisk.o
 LIBS-y += drivers/bios_emulator/libatibiosemu.o
 LIBS-y += drivers/block/libblock.o
 LIBS-$(CONFIG_BOOTCOUNT_LIMIT) += drivers/bootcount/libbootcount.o
+LIBS-y += drivers/crypto/libcrypto.o
 LIBS-y += drivers/dma/libdma.o
 LIBS-y += drivers/fpga/libfpga.o
 LIBS-y += drivers/gpio/libgpio.o
@@ -331,7 +327,7 @@ LIBS-y += api/libapi.o
 LIBS-y += post/libpost.o
 LIBS-y += test/libtest.o
 
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
+ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
 LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
 endif
 
@@ -406,8 +402,10 @@ ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map
 ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
 ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
 ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
-ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET))
 ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
+ifneq ($(CONFIG_SPL_TARGET),)
+ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET))
+endif
 
 # enable combined SPL/u-boot/dtb rules for tegra
 ifneq ($(CONFIG_TEGRA),)
@@ -485,12 +483,19 @@ $(obj)u-boot.dis: $(obj)u-boot
 
 
 $(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
-               $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(or $(CONFIG_SPL_PAD_TO),0) \
-                       -O binary $(obj)spl/u-boot-spl \
-                       $(obj)spl/u-boot-spl-pad.bin
+               $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+                       -I binary -O binary $< $(obj)spl/u-boot-spl-pad.bin
                cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
                rm $(obj)spl/u-boot-spl-pad.bin
 
+$(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+               $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+                       $(OBJTREE)/u-boot-with-spl.imx
+
+$(obj)u-boot-with-nand-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+               $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+                       $(OBJTREE)/u-boot-with-nand-spl.imx
+
 $(obj)u-boot.ubl:       $(obj)u-boot-with-spl.bin
                $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
                -e $(CONFIG_SYS_TEXT_BASE) -d $< $(obj)u-boot.ubl
@@ -780,23 +785,6 @@ $(obj).boards.depend:      boards.cfg
 lcname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/')
 ucname = $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/')
 
-#########################################################################
-## ARM1176 Systems
-#########################################################################
-smdk6400_noUSB_config  \
-smdk6400_config        :       unconfig
-       @mkdir -p $(obj)include $(obj)board/samsung/smdk6400
-       @mkdir -p $(obj)nand_spl/board/samsung/smdk6400
-       @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
-       @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-       @if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then                       \
-               echo "RAM_TEXT = 0x57e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
-       else                                                                            \
-               echo "RAM_TEXT = 0xc7e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
-       fi
-       @$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx
-       @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-
 #########################################################################
 #########################################################################
 
@@ -855,6 +843,8 @@ clobber:    tidy
        @rm -f $(obj)u-boot.kwb
        @rm -f $(obj)u-boot.pbl
        @rm -f $(obj)u-boot.imx
+       @rm -f $(obj)u-boot-with-spl.imx
+       @rm -f $(obj)u-boot-with-nand-spl.imx
        @rm -f $(obj)u-boot.ubl
        @rm -f $(obj)u-boot.ais
        @rm -f $(obj)u-boot.dtb
diff --git a/README b/README
index e45ae4a..14c83f4 100644 (file)
--- a/README
+++ b/README
@@ -485,6 +485,7 @@ The following options need to be configured:
                Thumb2 this flag will result in Thumb2 code generated by
                GCC.
 
+               CONFIG_ARM_ERRATA_716044
                CONFIG_ARM_ERRATA_742230
                CONFIG_ARM_ERRATA_743622
                CONFIG_ARM_ERRATA_751472
@@ -495,6 +496,13 @@ The following options need to be configured:
                exists, unlike the similar options in the Linux kernel. Do not
                set these options unless they apply!
 
+- CPU timer options:
+               CONFIG_SYS_HZ
+
+               The frequency of the timer returned by get_timer().
+               get_timer() must operate in milliseconds and this CONFIG
+               option must be set to 1000.
+
 - Linux Kernel Interface:
                CONFIG_CLOCKS_IN_MHZ
 
@@ -626,14 +634,6 @@ The following options need to be configured:
                boot loader that has already initialized the UART.  Define this
                variable to flush the UART at init time.
 
-               CONFIG_SYS_NS16550_BROKEN_TEMT
-
-               16550 UART set the Transmitter Empty (TEMT) Bit when all output
-               has finished and the transmitter is totally empty. U-Boot waits
-               for this bit to be set to initialize the serial console. On some
-               broken platforms this bit is not set in SPL making U-Boot to
-               hang while waiting for TEMT. Define this option to avoid it.
-
 
 - Console Interface:
                Depending on board, define exactly one serial port
@@ -870,7 +870,8 @@ The following options need to be configured:
                                          (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
                CONFIG_CMD_MEMINFO      * Display detailed memory information
                CONFIG_CMD_MEMORY         md, mm, nm, mw, cp, cmp, crc, base,
-                                         loop, loopw, mtest
+                                         loop, loopw
+               CONFIG_CMD_MEMTEST        mtest
                CONFIG_CMD_MISC           Misc functions like sleep etc
                CONFIG_CMD_MMC          * MMC memory mapped support
                CONFIG_CMD_MII          * MII utility commands
@@ -1335,6 +1336,29 @@ The following options need to be configured:
                        CONFIG_SH_MMCIF_CLK
                        Define the clock frequency for MMCIF
 
+- USB Device Firmware Update (DFU) class support:
+               CONFIG_DFU_FUNCTION
+               This enables the USB portion of the DFU USB class
+
+               CONFIG_CMD_DFU
+               This enables the command "dfu" which is used to have
+               U-Boot create a DFU class device via USB.  This command
+               requires that the "dfu_alt_info" environment variable be
+               set and define the alt settings to expose to the host.
+
+               CONFIG_DFU_MMC
+               This enables support for exposing (e)MMC devices via DFU.
+
+               CONFIG_DFU_NAND
+               This enables support for exposing NAND devices via DFU.
+
+               CONFIG_SYS_DFU_MAX_FILE_SIZE
+               When updating files rather than the raw storage device,
+               we use a static buffer to copy the file into and then write
+               the buffer once we've been given the whole file.  Define
+               this to the maximum filesize (in bytes) for the buffer.
+               Default is 4 MiB if undefined.
+
 - Journaling Flash filesystem support:
                CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
                CONFIG_JFFS2_NAND_DEV
@@ -1936,15 +1960,15 @@ CBFS (Coreboot Filesystem) support
 
                I2C_READ
 
-               Code that returns TRUE if the I2C data line is high,
-               FALSE if it is low.
+               Code that returns true if the I2C data line is high,
+               false if it is low.
 
                eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
 
                I2C_SDA(bit)
 
-               If <bit> is TRUE, sets the I2C data line high. If it
-               is FALSE, it clears it (low).
+               If <bit> is true, sets the I2C data line high. If it
+               is false, it clears it (low).
 
                eg: #define I2C_SDA(bit) \
                        if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
@@ -1952,8 +1976,8 @@ CBFS (Coreboot Filesystem) support
 
                I2C_SCL(bit)
 
-               If <bit> is TRUE, sets the I2C clock line high. If it
-               is FALSE, it clears it (low).
+               If <bit> is true, sets the I2C clock line high. If it
+               is false, it clears it (low).
 
                eg: #define I2C_SCL(bit) \
                        if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
@@ -2774,6 +2798,32 @@ FIT uImage format:
                Adds the MTD partitioning infrastructure from the Linux
                kernel. Needed for UBI support.
 
+- UBI support
+               CONFIG_CMD_UBI
+
+               Adds commands for interacting with MTD partitions formatted
+               with the UBI flash translation layer
+
+               Requires also defining CONFIG_RBTREE
+
+               CONFIG_UBI_SILENCE_MSG
+
+               Make the verbose messages from UBI stop printing.  This leaves
+               warnings and errors enabled.
+
+- UBIFS support
+               CONFIG_CMD_UBIFS
+
+               Adds commands for interacting with UBI volumes formatted as
+               UBIFS.  UBIFS is read-only in u-boot.
+
+               Requires UBI support as well as CONFIG_LZO
+
+               CONFIG_UBIFS_SILENCE_MSG
+
+               Make the verbose messages from UBIFS stop printing.  This leaves
+               warnings and errors enabled.
+
 - SPL framework
                CONFIG_SPL
                Enable building of SPL globally.
@@ -2914,8 +2964,11 @@ FIT uImage format:
                Support for lib/libgeneric.o in SPL binary
 
                CONFIG_SPL_PAD_TO
-               Linker address to which the SPL should be padded before
-               appending the SPL payload.
+               Image offset to which the SPL should be padded before appending
+               the SPL payload. By default, this is defined as
+               CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
+               CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
+               payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
 
                CONFIG_SPL_TARGET
                Final target image containing SPL and payload.  Some SPLs
@@ -3240,6 +3293,23 @@ Configuration Settings:
        If defined, don't allow the -f switch to env set override variable
        access flags.
 
+- CONFIG_SYS_GENERIC_BOARD
+       This selects the architecture-generic board system instead of the
+       architecture-specific board files. It is intended to move boards
+       to this new framework over time. Defining this will disable the
+       arch/foo/lib/board.c file and use common/board_f.c and
+       common/board_r.c instead. To use this option your architecture
+       must support it (i.e. must define __HAVE_ARCH_GENERIC_BOARD in
+       its config.mk file). If you find problems enabling this option on
+       your board please report the problem and send patches!
+
+- CONFIG_SYS_SYM_OFFSETS
+       This is set by architectures that use offsets for link symbols
+       instead of absolute values. So bss_start is obtained using an
+       offset _bss_start_ofs from CONFIG_SYS_TEXT_BASE, rather than
+       directly. You should not need to touch this setting.
+
+
 The following definitions that deal with the placement and management
 of environment data (variable area); in general, we support the
 following configurations:
@@ -3473,6 +3543,33 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface.
        environment. If redundant environment is used, it will be copied to
        CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
 
+- CONFIG_ENV_IS_IN_UBI:
+
+       Define this if you have an UBI volume that you want to use for the
+       environment.  This has the benefit of wear-leveling the environment
+       accesses, which is important on NAND.
+
+       - CONFIG_ENV_UBI_PART:
+
+         Define this to a string that is the mtd partition containing the UBI.
+
+       - CONFIG_ENV_UBI_VOLUME:
+
+         Define this to the name of the volume that you want to store the
+         environment in.
+
+       - CONFIG_ENV_UBI_VOLUME_REDUND:
+
+         Define this to the name of another volume to store a second copy of
+         the environment in.  This will enable redundant environments in UBI.
+         It is assumed that both volumes are in the same MTD partition.
+
+       - CONFIG_UBI_SILENCE_MSG
+       - CONFIG_UBIFS_SILENCE_MSG
+
+         You will probably want to define these to avoid a really noisy system
+         when storing the env in UBI.
+
 - CONFIG_SYS_SPI_INIT_OFFSET
 
        Defines offset to the initial SPI buffer area in DPRAM. The
@@ -3744,9 +3841,13 @@ Low Level (hardware related) configuration options:
 - CONFIG_SYS_SRIOn_MEM_SIZE:
                Size of SRIO port 'n' memory region
 
-- CONFIG_SYS_NDFC_16
-               Defined to tell the NDFC that the NAND chip is using a
-               16 bit bus.
+- CONFIG_SYS_NAND_BUSWIDTH_16BIT
+               Defined to tell the NAND controller that the NAND chip is using
+               a 16 bit bus.
+               Not all NAND drivers use this symbol.
+               Example of drivers that use it:
+               - drivers/mtd/nand/ndfc.c
+               - drivers/mtd/nand/mxc_nand.c
 
 - CONFIG_SYS_NDFC_EBC0_CFG
                Sets the EBC0_CFG register for the NDFC. If not defined
@@ -3860,6 +3961,10 @@ Low Level (hardware related) configuration options:
                If defined, the x86 reset vector code is included. This is not
                needed when U-Boot is running from Coreboot.
 
+- CONFIG_SYS_MPUCLK
+               Defines the MPU clock speed (in MHz).
+
+               NOTE : currently only supported on AM335x platforms.
 
 Freescale QE/FMAN Firmware Support:
 -----------------------------------
index 6439170..c167db7 100644 (file)
@@ -45,8 +45,8 @@ int display_get_info(int type, struct display_info *di)
        case DISPLAY_TYPE_LCD:
                di->pixel_width  = panel_info.vl_col;
                di->pixel_height = panel_info.vl_row;
-               di->screen_rows = CONSOLE_ROWS;
-               di->screen_cols = CONSOLE_COLS;
+               di->screen_rows = lcd_get_screen_rows();
+               di->screen_cols = lcd_get_screen_columns();
                break;
 #endif
        }
index 24b9d7c..461899e 100644 (file)
 CROSS_COMPILE ?= arm-linux-
 
 ifndef CONFIG_STANDALONE_LOAD_ADDR
-ifeq ($(SOC),omap3)
+ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
 CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
 else
 CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
 endif
 endif
 
+# Support generic board on ARM
+__HAVE_ARCH_GENERIC_BOARD := y
+
 PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
 
 # Choose between ARM/Thumb instruction sets
@@ -84,9 +87,7 @@ endif
 endif
 
 # needed for relocation
-ifndef CONFIG_NAND_SPL
 LDFLAGS_u-boot += -pie
-endif
 
 #
 # FIXME: binutils versions < 2.22 have a bug in the assembler where
index 9092d91..797d122 100644 (file)
@@ -31,6 +31,13 @@ PLATFORM_CPPFLAGS += -march=armv5
 # =========================================================================
 PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
 PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
+
+ifneq ($(CONFIG_IMX_CONFIG),)
+ifdef CONFIG_SPL
 ifdef CONFIG_SPL_BUILD
 ALL-y  += $(OBJTREE)/SPL
 endif
+else
+ALL-y  += $(obj)u-boot.imx
+endif
+endif
index 53015cb..3b6666b 100644 (file)
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/arch/bits.h>
 #include <asm/arch/omap2420.h>
 
+#define TIMER_CLOCK    (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV))
 #define TIMER_LOAD_VAL 0
 
 /* macro to read the 32 bit timer */
-#define READ_TIMER (*((volatile ulong *)(CONFIG_SYS_TIMERBASE+TCRR)))
+#define READ_TIMER     readl(CONFIG_SYS_TIMERBASE+TCRR) \
+                       / (TIMER_CLOCK / CONFIG_SYS_HZ)
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -99,7 +102,8 @@ ulong get_timer_masked (void)
                gd->arch.tbl += (now - gd->arch.lastinc);
        } else {
                /* we have rollover of incrementer */
-               gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
+               gd->arch.tbl += ((0xFFFFFFFF / (TIMER_CLOCK / CONFIG_SYS_HZ))
+                                - gd->arch.lastinc) + now;
        }
        gd->arch.lastinc = now;
        return gd->arch.tbl;
index a067b8a..ccea2d5 100644 (file)
@@ -88,7 +88,11 @@ _end_vect:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+       .word   CONFIG_SPL_TEXT_BASE
+#else
        .word   CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -100,13 +104,13 @@ _TEXT_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
-.global        _image_copy_end_ofs
+.globl _image_copy_end_ofs
 _image_copy_end_ofs:
-       .word   __image_copy_end - _start
+       .word __image_copy_end - _start
 
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -170,29 +174,24 @@ next:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
@@ -201,7 +200,6 @@ copy_loop:
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
@@ -235,8 +233,6 @@ fixnext:
        add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
        cmp     r2, r3
        blo     fixloop
-       bx      lr
-
 #endif
 
 relocate_done:
@@ -392,8 +388,9 @@ cpu_init_crit:
        str     r0, [r13]                       @ save R0's value.
        ldr     r0, IRQ_STACK_START_IN          @ get data regions start
        str     lr, [r0]                        @ save caller lr in position 0 of saved stack
-       mrs     r0, spsr                        @ get the spsr
+       mrs     lr, spsr                        @ get the spsr
        str     lr, [r0, #4]                    @ save spsr in position 1 of saved stack
+       ldr     lr, [r0]                        @ restore lr
        ldr     r0, [r13]                       @ restore r0
        add     r13, r13, #4                    @ pop stack entry
        .endm
index a0462ab..8296e5d 100644 (file)
@@ -38,7 +38,7 @@ SECTIONS
        .text      :
        {
        __start = .;
-         arch/arm/cpu/arm1136/start.o  (.text)
+         arch/arm/cpu/arm1136/start.o  (.text*)
          *(.text*)
        } >.sram
 
@@ -57,6 +57,6 @@ SECTIONS
                __bss_start = .;
                *(.bss*)
                . = ALIGN(4);
-               __bss_end__ = .;
+               __bss_end = .;
        } >.sdram
 }
index 95da6a8..135de42 100644 (file)
@@ -17,7 +17,7 @@ include $(TOPDIR)/config.mk
 LIB    = $(obj)lib$(SOC).o
 
 SOBJS  := lowlevel_init.o
-COBJS  := init.o reset.o timer.o
+COBJS  := init.o reset.o timer.o mbox.o
 
 SRCS   := $(SOBJS:.o=.c) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/arch/arm/cpu/arm1176/bcm2835/mbox.c b/arch/arm/cpu/arm1176/bcm2835/mbox.c
new file mode 100644 (file)
index 0000000..fd65e33
--- /dev/null
@@ -0,0 +1,164 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/mbox.h>
+
+#define TIMEOUT (100 * 1000) /* 100mS in uS */
+
+int bcm2835_mbox_call_raw(u32 chan, u32 send, u32 *recv)
+{
+       struct bcm2835_mbox_regs *regs =
+               (struct bcm2835_mbox_regs *)BCM2835_MBOX_PHYSADDR;
+       ulong endtime = get_timer(0) + TIMEOUT;
+       u32 val;
+
+       debug("time: %lu timeout: %lu\n", get_timer(0), endtime);
+
+       if (send & BCM2835_CHAN_MASK) {
+               printf("mbox: Illegal mbox data 0x%08x\n", send);
+               return -1;
+       }
+
+       /* Drain any stale responses */
+
+       for (;;) {
+               val = readl(&regs->status);
+               if (val & BCM2835_MBOX_STATUS_RD_EMPTY)
+                       break;
+               if (get_timer(0) >= endtime) {
+                       printf("mbox: Timeout draining stale responses\n");
+                       return -1;
+               }
+               val = readl(&regs->read);
+       }
+
+       /* Wait for space to send */
+
+       for (;;) {
+               val = readl(&regs->status);
+               if (!(val & BCM2835_MBOX_STATUS_WR_FULL))
+                       break;
+               if (get_timer(0) >= endtime) {
+                       printf("mbox: Timeout waiting for send space\n");
+                       return -1;
+               }
+       }
+
+       /* Send the request */
+
+       val = BCM2835_MBOX_PACK(chan, send);
+       debug("mbox: TX raw: 0x%08x\n", val);
+       writel(val, &regs->write);
+
+       /* Wait for the response */
+
+       for (;;) {
+               val = readl(&regs->status);
+               if (!(val & BCM2835_MBOX_STATUS_RD_EMPTY))
+                       break;
+               if (get_timer(0) >= endtime) {
+                       printf("mbox: Timeout waiting for response\n");
+                       return -1;
+               }
+       }
+
+       /* Read the response */
+
+       val = readl(&regs->read);
+       debug("mbox: RX raw: 0x%08x\n", val);
+
+       /* Validate the response */
+
+       if (BCM2835_MBOX_UNPACK_CHAN(val) != chan) {
+               printf("mbox: Response channel mismatch\n");
+               return -1;
+       }
+
+       *recv = BCM2835_MBOX_UNPACK_DATA(val);
+
+       return 0;
+}
+
+#ifdef DEBUG
+void dump_buf(struct bcm2835_mbox_hdr *buffer)
+{
+       u32 *p;
+       u32 words;
+       int i;
+
+       p = (u32 *)buffer;
+       words = buffer->buf_size / 4;
+       for (i = 0; i < words; i++)
+               printf("    0x%04x: 0x%08x\n", i * 4, p[i]);
+}
+#endif
+
+int bcm2835_mbox_call_prop(u32 chan, struct bcm2835_mbox_hdr *buffer)
+{
+       int ret;
+       u32 rbuffer;
+       struct bcm2835_mbox_tag_hdr *tag;
+       int tag_index;
+
+#ifdef DEBUG
+       printf("mbox: TX buffer\n");
+       dump_buf(buffer);
+#endif
+
+       ret = bcm2835_mbox_call_raw(chan, (u32)buffer, &rbuffer);
+       if (ret)
+               return ret;
+       if (rbuffer != (u32)buffer) {
+               printf("mbox: Response buffer mismatch\n");
+               return -1;
+       }
+
+#ifdef DEBUG
+       printf("mbox: RX buffer\n");
+       dump_buf(buffer);
+#endif
+
+       /* Validate overall response status */
+
+       if (buffer->code != BCM2835_MBOX_RESP_CODE_SUCCESS) {
+               printf("mbox: Header response code invalid\n");
+               return -1;
+       }
+
+       /* Validate each tag's response status */
+
+       tag = (void *)(buffer + 1);
+       tag_index = 0;
+       while (tag->tag) {
+               if (!(tag->val_len & BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)) {
+                       printf("mbox: Tag %d missing val_len response bit\n",
+                               tag_index);
+                       return -1;
+               }
+               /*
+                * Clear the reponse bit so clients can just look right at the
+                * length field without extra processing
+                */
+               tag->val_len &= ~BCM2835_MBOX_TAG_VAL_LEN_RESPONSE;
+               tag = (void *)(((u8 *)tag) + sizeof(*tag) + tag->val_buf_size);
+               tag_index++;
+       }
+
+       return 0;
+}
index d232d7e..2edd671 100644 (file)
@@ -23,7 +23,7 @@ int timer_init(void)
        return 0;
 }
 
-ulong get_timer(ulong base)
+ulong get_timer_us(ulong base)
 {
        struct bcm2835_timer_regs *regs =
                (struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR;
@@ -31,6 +31,14 @@ ulong get_timer(ulong base)
        return readl(&regs->clo) - base;
 }
 
+ulong get_timer(ulong base)
+{
+       ulong us = get_timer_us(0);
+       us /= (1000000 / CONFIG_SYS_HZ);
+       us -= base;
+       return us;
+}
+
 unsigned long long get_ticks(void)
 {
        return get_timer(0);
@@ -46,10 +54,10 @@ void __udelay(unsigned long usec)
        ulong endtime;
        signed long diff;
 
-       endtime = get_timer(0) + usec;
+       endtime = get_timer_us(0) + usec;
 
        do {
-               ulong now = get_timer(0);
+               ulong now = get_timer_us(0);
                diff = endtime - now;
        } while (diff >= 0);
 }
diff --git a/arch/arm/cpu/arm1176/s3c64xx/config.mk b/arch/arm/cpu/arm1176/s3c64xx/config.mk
deleted file mode 100644 (file)
index 222d352..0000000
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
-# Make ARMv5 to allow more compilers to work, even though its v6.
-PLATFORM_CPPFLAGS += -march=armv5t
-# =========================================================================
-#
-# Supply options according to compiler version
-#
-# =========================================================================
-PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,\
-                       $(call cc-option,-malignment-traps,))
-PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
deleted file mode 100644 (file)
index df88cba..0000000
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400
- *
- * Copyright (C) 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <asm/arch/s3c6400.h>
-
-       .globl mem_ctrl_asm_init
-mem_ctrl_asm_init:
-       /* DMC1 base address 0x7e001000 */
-       ldr     r0, =ELFIN_DMC1_BASE
-
-       ldr     r1, =0x4
-       str     r1, [r0, #INDEX_DMC_MEMC_CMD]
-
-       ldr     r1, =DMC_DDR_REFRESH_PRD
-       str     r1, [r0, #INDEX_DMC_REFRESH_PRD]
-
-       ldr     r1, =DMC_DDR_CAS_LATENCY
-       str     r1, [r0, #INDEX_DMC_CAS_LATENCY]
-
-       ldr     r1, =DMC_DDR_t_DQSS
-       str     r1, [r0, #INDEX_DMC_T_DQSS]
-
-       ldr     r1, =DMC_DDR_t_MRD
-       str     r1, [r0, #INDEX_DMC_T_MRD]
-
-       ldr     r1, =DMC_DDR_t_RAS
-       str     r1, [r0, #INDEX_DMC_T_RAS]
-
-       ldr     r1, =DMC_DDR_t_RC
-       str     r1, [r0, #INDEX_DMC_T_RC]
-
-       ldr     r1, =DMC_DDR_t_RCD
-       ldr     r2, =DMC_DDR_schedule_RCD
-       orr     r1, r1, r2
-       str     r1, [r0, #INDEX_DMC_T_RCD]
-
-       ldr     r1, =DMC_DDR_t_RFC
-       ldr     r2, =DMC_DDR_schedule_RFC
-       orr     r1, r1, r2
-       str     r1, [r0, #INDEX_DMC_T_RFC]
-
-       ldr     r1, =DMC_DDR_t_RP
-       ldr     r2, =DMC_DDR_schedule_RP
-       orr     r1, r1, r2
-       str     r1, [r0, #INDEX_DMC_T_RP]
-
-       ldr     r1, =DMC_DDR_t_RRD
-       str     r1, [r0, #INDEX_DMC_T_RRD]
-
-       ldr     r1, =DMC_DDR_t_WR
-       str     r1, [r0, #INDEX_DMC_T_WR]
-
-       ldr     r1, =DMC_DDR_t_WTR
-       str     r1, [r0, #INDEX_DMC_T_WTR]
-
-       ldr     r1, =DMC_DDR_t_XP
-       str     r1, [r0, #INDEX_DMC_T_XP]
-
-       ldr     r1, =DMC_DDR_t_XSR
-       str     r1, [r0, #INDEX_DMC_T_XSR]
-
-       ldr     r1, =DMC_DDR_t_ESR
-       str     r1, [r0, #INDEX_DMC_T_ESR]
-
-       ldr     r1, =DMC1_MEM_CFG
-       str     r1, [r0, #INDEX_DMC_MEMORY_CFG]
-
-       ldr     r1, =DMC1_MEM_CFG2
-       str     r1, [r0, #INDEX_DMC_MEMORY_CFG2]
-
-       ldr     r1, =DMC1_CHIP0_CFG
-       str     r1, [r0, #INDEX_DMC_CHIP_0_CFG]
-
-       ldr     r1, =DMC_DDR_32_CFG
-       str     r1, [r0, #INDEX_DMC_USER_CONFIG]
-
-       /* DMC0 DDR Chip 0 configuration direct command reg */
-       ldr     r1, =DMC_NOP0
-       str     r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-       /* Precharge All */
-       ldr     r1, =DMC_PA0
-       str     r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-       /* Auto Refresh 2 time */
-       ldr     r1, =DMC_AR0
-       str     r1, [r0, #INDEX_DMC_DIRECT_CMD]
-       str     r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-       /* MRS */
-       ldr     r1, =DMC_mDDR_EMR0
-       str     r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-       /* Mode Reg */
-       ldr     r1, =DMC_mDDR_MR0
-       str     r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-       /* Enable DMC1 */
-       mov     r1, #0x0
-       str     r1, [r0, #INDEX_DMC_MEMC_CMD]
-
-check_dmc1_ready:
-       ldr     r1, [r0, #INDEX_DMC_MEMC_STATUS]
-       mov     r2, #0x3
-       and     r1, r1, r2
-       cmp     r1, #0x1
-       bne     check_dmc1_ready
-       nop
-
-       mov     pc, lr
-
-       .ltorg
diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c b/arch/arm/cpu/arm1176/s3c64xx/speed.c
deleted file mode 100644 (file)
index 11962ac..0000000
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, d.mueller@elsoft.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * This code should work for both the S3C2400 and the S3C2410
- * as they seem to have the same PLL and clock machinery inside.
- * The different address mapping is handled by the s3c24xx.h files below.
- */
-
-#include <common.h>
-#include <asm/arch/s3c6400.h>
-
-#define APLL 0
-#define MPLL 1
-#define EPLL 2
-
-/* ------------------------------------------------------------------------- */
-/*
- * NOTE: This describes the proper use of this file.
- *
- * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
- *
- * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
- * the specified bus in HZ.
- */
-/* ------------------------------------------------------------------------- */
-
-static ulong get_PLLCLK(int pllreg)
-{
-       ulong r, m, p, s;
-
-       switch (pllreg) {
-       case APLL:
-               r = APLL_CON_REG;
-               break;
-       case MPLL:
-               r = MPLL_CON_REG;
-               break;
-       case EPLL:
-               r = EPLL_CON0_REG;
-               break;
-       default:
-               hang();
-       }
-
-       m = (r >> 16) & 0x3ff;
-       p = (r >> 8) & 0x3f;
-       s = r & 0x7;
-
-       return m * (CONFIG_SYS_CLK_FREQ / (p * (1 << s)));
-}
-
-/* return ARMCORE frequency */
-ulong get_ARMCLK(void)
-{
-       ulong div;
-
-       div = CLK_DIV0_REG;
-
-       return get_PLLCLK(APLL) / ((div & 0x7) + 1);
-}
-
-/* return FCLK frequency */
-ulong get_FCLK(void)
-{
-       return get_PLLCLK(APLL);
-}
-
-/* return HCLK frequency */
-ulong get_HCLK(void)
-{
-       ulong fclk;
-
-       uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
-       uint hclk_div = ((CLK_DIV0_REG >> 8) & 0x1) + 1;
-
-       /*
-        * Bit 7 exists on s3c6410, and not on s3c6400, it is reserved on
-        * s3c6400 and is always 0, and it is indeed running in ASYNC mode
-        */
-       if (OTHERS_REG & 0x80)
-               fclk = get_FCLK();              /* SYNC Mode    */
-       else
-               fclk = get_PLLCLK(MPLL);        /* ASYNC Mode   */
-
-       return fclk / (hclk_div * hclkx2_div);
-}
-
-/* return PCLK frequency */
-ulong get_PCLK(void)
-{
-       ulong fclk;
-       uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
-       uint pre_div = ((CLK_DIV0_REG >> 12) & 0xf) + 1;
-
-       if (OTHERS_REG & 0x80)
-               fclk = get_FCLK();              /* SYNC Mode    */
-       else
-               fclk = get_PLLCLK(MPLL);        /* ASYNC Mode   */
-
-       return fclk / (hclkx2_div * pre_div);
-}
-
-/* return UCLK frequency */
-ulong get_UCLK(void)
-{
-       return get_PLLCLK(EPLL);
-}
-
-int print_cpuinfo(void)
-{
-       printf("\nCPU:     S3C6400@%luMHz\n", get_ARMCLK() / 1000000);
-       printf("         Fclk = %luMHz, Hclk = %luMHz, Pclk = %luMHz ",
-              get_FCLK() / 1000000, get_HCLK() / 1000000,
-              get_PCLK() / 1000000);
-
-       if (OTHERS_REG & 0x80)
-               printf("(SYNC Mode) \n");
-       else
-               printf("(ASYNC Mode) \n");
-       return 0;
-}
diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c
deleted file mode 100644 (file)
index f16a37b..0000000
+++ /dev/null
@@ -1,160 +0,0 @@
-/*
- * (C) Copyright 2003
- * Texas Instruments <www.ti.com>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * (C) Copyright 2004
- * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/proc-armv/ptrace.h>
-#include <asm/arch/s3c6400.h>
-#include <div64.h>
-
-static ulong timer_load_val;
-
-#define PRESCALER      167
-
-static s3c64xx_timers *s3c64xx_get_base_timers(void)
-{
-       return (s3c64xx_timers *)ELFIN_TIMER_BASE;
-}
-
-/* macro to read the 16 bit timer */
-static inline ulong read_timer(void)
-{
-       s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
-       return timers->TCNTO4;
-}
-
-/* Internal tick units */
-/* Last decremneter snapshot */
-static unsigned long lastdec;
-/* Monotonic incrementing timer */
-static unsigned long long timestamp;
-
-int timer_init(void)
-{
-       s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
-       /* use PWM Timer 4 because it has no output */
-       /*
-        * We use the following scheme for the timer:
-        * Prescaler is hard fixed at 167, divider at 1/4.
-        * This gives at PCLK frequency 66MHz approx. 10us ticks
-        * The timer is set to wrap after 100s, at 66MHz this obviously
-        * happens after 10,000,000 ticks. A long variable can thus
-        * keep values up to 40,000s, i.e., 11 hours. This should be
-        * enough for most uses:-) Possible optimizations: select a
-        * binary-friendly frequency, e.g., 1ms / 128. Also calculate
-        * the prescaler automatically for other PCLK frequencies.
-        */
-       timers->TCFG0 = PRESCALER << 8;
-       if (timer_load_val == 0) {
-               timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
-               timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
-       }
-
-       /* load value for 10 ms timeout */
-       lastdec = timers->TCNTB4 = timer_load_val;
-       /* auto load, manual update of Timer 4 */
-       timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO |
-               TCON_4_UPDATE;
-
-       /* auto load, start Timer 4 */
-       timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
-       timestamp = 0;
-
-       return 0;
-}
-
-/*
- * timer without interrupts
- */
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
-       ulong now = read_timer();
-
-       if (lastdec >= now) {
-               /* normal mode */
-               timestamp += lastdec - now;
-       } else {
-               /* we have an overflow ... */
-               timestamp += lastdec + timer_load_val - now;
-       }
-       lastdec = now;
-
-       return timestamp;
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
-       /* We overrun in 100s */
-       return (ulong)(timer_load_val / 100);
-}
-
-ulong get_timer_masked(void)
-{
-       unsigned long long res = get_ticks();
-       do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
-       return res;
-}
-
-ulong get_timer(ulong base)
-{
-       return get_timer_masked() - base;
-}
-
-void __udelay(unsigned long usec)
-{
-       unsigned long long tmp;
-       ulong tmo;
-
-       tmo = (usec + 9) / 10;
-       tmp = get_ticks() + tmo;        /* get current timestamp */
-
-       while (get_ticks() < tmp)/* loop till event */
-                /*NOP*/;
-}
index 40df4b1..f20da8e 100644 (file)
 #include <asm-offsets.h>
 #include <config.h>
 #include <version.h>
-#ifdef CONFIG_ENABLE_MMU
-#include <asm/proc/domain.h>
-#endif
 
-#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE)
+#ifndef CONFIG_SYS_PHY_UBOOT_BASE
 #define CONFIG_SYS_PHY_UBOOT_BASE      CONFIG_SYS_UBOOT_BASE
 #endif
 
@@ -51,7 +48,7 @@
 
 .globl _start
 _start: b      reset
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
        ldr     pc, _undefined_instruction
        ldr     pc, _software_interrupt
        ldr     pc, _prefetch_abort
@@ -98,15 +95,11 @@ _end_vect:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+       .word   CONFIG_SPL_TEXT_BASE
+#else
        .word   CONFIG_SYS_TEXT_BASE
-
-/*
- * Below variable is very important because we use MMU in U-Boot.
- * Without it, we cannot run code correctly before MMU is ON.
- * by scsuh.
- */
-_TEXT_PHY_BASE:
-       .word   CONFIG_SYS_PHY_UBOOT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -119,9 +112,13 @@ _TEXT_PHY_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -164,7 +161,7 @@ cpu_init_crit:
         * When booting from NAND - it has definitely been a reset, so, no need
         * to flush caches and disable the MMU
         */
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
        /*
         * flush v4 I/D caches
         */
@@ -229,29 +226,24 @@ skip_tcmdisable:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
-       ldr     r3, _bss_start_ofs
+       ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
@@ -260,7 +252,6 @@ copy_loop:
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
@@ -296,44 +287,6 @@ fixnext:
        blo     fixloop
 #endif
 
-#ifdef CONFIG_ENABLE_MMU
-enable_mmu:
-       /* enable domain access */
-       ldr     r5, =0x0000ffff
-       mcr     p15, 0, r5, c3, c0, 0   /* load domain access register */
-
-       /* Set the TTB register */
-       ldr     r0, _mmu_table_base
-       ldr     r1, =CONFIG_SYS_PHY_UBOOT_BASE
-       ldr     r2, =0xfff00000
-       bic     r0, r0, r2
-       orr     r1, r0, r1
-       mcr     p15, 0, r1, c2, c0, 0
-
-       /* Enable the MMU */
-       mrc     p15, 0, r0, c1, c0, 0
-       orr     r0, r0, #1              /* Set CR_M to enable MMU */
-
-       /* Prepare to enable the MMU */
-       adr     r1, skip_hw_init
-       and     r1, r1, #0x3fc
-       ldr     r2, _TEXT_BASE
-       ldr     r3, =0xfff00000
-       and     r2, r2, r3
-       orr     r2, r2, r1
-       b       mmu_enable
-
-       .align 5
-       /* Run in a single cache-line */
-mmu_enable:
-
-       mcr     p15, 0, r0, c1, c0, 0
-       nop
-       nop
-       mov     pc, r2
-skip_hw_init:
-#endif
-
 relocate_done:
 
        bx      lr
@@ -345,52 +298,12 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
        .word __dynsym_start - _start
 
-#ifdef CONFIG_ENABLE_MMU
-_mmu_table_base:
-       .word mmu_table
-#endif
-
        .globl  c_runtime_cpu_setup
 c_runtime_cpu_setup:
 
        mov     pc, lr
 
-#ifndef CONFIG_NAND_SPL
-/*
- * we assume that cache operation is done before. (eg. cleanup_before_linux())
- * actually, we don't need to do anything about cache if not use d-cache in
- * U-Boot. So, in this function we clean only MMU. by scsuh
- *
- * void        theLastJump(void *kernel, int arch_num, uint boot_params);
- */
-#ifdef CONFIG_ENABLE_MMU
-       .globl theLastJump
-theLastJump:
-       mov     r9, r0
-       ldr     r3, =0xfff00000
-       ldr     r4, _TEXT_PHY_BASE
-       adr     r5, phy_last_jump
-       bic     r5, r5, r3
-       orr     r5, r5, r4
-       mov     pc, r5
-phy_last_jump:
-       /*
-        * disable MMU stuff
-        */
-       mrc     p15, 0, r0, c1, c0, 0
-       bic     r0, r0, #0x00002300     /* clear bits 13, 9:8 (--V- --RS) */
-       bic     r0, r0, #0x00000087     /* clear bits 7, 2:0 (B--- -CAM) */
-       orr     r0, r0, #0x00000002     /* set bit 2 (A) Align */
-       orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
-       mcr     p15, 0, r0, c1, c0, 0
-
-       mcr     p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
-
-       mov     r0, #0
-       mov     pc, r9
-#endif
-
-
+#ifndef CONFIG_SPL_BUILD
 /*
  *************************************************************************
  *
@@ -480,9 +393,11 @@ phy_last_jump:
        /* save caller lr in position 0 of saved stack */
        str     lr, [r0]
        /* get the spsr */
-       mrs     r0, spsr
+       mrs     lr, spsr
        /* save spsr in position 1 of saved stack */
        str     lr, [r0, #4]
+       /* restore lr */
+       ldr     lr, [r0]
        /* restore r0 */
        ldr     r0, [r13]
        /* pop stack entry */
@@ -533,4 +448,4 @@ fiq:
        get_bad_stack
        bad_save_user_regs
        bl      do_fiq
-#endif /* CONFIG_NAND_SPL */
+#endif /* CONFIG_SPL_BUILD */
index 771d386..9facc7e 100644 (file)
@@ -85,7 +85,7 @@ _pad:                 .word 0x12345678 /* now 16*4=64 */
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
        .word   CONFIG_SPL_TEXT_BASE
 #else
        .word   CONFIG_SYS_TEXT_BASE
@@ -101,9 +101,13 @@ _TEXT_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -152,29 +156,24 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
-       ldr     r3, _bss_start_ofs
+       ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
@@ -183,7 +182,6 @@ copy_loop:
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
index c19285d..cf55bf7 100644 (file)
@@ -31,18 +31,18 @@ SECTIONS
        . = ALIGN(4);
        .text      :
        {
-         arch/arm/cpu/arm920t/start.o  (.text)
+         arch/arm/cpu/arm920t/start.o  (.text*)
                /* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */
          . = 0x1000;
          LONG(0x53555243)
-         *(.text)
+         *(.text*)
        }
 
        . = ALIGN(4);
-       .rodata : { *(.rodata) }
+       .rodata : { *(.rodata*) }
 
        . = ALIGN(4);
-       .data : { *(.data) }
+       .data : { *(.data*) }
 
        . = ALIGN(4);
        .got : { *(.got) }
@@ -55,9 +55,12 @@ SECTIONS
        }
 
        . = ALIGN(4);
+
+       __image_copy_end = .;
+
        __bss_start = .;
-       .bss : { *(.bss) }
-       __bss_end__ = .;
+       .bss : { *(.bss*) }
+       __bss_end = .;
 
        _end = .;
 }
index 511d21d..6250025 100644 (file)
@@ -73,7 +73,11 @@ _fiq:                        .word fiq
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+       .word   CONFIG_SPL_TEXT_BASE
+#else
        .word   CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -85,9 +89,13 @@ _TEXT_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -187,29 +195,24 @@ copyex:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
-       ldr     r3, _bss_start_ofs
+       ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
@@ -218,7 +221,6 @@ copy_loop:
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
index e8d6d71..021e241 100644 (file)
@@ -79,7 +79,11 @@ _fiq:                        .word fiq
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+       .word   CONFIG_SPL_TEXT_BASE
+#else
        .word   CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -91,9 +95,13 @@ _TEXT_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -177,29 +185,24 @@ poll1:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
-       ldr     r3, _bss_start_ofs
+       ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
@@ -208,7 +211,6 @@ copy_loop:
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
index 6a3a1bb..f0e31d1 100644 (file)
@@ -33,7 +33,11 @@ PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-mali
 PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
 
 ifneq ($(CONFIG_IMX_CONFIG),)
-
+ifdef CONFIG_SPL
+ifdef CONFIG_SPL_BUILD
+ALL-y  += $(OBJTREE)/SPL
+endif
+else
 ALL-y  += $(obj)u-boot.imx
-
+endif
 endif
index 714fa92..ca8a412 100644 (file)
@@ -64,7 +64,7 @@ void board_init_f(ulong dummy)
 #endif
 
        /* Third, we clear the BSS. */
-       memset(__bss_start, 0, __bss_end__ - __bss_start);
+       memset(__bss_start, 0, __bss_end - __bss_start);
 
        /* Finally, setup gd and move to the next step. */
        gd = &gdata;
index 7ccd337..bf54423 100644 (file)
@@ -119,7 +119,11 @@ fiq:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#ifdef CONFIG_SPL_TEXT_BASE
+       .word   CONFIG_SPL_TEXT_BASE
+#else
        .word   CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -133,7 +137,7 @@ _bss_start_ofs:
 
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
index 0f3222c..673c725 100644 (file)
@@ -37,8 +37,8 @@ SECTIONS
        . = ALIGN(4);
        .text   :
        {
-               arch/arm/cpu/arm926ejs/mxs/start.o      (.text)
-               *(.text)
+               arch/arm/cpu/arm926ejs/mxs/start.o      (.text*)
+               *(.text*)
        }
 
        . = ALIGN(4);
@@ -46,7 +46,7 @@ SECTIONS
 
        . = ALIGN(4);
        .data : {
-               *(.data)
+               *(.data*)
        }
 
        . = ALIGN(4);
@@ -67,7 +67,7 @@ SECTIONS
                __bss_start = .;
                *(.bss*)
                . = ALIGN(4);
-               __bss_end__ = .;
+               __bss_end = .;
        }
 
        _end = .;
index 34ec7b2..16530b0 100644 (file)
  */
 
 #include <common.h>
+#include <asm/io.h>
 
-#define TIMER_LOAD_VAL 0xffffffff
+#define TIMER_CLOCK    (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV))
+#define TIMER_LOAD_VAL 0xffffffff
 
 /* macro to read the 32 bit timer */
-#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8))
+#define READ_TIMER     readl(CONFIG_SYS_TIMERBASE+8) \
+                       / (TIMER_CLOCK / CONFIG_SYS_HZ)
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -114,7 +117,8 @@ ulong get_timer_masked (void)
                 * (TLV-now) amount of time after passing though -1
                 * nts = new "advancing time stamp"...it could also roll and cause problems.
                 */
-               timestamp += lastdec + TIMER_LOAD_VAL - now;
+               timestamp += lastdec + (TIMER_LOAD_VAL / (TIMER_CLOCK /
+                                       CONFIG_SYS_HZ)) - now;
        }
        lastdec = now;
 
@@ -160,8 +164,5 @@ unsigned long long get_ticks(void)
  */
 ulong get_tbclk (void)
 {
-       ulong tbclk;
-
-       tbclk = CONFIG_SYS_HZ;
-       return tbclk;
+       return CONFIG_SYS_HZ;
 }
index ff52131..9f0c1d1 100644 (file)
@@ -28,9 +28,6 @@
 #include <asm/arch/spr_misc.h>
 #include <asm/arch/spr_defs.h>
 
-#define FALSE                          0
-#define TRUE                           (!FALSE)
-
 static void sel_1v8(void)
 {
        struct misc_regs *misc_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
@@ -133,8 +130,8 @@ void soc_init(void)
 /*
  * xxx_boot_selected:
  *
- * return TRUE if the particular booting option is selected
- * return FALSE otherwise
+ * return true if the particular booting option is selected
+ * return false otherwise
  */
 static u32 read_bootstrap(void)
 {
@@ -150,18 +147,18 @@ int snor_boot_selected(void)
                /* Check whether SNOR boot is selected */
                if ((bootstrap & CONFIG_SPEAR_ONLYSNORBOOT) ==
                        CONFIG_SPEAR_ONLYSNORBOOT)
-                       return TRUE;
+                       return true;
 
                if ((bootstrap & CONFIG_SPEAR_NORNANDBOOT) ==
                        CONFIG_SPEAR_NORNAND8BOOT)
-                       return TRUE;
+                       return true;
 
                if ((bootstrap & CONFIG_SPEAR_NORNANDBOOT) ==
                        CONFIG_SPEAR_NORNAND16BOOT)
-                       return TRUE;
+                       return true;
        }
 
-       return FALSE;
+       return false;
 }
 
 int nand_boot_selected(void)
@@ -172,20 +169,20 @@ int nand_boot_selected(void)
                /* Check whether NAND boot is selected */
                if ((bootstrap & CONFIG_SPEAR_NORNANDBOOT) ==
                        CONFIG_SPEAR_NORNAND8BOOT)
-                       return TRUE;
+                       return true;
 
                if ((bootstrap & CONFIG_SPEAR_NORNANDBOOT) ==
                        CONFIG_SPEAR_NORNAND16BOOT)
-                       return TRUE;
+                       return true;
        }
 
-       return FALSE;
+       return false;
 }
 
 int pnor_boot_selected(void)
 {
        /* Parallel NOR boot is not selected in any SPEAr600 revision */
-       return FALSE;
+       return false;
 }
 
 int usb_boot_selected(void)
@@ -195,39 +192,39 @@ int usb_boot_selected(void)
        if (USB_BOOT_SUPPORTED) {
                /* Check whether USB boot is selected */
                if (!(bootstrap & CONFIG_SPEAR_USBBOOT))
-                       return TRUE;
+                       return true;
        }
 
-       return FALSE;
+       return false;
 }
 
 int tftp_boot_selected(void)
 {
        /* TFTP boot is not selected in any SPEAr600 revision */
-       return FALSE;
+       return false;
 }
 
 int uart_boot_selected(void)
 {
        /* UART boot is not selected in any SPEAr600 revision */
-       return FALSE;
+       return false;
 }
 
 int spi_boot_selected(void)
 {
        /* SPI boot is not selected in any SPEAr600 revision */
-       return FALSE;
+       return false;
 }
 
 int i2c_boot_selected(void)
 {
        /* I2C boot is not selected in any SPEAr600 revision */
-       return FALSE;
+       return false;
 }
 
 int mmc_boot_selected(void)
 {
-       return FALSE;
+       return false;
 }
 
 void plat_late_init(void)
index f2f9a49..3e2953c 100644 (file)
@@ -120,7 +120,7 @@ u32 spl_boot(void)
        /*
         * All the supported booting devices are listed here. Each of
         * the booting type supported by the platform would define the
-        * macro xxx_BOOT_SUPPORTED to TRUE.
+        * macro xxx_BOOT_SUPPORTED to true.
         */
 
        if (SNOR_BOOT_SUPPORTED && snor_boot_selected()) {
index 0af3e0a..967a135 100644 (file)
@@ -37,8 +37,8 @@ SECTIONS
        . = ALIGN(4);
        .text   :
        {
-               arch/arm/cpu/arm926ejs/spear/start.o    (.text)
-               *(.text)
+               arch/arm/cpu/arm926ejs/spear/start.o    (.text*)
+               *(.text*)
        }
 
        . = ALIGN(4);
@@ -46,7 +46,7 @@ SECTIONS
 
        . = ALIGN(4);
        .data : {
-               *(.data)
+               *(.data*)
        }
 
        . = ALIGN(4);
@@ -67,7 +67,7 @@ SECTIONS
                __bss_start = .;
                *(.bss*)
                . = ALIGN(4);
-               __bss_end__ = .;
+               __bss_end = .;
        }
 
        _end = .;
index 66a8b65..4c56711 100644 (file)
@@ -120,15 +120,11 @@ _fiq:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
-       .word   CONFIG_SYS_TEXT_BASE
-#else
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
        .word   CONFIG_SPL_TEXT_BASE
 #else
        .word   CONFIG_SYS_TEXT_BASE
 #endif
-#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -140,20 +136,18 @@ _TEXT_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
        .word _end - _start
 
-#ifdef CONFIG_NAND_U_BOOT
-.globl _end
-_end:
-       .word __bss_end__
-#endif
-
 #ifdef CONFIG_USE_IRQ
 /* IRQ stack memory (calculated at run-time) */
 .globl IRQ_STACK_START
@@ -196,32 +190,25 @@ reset:
 
 /*------------------------------------------------------------------------------*/
 
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_NAND_SPL)
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       sub     r9, r6, r0              /* r9 <- relocation offset */
-       cmp     r0, r6
-       moveq   r9, #0                  /* no relocation. offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy loop */
-       ldr     r3, _bss_start_ofs
+       ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
@@ -230,7 +217,6 @@ copy_loop:
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
@@ -270,6 +256,8 @@ relocate_done:
 
        bx      lr
 
+#ifndef CONFIG_SPL_BUILD
+
 _rel_dyn_start_ofs:
        .word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
index a7a98a4..9c2b70d 100644 (file)
@@ -89,7 +89,11 @@ _vectors_end:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+       .word   CONFIG_SPL_TEXT_BASE
+#else
        .word   CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -101,9 +105,13 @@ _TEXT_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -152,29 +160,24 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
-       ldr     r3, _bss_start_ofs
+       ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
@@ -183,7 +186,6 @@ copy_loop:
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
index c189849..5e8c528 100644 (file)
@@ -85,7 +85,11 @@ _fiq:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-       .word   CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+       .word   CONFIG_SPL_TEXT_BASE
+#else
+       .word   CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -97,9 +101,13 @@ _TEXT_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -148,29 +156,24 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
-       ldr     r3, _bss_start_ofs
+       ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
@@ -179,7 +182,6 @@ copy_loop:
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
index 4668b3c..7a8c2d0 100644 (file)
@@ -32,7 +32,7 @@ COBJS += cache_v7.o
 COBJS  += cpu.o
 COBJS  += syslib.o
 
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6),)
+ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI814X),)
 SOBJS  += lowlevel_init.o
 endif
 
index 70c443e..c97e30d 100644 (file)
@@ -16,7 +16,8 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(SOC).o
 
-COBJS  += clock.o
+COBJS-$(CONFIG_AM33XX) += clock_am33xx.o
+COBJS-$(CONFIG_TI814X) += clock_ti814x.o
 COBJS  += sys_info.o
 COBJS  += mem.o
 COBJS  += ddr.o
index e35a3e3..885fb2d 100644 (file)
@@ -141,11 +141,11 @@ int arch_misc_init(void)
 {
 #ifdef CONFIG_AM335X_USB0
        musb_register(&otg0_plat, &otg0_board_data,
-               (void *)AM335X_USB0_OTG_BASE);
+               (void *)USB0_OTG_BASE);
 #endif
 #ifdef CONFIG_AM335X_USB1
        musb_register(&otg1_plat, &otg1_board_data,
-               (void *)AM335X_USB1_OTG_BASE);
+               (void *)USB1_OTG_BASE);
 #endif
        return 0;
 }
similarity index 90%
rename from arch/arm/cpu/armv7/am33xx/clock.c
rename to arch/arm/cpu/armv7/am33xx/clock_am33xx.c
index d7d98d1..a1efc75 100644 (file)
@@ -1,9 +1,9 @@
 /*
- * clock.c
+ * clock_am33xx.c
  *
  * clocks for AM33XX based boards
  *
- * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
 #define CPGMAC0_IDLE           0x30000
 #define DPLL_CLKDCOLDO_GATE_CTRL        0x300
 
+#define OSC    (V_OSCK/1000000)
+
+#define MPUPLL_M       CONFIG_SYS_MPUCLK
+#define MPUPLL_N       (OSC-1)
+#define MPUPLL_M2      1
+
+/* Core PLL Fdll = 1 GHZ, */
+#define COREPLL_M      1000
+#define COREPLL_N      (OSC-1)
+
+#define COREPLL_M4     10      /* CORE_CLKOUTM4 = 200 MHZ */
+#define COREPLL_M5     8       /* CORE_CLKOUTM5 = 250 MHZ */
+#define COREPLL_M6     4       /* CORE_CLKOUTM6 = 500 MHZ */
+
+/*
+ * USB PHY clock is 960 MHZ. Since, this comes directly from Fdll, Fdll
+ * frequency needs to be set to 960 MHZ. Hence,
+ * For clkout = 192 MHZ, Fdll = 960 MHZ, divider values are given below
+ */
+#define PERPLL_M       960
+#define PERPLL_N       (OSC-1)
+#define PERPLL_M2      5
+
+/* DDR Freq is 266 MHZ for now */
+/* Set Fdll = 400 MHZ , Fdll = M * 2 * CLKINP/ N + 1; clkout = Fdll /(2 * M2) */
+#define DDRPLL_M       266
+#define DDRPLL_N       (OSC-1)
+#define DDRPLL_M2      1
+
 const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
 const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
 const struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL;
@@ -166,6 +195,11 @@ static void enable_per_clocks(void)
        while (readl(&cmper->mmc0clkctrl) != PRCM_MOD_EN)
                ;
 
+       /* MMC1 */
+       writel(PRCM_MOD_EN, &cmper->mmc1clkctrl);
+       while (readl(&cmper->mmc1clkctrl) != PRCM_MOD_EN)
+               ;
+
        /* i2c0 */
        writel(PRCM_MOD_EN, &cmwkup->wkup_i2c0ctrl);
        while (readl(&cmwkup->wkup_i2c0ctrl) != PRCM_MOD_EN)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c
new file mode 100644 (file)
index 0000000..cb4210f
--- /dev/null
@@ -0,0 +1,406 @@
+/*
+ * clock_ti814x.c
+ *
+ * Clocks for TI814X based boards
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/hardware.h>
+#include <asm/io.h>
+
+/* PRCM */
+#define PRCM_MOD_EN            0x2
+
+/* CLK_SRC */
+#define OSC_SRC0               0
+#define OSC_SRC1               1
+
+#define L3_OSC_SRC             OSC_SRC0
+
+#define OSC_0_FREQ             20
+
+#define DCO_HS2_MIN            500
+#define DCO_HS2_MAX            1000
+#define DCO_HS1_MIN            1000
+#define DCO_HS1_MAX            2000
+
+#define SELFREQDCO_HS2         0x00000801
+#define SELFREQDCO_HS1         0x00001001
+
+#define MPU_N                  0x1
+#define MPU_M                  0x3C
+#define MPU_M2                 1
+#define MPU_CLKCTRL            0x1
+
+#define L3_N                   19
+#define L3_M                   880
+#define L3_M2                  4
+#define L3_CLKCTRL             0x801
+
+#define DDR_N                  19
+#define DDR_M                  666
+#define DDR_M2                 2
+#define DDR_CLKCTRL            0x801
+
+/* ADPLLJ register values */
+#define ADPLLJ_CLKCTRL_HS2     0x00000801 /* HS2 mode, TINT2 = 1 */
+#define ADPLLJ_CLKCTRL_HS1     0x00001001 /* HS1 mode, TINT2 = 1 */
+#define ADPLLJ_CLKCTRL_CLKDCOLDOEN     (1 << 29)
+#define ADPLLJ_CLKCTRL_IDLE            (1 << 23)
+#define ADPLLJ_CLKCTRL_CLKOUTEN                (1 << 20)
+#define ADPLLJ_CLKCTRL_CLKOUTLDOEN     (1 << 19)
+#define ADPLLJ_CLKCTRL_CLKDCOLDOPWDNZ  (1 << 17)
+#define ADPLLJ_CLKCTRL_LPMODE          (1 << 12)
+#define ADPLLJ_CLKCTRL_DRIFTGUARDIAN   (1 << 11)
+#define ADPLLJ_CLKCTRL_REGM4XEN                (1 << 10)
+#define ADPLLJ_CLKCTRL_TINITZ          (1 << 0)
+#define ADPLLJ_CLKCTRL_CLKDCO          (ADPLLJ_CLKCTRL_CLKDCOLDOEN | \
+                                        ADPLLJ_CLKCTRL_CLKOUTEN | \
+                                        ADPLLJ_CLKCTRL_CLKOUTLDOEN | \
+                                        ADPLLJ_CLKCTRL_CLKDCOLDOPWDNZ)
+
+#define ADPLLJ_STATUS_PHASELOCK                (1 << 10)
+#define ADPLLJ_STATUS_FREQLOCK         (1 << 9)
+#define ADPLLJ_STATUS_PHSFRQLOCK       (ADPLLJ_STATUS_PHASELOCK | \
+                                        ADPLLJ_STATUS_FREQLOCK)
+#define ADPLLJ_STATUS_BYPASSACK                (1 << 8)
+#define ADPLLJ_STATUS_BYPASS           (1 << 0)
+#define ADPLLJ_STATUS_BYPASSANDACK     (ADPLLJ_STATUS_BYPASSACK | \
+                                        ADPLLJ_STATUS_BYPASS)
+
+#define ADPLLJ_TENABLE_ENB             (1 << 0)
+#define ADPLLJ_TENABLEDIV_ENB          (1 << 0)
+
+#define ADPLLJ_M2NDIV_M2SHIFT          16
+
+#define MPU_PLL_BASE                   (PLL_SUBSYS_BASE + 0x048)
+#define L3_PLL_BASE                    (PLL_SUBSYS_BASE + 0x110)
+#define DDR_PLL_BASE                   (PLL_SUBSYS_BASE + 0x290)
+
+struct ad_pll {
+       unsigned int pwrctrl;
+       unsigned int clkctrl;
+       unsigned int tenable;
+       unsigned int tenablediv;
+       unsigned int m2ndiv;
+       unsigned int mn2div;
+       unsigned int fracdiv;
+       unsigned int bwctrl;
+       unsigned int fracctrl;
+       unsigned int status;
+       unsigned int m3div;
+       unsigned int rampctrl;
+};
+
+#define OSC_SRC_CTRL                   (PLL_SUBSYS_BASE + 0x2C0)
+
+/* PRCM */
+#define CM_DEFAULT_BASE                        (PRCM_BASE + 0x0500)
+
+struct cm_def {
+       unsigned int resv0[2];
+       unsigned int l3fastclkstctrl;
+       unsigned int resv1[1];
+       unsigned int pciclkstctrl;
+       unsigned int resv2[1];
+       unsigned int ducaticlkstctrl;
+       unsigned int resv3[1];
+       unsigned int emif0clkctrl;
+       unsigned int emif1clkctrl;
+       unsigned int dmmclkctrl;
+       unsigned int fwclkctrl;
+       unsigned int resv4[10];
+       unsigned int usbclkctrl;
+       unsigned int resv5[1];
+       unsigned int sataclkctrl;
+       unsigned int resv6[4];
+       unsigned int ducaticlkctrl;
+       unsigned int pciclkctrl;
+};
+
+#define CM_ALWON_BASE                  (PRCM_BASE + 0x1400)
+
+struct cm_alwon {
+       unsigned int l3slowclkstctrl;
+       unsigned int ethclkstctrl;
+       unsigned int l3medclkstctrl;
+       unsigned int mmu_clkstctrl;
+       unsigned int mmucfg_clkstctrl;
+       unsigned int ocmc0clkstctrl;
+       unsigned int vcpclkstctrl;
+       unsigned int mpuclkstctrl;
+       unsigned int sysclk4clkstctrl;
+       unsigned int sysclk5clkstctrl;
+       unsigned int sysclk6clkstctrl;
+       unsigned int rtcclkstctrl;
+       unsigned int l3fastclkstctrl;
+       unsigned int resv0[67];
+       unsigned int mcasp0clkctrl;
+       unsigned int mcasp1clkctrl;
+       unsigned int mcasp2clkctrl;
+       unsigned int mcbspclkctrl;
+       unsigned int uart0clkctrl;
+       unsigned int uart1clkctrl;
+       unsigned int uart2clkctrl;
+       unsigned int gpio0clkctrl;
+       unsigned int gpio1clkctrl;
+       unsigned int i2c0clkctrl;
+       unsigned int i2c1clkctrl;
+       unsigned int mcasp345clkctrl;
+       unsigned int atlclkctrl;
+       unsigned int mlbclkctrl;
+       unsigned int pataclkctrl;
+       unsigned int resv1[1];
+       unsigned int uart3clkctrl;
+       unsigned int uart4clkctrl;
+       unsigned int uart5clkctrl;
+       unsigned int wdtimerclkctrl;
+       unsigned int spiclkctrl;
+       unsigned int mailboxclkctrl;
+       unsigned int spinboxclkctrl;
+       unsigned int mmudataclkctrl;
+       unsigned int resv2[2];
+       unsigned int mmucfgclkctrl;
+       unsigned int resv3[2];
+       unsigned int ocmc0clkctrl;
+       unsigned int vcpclkctrl;
+       unsigned int resv4[2];
+       unsigned int controlclkctrl;
+       unsigned int resv5[2];
+       unsigned int gpmcclkctrl;
+       unsigned int ethernet0clkctrl;
+       unsigned int resv6[1];
+       unsigned int mpuclkctrl;
+       unsigned int debugssclkctrl;
+       unsigned int l3clkctrl;
+       unsigned int l4hsclkctrl;
+       unsigned int l4lsclkctrl;
+       unsigned int rtcclkctrl;
+       unsigned int tpccclkctrl;
+       unsigned int tptc0clkctrl;
+       unsigned int tptc1clkctrl;
+       unsigned int tptc2clkctrl;
+       unsigned int tptc3clkctrl;
+       unsigned int resv7[4];
+       unsigned int dcan01clkctrl;
+       unsigned int mmchs0clkctrl;
+       unsigned int mmchs1clkctrl;
+       unsigned int mmchs2clkctrl;
+       unsigned int custefuseclkctrl;
+};
+
+
+const struct cm_alwon *cmalwon = (struct cm_alwon *)CM_ALWON_BASE;
+const struct cm_def *cmdef = (struct cm_def *)CM_DEFAULT_BASE;
+
+/*
+ * Enable the peripheral clock for required peripherals
+ */
+static void enable_per_clocks(void)
+{
+       /* UART0 */
+       writel(PRCM_MOD_EN, &cmalwon->uart0clkctrl);
+       while (readl(&cmalwon->uart0clkctrl) != PRCM_MOD_EN)
+               ;
+
+       /* HSMMC1 */
+       writel(PRCM_MOD_EN, &cmalwon->mmchs1clkctrl);
+       while (readl(&cmalwon->mmchs1clkctrl) != PRCM_MOD_EN)
+               ;
+}
+
+/*
+ * select the HS1 or HS2 for DCO Freq
+ * return : CLKCTRL
+ */
+static u32 pll_dco_freq_sel(u32 clkout_dco)
+{
+       if (clkout_dco >= DCO_HS2_MIN && clkout_dco < DCO_HS2_MAX)
+               return SELFREQDCO_HS2;
+       else if (clkout_dco >= DCO_HS1_MIN && clkout_dco < DCO_HS1_MAX)
+               return SELFREQDCO_HS1;
+       else
+               return -1;
+}
+
+/*
+ * select the sigma delta config
+ * return: sigma delta val
+ */
+static u32 pll_sigma_delta_val(u32 clkout_dco)
+{
+       u32 sig_val = 0;
+       float frac_div;
+
+       frac_div = (float) clkout_dco / 250;
+       frac_div = frac_div + 0.90;
+       sig_val = (int)frac_div;
+       sig_val = sig_val << 24;
+
+       return sig_val;
+}
+
+/*
+ * configure individual ADPLLJ
+ */
+static void pll_config(u32 base, u32 n, u32 m, u32 m2,
+                      u32 clkctrl_val, int adpllj)
+{
+       const struct ad_pll *adpll = (struct ad_pll *)base;
+       u32 m2nval, mn2val, read_clkctrl = 0, clkout_dco = 0;
+       u32 sig_val = 0, hs_mod = 0;
+
+       m2nval = (m2 << ADPLLJ_M2NDIV_M2SHIFT) | n;
+       mn2val = m;
+
+       /* calculate clkout_dco */
+       clkout_dco = ((OSC_0_FREQ / (n+1)) * m);
+
+       /* sigma delta & Hs mode selection skip for ADPLLS*/
+       if (adpllj) {
+               sig_val = pll_sigma_delta_val(clkout_dco);
+               hs_mod = pll_dco_freq_sel(clkout_dco);
+       }
+
+       /* by-pass pll */
+       read_clkctrl = readl(&adpll->clkctrl);
+       writel((read_clkctrl | ADPLLJ_CLKCTRL_IDLE), &adpll->clkctrl);
+       while ((readl(&adpll->status) & ADPLLJ_STATUS_BYPASSANDACK)
+               != ADPLLJ_STATUS_BYPASSANDACK)
+               ;
+
+       /* clear TINITZ */
+       read_clkctrl = readl(&adpll->clkctrl);
+       writel((read_clkctrl & ~ADPLLJ_CLKCTRL_TINITZ), &adpll->clkctrl);
+
+       /*
+        * ref_clk = 20/(n + 1);
+        * clkout_dco = ref_clk * m;
+        * clk_out = clkout_dco/m2;
+       */
+       read_clkctrl = readl(&adpll->clkctrl) &
+                            ~(ADPLLJ_CLKCTRL_LPMODE |
+                            ADPLLJ_CLKCTRL_DRIFTGUARDIAN |
+                            ADPLLJ_CLKCTRL_REGM4XEN);
+       writel(m2nval, &adpll->m2ndiv);
+       writel(mn2val, &adpll->mn2div);
+
+       /* Skip for modena(ADPLLS) */
+       if (adpllj) {
+               writel(sig_val, &adpll->fracdiv);
+               writel((read_clkctrl | hs_mod), &adpll->clkctrl);
+       }
+
+       /* Load M2, N2 dividers of ADPLL */
+       writel(ADPLLJ_TENABLEDIV_ENB, &adpll->tenablediv);
+       writel(~ADPLLJ_TENABLEDIV_ENB, &adpll->tenablediv);
+
+       /* Load M, N dividers of ADPLL */
+       writel(ADPLLJ_TENABLE_ENB, &adpll->tenable);
+       writel(~ADPLLJ_TENABLE_ENB, &adpll->tenable);
+
+       /* Configure CLKDCOLDOEN,CLKOUTLDOEN,CLKOUT Enable BITS */
+       read_clkctrl = readl(&adpll->clkctrl) & ~ADPLLJ_CLKCTRL_CLKDCO;
+       if (adpllj)
+               writel((read_clkctrl | ADPLLJ_CLKCTRL_CLKDCO),
+                                               &adpll->clkctrl);
+
+       /* Enable TINTZ and disable IDLE(PLL in Active & Locked Mode */
+       read_clkctrl = readl(&adpll->clkctrl) & ~ADPLLJ_CLKCTRL_IDLE;
+       writel((read_clkctrl | ADPLLJ_CLKCTRL_TINITZ), &adpll->clkctrl);
+
+       /* Wait for phase and freq lock */
+       while ((readl(&adpll->status) & ADPLLJ_STATUS_PHSFRQLOCK) !=
+              ADPLLJ_STATUS_PHSFRQLOCK)
+               ;
+}
+
+static void unlock_pll_control_mmr(void)
+{
+       /* TRM 2.10.1.4 and 3.2.7-3.2.11 */
+       writel(0x1EDA4C3D, 0x481C5040);
+       writel(0x2FF1AC2B, 0x48140060);
+       writel(0xF757FDC0, 0x48140064);
+       writel(0xE2BC3A6D, 0x48140068);
+       writel(0x1EBF131D, 0x4814006c);
+       writel(0x6F361E05, 0x48140070);
+}
+
+static void mpu_pll_config(void)
+{
+       pll_config(MPU_PLL_BASE, MPU_N, MPU_M, MPU_M2, MPU_CLKCTRL, 0);
+}
+
+static void l3_pll_config(void)
+{
+       u32 l3_osc_src, rd_osc_src = 0;
+
+       l3_osc_src = L3_OSC_SRC;
+       rd_osc_src = readl(OSC_SRC_CTRL);
+
+       if (OSC_SRC0 == l3_osc_src)
+               writel((rd_osc_src & 0xfffffffe)|0x0, OSC_SRC_CTRL);
+       else
+               writel((rd_osc_src & 0xfffffffe)|0x1, OSC_SRC_CTRL);
+
+       pll_config(L3_PLL_BASE, L3_N, L3_M, L3_M2, L3_CLKCTRL, 1);
+}
+
+void ddr_pll_config(unsigned int ddrpll_m)
+{
+       pll_config(DDR_PLL_BASE, DDR_N, DDR_M, DDR_M2, DDR_CLKCTRL, 1);
+}
+
+void enable_emif_clocks(void) {};
+
+void enable_dmm_clocks(void)
+{
+       writel(PRCM_MOD_EN, &cmdef->fwclkctrl);
+       writel(PRCM_MOD_EN, &cmdef->l3fastclkstctrl);
+       writel(PRCM_MOD_EN, &cmdef->emif0clkctrl);
+       while ((readl(&cmdef->emif0clkctrl)) != PRCM_MOD_EN)
+               ;
+       writel(PRCM_MOD_EN, &cmdef->emif1clkctrl);
+       while ((readl(&cmdef->emif1clkctrl)) != PRCM_MOD_EN)
+               ;
+       while ((readl(&cmdef->l3fastclkstctrl) & 0x300) != 0x300)
+               ;
+       writel(PRCM_MOD_EN, &cmdef->dmmclkctrl);
+       while ((readl(&cmdef->dmmclkctrl)) != PRCM_MOD_EN)
+               ;
+       writel(PRCM_MOD_EN, &cmalwon->l3slowclkstctrl);
+       while ((readl(&cmalwon->l3slowclkstctrl) & 0x2100) != 0x2100)
+               ;
+}
+
+/*
+ * Configure the PLL/PRCM for necessary peripherals
+ */
+void pll_init()
+{
+       unlock_pll_control_mmr();
+
+       /* Enable the control module */
+       writel(PRCM_MOD_EN, &cmalwon->controlclkctrl);
+
+       mpu_pll_config();
+
+       l3_pll_config();
+
+       /* Enable the required peripherals */
+       enable_per_clocks();
+}