]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
authorTom Rini <trini@ti.com>
Wed, 10 Dec 2014 14:07:25 +0000 (09:07 -0500)
committerTom Rini <trini@ti.com>
Wed, 10 Dec 2014 14:07:25 +0000 (09:07 -0500)
20 files changed:
arch/arm/Kconfig
arch/arm/cpu/armv7/mx6/clock.c
arch/arm/cpu/armv7/vf610/generic.c
arch/arm/imx-common/cpu.c
arch/arm/include/asm/arch-mx6/clock.h
arch/arm/include/asm/arch-vf610/imx-regs.h
board/aristainetos/aristainetos.c
board/freescale/mx6slevk/mx6slevk.c
board/freescale/mx6sxsabresd/mx6sxsabresd.c
board/solidrun/hummingboard/hummingboard.c
board/tbs/tbs2910/Kconfig
drivers/block/dwc_ahsata.c
drivers/misc/mxc_ocotp.c
drivers/misc/mxs_ocotp.c
drivers/thermal/imx_thermal.c
include/config_fallbacks.h
include/configs/mx53loco.h
include/configs/mx6sabre_common.h
include/configs/mx6sxsabresd.h
include/configs/tbs2910.h

index 6881f36f1ffaa2e509d0bf0c7960451f7b9eb596..c0b68cbf06f1140cbff53de74a51caf6a896f580 100644 (file)
@@ -654,6 +654,7 @@ config TARGET_KOSAGI_NOVENA
 
 config TARGET_TBS2910
        bool "Support tbs2910"
+       select CPU_V7
 
 config TARGET_TQMA6
        bool "TQ Systems TQMa6 board"
index ab7ac3d703e2050de9c9ab92f575e8f7055fb17d..93a02adcec4d843e68196903f891cccaddb566ab 100644 (file)
@@ -443,7 +443,7 @@ int enable_fec_anatop_clock(enum enet_freq freq)
        struct anatop_regs __iomem *anatop =
                (struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
 
-       if (freq < ENET_25MHz || freq > ENET_125MHz)
+       if (freq < ENET_25MHZ || freq > ENET_125MHZ)
                return -EINVAL;
 
        reg = readl(&anatop->pll_enet);
index a26d63ebe0135fca6def324bac919d839fda0a2c..92aaad941548391fbf5ae76bbcab4fb581661d86 100644 (file)
@@ -265,20 +265,21 @@ static char *get_reset_cause(void)
 
        cause = readl(&src_regs->srsr);
        writel(cause, &src_regs->srsr);
-       cause &= 0xff;
 
-       switch (cause) {
-       case 0x08:
-               return "WDOG";
-       case 0x20:
+       if (cause & SRC_SRSR_POR_RST)
+               return "POWER ON RESET";
+       else if (cause & SRC_SRSR_WDOG_A5)
+               return "WDOG A5";
+       else if (cause & SRC_SRSR_WDOG_M4)
+               return "WDOG M4";
+       else if (cause & SRC_SRSR_JTAG_RST)
                return "JTAG HIGH-Z";
-       case 0x80:
+       else if (cause & SRC_SRSR_SW_RST)
+               return "SW RESET";
+       else if (cause & SRC_SRSR_RESETB)
                return "EXTERNAL RESET";
-       case 0xfd:
-               return "POR";
-       default:
+       else
                return "unknown reset";
-       }
 }
 
 int print_cpuinfo(void)
index b58df7da6fc1e3f992e2f5f5ad2e4b40afabb1ea..28ccd29594ed77976f45837039e40618e527a94f 100644 (file)
@@ -206,6 +206,9 @@ void arch_preboot_os(void)
 {
 #if defined(CONFIG_CMD_SATA)
        sata_stop();
+#if defined(CONFIG_MX6)
+       disable_sata_clock();
+#endif
 #endif
 #if defined(CONFIG_VIDEO_IPUV3)
        /* disable video before launching O/S */
index 323805c75ca576287fb2727a9410f508bc34f392..226a4cde17e0c9b3b528f155ca786f27c7110ec1 100644 (file)
@@ -43,10 +43,10 @@ enum mxc_clock {
 };
 
 enum enet_freq {
-       ENET_25MHz,
-       ENET_50MHz,
-       ENET_100MHz,
-       ENET_125MHz,
+       ENET_25MHZ,
+       ENET_50MHZ,
+       ENET_100MHZ,
+       ENET_125MHZ,
 };
 
 u32 imx_get_uartclk(void);
index 9d797dbe1ff0997bd37a6e77855da16914a9df23..6b10bdf961c695ca5d2826931659c09c799982ec 100644 (file)
 #define DDRMC_CR161_TODTH_RD(v)                                (((v) & 0xf) << 8)
 #define DDRMC_CR161_TODTH_WR(v)                                ((v) & 0xf)
 
+/* System Reset Controller (SRC) */
+#define SRC_SRSR_SW_RST                                        (0x1 << 18)
+#define SRC_SRSR_RESETB                                        (0x1 << 7)
+#define SRC_SRSR_JTAG_RST                              (0x1 << 5)
+#define SRC_SRSR_WDOG_M4                               (0x1 << 4)
+#define SRC_SRSR_WDOG_A5                               (0x1 << 3)
+#define SRC_SRSR_POR_RST                               (0x1 << 0)
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
 
index 06922c0020601636f6d40a37a789c691a6ce596e..67ac260055233eb8bfa4a5060e3a7035026602a2 100644 (file)
@@ -301,7 +301,7 @@ int board_eth_init(bd_t *bis)
        /* clear gpr1[14], gpr1[18:17] to select anatop clock */
        clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0);
 
-       ret = enable_fec_anatop_clock(ENET_50MHz);
+       ret = enable_fec_anatop_clock(ENET_50MHZ);
        if (ret)
                return ret;
 
index 8111edf804291e56ec9172695cc43e9e77c495e2..cac6d73a7f81a9a1f3a7b8bd1b3b682b8fd16807 100644 (file)
@@ -234,7 +234,7 @@ static int setup_fec(void)
        /* clear gpr1[14], gpr1[18:17] to select anatop clock */
        clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0);
 
-       return enable_fec_anatop_clock(ENET_50MHz);
+       return enable_fec_anatop_clock(ENET_50MHZ);
 }
 #endif
 
index 7aee074a87ab3f00bddf74eefbb3dd079b84aad7..8b959b9fc6a02b56afcc87b2fdd937ce8dad600b 100644 (file)
@@ -168,7 +168,7 @@ static int setup_fec(void)
        reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE;
        writel(reg, &anatop->pll_enet);
 
-       return enable_fec_anatop_clock(ENET_125MHz);
+       return enable_fec_anatop_clock(ENET_125MHZ);
 }
 
 int board_eth_init(bd_t *bis)
index 6d204b343e58f1088cee7d5ccf032ce7d91cba78..52c384bdd4cf30550200c1db27750c8f9252223c 100644 (file)
@@ -146,7 +146,7 @@ int board_eth_init(bd_t *bis)
 {
        struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
 
-       int ret = enable_fec_anatop_clock(ENET_25MHz);
+       int ret = enable_fec_anatop_clock(ENET_25MHZ);
        if (ret)
                return ret;
 
index c514e24fa10798050a133b6dfdc619b9c6f4e871..84b243e3528340799f4d26f4202df483a08c9f44 100644 (file)
@@ -1,23 +1,15 @@
 if TARGET_TBS2910
 
-config SYS_CPU
-       string
-       default "armv7"
-
 config SYS_BOARD
-       string
        default "tbs2910"
 
 config SYS_VENDOR
-       string
        default "tbs"
 
 config SYS_SOC
-       string
        default "mx6"
 
 config SYS_CONFIG_NAME
-       string
        default "tbs2910"
 
 endif
index 9a2b547af2d3f0bf80d2ee0a6c0f88ddae061904..01a4148a5201ebe4738fdd399d5354068e4c614c 100644 (file)
@@ -594,22 +594,24 @@ int init_sata(int dev)
 
 int reset_sata(int dev)
 {
-       struct ahci_probe_ent *probe_ent =
-                       (struct ahci_probe_ent *)sata_dev_desc[dev].priv;
-       struct sata_host_regs *host_mmio =
-                       (struct sata_host_regs *)probe_ent->mmio_base;
+       struct ahci_probe_ent *probe_ent;
+       struct sata_host_regs *host_mmio;
 
        if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
                printf("The sata index %d is out of ranges\n\r", dev);
                return -1;
        }
 
+       probe_ent = (struct ahci_probe_ent *)sata_dev_desc[dev].priv;
+       if (NULL == probe_ent)
+               /* not initialized, so nothing to reset */
+               return 0;
+
+       host_mmio = (struct sata_host_regs *)probe_ent->mmio_base;
        setbits_le32(&host_mmio->ghc, SATA_HOST_GHC_HR);
        while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR)
                udelay(100);
 
-       disable_sata_clock();
-
        return 0;
 }
 
index 89737af9b73c417c61d55b5712d8c46f8b1ead4c..d92044eeda227a7eba57bdb6b8a7b72ce1fdf80f 100644 (file)
@@ -81,8 +81,6 @@ static int finish_access(struct ocotp_regs *regs, const char *caller)
        err = !!(readl(&regs->ctrl) & BM_CTRL_ERROR);
        clear_error(regs);
 
-       enable_ocotp_clk(0);
-
        if (err) {
                printf("mxc_ocotp %s(): Access protect error\n", caller);
                return -EIO;
index 545d3ebf520ee2bd1934460ef7c6626ad95a0de0..6f0a1d3e6da836c84ef59abc7644ca9adfda3830 100644 (file)
@@ -187,6 +187,8 @@ static int mxs_ocotp_write_fuse(uint32_t addr, uint32_t mask)
        uint32_t hclk_val, vddio_val;
        int ret;
 
+       mxs_ocotp_clear_error();
+
        /* Make sure the banks are closed for reading. */
        ret = mxs_ocotp_read_bank_open(0);
        if (ret) {
@@ -221,13 +223,17 @@ static int mxs_ocotp_write_fuse(uint32_t addr, uint32_t mask)
                goto fail;
        }
 
+       /* Check for errors */
+       if (readl(&ocotp_regs->hw_ocotp_ctrl) & OCOTP_CTRL_ERROR) {
+               puts("Failed writing fuses!\n");
+               ret = -EPERM;
+               goto fail;
+       }
+
 fail:
        mxs_ocotp_scale_vddio(0, &vddio_val);
-       ret = mxs_ocotp_scale_hclk(0, &hclk_val);
-       if (ret) {
+       if (mxs_ocotp_scale_hclk(0, &hclk_val))
                puts("Failed scaling up the HCLK!\n");
-               return ret;
-       }
 
        return ret;
 }
index 116158511dba7928115a6d5f1ddda22d3cd4a122..0bd9cfd0304587275c2e36d10198280681d7a607 100644 (file)
@@ -156,8 +156,6 @@ static int imx_thermal_probe(struct udevice *dev)
        if (fuse == 0 || fuse == ~0) {
                printf("CPU:   Thermal invalid data, fuse: 0x%x\n", fuse);
                return -EPERM;
-       } else {
-               printf("CPU:   Thermal calibration data: 0x%x\n", fuse);
        }
 
        *priv = fuse;
index 7d8daa2b8e5332f421b9bb616812d494927f1c71..508db5626bbeb9fa533ce2ee0ee3731e664659d5 100644 (file)
 #define CONFIG_SYS_PROMPT      "=> "
 #endif
 
+#ifndef CONFIG_SYS_PBSIZE
+#define CONFIG_SYS_PBSIZE      (CONFIG_SYS_CBSIZE + 128)
+#endif
+
 #ifndef CONFIG_FIT_SIGNATURE
 #define CONFIG_IMAGE_FORMAT_LEGACY
 #endif
index 10fb1f49010450e3c6bf8789f4029e0a324a8e67..42bc3c869f82b3d0b0c2ee0159c9f8a760561a3e 100644 (file)
@@ -94,6 +94,7 @@
 /* Command definition */
 #include <config_cmd_default.h>
 #define CONFIG_CMD_BOOTZ
+#define CONFIG_SUPPORT_RAW_INITRD
 
 #undef CONFIG_CMD_IMLS
 
index 9fdd8410a421f12110d0c3856695114ceef45777..f0f721e9b7ef586ed0a0776167e17365529c047c 100644 (file)
 #define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_CBSIZE              256
-
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_MAXARGS             16
 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 
index d8ab2917ea177fe7025eb439b1c82c28b3a687ff..5e0edabf3738812cfb84feb48280e7f841b87f7c 100644 (file)
 #define CONFIG_PCIE_IMX_POWER_GPIO     IMX_GPIO_NR(2, 1)
 #endif
 
+#define CONFIG_DM
+#define CONFIG_DM_THERMAL
+#define CONFIG_SYS_MALLOC_F_LEN        (1 << 10)
+#define CONFIG_IMX6_THERMAL
+
+#define CONFIG_CMD_FUSE
+#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
+#define CONFIG_MXC_OCOTP
+#endif
+
 /* FLASH and environment organization */
 #define CONFIG_SYS_NO_FLASH
 
index 6ab2184418727c5ae7b370c444ac2681e4fa0099..c097b98575d260f5a3e70d6d436ab8bf7ac4e4d6 100644 (file)
 #define CONFIG_USB_STORAGE
 #define CONFIG_USB_KEYBOARD
 #ifdef CONFIG_USB_KEYBOARD
-#define CONFIG_SYS_USB_EVENT_POLL
+#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
 #define CONFIG_SYS_STDIO_DEREGISTER
 #define CONFIG_PREBOOT "if hdmidet; then usb start; fi"
 #endif /* CONFIG_USB_KEYBOARD */