net: e1000: Increase autoneg timeout to 8 seconds

The current 4.5 timeout for the autonegotiation are not enough to
complete it on my platform. Using the Intel E1000 PCIe card in the
Marvell db-mv784mp-gp eval board. So lets increase the timeout to
8 seconds.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Simon Glass <sjg@chromium.org>

diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index ecd1a52e476add55925dd92f6b311748d6f07f86..d5d48b1e7d06b3d6ff9e1c36a8a13c9f7abdcfb4 100644 (file)
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -4017,7 +4017,7 @@ e1000_wait_autoneg(struct e1000_hw *hw)
        DEBUGFUNC();
        DEBUGOUT("Waiting for Auto-Neg to complete.\n");
 
        DEBUGFUNC();
        DEBUGOUT("Waiting for Auto-Neg to complete.\n");
 

-       /* We will wait for autoneg to complete or 4.5 seconds to expire. */
+       /* We will wait for autoneg to complete or timeout to expire. */

        for (i = PHY_AUTO_NEG_TIME; i > 0; i--) {
                /* Read the MII Status Register and wait for Auto-Neg
                 * Complete bit to be set.
        for (i = PHY_AUTO_NEG_TIME; i > 0; i--) {
                /* Read the MII Status Register and wait for Auto-Neg
                 * Complete bit to be set.

diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
index 232c95d2a4eaf5d38740b1445b46f5cef15fd922..23a81e6c2dbce133ffed8d9d8bd38351bdd925c5 100644 (file)
--- a/drivers/net/e1000.h
+++ b/drivers/net/e1000.h
@@ -2460,7 +2460,7 @@ struct e1000_hw {
 #define MII_CR_SPEED_100               0x2000
 #define MII_CR_SPEED_10                0x0000
 #define E1000_PHY_ADDRESS              0x01
 #define MII_CR_SPEED_100               0x2000
 #define MII_CR_SPEED_10                0x0000
 #define E1000_PHY_ADDRESS              0x01

-#define PHY_AUTO_NEG_TIME              45      /* 4.5 Seconds */
+#define PHY_AUTO_NEG_TIME              80      /* 8.0 Seconds */

 #define PHY_FORCE_TIME                 20      /* 2.0 Seconds */
 #define PHY_REVISION_MASK              0xFFFFFFF0
 #define DEVICE_SPEED_MASK              0x00000300      /* Device Ctrl Reg Speed Mask */
 #define PHY_FORCE_TIME                 20      /* 2.0 Seconds */
 #define PHY_REVISION_MASK              0xFFFFFFF0
 #define DEVICE_SPEED_MASK              0x00000300      /* Device Ctrl Reg Speed Mask */