arm, at91: corvus board updates

- corvus board fix problems with toshiba nand chips
  on the corvus board problems with toshiba chips
  Manufacturer ID: 0x98 Chip ID: 0xdc encounterd.

  Solve this in the following way:
  - set other nand timings
  - enable CONFIG_SYS_NAND_READY_PIN

- correct the MACH_TYPE setting

Signed-off-by: Heiko Schocher <hs@denx.de>

diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
index 0a11540cca01d316db4b7eb6f71fd234a2cc9360..f3f6dae459af3ba6a74bfa49e544a73106db6b3f 100644 (file)
--- a/board/siemens/corvus/board.c
+++ b/board/siemens/corvus/board.c
@@ -43,13 +43,13 @@ static void corvus_nand_hw_init(void)
        writel(csa, &matrix->ebicsa);
 
        /* Configure SMC CS3 for NAND/SmartMedia */
-       writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
-              AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+       writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
+              AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
               &smc->cs[3].setup);
-       writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
-              AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
+       writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
+              AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
               &smc->cs[3].pulse);
-       writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
+       writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
               &smc->cs[3].cycle);
        writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
               AT91_SMC_MODE_EXNW_DISABLE |
@@ -62,9 +62,11 @@ static void corvus_nand_hw_init(void)
               &smc->cs[3].mode);
 
        at91_periph_clk_enable(ATMEL_ID_PIOC);
+       at91_periph_clk_enable(ATMEL_ID_PIOA);
 
        /* Enable NandFlash */
        at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+       at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 }
 
 #if defined(CONFIG_SPL_BUILD)

diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 5b50c1d6dd5c459b0328da23eec806fd09342461..ace511f76534bc9188a2222eee32a0f15cb2bc0f 100644 (file)
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -18,6 +18,7 @@
 
 #define MACH_TYPE_CORVUS               2066
 
+#define CONFIG_MACH_TYPE               MACH_TYPE_CORVUS
 #define CONFIG_SYS_GENERIC_BOARD
 /*
  * Warning: changing CONFIG_SYS_TEXT_BASE requires
@@ -106,6 +107,7 @@
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE               (1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN             AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN              AT91_PIN_PC8
 #endif
 
 /* Ethernet */
@@ -171,7 +173,6 @@
 
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_GPIO_SUPPORT
-#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_BASE
@@ -184,7 +185,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_DST     CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 
-#define CONFIG_SYS_NAND_SIZE           (256*1024*1024)
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_SYS_NAND_BLOCK_SIZE     (128*1024)
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \