debris MPC8245
KVME080 MPC8245
-Thomas Lange <thomas@corelatus.se>
-
- GTH MPC860
-
Robert Lazarski <robertlazarski@gmail.com>
ATUM8548 MPC8548
GEN860T \
GEN860T_SC \
GENIETV \
- GTH \
hermes \
IAD210 \
ICU862_100MHz \
#define I2C_DELAY udelay(2)
+ CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
+
+ If your arch supports the generic GPIO framework (asm/gpio.h),
+ then you may alternatively define the two GPIOs that are to be
+ used as SCL / SDA. Any of the previous I2C_xxx macros will
+ have GPIO-based defaults assigned to them as appropriate.
+
+ You should define these to the GPIO value as given directly to
+ the generic GPIO functions.
+
CONFIG_SYS_I2C_INIT_BOARD
When a board is reset during an i2c bus transfer
{
unsigned int addr;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if (!strncmp(argv[1], "init", 4)) {
#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
/* -------------------------------------------------- */
if (argc < 2)
- {
- cmd_usage(cmdtp);
- return;
- }
+ return cmd_usage(cmdtp);
/* Turn off a breakpoint */
if(!(( isdigit( argv[ 1 ][ 0 ] )) ||
(( argv[ 1 ][ 0 ] >= 'a' ) && ( argv[ 1 ][ 0 ] <= 'f' )) ||
(( argv[ 1 ][ 0 ] >= 'A' ) && ( argv[ 1 ][ 0 ] <= 'F' ))))
- {
- cmd_usage(cmdtp);
- return;
- }
+ return cmd_usage(cmdtp);
addr = simple_strtoul( argv[ 1 ], NULL, 16 );
writeback[0] = 0x01234567UL;
writeback[1] = 0x89abcdefUL;
- if (argc > 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc > 4)
+ return cmd_usage(cmdtp);
if (argc == 2) {
if (strcmp(argv[1], "status") == 0) {
return 0;
}
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(ecc, 4, 0, do_ecc,
COBJS-$(CONFIG_P1022) += ddr-gen3.o
COBJS-$(CONFIG_P2010) += ddr-gen3.o
COBJS-$(CONFIG_P2020) += ddr-gen3.o
+COBJS-$(CONFIG_PPC_P3041) += ddr-gen3.o
COBJS-$(CONFIG_PPC_P4080) += ddr-gen3.o
+COBJS-$(CONFIG_PPC_P5020) += ddr-gen3.o
COBJS-$(CONFIG_CPM2) += ether_fcc.o
COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
#ifdef CONFIG_SYS_DPAA_FMAN
for (i = 0; i < CONFIG_SYS_NUM_FMAN; i++) {
- printf(" FMAN%d: %s MHz\n", i,
+ printf(" FMAN%d: %s MHz\n", i + 1,
strmhz(buf1, sysinfo.freqFMan[i]));
}
#endif
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_MPC8536
-extern void fsl_serdes_init(void);
-#endif
-
#ifdef CONFIG_QE
extern qe_iop_conf_t qe_iop_conf_tab[];
extern void qe_config_iopin(u8 port, u8 pin, int dir,
/* Config QE ioports */
config_qe_ioports();
#endif
-#if defined(CONFIG_MPC8536)
- fsl_serdes_init();
-#endif
#if defined(CONFIG_FSL_DMA)
dma_init();
#endif
qe_reset();
#endif
+#if defined(CONFIG_SYS_HAS_SERDES)
+ /* needs to be in ram since code uses global static vars */
+ fsl_serdes_init();
+#endif
+
#if defined(CONFIG_MP)
setup_mp();
#endif
}
#if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME)
-static void ft_fixup_clks(void *blob, const char *alias, unsigned long freq)
+static void ft_fixup_clks(void *blob, const char *compat, u32 offset,
+ unsigned long freq)
{
- const char *path = fdt_get_alias(blob, alias);
-
- int off = fdt_path_offset(blob, path);
+ phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS;
+ int off = fdt_node_offset_by_compat_reg(blob, compat, phys);
if (off >= 0) {
off = fdt_setprop_cell(blob, off, "clock-frequency", freq);
if (off > 0)
printf("WARNING enable to set clock-frequency "
- "for %s: %s\n", alias, fdt_strerror(off));
+ "for %s: %s\n", compat, fdt_strerror(off));
}
}
sys_info_t sysinfo;
get_sys_info(&sysinfo);
- ft_fixup_clks(blob, "fman0", sysinfo.freqFMan[0]);
+ ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
+ sysinfo.freqFMan[0]);
#if (CONFIG_SYS_NUM_FMAN == 2)
- ft_fixup_clks(blob, "fman1", sysinfo.freqFMan[1]);
+ ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
+ sysinfo.freqFMan[1]);
#endif
#ifdef CONFIG_SYS_DPAA_PME
- ft_fixup_clks(blob, "pme", sysinfo.freqPME);
+ do_fixup_by_compat_u32(blob, "fsl,pme",
+ "clock-frequency", sysinfo.freqPME, 1);
#endif
}
#else
"clock-frequency", bd->bi_brgfreq, 1);
#endif
+#ifdef CONFIG_FSL_CORENET
+ do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
+ "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
+#endif
+
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
#ifdef CONFIG_MP
#define FSL_SRDSCR3_LANEE_SGMII 0x00000000
#define FSL_SRDSCR3_LANEE_SATA 0x00150005
-
#define SRDS1_MAX_LANES 8
#define SRDS2_MAX_LANES 2
+static u32 serdes1_prtcl_map, serdes2_prtcl_map;
+
static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
[0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE},
[0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
int is_serdes_configured(enum srds_prtcl device)
{
- int i;
- ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
- u32 pordevsr = in_be32(&gur->pordevsr);
- u32 srds1_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
- MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+ int ret = (1 << device) & serdes1_prtcl_map;
- u32 srds2_cfg = (pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >>
- GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT;
-
- debug("%s: dev = %d\n", __FUNCTION__, device);
- debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg);
- debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_cfg);
-
- if (srds1_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
- printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg);
- return 0;
- }
-
- if (srds2_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
- printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_cfg);
- return 0;
- }
-
- for (i = 0; i < SRDS1_MAX_LANES; i++) {
- if (serdes1_cfg_tbl[srds1_cfg][i] == device)
- return 1;
- }
- for (i = 0; i < SRDS2_MAX_LANES; i++) {
- if (serdes2_cfg_tbl[srds2_cfg][i] == device)
- return 1;
- }
+ if (ret)
+ return ret;
- return 0;
+ return (1 << device) & serdes2_prtcl_map;
}
void fsl_serdes_init(void)
void *guts = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
void *sd = (void *)CONFIG_SYS_MPC85xx_SERDES2_ADDR;
u32 pordevsr = in_be32(guts + GUTS_PORDEVSR_OFFS);
- u32 srds2_io_sel;
+ u32 srds1_io_sel, srds2_io_sel;
u32 tmp;
+ int lane;
+
+ srds1_io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+ MPC85xx_PORDEVSR_IO_SEL_SHIFT;
/* parse the SRDS2_IO_SEL of PORDEVSR */
srds2_io_sel = (pordevsr & GUTS_PORDEVSR_SERDES2_IO_SEL)
>> GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT;
+ debug("PORDEVSR[SRDS1_IO_SEL] = %x\n", srds1_io_sel);
+ debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_io_sel);
+
switch (srds2_io_sel) {
case 1: /* Lane A - SATA1, Lane E - SATA2 */
/* CR 0 */
default:
break;
}
+
+ if (srds1_io_sel > ARRAY_SIZE(serdes1_cfg_tbl)) {
+ printf("Invalid PORDEVSR[SRDS1_IO_SEL] = %d\n", srds1_io_sel);
+ return;
+ }
+ for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_io_sel][lane];
+ serdes1_prtcl_map |= (1 << lane_prtcl);
+ }
+
+ if (srds2_io_sel > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_io_sel);
+ return;
+ }
+
+ for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds2_io_sel][lane];
+ serdes2_prtcl_map |= (1 << lane_prtcl);
+ }
}
#define SRDS1_MAX_LANES 4
#define SRDS2_MAX_LANES 2
+static u32 serdes1_prtcl_map, serdes2_prtcl_map;
+
static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
[0x00] = {NONE, NONE, NONE, NONE},
[0x01] = {NONE, NONE, NONE, NONE},
};
int is_serdes_configured(enum srds_prtcl device)
+{
+ int ret = (1 << device) & serdes1_prtcl_map;
+
+ if (ret)
+ return ret;
+
+ return (1 << device) & serdes2_prtcl_map;
+}
+
+void fsl_serdes_init(void)
{
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
u32 pordevsr = in_be32(&gur->pordevsr);
u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
MPC85xx_PORDEVSR_IO_SEL_SHIFT;
- unsigned int i;
+ int lane;
- debug("%s: dev = %d\n", __FUNCTION__, device);
- debug("PORDEVSR[IO_SEL] = 0x%x\n", srds_cfg);
+ debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
- printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds_cfg);
- return 0;
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
+ }
+ for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
+ serdes1_prtcl_map |= (1 << lane_prtcl);
}
- for (i = 0; i < SRDS1_MAX_LANES; i++) {
- if (serdes1_cfg_tbl[srds_cfg][i] == device)
- return 1;
- if (serdes2_cfg_tbl[srds_cfg][i] == device)
- return 1;
+ if (srds_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) {
+ printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
+ return;
}
- return 0;
+ for (lane = 0; lane < SRDS2_MAX_LANES; lane++) {
+ enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane];
+ serdes2_prtcl_map |= (1 << lane_prtcl);
+ }
}
/* -------------------------------------------------- */
if (argc < 2)
- {
- cmd_usage(cmdtp);
- return;
- }
+ return cmd_usage(cmdtp);
/* Turn off a breakpoint */
/* Set a breakpoint at the address */
if( !isdigit( argv[ 1 ][ 0 ]))
- {
- cmd_usage(cmdtp);
- return;
- }
+ return cmd_usage(cmdtp);
addr = simple_strtoul( argv[ 1 ], NULL, 16 ) & 0xfffffffc;
* I owe him a free beer. - wd]
*/
-#if defined(CONFIG_GTH) || \
- defined(CONFIG_HERMES) || \
+#if defined(CONFIG_HERMES) || \
defined(CONFIG_ICU862) || \
defined(CONFIG_IP860) || \
defined(CONFIG_IVML24) || \
CPU_TYPE_ENTRY(P2010, P2010_E, 1),
CPU_TYPE_ENTRY(P2020, P2020, 2),
CPU_TYPE_ENTRY(P2020, P2020_E, 2),
+ CPU_TYPE_ENTRY(P3041, P3041, 4),
+ CPU_TYPE_ENTRY(P3041, P3041_E, 4),
CPU_TYPE_ENTRY(P4040, P4040, 4),
CPU_TYPE_ENTRY(P4040, P4040_E, 4),
CPU_TYPE_ENTRY(P4080, P4080, 8),
CPU_TYPE_ENTRY(P4080, P4080_E, 8),
+ CPU_TYPE_ENTRY(P5010, P5010, 1),
+ CPU_TYPE_ENTRY(P5010, P5010_E, 1),
+ CPU_TYPE_ENTRY(P5020, P5020, 2),
+ CPU_TYPE_ENTRY(P5020, P5020_E, 2),
#elif defined(CONFIG_MPC86xx)
CPU_TYPE_ENTRY(8610, 8610, 1),
CPU_TYPE_ENTRY(8641, 8641, 2),
debug("\n\n");
+#if defined(CONFIG_DDR_RFDC_FIXED)
+ mtsdram(SDRAM_RFDC, CONFIG_DDR_RFDC_FIXED);
+ size = 512;
+ rffd_average = CONFIG_DDR_RFDC_FIXED & SDRAM_RFDC_RFFD_MASK;
+ mfsdram(SDRAM_RDCC, rdcc); /* record this value */
+ cal->rdcc = rdcc;
+#else /* CONFIG_DDR_RFDC_FIXED */
in_window = 0;
rdcc = 0;
rffd_average = SDRAM_RFDC_RFFD_MAX;
mtsdram(SDRAM_RFDC, rfdc_reg | SDRAM_RFDC_RFFD_ENCODE(rffd_average));
+#endif /* CONFIG_DDR_RFDC_FIXED */
rffd = rffd_average;
in_window = 0;
debug("*** best_result: read value SDRAM_RQDC 0x%08x\n",
rqdc_reg);
+#if defined(CONFIG_DDR_RFDC_FIXED)
+ mtsdram(SDRAM_RFDC, CONFIG_DDR_RFDC_FIXED);
+#else /* CONFIG_DDR_RFDC_FIXED */
mfsdram(SDRAM_RFDC, rfdc_reg);
rfdc_reg &= ~(SDRAM_RFDC_RFFD_MASK);
mtsdram(SDRAM_RFDC, rfdc_reg |
SDRAM_RFDC_RFFD_ENCODE(tcal.autocal.rffd));
+#endif /* CONFIG_DDR_RFDC_FIXED */
mfsdram(SDRAM_RFDC, rfdc_reg);
debug("*** best_result: read value SDRAM_RFDC 0x%08x\n",
COBJS += denali_data_eye.o
COBJS += denali_spd_ddr2.o
COBJS += ecc.o
+ifdef CONFIG_CMD_ECCTEST
+COBJS += cmd_ecctest.o
+endif
COBJS += fdt.o
COBJS += interrupts.o
COBJS += iop480_uart.o
--- /dev/null
+/*
+ * (C) Copyright 2010
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/cache.h>
+
+#if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR) || \
+ defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2)
+#if defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC)
+
+#if defined(CONFIG_405EX)
+/*
+ * Currently only 405EX uses 16bit data bus width as an alternative
+ * option to 32bit data width (SDRAM0_MCOPT1_WDTH)
+ */
+#define SDRAM_DATA_ALT_WIDTH 2
+#else
+#define SDRAM_DATA_ALT_WIDTH 8
+#endif
+
+#if defined(CONFIG_SYS_OCM_BASE)
+#define CONFIG_FUNC_ISRAM_ADDR CONFIG_SYS_OCM_BASE
+#endif
+
+#if defined(CONFIG_SYS_ISRAM_BASE)
+#define CONFIG_FUNC_ISRAM_ADDR CONFIG_SYS_ISRAM_BASE
+#endif
+
+#if !defined(CONFIG_FUNC_ISRAM_ADDR)
+#error "No internal SRAM/OCM provided!"
+#endif
+
+#define force_inline inline __attribute__ ((always_inline))
+
+static inline void machine_check_disable(void)
+{
+ mtmsr(mfmsr() & ~MSR_ME);
+}
+
+static inline void machine_check_enable(void)
+{
+ mtmsr(mfmsr() | MSR_ME);
+}
+
+/*
+ * These helper functions need to be inlined, since they
+ * are called from the functions running from internal SRAM.
+ * SDRAM operation is forbidden at that time, so calling
+ * functions in SDRAM has to be avoided.
+ */
+static force_inline void wait_ddr_idle(void)
+{
+ u32 val;
+
+ do {
+ mfsdram(SDRAM_MCSTAT, val);
+ } while ((val & SDRAM_MCSTAT_IDLE_MASK) == SDRAM_MCSTAT_IDLE_NOT);
+}
+
+static force_inline void recalibrate_ddr(void)
+{
+ u32 val;
+
+ /*
+ * Rewrite RQDC & RFDC to calibrate again. If this is not
+ * done, the SDRAM controller is working correctly after
+ * changing the MCOPT1_MCHK bits.
+ */
+ mfsdram(SDRAM_RQDC, val);
+ mtsdram(SDRAM_RQDC, val);
+ mfsdram(SDRAM_RFDC, val);
+ mtsdram(SDRAM_RFDC, val);
+}
+
+static force_inline void set_mcopt1_mchk(u32 bits)
+{
+ u32 val;
+
+ wait_ddr_idle();
+ mfsdram(SDRAM_MCOPT1, val);
+ mtsdram(SDRAM_MCOPT1, (val & ~SDRAM_MCOPT1_MCHK_MASK) | bits);
+ recalibrate_ddr();
+}
+
+/*
+ * The next 2 functions are copied to internal SRAM/OCM and run
+ * there. No function calls allowed here. No SDRAM acitivity should
+ * be done here.
+ */
+static void inject_ecc_error(void *ptr, int par)
+{
+ u32 val;
+
+ /*
+ * Taken from PPC460EX/EXr/GT users manual (Rev 1.21)
+ * 22.2.17.13 ECC Diagnostics
+ *
+ * Items 1 ... 5 are already done by now, running from RAM
+ * with ECC enabled
+ */
+
+ out_be32(ptr, 0x00000000);
+ val = in_be32(ptr);
+
+ /* 6. Set memory controller to no error checking */
+ set_mcopt1_mchk(SDRAM_MCOPT1_MCHK_NON);
+
+ /* 7. Modify one or two bits for error simulation */
+ if (par == 1)
+ out_be32(ptr, in_be32(ptr) ^ 0x00000001);
+ else
+ out_be32(ptr, in_be32(ptr) ^ 0x00000003);
+
+ /* 8. Wait for SDRAM idle */
+ val = in_be32(ptr);
+ set_mcopt1_mchk(SDRAM_MCOPT1_MCHK_CHK_REP);
+
+ /* Wait for SDRAM idle */
+ wait_ddr_idle();
+
+ /* Continue with 9. in calling function... */
+}
+
+static void rewrite_ecc_parity(void *ptr, int par)
+{
+ u32 current_address = (u32)ptr;
+ u32 end_address;
+ u32 address_increment;
+ u32 mcopt1;
+ u32 val;
+
+ /*
+ * Fill ECC parity byte again. Otherwise further accesses to
+ * the failure address will result in exceptions.
+ */
+
+ /* Wait for SDRAM idle */
+ val = in_be32(0x00000000);
+ set_mcopt1_mchk(SDRAM_MCOPT1_MCHK_GEN);
+
+ /* ECC bit set method for non-cached memory */
+ mfsdram(SDRAM_MCOPT1, mcopt1);
+ if ((mcopt1 & SDRAM_MCOPT1_DMWD_MASK) == SDRAM_MCOPT1_DMWD_32)
+ address_increment = 4;
+ else
+ address_increment = SDRAM_DATA_ALT_WIDTH;
+ end_address = current_address + CONFIG_SYS_CACHELINE_SIZE;
+
+ while (current_address < end_address) {
+ *((unsigned long *)current_address) = 0;
+ current_address += address_increment;
+ }
+
+ set_mcopt1_mchk(SDRAM_MCOPT1_MCHK_CHK_REP);
+
+ /* Wait for SDRAM idle */
+ wait_ddr_idle();
+}
+
+static int do_ecctest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ u32 old_val;
+ u32 val;
+ u32 *ptr;
+ void (*sram_func)(u32 *, int);
+ int error;
+
+ if (argc < 3) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ ptr = (u32 *)simple_strtoul(argv[1], NULL, 16);
+ error = simple_strtoul(argv[2], NULL, 16);
+ if ((error < 1) || (error > 2)) {
+ cmd_usage(cmdtp);
+ return 1;
+ }
+
+ printf("Using address %p for %d bit ECC error injection\n",
+ ptr, error);
+
+ /*
+ * Save value to restore it later on
+ */
+ old_val = in_be32(ptr);
+
+ /*
+ * Copy ECC injection function into internal SRAM/OCM
+ */
+ sram_func = (void *)CONFIG_FUNC_ISRAM_ADDR;
+ memcpy((void *)CONFIG_FUNC_ISRAM_ADDR, inject_ecc_error, 0x10000);
+
+ /*
+ * Disable interrupts and exceptions before calling this
+ * function in internal SRAM/OCM
+ */
+ disable_interrupts();
+ machine_check_disable();
+ eieio();
+
+ /*
+ * Jump to ECC simulation function in internal SRAM/OCM
+ */
+ (*sram_func)(ptr, error);
+
+ /* 10. Read the corresponding address */
+ val = in_be32(ptr);
+
+ /*
+ * Read and print ECC status register/info:
+ * The faulting address is only known upon uncorrectable ECC
+ * errors.
+ */
+ mfsdram(SDRAM_ECCES, val);
+ if (val & SDRAM_ECCES_CE)
+ printf("ECC: Correctable error\n");
+ if (val & SDRAM_ECCES_UE) {
+ printf("ECC: Uncorrectable error at 0x%02x%08x\n",
+ mfdcr(SDRAM_ERRADDULL), mfdcr(SDRAM_ERRADDLLL));
+ }
+
+ /*
+ * Clear pending interrupts/exceptions
+ */
+ mtsdram(SDRAM_ECCES, 0xffffffff);
+ mtdcr(SDRAM_ERRSTATLL, 0xff000000);
+ set_mcsr(get_mcsr());
+
+ /* Now enable interrupts and exceptions again */
+ eieio();
+ machine_check_enable();
+ enable_interrupts();
+
+ /*
+ * The ECC parity byte need to be re-written for the
+ * corresponding address. Otherwise future accesses to it
+ * will result in exceptions.
+ *
+ * Jump to ECC parity generation function
+ */
+ memcpy((void *)CONFIG_FUNC_ISRAM_ADDR, rewrite_ecc_parity, 0x10000);
+ (*sram_func)(ptr, 0);
+
+ /*
+ * Restore value in corresponding address
+ */
+ out_be32(ptr, old_val);
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ ecctest, 3, 0, do_ecctest,
+ "Test ECC by single and double error bit injection",
+ "address 1/2"
+);
+
+#endif /* defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC) */
+#endif /* defined(CONFIG_SDRAM_PPC4xx_IBM_DDR)... */
/* clear ECC error repoting registers */
mtsdram(SDRAM_ECCES, 0xffffffff);
- mtdcr(0x4c, 0xffffffff);
+#if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR)
+ /*
+ * IBM DDR(1) core (440GX):
+ * Clear Mx bits in SDRAM0_BESR0/1
+ */
+ mtsdram(SDRAM0_BESR0, 0xffffffff);
+ mtsdram(SDRAM0_BESR1, 0xffffffff);
+#elif defined(CONFIG_440)
+ /*
+ * 440/460 DDR2 core:
+ * Clear EMID (Error PLB Master ID) in MQ0_ESL
+ */
+ mtdcr(SDRAM_ERRSTATLL, 0xfff00000);
+#else
+ /*
+ * 405EX(r) DDR2 core:
+ * Clear M0ID (Error PLB Master ID) in SDRAM_BESR
+ */
+ mtsdram(SDRAM_BESR, 0xf0000000);
+#endif
mtsdram(SDRAM_MCOPT1,
(mcopt1 & ~SDRAM_MCOPT1_MCHK_MASK) | SDRAM_MCOPT1_MCHK_CHK_REP);
/* Clear MCSR */
mtspr(SPRN_MCSR, val);
}
+
+#if defined(CONFIG_DDR_ECC) && defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2)
+ /*
+ * Read and print ECC status register/info:
+ * The faulting address is only known upon uncorrectable ECC
+ * errors.
+ */
+ mfsdram(SDRAM_ECCES, val);
+ if (val & SDRAM_ECCES_CE)
+ printf("ECC: Correctable error\n");
+ if (val & SDRAM_ECCES_UE) {
+ printf("ECC: Uncorrectable error at 0x%02x%08x\n",
+ mfdcr(SDRAM_ERRADDULL), mfdcr(SDRAM_ERRADDLLL));
+ }
+#endif /* CONFIG_DDR_ECC ... */
+
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
mfsdram(DDR0_00, val) ;
printf("DDR0: DDR0_00 %lx\n", val);
defined(CONFIG_P1021) || defined(CONFIG_P1022) || \
defined(CONFIG_P2020) || defined(CONFIG_MPC8641)
#define CONFIG_MAX_CPUS 2
+#elif defined(CONFIG_PPC_P3041)
+#define CONFIG_MAX_CPUS 4
#elif defined(CONFIG_PPC_P4080)
#define CONFIG_MAX_CPUS 8
+#elif defined(CONFIG_PPC_P5020)
+#define CONFIG_MAX_CPUS 2
#else
#define CONFIG_MAX_CPUS 1
#endif
/*
- * Copyright 2007,2009 Freescale Semiconductor, Inc.
+ * Copyright 2007,2009-2010 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
int fsl_is_pci_agent(struct pci_controller *hose);
void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data);
void fsl_pci_config_unlock(struct pci_controller *hose);
-void ft_fsl_pci_setup(void *blob, const char *pci_alias,
- struct pci_controller *hose);
+void ft_fsl_pci_setup(void *blob, const char *pci_compat,
+ struct pci_controller *hose, unsigned long ctrl_addr);
/*
* Common PCI/PCIE Register structure for mpc85xx and mpc86xx
x.pci_num = num; \
}
+#define __FT_FSL_PCI_SETUP(blob, compat, num) \
+ ft_fsl_pci_setup(blob, compat, &pci##num##_hose, \
+ CONFIG_SYS_PCI##num##_ADDR)
+
+#define __FT_FSL_PCI_DEL(blob, compat, num) \
+ ft_fsl_pci_setup(blob, compat, NULL, CONFIG_SYS_PCI##num##_ADDR)
+
+#define __FT_FSL_PCIE_SETUP(blob, compat, num) \
+ ft_fsl_pci_setup(blob, compat, &pcie##num##_hose, \
+ CONFIG_SYS_PCIE##num##_ADDR)
+
+#define __FT_FSL_PCIE_DEL(blob, compat, num) \
+ ft_fsl_pci_setup(blob, compat, NULL, CONFIG_SYS_PCIE##num##_ADDR)
+
+#ifdef CONFIG_PCI1
+#define FT_FSL_PCI1_SETUP __FT_FSL_PCI_SETUP(blob, FSL_PCI_COMPAT, 1)
+#else
+#define FT_FSL_PCI1_SETUP __FT_FSL_PCI_DEL(blob, FSL_PCI_COMPAT, 1)
+#endif
+
+#ifdef CONFIG_PCI2
+#define FT_FSL_PCI2_SETUP __FT_FSL_PCI_SETUP(blob, FSL_PCI_COMPAT, 2)
+#else
+#define FT_FSL_PCI2_SETUP __FT_FSL_PCI_DEL(blob, FSL_PCI_COMPAT, 2)
+#endif
+
+#ifdef CONFIG_PCIE1
+#define FT_FSL_PCIE1_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 1)
+#else
+#define FT_FSL_PCIE1_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 1)
+#endif
+
+#ifdef CONFIG_PCIE2
+#define FT_FSL_PCIE2_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 2)
+#else
+#define FT_FSL_PCIE2_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 2)
+#endif
+
+#ifdef CONFIG_PCIE3
+#define FT_FSL_PCIE3_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 3)
+#else
+#define FT_FSL_PCIE3_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 3)
+#endif
+
+#ifdef CONFIG_PCIE4
+#define FT_FSL_PCIE4_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 4)
+#else
+#define FT_FSL_PCIE4_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 4)
+#endif
+
+#if defined(CONFIG_FSL_CORENET)
+#define FSL_PCIE_COMPAT "fsl,p4080-pcie"
+#define FT_FSL_PCI_SETUP \
+ FT_FSL_PCIE1_SETUP; \
+ FT_FSL_PCIE2_SETUP; \
+ FT_FSL_PCIE3_SETUP; \
+ FT_FSL_PCIE4_SETUP;
+#elif defined(CONFIG_MPC85xx)
+#define FSL_PCI_COMPAT "fsl,mpc8540-pci"
+#define FSL_PCIE_COMPAT "fsl,mpc8548-pcie"
+#define FT_FSL_PCI_SETUP \
+ FT_FSL_PCI1_SETUP; \
+ FT_FSL_PCI2_SETUP; \
+ FT_FSL_PCIE1_SETUP; \
+ FT_FSL_PCIE2_SETUP; \
+ FT_FSL_PCIE3_SETUP;
+#elif defined(CONFIG_MPC86xx)
+#define FSL_PCI_COMPAT "fsl,mpc8610-pci"
+#define FSL_PCIE_COMPAT "fsl,mpc8641-pcie"
+#define FT_FSL_PCI_SETUP \
+ FT_FSL_PCI1_SETUP; \
+ FT_FSL_PCIE1_SETUP; \
+ FT_FSL_PCIE2_SETUP;
+#else
+#error FT_FSL_PCI_SETUP not defined
+#endif
+
+
#endif
};
int is_serdes_configured(enum srds_prtcl device);
+void fsl_serdes_init(void);
#endif /* __FSL_SERDES_H */
#define CONFIG_SYS_MPC85xx_LBC_OFFSET 0x5000
#define CONFIG_SYS_MPC85xx_DDR2_OFFSET 0x6000
#define CONFIG_SYS_MPC85xx_ESPI_OFFSET 0x7000
+#define CONFIG_SYS_MPC85xx_PCI1_OFFSET 0x8000
#define CONFIG_SYS_MPC85xx_PCIX_OFFSET 0x8000
+#define CONFIG_SYS_MPC85xx_PCI2_OFFSET 0x9000
#define CONFIG_SYS_MPC85xx_PCIX2_OFFSET 0x9000
+#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0xa000
+#define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x9000
+#if defined(CONFIG_MPC8572) || defined(CONFIG_P2020)
+#define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x8000
+#else
+#define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0xb000
+#endif
#define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0xF000
#define CONFIG_SYS_MPC85xx_SATA1_OFFSET 0x18000
#define CONFIG_SYS_MPC85xx_SATA2_OFFSET 0x19000
#define CONFIG_SYS_FSL_SEC_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
+#define CONFIG_SYS_PCI1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCI1_OFFSET)
+#define CONFIG_SYS_PCI2_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCI2_OFFSET)
+#define CONFIG_SYS_PCIE1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE1_OFFSET)
+#define CONFIG_SYS_PCIE2_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE2_OFFSET)
+#define CONFIG_SYS_PCIE3_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIE3_OFFSET)
+
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
#define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET)
#define CONFIG_SYS_MPC86xx_DMA_OFFSET (0x21000)
#define CONFIG_SYS_MPC86xx_DMA_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_DMA_OFFSET)
+#define CONFIG_SYS_MPC86xx_PCI1_OFFSET 0x8000
+#ifdef CONFIG_MPC8610
+#define CONFIG_SYS_MPC86xx_PCIE1_OFFSET 0xa000
+#else
+#define CONFIG_SYS_MPC86xx_PCIE1_OFFSET 0x8000
+#endif
+#define CONFIG_SYS_MPC86xx_PCIE2_OFFSET 0x9000
+
+#define CONFIG_SYS_PCI1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PCI1_OFFSET)
+#define CONFIG_SYS_PCI2_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PCI2_OFFSET)
+#define CONFIG_SYS_PCIE1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PCIE1_OFFSET)
+#define CONFIG_SYS_PCIE2_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PCIE2_OFFSET)
+
#define CONFIG_SYS_TSEC1_OFFSET 0x24000
#define CONFIG_SYS_MDIO1_OFFSET 0x24000
#define CONFIG_SYS_LBC_ADDR (&((immap_t *)CONFIG_SYS_IMMR)->im_lbc)
#define SDRAM_CFG0 0x20 /* memory controller options 0 */
#define SDRAM_CFG1 0x21 /* memory controller options 1 */
+#define SDRAM0_BESR0 0x0000 /* bus error status reg 0 */
+#define SDRAM0_BESR1 0x0008 /* bus error status reg 1 */
#define SDRAM0_BEAR 0x0010 /* bus error address reg */
#define SDRAM0_SLIO 0x0018 /* ddr sdram slave interface options */
#define SDRAM0_CFG0 0x0020 /* ddr sdram options 0 */
/*
* Memory controller registers
*/
+#ifdef CONFIG_405EX
#define SDRAM_BESR 0x00 /* PLB bus error status (read/clear) */
#define SDRAM_BESRT 0x01 /* PLB bus error status (test/set) */
#define SDRAM_BEARL 0x02 /* PLB bus error address low */
#define SDRAM_WMIRQT 0x07 /* PLB write master interrupt (test/set) */
#define SDRAM_PLBOPT 0x08 /* PLB slave options */
#define SDRAM_PUABA 0x09 /* PLB upper address base */
-#ifndef CONFIG_405EX
-#define SDRAM_MCSTAT 0x14 /* memory controller status */
-#else
#define SDRAM_MCSTAT 0x1F /* memory controller status */
-#endif
+#else /* CONFIG_405EX */
+#define SDRAM_MCSTAT 0x14 /* memory controller status */
+#endif /* CONFIG_405EX */
#define SDRAM_MCOPT1 0x20 /* memory controller options 1 */
#define SDRAM_MCOPT2 0x21 /* memory controller options 2 */
#define SDRAM_MODT0 0x22 /* on die termination for bank 0 */
#define SVR_P2010_E 0x80EB00
#define SVR_P2020 0x80E200
#define SVR_P2020_E 0x80EA00
+#define SVR_P3041 0x821103
+#define SVR_P3041_E 0x821903
#define SVR_P4040 0x820100
#define SVR_P4040_E 0x820900
#define SVR_P4080 0x820000
#define SVR_P4080_E 0x820800
+#define SVR_P5010 0x822100
+#define SVR_P5010_E 0x822900
+#define SVR_P5020 0x822000
+#define SVR_P5020_E 0x822800
#define SVR_8610 0x80A000
#define SVR_8641 0x809000
u8 *buf;
int cpu_freq;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
cpu_freq = simple_strtol(argv[1], NULL, 10);
if (cpu_freq != 267) {
DECLARE_GLOBAL_DATA_PTR;
-#define CONFIG_SYS_BCSR3_PCIE 0x10
+ struct board_bcsr {
+ u8 board_id;
+ u8 cpld_rev;
+ u8 led_user;
+ u8 board_status;
+ u8 reset_ctrl;
+ u8 flash_ctrl;
+ u8 eth_ctrl;
+ u8 usb_ctrl;
+ u8 irq_ctrl;
+};
#define BOARD_CANYONLANDS_PCIE 1
#define BOARD_CANYONLANDS_SATA 2
{
#if !defined(CONFIG_ARCHES)
u32 sdr0_cust0;
+ struct board_bcsr *bcsr_data =
+ (struct board_bcsr *)CONFIG_SYS_BCSR_BASE;
+
#endif
/*
#if !defined(CONFIG_ARCHES)
/* Enable ethernet and take out of reset */
- out_8((void *)CONFIG_SYS_BCSR_BASE + 6, 0);
+ out_8(&bcsr_data->eth_ctrl, 0) ;
/* Remove NOR-FLASH, NAND-FLASH & EEPROM hardware write protection */
- out_8((void *)CONFIG_SYS_BCSR_BASE + 5, 0);
-
- /* Enable USB host & USB-OTG */
- out_8((void *)CONFIG_SYS_BCSR_BASE + 7, 0);
-
+ out_8(&bcsr_data->flash_ctrl, 0) ;
mtsdr(SDR0_SRST1, 0); /* Pull AHB out of reset default=1 */
/* Setup PLB4-AHB bridge based on the system address map */
return 0;
}
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
+int usb_board_init(void)
+{
+ struct board_bcsr *bcsr_data =
+ (struct board_bcsr *)CONFIG_SYS_BCSR_BASE;
+ u8 val;
+
+ /* Enable USB host & USB-OTG */
+ val = in_8(&bcsr_data->usb_ctrl);
+ val &= ~(BCSR_USBCTRL_OTG_RST | BCSR_USBCTRL_HOST_RST);
+ out_8(&bcsr_data->usb_ctrl, val);
+
+ return 0;
+}
+
+int usb_board_stop(void)
+{
+ struct board_bcsr *bcsr_data =
+ (struct board_bcsr *)CONFIG_SYS_BCSR_BASE;
+ u8 val;
+
+ /* Disable USB host & USB-OTG */
+ val = in_8(&bcsr_data->usb_ctrl);
+ val |= (BCSR_USBCTRL_OTG_RST | BCSR_USBCTRL_HOST_RST);
+ out_8(&bcsr_data->usb_ctrl, val);
+
+ return 0;
+}
+
+int usb_board_init_fail(void)
+{
+ return usb_board_stop();
+}
+#endif /* CONFIG_USB_OHCI_NEW && CONFIG_SYS_USB_OHCI_BOARD_INIT */
+
#if !defined(CONFIG_ARCHES)
static void canyonlands_sata_init(int board_type)
{
#if !defined(CONFIG_ARCHES)
int checkboard(void)
{
+ struct board_bcsr *bcsr_data =
+ (struct board_bcsr *)CONFIG_SYS_BCSR_BASE;
char *s = getenv("serial#");
if (pvr_460ex()) {
printf("Board: Canyonlands - AMCC PPC460EX Evaluation Board");
- if (in_8((void *)(CONFIG_SYS_BCSR_BASE + 3)) & CONFIG_SYS_BCSR3_PCIE)
+ if (in_8(&bcsr_data->board_status) & BCSR_SELECT_PCIE)
gd->board_type = BOARD_CANYONLANDS_PCIE;
else
gd->board_type = BOARD_CANYONLANDS_SATA;
break;
}
- printf(", Rev. %X", in_8((void *)(CONFIG_SYS_BCSR_BASE + 0)));
+ printf(", Rev. %X", in_8(&bcsr_data->cpld_rev));
if (s != NULL) {
puts(", serial# ");
l2cache_status() ? "ON" : "OFF");
return 0;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return 0;
{
char c = '\0';
pll_freq_t pll_freq;
- if (argc < 2) {
- cmd_usage(cmdtp);
- goto ret;
- }
- for (pll_freq = PLL_ebc20; pll_freq < PLL_TOTAL; pll_freq++)
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
+ for (pll_freq = PLL_ebc20; pll_freq < PLL_TOTAL; pll_freq++) {
if (!strcmp(pll_name[pll_freq], argv[1]))
break;
+ }
switch (pll_freq) {
case PLL_ebc20:
default:
printf("Invalid options\n\n");
- cmd_usage(cmdtp);
- goto ret;
+ return cmd_usage(cmdtp);
}
printf("PLL set to %s, "
static int do_lcd_puts (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
lcd_puts(argv[1]);
return 0;
static int do_lcd_putc (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
lcd_putc((char)argv[1][0]);
return 0;
ulong dir;
char cur_addr;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
count = simple_strtoul(argv[1], NULL, 16);
if (count > 31) {
{
int led_no;
- if (argc != 3) {
- cmd_usage(cmd_tp);
- return -1;
- }
+ if (argc != 3)
+ return cmd_usage(cmd_tp);
led_no = simple_strtoul(argv[1], NULL, 16);
- if (led_no != 1 && led_no != 2) {
- cmd_usage(cmd_tp);
- return -1;
- }
+ if (led_no != 1 && led_no != 2)
+ return cmd_usage(cmd_tp);
if (strcmp(argv[2],"off") == 0x0) {
if (led_no == 1)
else
gpio_write_bit(31, 0);
} else {
- cmd_usage(cmd_tp);
- return -1;
+ return cmd_usage(cmd_tp);
}
return 0;
}
static int do_lcd_puts(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
lcd_puts(argv[1]);
return 0;
}
static int do_lcd_putc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
lcd_putc((char)argv[1][0]);
return 0;
}
ulong dir;
char cur_addr;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
count = simple_strtoul(argv[1], NULL, 16);
if (count > 31) {
char plbClock[4];
char pcixClock[4];
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
if (strcmp(argv[2], "prom0") == 0)
chip = IIC0_BOOTPROM_ADDR;
{
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCI2
- ft_fsl_pci_setup(blob, "pci1", &pci2_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
-#endif
+ FT_FSL_PCI_SETUP;
}
#endif
int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
-#if 0
- if (argc > 1) {
- cmd_usage(cmdtp);
- return 1;
- }
-#endif
barcobcd_boot ();
return 0;
int err;
int i;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return -1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
memset(&pcmd, 0, sizeof(pcmd));
memset(&prx, 0, sizeof(prx));
int err;
uchar channel_mask = 0;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return -1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
if (strncmp(argv[1], "on", 2) == 0)
channel_mask |= 1;
int err;
uchar channel_num = 0;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return -1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
channel_num = simple_strtol(argv[1], NULL, 10);
if ((channel_num != 1) && (channel_num != 2)) {
return c->cmd(c, flag, argc, argv);
} else {
/* Unrecognized command */
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return err;
#ifdef CONFIG_VIDEO_SM501
char *str;
#endif
- if (argc != 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 2)
+ return cmd_usage(cmdtp);
addr = simple_strtoul(argv[1], NULL, 16);
return 0;
}
- cmd_usage(cmdtp);
- return 1;
-
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
prog_eeprom();
break;
default:
- cmd_usage(cmdtp);
- break;
+ return cmd_usage(cmdtp);
}
return 0;
break;
case 'h': /* help */
default:
- cmd_usage(cmdtp);
- break;
+ return cmd_usage(cmdtp);
}
return 0;
{
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#else
- ft_fsl_pci_setup(blob, "pci0", NULL);
-#endif
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
-#else
- ft_fsl_pci_setup(blob, "pci1", NULL);
-#endif
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
-#else
- ft_fsl_pci_setup(blob, "pci2", NULL);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci3", &pcie3_hose);
-#else
- ft_fsl_pci_setup(blob, "pci3", NULL);
-#endif
+ FT_FSL_PCI_SETUP;
+
#ifdef CONFIG_FSL_SGMII_RISER
fsl_sgmii_riser_fdt_fixup(blob);
#endif
/*
- * Copyright 2007,2009 Freescale Semiconductor, Inc.
+ * Copyright 2007,2009-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
{
ft_cpu_setup(blob, bd);
+ FT_FSL_PCI_SETUP;
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci2", &pcie3_hose);
-#endif
-#ifdef CONFIG_PCIE3
- ft_fsl_pci_setup(blob, "pci3", &pcie2_hose);
-#endif
#ifdef CONFIG_FSL_SGMII_RISER
fsl_sgmii_riser_fdt_fixup(blob);
#endif
/*
- * Copyright 2004, 2007, 200 Freescale Semiconductor, Inc.
+ * Copyright 2004, 2007, 2009-2010 Freescale Semiconductor, Inc.
*
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
*
#if defined(CONFIG_OF_BOARD_SETUP)
void ft_pci_setup(void *blob, bd_t *bd)
{
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
-#endif
+ FT_FSL_PCI_SETUP;
}
#endif
/*
- * Copyright 2007,2009 Freescale Semiconductor, Inc.
+ * Copyright 2007,2009-2010 Freescale Semiconductor, Inc.
*
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
*
{
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
-#endif
+ FT_FSL_PCI_SETUP;
}
#endif
/*
- * Copyright 2009 Freescale Semiconductor.
+ * Copyright 2009-2010 Freescale Semiconductor.
*
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
*
#endif
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
-#endif
+ FT_FSL_PCI_SETUP;
+
fdt_board_fixup_esdhc(blob, bd);
fdt_board_fixup_qe_uart(blob, bd);
fdt_board_fixup_qe_usb(blob, bd);
fdt_fixup_memory(blob, (u64)base, (u64)size);
-#ifdef CONFIG_PCIE3
- ft_fsl_pci_setup(blob, "pci0", &pcie3_hose);
-#endif
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
-#endif
+ FT_FSL_PCI_SETUP;
+
#ifdef CONFIG_FSL_SGMII_RISER
fsl_sgmii_riser_fdt_fixup(blob);
#endif
/*
- * Copyright 2007,2009 Freescale Semiconductor, Inc.
+ * Copyright 2007,2009-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
{
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
-#endif
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci2", &pcie2_hose);
-#endif
+ FT_FSL_PCI_SETUP;
}
#endif
{
unsigned int addr;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if (!strncmp(argv[1],"init",4)) {
#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
/*
- * Copyright 2008 Freescale Semiconductor, Inc.
+ * Copyright 2008,2010 Freescale Semiconductor, Inc.
*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* 0x0000_0000 0x7fff_ffff DDR 2G
* if PCI (prepend 0xc_0000_0000 if CONFIG_PHYS_64BIT)
- * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
- * 0xa000_0000 0xbfff_ffff PCI2 MEM 512M
+ * 0x8000_0000 0x9fff_ffff PCIE1 MEM 512M
+ * 0xa000_0000 0xbfff_ffff PCIE2 MEM 512M
* else if RIO (prepend 0xc_0000_0000 if CONFIG_PHYS_64BIT)
* 0x8000_0000 0x9fff_ffff RapidIO 512M
* endif
* (prepend 0xf_0000_0000 if CONFIG_PHYS_64BIT)
- * 0xffc0_0000 0xffc0_ffff PCI1 IO 64K
- * 0xffc1_0000 0xffc1_ffff PCI2 IO 64K
+ * 0xffc0_0000 0xffc0_ffff PCIE1 IO 64K
+ * 0xffc1_0000 0xffc1_ffff PCIE2 IO 64K
* 0xffe0_0000 0xffef_ffff CCSRBAR 1M
* 0xffdf_0000 0xffe0_0000 PIXIS, CF 64K
* 0xef80_0000 0xefff_ffff FLASH (boot bank) 8M
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1),
#endif
#ifdef CONFIG_PCI
- SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
- SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
- SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI_1),
- SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI_2),
+ SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
+ SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
+ SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI_1),
+ SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI_2),
#elif defined(CONFIG_RIO)
SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO),
#endif
/*
- * Copyright 2006, 2007 Freescale Semiconductor.
+ * Copyright 2006, 2007, 2010 Freescale Semiconductor.
*
* See file CREDITS for list of people who contributed to this
* project.
#if defined(CONFIG_PCI)
-static struct pci_controller pci1_hose;
+static struct pci_controller pcie1_hose;
#endif /* CONFIG_PCI */
-#ifdef CONFIG_PCI2
-static struct pci_controller pci2_hose;
-#endif /* CONFIG_PCI2 */
+#ifdef CONFIG_PCIE2
+static struct pci_controller pcie2_hose;
+#endif /* CONFIG_PCIE2 */
int first_free_busno = 0;
void pci_init_board(void)
{
-#ifdef CONFIG_PCI1
+#ifdef CONFIG_PCIE1
{
- volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
- struct pci_controller *hose = &pci1_hose;
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
+ struct pci_controller *hose = &pcie1_hose;
struct pci_region *r = hose->regions;
volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCI1_MEM_BUS,
- CONFIG_SYS_PCI1_MEM_PHYS,
- CONFIG_SYS_PCI1_MEM_SIZE,
+ CONFIG_SYS_PCIE1_MEM_BUS,
+ CONFIG_SYS_PCIE1_MEM_PHYS,
+ CONFIG_SYS_PCIE1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
- CONFIG_SYS_PCI1_IO_BUS,
- CONFIG_SYS_PCI1_IO_PHYS,
- CONFIG_SYS_PCI1_IO_SIZE,
+ CONFIG_SYS_PCIE1_IO_BUS,
+ CONFIG_SYS_PCIE1_IO_PHYS,
+ CONFIG_SYS_PCIE1_IO_SIZE,
PCI_REGION_IO);
hose->region_count = r - hose->regions;
* Activate ULI1575 legacy chip by performing a fake
* memory access. Needed to make ULI RTC work.
*/
- in_be32((unsigned *) ((char *)(CONFIG_SYS_PCI1_MEM_VIRT
- + CONFIG_SYS_PCI1_MEM_SIZE - 0x1000000)));
+ in_be32((unsigned *) ((char *)(CONFIG_SYS_PCIE1_MEM_VIRT
+ + CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000)));
} else {
puts("PCI-EXPRESS 1: Disabled\n");
}
#else
puts("PCI-EXPRESS1: Disabled\n");
-#endif /* CONFIG_PCI1 */
+#endif /* CONFIG_PCIE1 */
-#ifdef CONFIG_PCI2
+#ifdef CONFIG_PCIE2
{
- volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI2_ADDR;
- struct pci_controller *hose = &pci2_hose;
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
+ struct pci_controller *hose = &pcie2_hose;
struct pci_region *r = hose->regions;
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCI2_MEM_BUS,
- CONFIG_SYS_PCI2_MEM_PHYS,
- CONFIG_SYS_PCI2_MEM_SIZE,
+ CONFIG_SYS_PCIE2_MEM_BUS,
+ CONFIG_SYS_PCIE2_MEM_PHYS,
+ CONFIG_SYS_PCIE2_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
- CONFIG_SYS_PCI2_IO_BUS,
- CONFIG_SYS_PCI2_IO_PHYS,
- CONFIG_SYS_PCI2_IO_SIZE,
+ CONFIG_SYS_PCIE2_IO_BUS,
+ CONFIG_SYS_PCIE2_IO_PHYS,
+ CONFIG_SYS_PCIE2_IO_SIZE,
PCI_REGION_IO);
hose->region_count = r - hose->regions;
}
#else
puts("PCI-EXPRESS 2: Disabled\n");
-#endif /* CONFIG_PCI2 */
+#endif /* CONFIG_PCIE2 */
}
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCI2
- ft_fsl_pci_setup(blob, "pci1", &pci2_hose);
-#endif
+ FT_FSL_PCI_SETUP;
/*
* Warn if it looks like the device tree doesn't match u-boot.
fdt_fixup_memory(blob, (u64)base, (u64)size);
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci0", &pcie1_hose);
-#else
- ft_fsl_pci_setup(blob, "pci0", NULL);
-#endif
-
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
-#else
- ft_fsl_pci_setup(blob, "pci1", NULL);
-#endif
-
-#ifdef CONFIG_PCIE3
- ft_fsl_pci_setup(blob, "pci2", &pcie3_hose);
-#else
- ft_fsl_pci_setup(blob, "pci2", NULL);
-#endif
+ FT_FSL_PCI_SETUP;
#ifdef CONFIG_FSL_SGMII_RISER
fsl_sgmii_riser_fdt_fixup(blob);
/*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
void ft_pci_board_setup(void *blob)
{
-/* According to h/w manual, PCIE2 is at lower address(0x9000)
- * than PCIE1(0xa000).
- * Hence PCIE2 is made to occupy the pci1 position in dts to
- * keep the addresses sorted there.
- * Generally the case with all FSL SOCs.
- */
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
-#endif
+ FT_FSL_PCI_SETUP;
}
/*
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
fdt_fixup_memory(blob, (u64)base, (u64)size);
-#ifdef CONFIG_PCIE3
- ft_fsl_pci_setup(blob, "pci0", &pcie3_hose);
-#endif
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
-#endif
+ FT_FSL_PCI_SETUP;
+
#ifdef CONFIG_FSL_SGMII_RISER
fsl_sgmii_riser_fdt_fixup(blob);
#endif
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).a
-
-COBJS = $(BOARD).o flash.o ee_access.o pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-Written by Thomas.Lange@corelatus.com 010805
-
-To make a system for gth that actually works ;-)
-the variable TBASE needs to be set to 0,1 or 2
-depending on location where image is supposed to
-be started from.
-E.g. make TBASE=1
-
-0: Start from RAM, base 0
-
-1: Start from flash_base + 0x10070
-
-2: Start from flash_base + 0x30070
-
-When using 1 or 2, the image is supposed to be launched
-from miniboot that boots the first U-Boot image found in
-flash.
-For miniboot code, description, see www.opensource.se
+++ /dev/null
-#
-# (C) Copyright 2000, 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-ifeq ($(TBASE),0)
-TEXT_BASE = 0
-else
-ifeq ($(TBASE),1)
-TEXT_BASE = 0x80010070
-else
-ifeq ($(TBASE),2)
-TEXT_BASE = 0x80030070
-else
-## Only to make ordinary make work
-TEXT_BASE = 0x90000000
-endif
-endif
-endif
-
-OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
+++ /dev/null
-/* Module for handling DALLAS DS2438, smart battery monitor
- Chip can store up to 40 bytes of user data in EEPROM,
- perform temp, voltage and current measurements.
- Chip also contains a unique serial number.
-
- Always read/write LSb first
-
- For documentaion, see data sheet for DS2438, 2438.pdf
-
- By Thomas.Lange@corelatus.com 001025 */
-
-#include <common.h>
-#include <config.h>
-#include <mpc8xx.h>
-
-#include <../board/gth/ee_dev.h>
-
-/* We dont have kernel functions */
-#define printk printf
-#define KERN_DEBUG
-#define KERN_ERR
-#define EIO 1
-
-static int Debug = 0;
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-/*
- * lookup table ripped from DS app note 17, understanding and using
- * cyclic redundancy checks...
- */
-
-static u8 crc_lookup[256] = {
- 0, 94, 188, 226, 97, 63, 221, 131,
- 194, 156, 126, 32, 163, 253, 31, 65,
- 157, 195, 33, 127, 252, 162, 64, 30,
- 95, 1, 227, 189, 62, 96, 130, 220,
- 35, 125, 159, 193, 66, 28, 254, 160,
- 225, 191, 93, 3, 128, 222, 60, 98,
- 190, 224, 2, 92, 223, 129, 99, 61,
- 124, 34, 192, 158, 29, 67, 161, 255,
- 70, 24, 250, 164, 39, 121, 155, 197,
- 132, 218, 56, 102, 229, 187, 89, 7,
- 219, 133, 103, 57, 186, 228, 6, 88,
- 25, 71, 165, 251, 120, 38, 196, 154,
- 101, 59, 217, 135, 4, 90, 184, 230,
- 167, 249, 27, 69, 198, 152, 122, 36,
- 248, 166, 68, 26, 153, 199, 37, 123,
- 58, 100, 134, 216, 91, 5, 231, 185,
- 140, 210, 48, 110, 237, 179, 81, 15,
- 78, 16, 242, 172, 47, 113, 147, 205,
- 17, 79, 173, 243, 112, 46, 204, 146,
- 211, 141, 111, 49, 178, 236, 14, 80,
- 175, 241, 19, 77, 206, 144, 114, 44,
- 109, 51, 209, 143, 12, 82, 176, 238,
- 50, 108, 142, 208, 83, 13, 239, 177,
- 240, 174, 76, 18, 145, 207, 45, 115,
- 202, 148, 118, 40, 171, 245, 23, 73,
- 8, 86, 180, 234, 105, 55, 213, 139,
- 87, 9, 235, 181, 54, 104, 138, 212,
- 149, 203, 41, 119, 244, 170, 72, 22,
- 233, 183, 85, 11, 136, 214, 52, 106,
- 43, 117, 151, 201, 74, 20, 246, 168,
- 116, 42, 200, 150, 21, 75, 169, 247,
- 182, 232, 10, 84, 215, 137, 107, 53
-};
-
-static u8 make_new_crc( u8 Old_crc, u8 New_value ){
- /* Compute a new checksum with new byte, using previous checksum as input
- See DS app note 17, understanding and using cyclic redundancy checks...
- Also see DS2438, page 11 */
- return( crc_lookup[Old_crc ^ New_value ]);
-}
-
-int ee_crc_ok( u8 *Buffer, int Len, u8 Crc ){
- /* Check if the checksum for this buffer is correct */
- u8 Curr_crc=0;
- int i;
- u8 *Curr_byte = Buffer;
-
- for(i=0;i<Len;i++){
- Curr_crc = make_new_crc( Curr_crc, *Curr_byte);
- Curr_byte++;
- }
- E_DEBUG("Calculated CRC = 0x%x, read = 0x%x\n", Curr_crc, Crc);
-
- if(Curr_crc == Crc){
- /* Good */
- return(TRUE);
- }
- printk(KERN_ERR"EE checksum error, Calculated CRC = 0x%x, read = 0x%x\n",
- Curr_crc, Crc);
- return(FALSE);
-}
-
-static void
-set_idle(void){
- /* Send idle and keep start time
- Continous 1 is idle */
- WRITE_PORT(1);
-}
-
-static int
-do_reset(void){
- /* Release reset and verify that chip responds with presence pulse */
- int Retries = 0;
- while(Retries<5){
- udelay(RESET_LOW_TIME);
-
- /* Send reset */
- WRITE_PORT(0);
- udelay(RESET_LOW_TIME);
-
- /* Release reset */
- WRITE_PORT(1);
-
- /* Wait for EEPROM to drive output */
- udelay(PRESENCE_TIMEOUT);
- if(!READ_PORT){
- /* Ok, EEPROM is driving a 0 */
- E_DEBUG("Presence detected\n");
- if(Retries){
- E_DEBUG("Retries %d\n",Retries);
- }
- /* Make sure chip releases pin */
- udelay(PRESENCE_LOW_TIME);
- return 0;
- }
- Retries++;
- }
-
- printk(KERN_ERR"EEPROM did not respond when releasing reset\n");
-
- /* Make sure chip releases pin */
- udelay(PRESENCE_LOW_TIME);
-
- /* Set to idle again */
- set_idle();
-
- return(-EIO);
-}
-
-static u8
-read_byte(void){
- /* Read a single byte from EEPROM
- Read LSb first */
- int i;
- int Value;
- u8 Result=0;
-#ifndef CONFIG_SYS_IMMR
- u32 Flags;
-#endif
-
- E_DEBUG("Reading byte\n");
-
- for(i=0;i<8;i++){
- /* Small delay between pulses */
- udelay(1);
-
-#ifndef CONFIG_SYS_IMMR
- /* Disable irq */
- save_flags(Flags);
- cli();
-#endif
-
- /* Pull down pin short time to start read
- See page 26 in data sheet */
-
- WRITE_PORT(0);
- udelay(READ_LOW);
- WRITE_PORT(1);
-
- /* Wait for chip to drive pin */
- udelay(READ_TIMEOUT);
-
- Value = READ_PORT;
- if(Value)
- Value=1;
-
-#ifndef CONFIG_SYS_IMMR
- /* Enable irq */
- restore_flags(Flags);
-#endif
-
- /* Wait for chip to release pin */
- udelay(TOTAL_READ_LOW-READ_TIMEOUT);
-
- /* LSb first */
- Result|=Value<<i;
- }
-
- E_DEBUG("Read byte 0x%x\n",Result);
-
- return(Result);
-}
-
-static void
-write_byte(u8 Byte){
- /* Write a single byte to EEPROM
- Write LSb first */
- int i;
- int Value;
-#ifndef CONFIG_SYS_IMMR
- u32 Flags;
-#endif
-
- E_DEBUG("Writing byte 0x%x\n",Byte);
-
- for(i=0;i<8;i++){
- /* Small delay between pulses */
- udelay(1);
- Value = Byte&1;
-
-#ifndef CONFIG_SYS_IMMR
- /* Disable irq */
- save_flags(Flags);
- cli();
-#endif
-
- /* Pull down pin short time for a 1, long time for a 0
- See page 26 in data sheet */
-
- WRITE_PORT(0);
- if(Value){
- /* Write a 1 */
- udelay(WRITE_1_LOW);
- }
- else{
- /* Write a 0 */
- udelay(WRITE_0_LOW);
- }
-
- WRITE_PORT(1);
-
-#ifndef CONFIG_SYS_IMMR
- /* Enable irq */
- restore_flags(Flags);
-#endif
-
- if(Value)
- /* Wait for chip to read the 1 */
- udelay(TOTAL_WRITE_LOW-WRITE_1_LOW);
- Byte>>=1;
- }
-}
-
-int ee_do_command( u8 *Tx, int Tx_len, u8 *Rx, int Rx_len, int Send_skip ){
- /* Execute this command string, including
- giving reset and setting to idle after command
- if Rx_len is set, we read out data from EEPROM */
- int i;
-
- E_DEBUG("Command, Tx_len %d, Rx_len %d\n", Tx_len, Rx_len );
-
- if(do_reset()){
- /* Failed! */
- return(-EIO);
- }
-
- if(Send_skip)
- /* Always send SKIP_ROM first to tell chip we are sending a command,
- except when we read out rom data for chip */
- write_byte(SKIP_ROM);
-
- /* Always have Tx data */
- for(i=0;i<Tx_len;i++){
- write_byte(Tx[i]);
- }
-
- if(Rx_len){
- for(i=0;i<Rx_len;i++){
- Rx[i]=read_byte();
- }
- }
-
- set_idle();
-
- E_DEBUG("Command done\n");
-
- return(0);
-}
-
-int ee_init_data(void){
- int i;
- u8 Tx[10];
- int tmp;
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
-
- while(0){
- tmp = 1-tmp;
- if(tmp)
- immap->im_ioport.iop_padat &= ~PA_FRONT_LED;
- else
- immap->im_ioport.iop_padat |= PA_FRONT_LED;
- udelay(1);
- }
-
- /* Set port to open drain to be able to read data from
- port without setting it to input */
- PORT_B_PAR &= ~PB_EEPROM;
- PORT_B_ODR |= PB_EEPROM;
- SET_PORT_B_OUTPUT(PB_EEPROM);
-
- /* Set idle mode */
- set_idle();
-
- /* Copy all User EEPROM data to scratchpad */
- for(i=0;i<USER_PAGES;i++){
- Tx[0]=RECALL_MEMORY;
- Tx[1]=EE_USER_PAGE_0+i;
- if(ee_do_command(Tx,2,NULL,0,TRUE)) return(-EIO);
- }
-
- /* Make sure chip doesnt store measurements in NVRAM */
- Tx[0]=WRITE_SCRATCHPAD;
- Tx[1]=0; /* Page */
- Tx[2]=9;
- if(ee_do_command(Tx,3,NULL,0,TRUE)) return(-EIO);
-
- Tx[0]=COPY_SCRATCHPAD;
- if(ee_do_command(Tx,2,NULL,0,TRUE)) return(-EIO);
-
- /* FIXME check status bit instead
- Could take 10 ms to store in EEPROM */
- for(i=0;i<10;i++){
- udelay(1000);
- }
-
- return(0);
-}
+++ /dev/null
-/* By Thomas.Lange@Corelatus.com 001025
-
- Definitions for EEPROM/VOLT METER DS2438 */
-
-#ifndef INCeeaccessh
-#define INCeeaccessh
-
-int ee_do_command( u8 *Tx, int Tx_len, u8 *Rx, int Rx_len, int Send_skip );
-int ee_init_data(void);
-int ee_crc_ok( u8 *Buffer, int Len, u8 Crc );
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-
-#endif /* INCeeaccessh */
+++ /dev/null
-/* By Thomas.Lange@Corelatus.com 001025
- $Revision: 1.6 $
-
- Definitions for EEPROM/VOLT METER DS2438
- Copyright (C) 2000-2001 Corelatus AB */
-
-#ifndef INCeedevh
-#define INCeedevh
-
-#define E_DEBUG(fmt,args...) if( Debug ) printk(KERN_DEBUG"EE: " fmt, ##args)
-
-#define PORT_B_PAR ((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbpar
-#define PORT_B_ODR ((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbodr
-#define PORT_B_DIR ((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdir
-#define PORT_B_DAT ((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat
-
-#define SET_PORT_B_INPUT(Mask) PORT_B_DIR &= ~(Mask)
-#define SET_PORT_B_OUTPUT(Mask) PORT_B_DIR |= Mask
-
-#define WRITE_PORT_B(Mask,Value) { \
- if (Value) PORT_B_DAT |= Mask; \
- else PORT_B_DAT &= ~(Mask); \
- }
-#define WRITE_PORT(Value) WRITE_PORT_B(PB_EEPROM,Value)
-
-#define READ_PORT (PORT_B_DAT&PB_EEPROM)
-
-/* 64 bytes chip */
-#define EE_CHIP_SIZE 64
-
-/* We use this resistor for measuring the current drain on 3.3V */
-#define CURRENT_RESISTOR 0.022
-
-/* microsecs
- Pull line down at least this long for reset pulse */
-#define RESET_LOW_TIME 490
-
-/* Read presence pulse after we release reset pulse */
-#define PRESENCE_TIMEOUT 100
-#define PRESENCE_LOW_TIME 200
-
-#define WRITE_0_LOW 80
-#define WRITE_1_LOW 2
-#define TOTAL_WRITE_LOW 80
-
-#define READ_LOW 2
-#define READ_TIMEOUT 10
-#define TOTAL_READ_LOW 80
-
-/*** Rom function commands ***/
-#define READ_ROM 0x33
-#define MATCH_ROM 0x55
-#define SKIP_ROM 0xCC
-#define SEARCH_ROM 0xF0
-
-
-/*** Memory_command_function ***/
-#define WRITE_SCRATCHPAD 0x4E
-#define READ_SCRATCHPAD 0xBE
-#define COPY_SCRATCHPAD 0x48
-#define RECALL_MEMORY 0xB8
-#define CONVERT_TEMP 0x44
-#define CONVERT_VOLTAGE 0xB4
-
-/* Chip is divided in 8 pages, 8 bytes each */
-
-#define EE_PAGE_SIZE 8
-
-/* All chip data we want are in page 0 */
-
-/* Bytes in page 0 */
-#define EE_P0_STATUS 0
-#define EE_P0_TEMP_LSB 1
-#define EE_P0_TEMP_MSB 2
-#define EE_P0_VOLT_LSB 3
-#define EE_P0_VOLT_MSB 4
-#define EE_P0_CURRENT_LSB 5
-#define EE_P0_CURRENT_MSB 6
-
-
-/* 40 byte user data is located at page 3-7 */
-#define EE_USER_PAGE_0 3
-#define USER_PAGES 5
-
-#endif /* INCeedevh */
+++ /dev/null
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long *addr, flash_info_t *info);
-static int write_word (flash_info_t *info, ulong dest, ulong data);
-static void flash_get_offsets (ulong base, flash_info_t *info);
-
-/*-----------------------------------------------------------------------
- * Protection Flags:
- */
-#define FLAG_PROTECT_SET 0x01
-#define FLAG_PROTECT_CLEAR 0x02
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- unsigned long size_b0, size_b1;
- int i;
-
- /*printf("faking");*/
-
- return(0x1fffff);
-
- /* Init: no FLASHes known */
- for (i=0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i)
- {
- flash_info[i].flash_id = FLASH_UNKNOWN;
- }
-
- /* Static FLASH Bank configuration here - FIXME XXX */
-
- size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
- if (flash_info[0].flash_id == FLASH_UNKNOWN)
- {
- printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
- size_b0, size_b0<<20);
- }
-
-#if 0
- if (FLASH_BASE1_PRELIM != 0x0) {
- size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]);
-
- if (size_b1 > size_b0) {
- printf ("## ERROR: Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n",
- size_b1, size_b1<<20,size_b0, size_b0<<20);
-
- flash_info[0].flash_id = FLASH_UNKNOWN;
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[0].sector_count = -1;
- flash_info[1].sector_count = -1;
- flash_info[0].size = 0;
- flash_info[1].size = 0;
- return (0);
- }
- } else {
-#endif
- size_b1 = 0;
-
- /* Remap FLASH according to real size */
- memctl->memc_or0 = CONFIG_SYS_OR0_PRELIM;
- memctl->memc_br0 = CONFIG_SYS_BR0_PRELIM;
-
- /* Re-do sizing to get full correct info */
- size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
- flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[0]);
-#endif
-
- if (size_b1)
- {
- /* memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
- memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; */
-
- /* Re-do sizing to get full correct info */
- size_b1 = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + size_b0),
- &flash_info[1]);
-
- flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]);
-
-#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
- /* monitor protection ON by default */
- (void)flash_protect(FLAG_PROTECT_SET,
- CONFIG_SYS_MONITOR_BASE,
- CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
- &flash_info[1]);
-#endif
- }
- else
- {
-/* memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
- FIXME memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; */
-
- flash_info[1].flash_id = FLASH_UNKNOWN;
- flash_info[1].sector_count = -1;
- }
-
- flash_info[0].size = size_b0;
- flash_info[1].size = size_b1;
-
- return (size_b0 + size_b1);
-}
-
-
-static void flash_get_offsets (ulong base, flash_info_t *info)
-{
- int i;
-
- /* set up sector start adress table */
- if (info->flash_id & FLASH_BTYPE)
- {
- /* set sector offsets for bottom boot block type */
- for (i = 0; i < info->sector_count; i++)
- {
- info->start[i] = base + (i * 0x00040000);
- }
- }
- else
- {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- for (; i >= 0; i--)
- {
- info->start[i] = base + i * 0x00040000;
- }
- }
-
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t *info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_AMD: printf ("AMD "); break;
- case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
- default: printf ("Unknown Vendor "); break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
-
-#if 0
- case FLASH_AM040B:
- printf ("AM29F040B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM040T:
- printf ("AM29F040T (4 Mbit, top boot sect)\n");
- break;
-#endif
- case FLASH_AM400B:
- printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM400T:
- printf ("AM29LV400T (4 Mbit, top boot sector)\n");
- break;
- case FLASH_AM800B:
- printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM800T:
- printf ("AM29LV800T (8 Mbit, top boot sector)\n");
- break;
- case FLASH_AM160B:
- printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM160T:
- printf ("AM29LV160T (16 Mbit, top boot sector)\n");
- break;
- case FLASH_AM320B:
- printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
- break;
- case FLASH_AM320T:
- printf ("AM29LV320T (32 Mbit, top boot sector)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20,
- info->sector_count);
-
- printf (" Sector Start Addresses:");
-
- for (i=0; i<info->sector_count; ++i)
- {
- if ((i % 5) == 0)
- {
- printf ("\n ");
- }
-
- printf (" %08lX%s",
- info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
-
- printf ("\n");
- return;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-
-/*-----------------------------------------------------------------------
- */
-
-/*
- * The following code cannot be run from FLASH!
- */
-
-static ulong flash_get_size (vu_long *addr, flash_info_t *info)
-{
- short i;
-#if 0
- ulong base = (ulong)addr;
-#endif
- ulong value;
-
- /* Write auto select command: read Manufacturer ID */
-#if 0
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00900090;
-#else
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x90909090;
-#endif
-
- value = addr[0];
-
- switch (value)
- {
- case AMD_MANUFACT:
- info->flash_id = FLASH_MAN_AMD;
- break;
-
- case FUJ_MANUFACT:
- info->flash_id = FLASH_MAN_FUJ;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- break;
- }
-
- value = addr[1]; /* device ID */
-
- switch (value)
- {
-#if 0
- case AMD_ID_F040B:
- info->flash_id += FLASH_AM040B;
- info->sector_count = 8;
- info->size = 0x00200000;
- break; /* => 2 MB */
-#endif
- case AMD_ID_LV400T:
- info->flash_id += FLASH_AM400T;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV400B:
- info->flash_id += FLASH_AM400B;
- info->sector_count = 11;
- info->size = 0x00100000;
- break; /* => 1 MB */
-
- case AMD_ID_LV800T:
- info->flash_id += FLASH_AM800T;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV800B:
- info->flash_id += FLASH_AM800B;
- info->sector_count = 19;
- info->size = 0x00200000;
- break; /* => 2 MB */
-
- case AMD_ID_LV160T:
- info->flash_id += FLASH_AM160T;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-
- case AMD_ID_LV160B:
- info->flash_id += FLASH_AM160B;
- info->sector_count = 35;
- info->size = 0x00400000;
- break; /* => 4 MB */
-#if 0 /* enable when device IDs are available */
- case AMD_ID_LV320T:
- info->flash_id += FLASH_AM320T;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-
- case AMD_ID_LV320B:
- info->flash_id += FLASH_AM320B;
- info->sector_count = 67;
- info->size = 0x00800000;
- break; /* => 8 MB */
-#endif
- default:
- info->flash_id = FLASH_UNKNOWN;
- return (0); /* => no or unknown flash */
-
- }
-
-#if 0
- /* set up sector start adress table */
- if (info->flash_id & FLASH_BTYPE) {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- flash_get_offsets ((ulong)addr, &flash_info[0]);
-#endif
-
- /* check for protected sectors */
- for (i = 0; i < info->sector_count; i++)
- {
- /* read sector protection at sector address, (A7 .. A0) = 0x02 */
- /* D0 = 1 if protected */
- addr = (volatile unsigned long *)(info->start[i]);
- info->protect[i] = addr[2] & 1;
- }
-
- /*
- * Prevent writes to uninitialized FLASH.
- */
- if (info->flash_id != FLASH_UNKNOWN)
- {
- addr = (volatile unsigned long *)info->start[0];
-#if 0
- *addr = 0x00F000F0; /* reset bank */
-#else
- *addr = 0xF0F0F0F0; /* reset bank */
-#endif
- }
-
- return (info->size);
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t *info, int s_first, int s_last)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- int flag, prot, sect, l_sect;
- ulong start, now, last;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- if ((info->flash_id == FLASH_UNKNOWN) ||
- (info->flash_id > FLASH_AMD_COMP)) {
- printf ("Can't erase unknown flash type - aborted\n");
- return 1;
- }
-
- prot = 0;
- for (sect=s_first; sect<=s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- l_sect = -1;
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#if 0
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00800080;
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
-#else
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0x80808080;
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
-#endif
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect<=s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- addr = (vu_long*)(info->start[sect]);
-#if 0
- addr[0] = 0x00300030;
-#else
- addr[0] = 0x30303030;
-#endif
- l_sect = sect;
- }
- }
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* wait at least 80us - let's wait 1 ms */
- udelay (1000);
-
- /*
- * We wait for the last triggered sector
- */
- if (l_sect < 0)
- goto DONE;
-
- start = get_timer (0);
- last = start;
- addr = (vu_long*)(info->start[l_sect]);
-#if 0
- while ((addr[0] & 0x00800080) != 0x00800080)
-#else
- while ((addr[0] & 0xFFFFFFFF) != 0xFFFFFFFF)
-#endif
- {
- if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- return 1;
- }
- /* show that we're waiting */
- if ((now - last) > 1000) { /* every second */
- putc ('.');
- last = now;
- }
- }
-
-DONE:
- /* reset to read mode */
- addr = (volatile unsigned long *)info->start[0];
-#if 0
- addr[0] = 0x00F000F0; /* reset bank */
-#else
- addr[0] = 0xF0F0F0F0; /* reset bank */
-#endif
-
- printf (" done\n");
- return 0;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
- ulong cp, wp, data;
- int i, l, rc;
-
- wp = (addr & ~3); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i=0, cp=wp; i<l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
- for (; i<4 && cnt>0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt==0 && i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 4) {
- data = 0;
- for (i=0; i<4; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_word(info, wp, data)) != 0) {
- return (rc);
- }
- wp += 4;
- cnt -= 4;
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i<4; ++i, ++cp) {
- data = (data << 8) | (*(uchar *)cp);
- }
-
- return (write_word(info, wp, data));
-}
-/*-----------------------------------------------------------------------
- * Write a word to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_word (flash_info_t *info, ulong dest, ulong data)
-{
- vu_long *addr = (vu_long*)(info->start[0]);
- ulong start;
- int flag;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*((vu_long *)dest) & data) != data) {
- return (2);
- }
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts();
-
-#if 0
- addr[0x0555] = 0x00AA00AA;
- addr[0x02AA] = 0x00550055;
- addr[0x0555] = 0x00A000A0;
-#else
- addr[0x0555] = 0xAAAAAAAA;
- addr[0x02AA] = 0x55555555;
- addr[0x0555] = 0xA0A0A0A0;
-#endif
-
- *((vu_long *)dest) = data;
-
- /* re-enable interrupts if necessary */
- if (flag)
- enable_interrupts();
-
- /* data polling for D7 */
- start = get_timer (0);
-#if 0
- while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080))
-#else
- while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080))
-#endif
- {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- return (1);
- }
- }
- return (0);
-}
-
-/*-----------------------------------------------------------------------
- */
+++ /dev/null
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Adapted from FADS and other board config files to GTH by thomas@corelatus.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <config.h>
-#include <watchdog.h>
-#include <mpc8xx.h>
-#include "ee_access.h"
-#include "ee_dev.h"
-
-#ifdef CONFIG_BDM
-#undef printf
-#define printf(a,...) /* nothing */
-#endif
-
-
-int checkboard (void)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- int Id = 0;
- int Rev = 0;
- u32 Pbdat;
-
- puts ("Board: ");
-
- /* Turn on leds and setup for reading rev and id */
-
-#define PB_OUTS (PB_BLUE_LED|PB_ID_GND)
-#define PB_INS (PB_ID_0|PB_ID_1|PB_ID_2|PB_ID_3|PB_REV_1|PB_REV_0)
-
- immap->im_cpm.cp_pbpar &= ~(PB_OUTS | PB_INS);
-
- immap->im_cpm.cp_pbdir &= ~PB_INS;
-
- immap->im_cpm.cp_pbdir |= PB_OUTS;
- immap->im_cpm.cp_pbodr |= PB_OUTS;
- immap->im_cpm.cp_pbdat &= ~PB_OUTS;
-
- /* Hold 100 Mbit in reset until fpga is loaded */
- immap->im_ioport.iop_pcpar &= ~PC_ENET100_RESET;
- immap->im_ioport.iop_pcdir |= PC_ENET100_RESET;
- immap->im_ioport.iop_pcso &= ~PC_ENET100_RESET;
- immap->im_ioport.iop_pcdat &= ~PC_ENET100_RESET;
-
- /* Turn on front led to show that we are alive */
- immap->im_ioport.iop_papar &= ~PA_FRONT_LED;
- immap->im_ioport.iop_padir |= PA_FRONT_LED;
- immap->im_ioport.iop_paodr |= PA_FRONT_LED;
- immap->im_ioport.iop_padat &= ~PA_FRONT_LED;
-
- Pbdat = immap->im_cpm.cp_pbdat;
-
- if (!(Pbdat & PB_ID_0))
- Id += 1;
- if (!(Pbdat & PB_ID_1))
- Id += 2;
- if (!(Pbdat & PB_ID_2))
- Id += 4;
- if (!(Pbdat & PB_ID_3))
- Id += 8;
-
- if (Pbdat & PB_REV_0)
- Rev += 1;
- if (Pbdat & PB_REV_1)
- Rev += 2;
-
- /* Turn ID off since we dont need it anymore */
- immap->im_cpm.cp_pbdat |= PB_ID_GND;
-
- printf ("GTH board, rev %d, id=0x%01x\n", Rev, Id);
- return 0;
-}
-
-#define _NOT_USED_ 0xffffffff
-const uint sdram_table[] = {
- /* Single read, offset 0 */
- 0x0f3dfc04, 0x0eefbc04, 0x01bf7c04, 0x0feafc00,
- 0x1fb5fc45, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Burst read, Offset 0x8, 4 reads */
- 0x0f3dfc04, 0x0eefbc04, 0x00bf7c04, 0x00ffec00,
- 0x00fffc00, 0x01eafc00, 0x1fb5fc00, 0xfffffc45,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Not used part of burst read is used for MRS, Offset 0x14 */
- 0xefeabc34, 0x1fb57c34, 0xfffffc05, _NOT_USED_,
- /* _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, */
-
- /* Single write, Offset 0x18 */
- 0x0f3dfc04, 0x0eebbc00, 0x01a27c04, 0x1fb5fc45,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Burst write, Offset 0x20. 4 writes */
- 0x0f3dfc04, 0x0eebbc00, 0x00b77c00, 0x00fffc00,
- 0x00fffc00, 0x01eafc04, 0x1fb5fc45, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Not used part of burst write is used for precharge, Offset 0x2C */
- 0x0ff5fc04, 0xfffffc05, _NOT_USED_, _NOT_USED_,
- /* _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, */
-
- /* Period timer service. Offset 0x30. Refresh. Wait at least 70 ns after refresh command */
- 0x1ffd7c04, 0xfffffc04, 0xfffffc04, 0xfffffc05,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Exception, Offset 0x3C */
- 0xfffffc04, 0xfffffc05, _NOT_USED_, _NOT_USED_
-};
-
-const uint fpga_table[] = {
- /* Single read, offset 0 */
- 0x0cffec04, 0x00ffec04, 0x00ffec04, 0x00ffec04,
- 0x00fffc04, 0x00fffc00, 0x00ffec04, 0xffffec05,
-
- /* Burst read, Offset 0x8 */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Single write, Offset 0x18 */
- 0x0cffec04, 0x00ffec04, 0x00ffec04, 0x00ffec04,
- 0x00fffc04, 0x00fffc00, 0x00ffec04, 0xffffec05,
-
- /* Burst write, Offset 0x20. */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Period timer service. Offset 0x30. */
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
- _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
-
- /* Exception, Offset 0x3C */
- 0xfffffc04, 0xfffffc05, _NOT_USED_, _NOT_USED_
-};
-
-int _initsdram (uint base, uint * noMbytes)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile memctl8xx_t *mc = &immap->im_memctl;
- volatile u32 *memptr;
-
- mc->memc_mptpr = MPTPR_PTP_DIV16; /* (16-17) */
-
- /* SDRAM in UPMA
-
- GPL_0 is connected instead of A19 to SDRAM.
- According to table 16-17, AMx should be 001, i.e. type 1
- and GPL_0 should hold address A10 when multiplexing */
-
- mc->memc_mamr = (0x2E << MAMR_PTA_SHIFT) | MAMR_PTAE | MAMR_AMA_TYPE_1 | MAMR_G0CLA_A10 | MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_1X; /* (16-13) */
-
- upmconfig (UPMA, (uint *) sdram_table,
- sizeof (sdram_table) / sizeof (uint));
-
- /* Perform init of sdram ( Datasheet Page 9 )
- Precharge */
- mc->memc_mcr = 0x8000212C; /* run upm a at 0x2C (16-15) */
-
- /* Run 2 refresh cycles */
- mc->memc_mcr = 0x80002130; /* run upm a at 0x30 (16-15) */
- mc->memc_mcr = 0x80002130; /* run upm a at 0x30 (16-15) */
-
- /* Set Mode register */
- mc->memc_mar = 0x00000088; /* set mode register (address) to 0x022 (16-17) */
- /* Lower 2 bits are not connected to chip */
- mc->memc_mcr = 0x80002114; /* run upm a at 0x14 (16-15) */
-
- /* CS1, base 0x0000000 - 64 Mbyte, use UPM A */
- mc->memc_or1 = 0xfc000000 | OR_CSNT_SAM;
- mc->memc_br1 = BR_MS_UPMA | BR_V; /* SDRAM base always 0 */
-
- /* Test if we really have 64 MB SDRAM */
- memptr = (u32 *) 0;
- *memptr = 0;
-
- memptr = (u32 *) 0x2000000; /* First u32 in upper 32 MB */
- *memptr = 0x12345678;
-
- memptr = (u32 *) 0;
- if (*memptr == 0x12345678) {
- /* Wrapped, only have 32 MB */
- mc->memc_or1 = 0xfe000000 | OR_CSNT_SAM;
- *noMbytes = 32;
- } else {
- /* 64 MB */
- *noMbytes = 64;
- }
-
- /* Setup FPGA in UPMB */
- upmconfig (UPMB, (uint *) fpga_table,
- sizeof (fpga_table) / sizeof (uint));
-
- /* Enable UPWAITB */
- mc->memc_mbmr = MBMR_GPL_B4DIS; /* (16-13) */
-
- /* CS2, base FPGA_2_BASE - 4 MByte, use UPM B 32 Bit */
- mc->memc_or2 = 0xffc00000 | OR_BI;
- mc->memc_br2 = FPGA_2_BASE | BR_MS_UPMB | BR_V;
-
- /* CS3, base FPGA_3_BASE - 4 MByte, use UPM B 16 bit */
- mc->memc_or3 = 0xffc00000 | OR_BI;
- mc->memc_br3 = FPGA_3_BASE | BR_MS_UPMB | BR_V | BR_PS_16;
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-void _sdramdisable (void)
-{
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- memctl->memc_br1 = 0x00000000;
-
- /* maybe we should turn off upmb here or something */
-}
-
-/* ------------------------------------------------------------------------- */
-
-int initsdram (uint base, uint * noMbytes)
-{
- *noMbytes = 32;
-
-#ifdef CONFIG_START_IN_RAM
- /* SDRAM is already setup. Dont touch it */
- return 0;
-#else
-
- if (!_initsdram (base, noMbytes)) {
-
- return 0;
- } else {
- _sdramdisable ();
-
- return -1;
- }
-#endif
-}
-
-phys_size_t initdram (int board_type)
-{
- u32 *i;
- u32 j;
- u32 k;
-
- /* GTH only have SDRAM */
- uint sdramsz;
-
- if (!initsdram (0x00000000, &sdramsz)) {
- printf ("(%u MB SDRAM) ", sdramsz);
- } else {
- /********************************
- *SDRAM ERROR, HALT PROCESSOR
- *********************************/
- printf ("SDRAM ERROR\n");
- while (1);
- }
-
-#ifndef CONFIG_START_IN_RAM
-
-#define U32_S ((sdramsz<<18)-1)
-
-#if 1
- /* Do a simple memory test */
- for (i = (u32 *) 0, j = 0; (u32) i < U32_S; i += 2, j += 2) {
- *i = j + (j << 17);
- *(i + 1) = ~(j + (j << 18));
- }
-
- WATCHDOG_RESET ();
-
- printf (".");
-
- for (i = (u32 *) 0, j = 0; (u32) i < U32_S; i += 2, j += 2) {
- k = *i;
- if (k != (j + (j << 17))) {
- printf ("Mem test error, i=0x%x, 0x%x\n, 0x%x", (u32) i, j, k);
- while (1);
- }
- k = *(i + 1);
- if (k != ~(j + (j << 18))) {
- printf ("Mem test error(+1), i=0x%x, 0x%x\n, 0x%x",
- (u32) i + 1, j, k);
- while (1);
- }
- }
-#endif
-
- WATCHDOG_RESET ();
-
- /* Clear memory */
- for (i = (u32 *) 0; (u32) i < U32_S; i++) {
- *i = 0;
- }
-#endif /* !start in ram */
-
- WATCHDOG_RESET ();
-
- return (sdramsz << 20);
-}
-
-#define POWER_OFFSET 0xF0000
-#define SW_WATCHDOG_REASON 13
-
-#define BOOTDATA_OFFSET 0xF8000
-#define MAX_ATTEMPTS 5
-
-#define FAILSAFE_BOOT 1
-#define SYSTEM_BOOT 2
-
-#define WRITE_FLASH16(a, d) \
-do \
-{ \
- *((volatile u16 *) (a)) = (d);\
- } while(0)
-
-static void write_bootdata (volatile u16 * addr, u8 System, u8 Count)
-{
- u16 data;
- volatile u16 *flash = (u16 *) (CONFIG_SYS_FLASH_BASE);
-
- if ((System != FAILSAFE_BOOT) & (System != SYSTEM_BOOT)) {
- printf ("Invalid system data %u, setting failsafe\n", System);
- System = FAILSAFE_BOOT;
- }
-
- if ((Count < 1) | (Count > MAX_ATTEMPTS)) {
- printf ("Invalid boot count %u, setting 1\n", Count);
- Count = 1;
- }
-
- if (System == FAILSAFE_BOOT) {
- printf ("Setting failsafe boot in flash\n");
- } else {
- printf ("Setting system boot in flash\n");
- }
- printf ("Boot attempt %d\n", Count);
-
- data = (System << 8) | Count;
- /* AMD 16 bit */
- WRITE_FLASH16 (&flash[0x555], 0xAAAA);
- WRITE_FLASH16 (&flash[0x2AA], 0x5555);
- WRITE_FLASH16 (&flash[0x555], 0xA0A0);
-
- WRITE_FLASH16 (addr, data);
-}
-
-static void maybe_update_restart_reason (volatile u32 * addr32)
-{
- /* Update addr if sw wd restart */
- volatile u16 *flash = (u16 *) (CONFIG_SYS_FLASH_BASE);
- volatile u16 *addr_16 = (u16 *) addr32;
- u32 rsr;
-
- /* Dont reset register now */
- rsr = ((volatile immap_t *) CONFIG_SYS_IMMR)->im_clkrst.car_rsr;
-
- rsr >>= 24;
-
- if (rsr & 0x10) {
- /* Was really a sw wd restart, update reason */
-
- printf ("Last restart by software watchdog\n");
-
- /* AMD 16 bit */
- WRITE_FLASH16 (&flash[0x555], 0xAAAA);
- WRITE_FLASH16 (&flash[0x2AA], 0x5555);
- WRITE_FLASH16 (&flash[0x555], 0xA0A0);
-
- WRITE_FLASH16 (addr_16, 0);
-
- udelay (1000);
-
- WATCHDOG_RESET ();
-
- /* AMD 16 bit */
- WRITE_FLASH16 (&flash[0x555], 0xAAAA);
- WRITE_FLASH16 (&flash[0x2AA], 0x5555);
- WRITE_FLASH16 (&flash[0x555], 0xA0A0);
-
- WRITE_FLASH16 (addr_16 + 1, SW_WATCHDOG_REASON);
-
- }
-}
-
-static void check_restart_reason (void)
-{
- /* Update restart reason if sw watchdog was
- triggered */
-
- int i;
- volatile u32 *raddr;
-
- raddr = (u32 *) (CONFIG_SYS_FLASH_BASE + POWER_OFFSET);
-
- if (*raddr == 0xFFFFFFFF) {
- /* Nothing written */
- maybe_update_restart_reason (raddr);
- } else {
- /* Search for latest written reason */
- i = 0;
- while ((*(raddr + 2) != 0xFFFFFFFF) & (i < 2000)) {
- raddr += 2;
- i++;
- }
- if (i >= 2000) {
- /* Whoa, dont write any more */
- printf ("*** No free restart reason found ***\n");
- } else {
- /* Check if written */
- if (*raddr == 0) {
- /* Erased by kernel, no new reason written */
- maybe_update_restart_reason (raddr + 2);
- }
- }
- }
-}
-
-static void check_boot_tries (void)
-{
- /* Count the number of boot attemps
- switch system if too many */
-
- int i;
- volatile u16 *addr;
- volatile u16 data;
- int failsafe = 1;
- u8 system;
- u8 count;
-
- addr = (u16 *) (CONFIG_SYS_FLASH_BASE + BOOTDATA_OFFSET);
-
- if (*addr == 0xFFFF) {
- printf ("*** No bootdata exists. ***\n");
- write_bootdata (addr, FAILSAFE_BOOT, 1);
- } else {
- /* Search for latest written bootdata */
- i = 0;
- while ((*(addr + 1) != 0xFFFF) & (i < 8000)) {
- addr++;
- i++;
- }
- if (i >= 8000) {
- /* Whoa, dont write any more */
- printf ("*** No bootdata found. Not updating flash***\n");
- } else {
- /* See how many times we have tried to boot real system */
- data = *addr;
- system = data >> 8;
- count = data & 0xFF;
- if ((system != SYSTEM_BOOT) & (system != FAILSAFE_BOOT)) {
- printf ("*** Wrong system %d\n", system);
- system = FAILSAFE_BOOT;
- count = 1;
- } else {
- switch (count) {
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- /* Try same system again if needed */
- count++;
- break;
-
- case 5:
- /* Switch system and reset tries */
- count = 1;
- system = 3 - system;
- printf ("***Too many boot attempts, switching system***\n");
- break;
- default:
- /* Switch system, start over and hope it works */
- printf ("***Unexpected data on addr 0x%x, %u***\n",
- (u32) addr, data);
- count = 1;
- system = 3 - system;
- }
- }
- write_bootdata (addr + 1, system, count);
- if (system == SYSTEM_BOOT) {
- failsafe = 0;
- }
- }
- }
- if (failsafe) {
- printf ("Booting failsafe system\n");
- setenv ("bootargs", "panic=1 root=/dev/hda7");
- setenv ("bootcmd", "disk 100000 0:5;bootm 100000");
- } else {
- printf ("Using normal system\n");
- setenv ("bootargs", "panic=1 root=/dev/hda4");
- setenv ("bootcmd", "disk 100000 0:2;bootm 100000");
- }
-}
-
-int misc_init_r (void)
-{
- u8 Rx[80];
- u8 Tx[5];
- int page;
- int read = 0;
- volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-
- /* Kill fpga */
- immap->im_ioport.iop_papar &= ~(PA_FL_CONFIG | PA_FL_CE);
- immap->im_ioport.iop_padir |= (PA_FL_CONFIG | PA_FL_CE);
- immap->im_ioport.iop_paodr &= ~(PA_FL_CONFIG | PA_FL_CE);
-
- /* Enable fpga, active low */
- immap->im_ioport.iop_padat &= ~PA_FL_CE;
-
- /* Start configuration */
- immap->im_ioport.iop_padat &= ~PA_FL_CONFIG;
- udelay (2);
-
- immap->im_ioport.iop_padat |= (PA_FL_CONFIG | PA_FL_CE);
-
- /* Check if we need to boot failsafe system */
- check_boot_tries ();
-
- /* Check if we need to update restart reason */
- check_restart_reason ();
-
- if (ee_init_data ()) {
- printf ("EEPROM init failed\n");
- return (0);
- }
-
- /* Read the pages where ethernet address is stored */
-
- for (page = EE_USER_PAGE_0; page <= EE_USER_PAGE_0 + 2; page++) {
- /* Copy from nvram to scratchpad */
- Tx[0] = RECALL_MEMORY;
- Tx[1] = page;
- if (ee_do_command (Tx, 2, NULL, 0, TRUE)) {
- printf ("EE user page %d recall failed\n", page);
- return (0);
- }
-
- Tx[0] = READ_SCRATCHPAD;
- if (ee_do_command (Tx, 2, Rx + read, 9, TRUE)) {
- printf ("EE user page %d read failed\n", page);
- return (0);
- }
- /* Crc in 9:th byte */
- if (!ee_crc_ok (Rx + read, 8, *(Rx + read + 8))) {
- printf ("EE read failed, page %d. CRC error\n", page);
- return (0);
- }
- read += 8;
- }
-
- /* Add eos after eth addr */
- Rx[17] = 0;
-
- printf ("Ethernet addr read from eeprom: %s\n\n", Rx);
-
- if ((Rx[2] != ':') |
- (Rx[5] != ':') |
- (Rx[8] != ':') | (Rx[11] != ':') | (Rx[14] != ':')) {
- printf ("*** ethernet addr invalid, using default ***\n");
- } else {
- setenv ("ethaddr", (char *)Rx);
- }
- return (0);
-}
+++ /dev/null
-#include <common.h>
-#include <mpc8xx.h>
-#include <pcmcia.h>
-
-#undef CONFIG_PCMCIA
-
-#if defined(CONFIG_CMD_PCMCIA)
-#define CONFIG_PCMCIA
-#endif
-
-#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
-#define CONFIG_PCMCIA
-#endif
-
-#ifdef CONFIG_PCMCIA
-
-#define PCMCIA_BOARD_MSG "GTH COMPACT FLASH"
-
-int pcmcia_voltage_set (int slot, int vcc, int vpp)
-{ /* Do nothing */
- return 0;
-}
-
-int pcmcia_hardware_enable (int slot)
-{
- volatile immap_t *immap;
- volatile cpm8xx_t *cp;
- volatile pcmconf8xx_t *pcmp;
- volatile sysconf8xx_t *sysp;
- uint reg, mask;
-
- debug ("hardware_enable: GTH Slot %c\n", 'A' + slot);
-
- immap = (immap_t *) CONFIG_SYS_IMMR;
- sysp = (sysconf8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_siu_conf));
- pcmp = (pcmconf8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_pcmcia));
- cp = (cpm8xx_t *) (&(((immap_t *) CONFIG_SYS_IMMR)->im_cpm));
-
- /* clear interrupt state, and disable interrupts */
- pcmp->pcmc_pscr = PCMCIA_MASK (_slot_);
- pcmp->pcmc_per &= ~PCMCIA_MASK (_slot_);
-
- /*
- * Disable interrupts, DMA, and PCMCIA buffers
- * (isolate the interface) and assert RESET signal
- */
- debug ("Disable PCMCIA buffers and assert RESET\n");
- reg = 0;
- reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX (_slot_) = reg;
- udelay (500);
-
- /*
- * Make sure there is a card in the slot,
- * then configure the interface.
- */
- udelay (10000);
- debug ("[%d] %s: PIPR(%p)=0x%x\n",
- __LINE__, __FUNCTION__,
- &(pcmp->pcmc_pipr), pcmp->pcmc_pipr);
- if (pcmp->pcmc_pipr & 0x98000000) {
- printf (" No Card found\n");
- return (1);
- }
-
- mask = PCMCIA_VS1 (slot) | PCMCIA_VS2 (slot);
- reg = pcmp->pcmc_pipr;
- debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",
- reg,
- (reg & PCMCIA_VS1 (slot)) ? "n" : "ff",
- (reg & PCMCIA_VS2 (slot)) ? "n" : "ff");
-
- debug ("Enable PCMCIA buffers and stop RESET\n");
- reg = PCMCIA_PGCRX (_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg &= ~__MY_PCMCIA_GCRX_CXOE; /* active low */
- PCMCIA_PGCRX (_slot_) = reg;
-
- udelay (250000); /* some cards need >150 ms to come up :-( */
-
- debug ("# hardware_enable done\n");
-
- return 0;
-}
-#if defined(CONFIG_CMD_PCMCIA)
-int pcmcia_hardware_disable(int slot)
-{
- return 0; /* No hardware to disable */
-}
-#endif
-
-#endif /* CONFIG_PCMCIA */
+++ /dev/null
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- arch/powerpc/cpu/mpc8xx/start.o(.text)
- *(.text)
- common/env_embedded.o(.text)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.eh_frame)
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- }
- _end = . ;
- PROVIDE (end = .);
-}
break;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
fpga, 6, 1, do_fpga,
/* fall through ... */
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
memset (data, 0, HYMOD_EEPROM_SIZE);
printf("exit code: 0x%X\n", val);
return 0;
default:
- cmd_usage(cmdtp);
- break;
+ return cmd_usage(cmdtp);
}
return -1;
int combrd, baudrate, i, j, len;
int address;
- if (argc < 5) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 5)
+ return cmd_usage(cmdtp);
argc--;
argv++;
unsigned int period, freq;
int prev, i;
- if (argc != 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 3)
+ return cmd_usage(cmdtp);
argc--;
argv++;
return c->cmd(c, flag, argc, argv);
} else {
/* Unrecognized command */
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
}
int do_spi_toggle(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 tmp;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if ((strcmp(argv[1], "off") == 0)) {
printf("SPI FLASH disabled, NAND enabled\n");
tmp = readl(KW_GPIO0_BASE);
writel(tmp & (~FLASH_GPIO_PIN) , KW_GPIO0_BASE);
} else {
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return 0;
default:
break;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
pic, 4, 1, do_pic,
default:
break;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
int do_eeprom_wp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
- if ((strcmp(argv[1], "on") == 0)) {
+ if ((strcmp(argv[1], "on") == 0))
gpio_write_bit(CONFIG_SYS_GPIO_EEPROM_EXT_WP, 1);
- } else if ((strcmp(argv[1], "off") == 0)) {
+ else if ((strcmp(argv[1], "off") == 0))
gpio_write_bit(CONFIG_SYS_GPIO_EEPROM_EXT_WP, 0);
- } else {
- cmd_usage(cmdtp);
- return 1;
- }
-
+ else
+ return cmd_usage(cmdtp);
return 0;
}
return 0;
}
#endif
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
default:
break;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
int rcode = -1;
if (argc < 2) {
- usage:
- cmd_usage(cmdtp);
- return 1;
+usage:
+ return cmd_usage(cmdtp);
}
if (argc >= 3) {
static int cmd_lcd_brightness(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
return set_lcd_brightness(argv[1]);
}
/*
* Command led: controls the various LEDs 0..11 on the PN62 card.
*/
-int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_led(cmd_tbl_t * cmdtp, int flag, int argc, char *const argv[])
{
- unsigned int number, function;
+ unsigned int number, function;
- if (argc != 3) {
- cmd_usage(cmdtp);
- return 1;
- }
- number = simple_strtoul(argv[1], NULL, 10);
- if (number > PN62_LED_MAX)
- return 1;
- function = simple_strtoul(argv[2], NULL, 16);
- set_led (number, function);
- return 0;
+ if (argc != 3)
+ return cmd_usage(cmdtp);
+
+ number = simple_strtoul(argv[1], NULL, 10);
+ if (number > PN62_LED_MAX)
+ return 1;
+
+ function = simple_strtoul(argv[2], NULL, 16);
+ set_led(number, function);
+ return 0;
}
U_BOOT_CMD(
led , 3, 1, do_led,
addr = simple_strtoul(argv[1], NULL, 16);
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
printf ("## Ready for image download ...\n");
{
ulong addr;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
addr = simple_strtoul(argv[1], NULL, 16);
unsigned char mac[6];
char *s, *e;
- if (argc != 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 2)
+ return cmd_usage(cmdtp);
s = argv[1];
int do_print_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- if (argc != 1) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 1)
+ return cmd_usage(cmdtp);
mac_read();
{
char *cmd;
- if (argc != 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 2)
+ return cmd_usage(cmdtp);
cmd = argv[1];
switch (cmd[0]) {
test_net();
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return 0;
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
+
+#ifdef CONFIG_FSL_PCI_INIT
+ FT_FSL_PCI_SETUP;
#endif
}
#endif
*
* 0x0000_0000 DDR 256M
* 0x1000_0000 DDR2 256M
- * 0x8000_0000 PCI1 MEM 512M
- * 0xa000_0000 PCI2 MEM 512M
+ * 0x8000_0000 PCIE1 MEM 512M
+ * 0xa000_0000 PCIE2 MEM 512M
* 0xc000_0000 RapidIO 512M
- * 0xe200_0000 PCI1 IO 16M
- * 0xe300_0000 PCI2 IO 16M
+ * 0xe200_0000 PCIE1 IO 16M
+ * 0xe300_0000 PCIE2 IO 16M
* 0xf800_0000 CCSRBAR 2M
* 0xfe00_0000 FLASH (boot bank) 32M
*
SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000,
LAW_SIZE_256M, LAW_TRGT_IF_DDR_2),
#endif
- SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
- SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
+ SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
+ SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
- SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
- SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
+ SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1),
+ SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2),
SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC),
SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO)
};
};
#endif
-static struct pci_controller pci1_hose = {
+static struct pci_controller pcie1_hose = {
#ifndef CONFIG_PCI_PNP
config_table:pci_mpc86xxcts_config_table
#endif
};
#endif /* CONFIG_PCI */
-#ifdef CONFIG_PCI2
-static struct pci_controller pci2_hose;
-#endif /* CONFIG_PCI2 */
+#ifdef CONFIG_PCIE2
+static struct pci_controller pcie2_hose;
+#endif /* CONFIG_PCIE2 */
int first_free_busno = 0;
uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
>> MPC8641_PORDEVSR_IO_SEL_SHIFT;
-#ifdef CONFIG_PCI1
+#ifdef CONFIG_PCIE1
{
- volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR;
- struct pci_controller *hose = &pci1_hose;
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
+ struct pci_controller *hose = &pcie1_hose;
struct pci_region *r = hose->regions;
#ifdef DEBUG
uint host1_agent = (gur->porbmsr & MPC8641_PORBMSR_HA)
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCI1_MEM_BUS,
- CONFIG_SYS_PCI1_MEM_PHYS,
- CONFIG_SYS_PCI1_MEM_SIZE,
+ CONFIG_SYS_PCIE1_MEM_BUS,
+ CONFIG_SYS_PCIE1_MEM_PHYS,
+ CONFIG_SYS_PCIE1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
- CONFIG_SYS_PCI1_IO_BUS,
- CONFIG_SYS_PCI1_IO_PHYS,
- CONFIG_SYS_PCI1_IO_SIZE,
+ CONFIG_SYS_PCIE1_IO_BUS,
+ CONFIG_SYS_PCIE1_IO_PHYS,
+ CONFIG_SYS_PCIE1_IO_SIZE,
PCI_REGION_IO);
hose->region_count = r - hose->regions;
}
#else
puts("PCI-EXPRESS1: Disabled\n");
-#endif /* CONFIG_PCI1 */
+#endif /* CONFIG_PCIE1 */
-#ifdef CONFIG_PCI2
+#ifdef CONFIG_PCIE2
{
- volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI2_ADDR;
- struct pci_controller *hose = &pci2_hose;
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
+ struct pci_controller *hose = &pcie2_hose;
struct pci_region *r = hose->regions;
/* outbound memory */
pci_set_region(r++,
- CONFIG_SYS_PCI2_MEM_BUS,
- CONFIG_SYS_PCI2_MEM_PHYS,
- CONFIG_SYS_PCI2_MEM_SIZE,
+ CONFIG_SYS_PCIE2_MEM_BUS,
+ CONFIG_SYS_PCIE2_MEM_PHYS,
+ CONFIG_SYS_PCIE2_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
pci_set_region(r++,
- CONFIG_SYS_PCI2_IO_BUS,
- CONFIG_SYS_PCI2_IO_PHYS,
- CONFIG_SYS_PCI2_IO_SIZE,
+ CONFIG_SYS_PCIE2_IO_BUS,
+ CONFIG_SYS_PCIE2_IO_PHYS,
+ CONFIG_SYS_PCIE2_IO_SIZE,
PCI_REGION_IO);
hose->region_count = r - hose->regions;
}
#else
puts("PCI-EXPRESS 2: Disabled\n");
-#endif /* CONFIG_PCI2 */
+#endif /* CONFIG_PCIE2 */
}
{
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCI2
- ft_fsl_pci_setup(blob, "pci1", &pci2_hose);
-#endif
+ FT_FSL_PCI_SETUP;
}
#endif
return 0;
failure:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
default:
break;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD (puma, 4, 1, do_puma,
char *s, *e;
char i2c_mac[20];
- if ((argc > 3) || (argc < 2)) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if ((argc > 3) || (argc < 2))
+ return cmd_usage(cmdtp);
if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
return 0;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
struct ppc4xx_config ppc4xx_config_val[] = {
{
- "600", "CPU: 600 PLB: 200 OPB: 100 EBC: 100",
+ "600-67", "CPU: 600 PLB: 200 OPB: 67 EBC: 67",
+ {
+ 0x86, 0x80, 0xce, 0x1f, 0x7d, 0x80, 0x00, 0xe0,
+ 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ }
+ },
+ {
+ "600-100", "CPU: 600 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
+ {
+ "667", "CPU: 667 PLB: 166 OPB: 83 EBC: 83",
+ {
+ 0x06, 0x80, 0xbb, 0x14, 0x99, 0x82, 0x00, 0xa0,
+ 0x40, 0x88, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ }
+ },
{
"800", "CPU: 800 PLB: 200 OPB: 100 EBC: 100",
{
tlbentry(CONFIG_SYS_PCIE_BASE, SZ_16K, 0x08010000, 0xc, AC_RW | SA_IG)
/* TLB-entry for FPGA(s) */
- tlbentry(CONFIG_SYS_FPGA1_BASE, SZ_1M, CONFIG_SYS_FPGA1_BASE, 4,
+ tlbentry(CONFIG_SYS_FPGA1_BASE, SZ_16M, CONFIG_SYS_FPGA1_BASE, 4,
AC_RW | SA_IG)
- tlbentry(CONFIG_SYS_FPGA2_BASE, SZ_1M, CONFIG_SYS_FPGA2_BASE, 4,
+ tlbentry(CONFIG_SYS_FPGA1_BASE + (16 << 20), SZ_16M,
+ CONFIG_SYS_FPGA1_BASE + (16 << 20), 4, AC_RW | SA_IG)
+ tlbentry(CONFIG_SYS_FPGA2_BASE, SZ_16M, CONFIG_SYS_FPGA2_BASE, 4,
AC_RW | SA_IG)
- tlbentry(CONFIG_SYS_FPGA3_BASE, SZ_1M, CONFIG_SYS_FPGA3_BASE, 4,
+ tlbentry(CONFIG_SYS_FPGA3_BASE, SZ_16M, CONFIG_SYS_FPGA3_BASE, 4,
AC_RW | SA_IG)
/* TLB-entry for OCM */
mtdcr(UIC1SR, 0xffffffff); /* clear all */
mtdcr(UIC1ER, 0x00000000); /* disable all */
mtdcr(UIC1CR, 0x00000000); /* all non-critical */
- mtdcr(UIC1PR, 0xffffffff); /* per ref-board manual */
+ mtdcr(UIC1PR, 0x7fffffff); /* per ref-board manual */
mtdcr(UIC1TR, 0x00000000); /* per ref-board manual */
mtdcr(UIC1VR, 0x00000000); /* int31 highest, base=0x000 */
mtdcr(UIC1SR, 0xffffffff); /* clear all */
switch (argc) {
case 0:
case 1:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 2:
if (strncmp(argv[1],"saw",3) == 0) {
printf ("Play sawtooth\n");
return rcode;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 3:
if (strncmp(argv[1],"saw",3) == 0) {
duration = simple_strtoul(argv[2], NULL, 10);
LEFT_RIGHT);
return rcode;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 4:
if (strncmp(argv[1],"saw",3) == 0) {
duration = simple_strtoul(argv[2], NULL, 10);
pcm1772_write_reg((uchar)reg, (uchar)val);
return 0;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 5:
if (strncmp(argv[1],"saw",3) == 0) {
duration = simple_strtoul(argv[2], NULL, 10);
channel);
return rcode;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
printf ("Usage:\nsound cmd [arg1] [arg2] ...\n");
return 1;
channel = LEFT_RIGHT;
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
if ((tmp = getenv ("volume")) != NULL) {
{
ft_cpu_setup (blob, bd);
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);
-#endif
+ FT_FSL_PCI_SETUP;
}
#endif /* CONFIG_OF_BOARD_SETUP */
int i;
int cycle_status;
- if (argc > 1) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc > 1)
+ return cmd_usage(cmdtp);
led_init ();
global_vars_init ();
{
int i, dip;
- if (argc > 1) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc > 1)
+ return cmd_usage(cmdtp);
- if ((dip = read_dip ()) == -1) {
+ if ((dip = read_dip ()) == -1)
return 1;
- }
for (i = 0; i < 4; i++) {
if ((dip & (1 << i)) == 0)
{
int vcc5v;
- if (argc > 1) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc > 1)
+ return cmd_usage(cmdtp);
- if ((vcc5v = read_vcc5v ()) == -1) {
+ if ((vcc5v = read_vcc5v ()) == -1)
return (1);
- }
printf ("%d", (vcc5v / 1000));
printf (".%d", (vcc5v % 1000) / 100);
{
int contact_temp;
- if (argc > 1) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc > 1)
+ return cmd_usage(cmdtp);
tsc2000_spi_init ();
int do_burn_in_status (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- if (argc > 1) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc > 1)
+ return cmd_usage(cmdtp);
if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_STATUS, 1,
- (unsigned char*) &status, 1)) {
+ (unsigned char*) &status, 1))
return (1);
- }
+
if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_PASS_CYCLES, 1,
- (unsigned char*) &pass_cycles, 2)) {
+ (unsigned char*) &pass_cycles, 2))
return (1);
- }
+
if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_FIRST_ERROR_CYCLE,
- 1, (unsigned char*) &first_error_cycle, 2)) {
+ 1, (unsigned char*) &first_error_cycle, 2))
return (1);
- }
+
if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_FIRST_ERROR_NUM,
- 1, (unsigned char*) &first_error_num, 1)) {
+ 1, (unsigned char*) &first_error_num, 1))
return (1);
- }
+
if (i2c_read_multiple (I2C_EEPROM_DEV_ADDR, EE_ADDR_FIRST_ERROR_NAME,
1, (unsigned char*)first_error_name,
- sizeof (first_error_name))) {
+ sizeof (first_error_name)))
return (1);
- }
- if (read_max_cycles () != 0) {
+ if (read_max_cycles () != 0)
return (1);
- }
printf ("max_cycles = %d\n", max_cycles);
printf ("status = %d\n", status);
struct rtc_time tm;
#endif
- if (argc > 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc > 2)
+ return cmd_usage(cmdtp);
- if (argc > 1) {
+ if (argc > 1)
delay = simple_strtoul(argv[1], NULL, 10);
- }
tsc2000_spi_init ();
while (1) {
static int do_write_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
int offset,value;
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
offset=simple_strtoul(argv[2],NULL,16);
value=simple_strtoul(argv[3],NULL,16);
if (offset > 0x40) {
printf("Wrong offset : 0x%x\n",offset);
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
dm9000_write_srom_word(offset, value);
return (0);
}
int do_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) {
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
- if (strcmp (argv[1],"read") == 0) {
+ if (strcmp (argv[1],"read") == 0)
return (do_read_dm9000_eeprom(cmdtp,flag,argc,argv));
- } else if (strcmp (argv[1],"write") == 0) {
+ else if (strcmp (argv[1],"write") == 0)
return (do_write_dm9000_eeprom(cmdtp,flag,argc,argv));
- } else {
- cmd_usage(cmdtp);
- return 1;
- }
+ else
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
uchar dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
/* Validate usage */
- if (argc > 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc > 2)
+ return cmd_usage(cmdtp);
/* Passed in EEPROM address */
if (argc == 2)
#if defined(CONFIG_OF_BOARD_SETUP)
void ft_board_pci_setup(void *blob, bd_t *bd)
{
- /* TODO - make node name (eg pci0) dynamic */
-#ifdef CONFIG_PCI1
- ft_fsl_pci_setup(blob, "pci0", &pci1_hose);
-#endif
-#ifdef CONFIG_PCIE1
- ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);
-#endif
-#ifdef CONFIG_PCIE2
- ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);
-#endif
-#ifdef CONFIG_PCIE3
- ft_fsl_pci_setup(blob, "pci0", &pcie3_hose);
-#endif
+ FT_FSL_PCI_SETUP;
}
#endif /* CONFIG_OF_BOARD_SETUP */
ETX094 powerpc mpc8xx etx094
FLAGADM powerpc mpc8xx flagadm
GENIETV powerpc mpc8xx genietv
-GTH powerpc mpc8xx gth
hermes powerpc mpc8xx
IP860 powerpc mpc8xx ip860
LANTEC powerpc mpc8xx lantec
addr = dis_last_addr;
len = dis_last_len;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if ((flag & CMD_FLAG_REPEAT) == 0) {
/* New command */
/* -------------------------------------------------- */
int rcode = 0;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
printf ("\nEnter '.' when done\n");
mem_addr = simple_strtoul (argv[1], NULL, 16);
addr = simple_strtoul(argv[1], NULL, 16);
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return (bmp_info(addr));
y = simple_strtoul(argv[3], NULL, 10);
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return (bmp_display(addr, x, y));
c = find_cmd_tbl(argv[0], &cmd_bmp_sub[0], ARRAY_SIZE(cmd_bmp_sub));
- if (c) {
+ if (c)
return c->cmd(cmdtp, flag, argc, argv);
- } else {
- cmd_usage(cmdtp);
- return 1;
- }
+ else
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
ulong addr, rc;
int rcode = 0;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
addr = simple_strtoul(argv[1], NULL, 16);
argv++;
return bootm_start(cmdtp, flag, argc, argv);
}
- }
- /* Unrecognized command */
- else {
- cmd_usage(cmdtp);
- return 1;
+ } else {
+ /* Unrecognized command */
+ return cmd_usage(cmdtp);
}
if (images.state >= state) {
printf ("Trying to execute a command out of order\n");
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
images.state |= state;
switch (argc) {
case 2: /* on / off */
switch (on_off(argv[1])) {
-#if 0 /* prevented by varargs handling; FALLTROUGH is harmless, too */
- default: cmd_usage(cmdtp);
- return;
-#endif
case 0: icache_disable();
break;
case 1: icache_enable ();
icache_status() ? "ON" : "OFF");
return 0;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return 0;
}
switch (argc) {
case 2: /* on / off */
switch (on_off(argv[1])) {
-#if 0 /* prevented by varargs handling; FALLTROUGH is harmless, too */
- default: cmd_usage(cmdtp);
- return;
-#endif
case 0: dcache_disable();
break;
case 1: dcache_enable ();
dcache_status() ? "ON" : "OFF");
return 0;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return 0;
unsigned long get_dcr (unsigned short);
/* Validate arguments */
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
/* Get a DCR */
dcrn = (unsigned short) simple_strtoul (argv[1], NULL, 16);
extern char console_buffer[];
/* Validate arguments */
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
/* Set a DCR */
dcrn = (unsigned short) simple_strtoul (argv[1], NULL, 16);
char buf[80];
/* Validate arguments */
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
/* Find out whether ther is '.' (dot) symbol in the first parameter. */
strncpy (buf, argv[1], sizeof(buf)-1);
char buf[80];
/* Validate arguments */
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
/* Find out whether ther is '.' (dot) symbol in the first parameter. */
strncpy (buf, argv[1], sizeof(buf)-1);
}
usage:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
}
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
#endif
block_dev_desc_t *dev_desc=NULL;
int part_length;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
+
dev = (int)simple_strtoul (argv[2], &ep, 16);
dev_desc = get_dev(argv[1],dev);
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
if (!filename) {
char *ep;
if (argc < 5) {
- printf ("usage: fatload <interface> <dev[:part]> <addr> <filename> [bytes]\n");
+ printf( "usage: fatload <interface> <dev[:part]> "
+ "<addr> <filename> [bytes]\n");
return 1;
}
- dev = (int)simple_strtoul (argv[2], &ep, 16);
- dev_desc=get_dev(argv[1],dev);
- if (dev_desc==NULL) {
- puts ("\n** Invalid boot device **\n");
+
+ dev = (int)simple_strtoul(argv[2], &ep, 16);
+ dev_desc = get_dev(argv[1],dev);
+ if (dev_desc == NULL) {
+ puts("\n** Invalid boot device **\n");
return 1;
}
if (*ep) {
if (*ep != ':') {
- puts ("\n** Invalid boot device, use `dev[:part]' **\n");
+ puts("\n** Invalid boot device, use `dev[:part]' **\n");
return 1;
}
part = (int)simple_strtoul(++ep, NULL, 16);
}
if (fat_register_device(dev_desc,part)!=0) {
- printf ("\n** Unable to use %s %d:%d for fatload **\n",argv[1],dev,part);
+ printf("\n** Unable to use %s %d:%d for fatload **\n",
+ argv[1], dev, part);
return 1;
}
- offset = simple_strtoul (argv[3], NULL, 16);
+ offset = simple_strtoul(argv[3], NULL, 16);
if (argc == 6)
- count = simple_strtoul (argv[5], NULL, 16);
+ count = simple_strtoul(argv[5], NULL, 16);
else
count = 0;
- size = file_fat_read (argv[4], (unsigned char *) offset, count);
+ size = file_fat_read(argv[4], (unsigned char *)offset, count);
if(size==-1) {
- printf("\n** Unable to read \"%s\" from %s %d:%d **\n",argv[4],argv[1],dev,part);
+ printf("\n** Unable to read \"%s\" from %s %d:%d **\n",
+ argv[4], argv[1], dev, part);
return 1;
}
- printf ("\n%ld bytes read\n", size);
+ printf("\n%ld bytes read\n", size);
sprintf(buf, "%lX", size);
setenv("filesize", buf);
block_dev_desc_t *dev_desc=NULL;
if (argc < 3) {
- printf ("usage: fatls <interface> <dev[:part]> [directory]\n");
- return (0);
+ printf("usage: fatls <interface> <dev[:part]> [directory]\n");
+ return 0;
}
- dev = (int)simple_strtoul (argv[2], &ep, 16);
- dev_desc=get_dev(argv[1],dev);
- if (dev_desc==NULL) {
- puts ("\n** Invalid boot device **\n");
+ dev = (int)simple_strtoul(argv[2], &ep, 16);
+ dev_desc = get_dev(argv[1],dev);
+ if (dev_desc == NULL) {
+ puts("\n** Invalid boot device **\n");
return 1;
}
if (*ep) {
if (*ep != ':') {
- puts ("\n** Invalid boot device, use `dev[:part]' **\n");
+ puts("\n** Invalid boot device, use `dev[:part]' **\n");
return 1;
}
part = (int)simple_strtoul(++ep, NULL, 16);
}
if (fat_register_device(dev_desc,part)!=0) {
- printf ("\n** Unable to use %s %d:%d for fatls **\n",argv[1],dev,part);
+ printf("\n** Unable to use %s %d:%d for fatls **\n",
+ argv[1], dev, part);
return 1;
}
if (argc == 4)
- ret = file_fat_ls (argv[3]);
+ ret = file_fat_ls(argv[3]);
else
- ret = file_fat_ls (filename);
+ ret = file_fat_ls(filename);
if(ret!=0)
printf("No Fat FS detected\n");
- return (ret);
+ return ret;
}
U_BOOT_CMD(
block_dev_desc_t *dev_desc=NULL;
if (argc < 2) {
- printf ("usage: fatinfo <interface> <dev[:part]>\n");
- return (0);
+ printf("usage: fatinfo <interface> <dev[:part]>\n");
+ return 0;
}
- dev = (int)simple_strtoul (argv[2], &ep, 16);
- dev_desc=get_dev(argv[1],dev);
- if (dev_desc==NULL) {
- puts ("\n** Invalid boot device **\n");
+ dev = (int)simple_strtoul(argv[2], &ep, 16);
+ dev_desc = get_dev(argv[1],dev);
+ if (dev_desc == NULL) {
+ puts("\n** Invalid boot device **\n");
return 1;
}
if (*ep) {
if (*ep != ':') {
- puts ("\n** Invalid boot device, use `dev[:part]' **\n");
+ puts("\n** Invalid boot device, use `dev[:part]' **\n");
return 1;
}
part = (int)simple_strtoul(++ep, NULL, 16);
}
if (fat_register_device(dev_desc,part)!=0) {
- printf ("\n** Unable to use %s %d:%d for fatinfo **\n",argv[1],dev,part);
+ printf("\n** Unable to use %s %d:%d for fatinfo **\n",
+ argv[1], dev, part);
return 1;
}
- return (file_fat_detectfs ());
+ return file_fat_detectfs();
}
U_BOOT_CMD(
"<interface> <dev[:part]>\n"
" - print information about filesystem from 'dev' on 'interface'"
);
-
-#ifdef NOT_IMPLEMENTED_YET
-/* find first device whose first partition is a DOS filesystem */
-int find_fat_partition (void)
-{
- int i, j;
- block_dev_desc_t *dev_desc;
- unsigned char *part_table;
- unsigned char buffer[ATA_BLOCKSIZE];
-
- for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
- dev_desc = ide_get_dev (i);
- if (!dev_desc) {
- debug ("couldn't get ide device!\n");
- return (-1);
- }
- if (dev_desc->part_type == PART_TYPE_DOS) {
- if (dev_desc->
- block_read (dev_desc->dev, 0, 1, (ulong *) buffer) != 1) {
- debug ("can't perform block_read!\n");
- return (-1);
- }
- part_table = &buffer[0x1be]; /* start with partition #4 */
- for (j = 0; j < 4; j++) {
- if ((part_table[4] == 1 || /* 12-bit FAT */
- part_table[4] == 4 || /* 16-bit FAT */
- part_table[4] == 6) && /* > 32Meg part */
- part_table[0] == 0x80) { /* bootable? */
- curr_dev = i;
- part_offset = part_table[11];
- part_offset <<= 8;
- part_offset |= part_table[10];
- part_offset <<= 8;
- part_offset |= part_table[9];
- part_offset <<= 8;
- part_offset |= part_table[8];
- debug ("found partition start at %ld\n", part_offset);
- return (0);
- }
- part_table += 16;
- }
- }
- }
-
- debug ("no valid devices found!\n");
- return (-1);
-}
-
-int
-do_fat_dump (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
-{
- __u8 block[1024];
- int ret;
- int bknum;
-
- ret = 0;
-
- if (argc != 2) {
- printf ("needs an argument!\n");
- return (0);
- }
-
- bknum = simple_strtoul (argv[1], NULL, 10);
-
- if (disk_read (0, bknum, block) != 0) {
- printf ("Error: reading block\n");
- return -1;
- }
- printf ("FAT dump: %d\n", bknum);
- hexdump (512, block);
-
- return (ret);
-}
-
-int disk_read (__u32 startblock, __u32 getsize, __u8 *bufptr)
-{
- ulong tot;
- block_dev_desc_t *dev_desc;
-
- if (curr_dev < 0) {
- if (find_fat_partition () != 0)
- return (-1);
- }
-
- dev_desc = ide_get_dev (curr_dev);
- if (!dev_desc) {
- debug ("couldn't get ide device\n");
- return (-1);
- }
-
- tot = dev_desc->block_read (0, startblock + part_offset,
- getsize, (ulong *) bufptr);
-
- /* should we do this here?
- flush_cache ((ulong)buf, cnt*ide_dev_desc[device].blksz);
- */
-
- if (tot == getsize)
- return (0);
-
- debug ("unable to read from device!\n");
-
- return (-1);
-}
-
-
-static int isprint (unsigned char ch)
-{
- if (ch >= 32 && ch < 127)
- return (1);
-
- return (0);
-}
-
-
-void hexdump (int cnt, unsigned char *data)
-{
- int i;
- int run;
- int offset;
-
- offset = 0;
- while (cnt) {
- printf ("%04X : ", offset);
- if (cnt >= 16)
- run = 16;
- else
- run = cnt;
- cnt -= run;
- for (i = 0; i < run; i++)
- printf ("%02X ", (unsigned int) data[i]);
- printf (": ");
- for (i = 0; i < run; i++)
- printf ("%c", isprint (data[i]) ? data[i] : '.');
- printf ("\n");
- data = &data[16];
- offset += run;
- }
-}
-#endif /* NOT_IMPLEMENTED_YET */
boot_drive=simple_strtoul(argv[2], NULL, 10);
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
/* setup FDC and scan for drives */
if(fdc_setup(boot_drive,pCMD,pFG)==FALSE) {
name = argv [2];
break;
default:
- cmd_usage(cmdtp);
- break;
+ return cmd_usage(cmdtp);
}
/* Init physical layer */
*/
int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
- /********************************************************************
+ /*
* Set the address of the fdt
- ********************************************************************/
+ */
if (argv[1][0] == 'a') {
unsigned long addr;
/*
}
}
- /********************************************************************
+ /*
* Move the working_fdt
- ********************************************************************/
+ */
} else if (strncmp(argv[1], "mo", 2) == 0) {
struct fdt_header *newaddr;
int len;
int err;
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
/*
* Set the address and length of the fdt.
}
working_fdt = newaddr;
- /********************************************************************
+ /*
* Make a new node
- ********************************************************************/
+ */
} else if (strncmp(argv[1], "mk", 2) == 0) {
char *pathp; /* path */
char *nodep; /* new node to add */
/*
* Parameters: Node path, new node to be appended to the path.
*/
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
pathp = argv[2];
nodep = argv[3];
return 1;
}
- /********************************************************************
+ /*
* Set the value of a property in the working_fdt.
- ********************************************************************/
+ */
} else if (argv[1][0] == 's') {
char *pathp; /* path */
char *prop; /* property */
/*
* Parameters: Node path, property, optional value.
*/
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
pathp = argv[2];
prop = argv[3];
return 1;
}
- /********************************************************************
+ /*
* Print (recursive) / List (single level)
- ********************************************************************/
+ */
} else if ((argv[1][0] == 'p') || (argv[1][0] == 'l')) {
int depth = MAX_LEVEL; /* how deep to print */
char *pathp; /* path */
if (ret != 0)
return ret;
- /********************************************************************
+ /*
* Remove a property/node
- ********************************************************************/
+ */
} else if (strncmp(argv[1], "rm", 2) == 0) {
int nodeoffset; /* node offset from libfdt */
int err;
}
}
- /********************************************************************
+ /*
* Display header info
- ********************************************************************/
+ */
} else if (argv[1][0] == 'h') {
u32 version = fdt_version(working_fdt);
printf("magic:\t\t\t0x%x\n", fdt_magic(working_fdt));
fdt_num_mem_rsv(working_fdt));
printf("\n");
- /********************************************************************
+ /*
* Set boot cpu id
- ********************************************************************/
+ */
} else if (strncmp(argv[1], "boo", 3) == 0) {
unsigned long tmp = simple_strtoul(argv[2], NULL, 16);
fdt_set_boot_cpuid_phys(working_fdt, tmp);
- /********************************************************************
+ /*
* memory command
- ********************************************************************/
+ */
} else if (strncmp(argv[1], "me", 2) == 0) {
uint64_t addr, size;
int err;
if (err < 0)
return err;
- /********************************************************************
+ /*
* mem reserve commands
- ********************************************************************/
+ */
} else if (strncmp(argv[1], "rs", 2) == 0) {
if (argv[2][0] == 'p') {
uint64_t addr, size;
}
} else {
/* Unrecognized command */
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
}
#ifdef CONFIG_OF_BOARD_SETUP
else if (argv[1][0] == 'c') {
unsigned long initrd_start = 0, initrd_end = 0;
- if ((argc != 2) && (argc != 4)) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if ((argc != 2) && (argc != 4))
+ return cmd_usage(cmdtp);
if (argc == 4) {
initrd_start = simple_strtoul(argv[2], NULL, 16);
}
else {
/* Unrecognized command */
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return 0;
#endif
int rcode = 0;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if (strcmp(argv[1], "all") == 0) {
for (bank=1; bank<=CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
}
#endif
- if (argc != 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 3)
+ return cmd_usage(cmdtp);
if (strcmp(argv[1], "bank") == 0) {
bank = simple_strtoul(argv[2], NULL, 16);
return 1;
}
- if (addr_first >= addr_last) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (addr_first >= addr_last)
+ return cmd_usage(cmdtp);
rcode = flash_sect_erase(addr_first, addr_last);
return rcode;
int p;
int rcode = 0;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
- if (strcmp(argv[1], "off") == 0) {
+ if (strcmp(argv[1], "off") == 0)
p = 0;
- } else if (strcmp(argv[1], "on") == 0) {
+ else if (strcmp(argv[1], "on") == 0)
p = 1;
- } else {
- cmd_usage(cmdtp);
- return 1;
- }
+ else
+ return cmd_usage(cmdtp);
#ifdef CONFIG_HAS_DATAFLASH
if ((strcmp(argv[2], "all") != 0) && (strcmp(argv[2], "bank") != 0)) {
}
#endif
- if (argc != 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 4)
+ return cmd_usage(cmdtp);
if (strcmp(argv[2], "bank") == 0) {
bank = simple_strtoul(argv[3], NULL, 16);
return 1;
}
- if (addr_first >= addr_last) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (addr_first >= addr_last)
+ return cmd_usage(cmdtp);
+
rcode = flash_sect_protect (p, addr_first, addr_last);
#endif /* CONFIG_SYS_NO_FLASH */
return rcode;
#endif
/* Local functions */
-static void fpga_usage (cmd_tbl_t * cmdtp);
static int fpga_get_op (char *opstr);
/* Local defines */
switch (op) {
case FPGA_NONE:
- fpga_usage (cmdtp);
- break;
+ return cmd_usage(cmdtp);
case FPGA_INFO:
rc = fpga_info (dev);
default:
printf ("Unknown operation\n");
- fpga_usage (cmdtp);
- break;
+ return cmd_usage(cmdtp);
}
return (rc);
}
-static void fpga_usage (cmd_tbl_t * cmdtp)
-{
- cmd_usage(cmdtp);
-}
-
/*
* Map op to supported operations. We don't use a table since we
* would just have to relocate it from flash anyway.
uint devaddr, alen, length;
u_char *memaddr;
- if (argc != 5) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 5)
+ return cmd_usage(cmdtp);
/*
* I2C chip address
*/
devaddr = simple_strtoul(argv[2], NULL, 16);
alen = get_alen(argv[2]);
- if (alen == 0) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (alen == 0)
+ return cmd_usage(cmdtp);
/*
* Length is the number of objects, not number of bytes.
alen = i2c_dp_last_alen;
length = i2c_dp_last_length;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
if ((flag & CMD_FLAG_REPEAT) == 0) {
/*
*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = get_alen(argv[2]);
- if (alen == 0) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (alen == 0)
+ return cmd_usage(cmdtp);
/*
* If another parameter, it is the length to display.
uchar byte;
int count;
- if ((argc < 4) || (argc > 5)) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if ((argc < 4) || (argc > 5))
+ return cmd_usage(cmdtp);
/*
* Chip is always specified.
*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = get_alen(argv[2]);
- if (alen == 0) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (alen == 0)
+ return cmd_usage(cmdtp);
/*
* Value to write is always specified.
ulong crc;
ulong err;
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
/*
* Chip is always specified.
*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = get_alen(argv[2]);
- if (alen == 0) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (alen == 0)
+ return cmd_usage(cmdtp);
/*
* Count is always specified
int nbytes;
extern char console_buffer[];
- if (argc != 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 3)
+ return cmd_usage(cmdtp);
#ifdef CONFIG_BOOT_RETRY_TIME
reset_cmd_timeout(); /* got a good command to get here */
*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = get_alen(argv[2]);
- if (alen == 0) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (alen == 0)
+ return cmd_usage(cmdtp);
}
/*
u_char bytes[16];
int delay;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
/*
* Chip is always specified.
*/
addr = simple_strtoul(argv[2], NULL, 16);
alen = get_alen(argv[2]);
- if (alen == 0) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (alen == 0)
+ return cmd_usage(cmdtp);
/*
* Length is the number of objects, not number of bytes.
"32 MiB", "16 MiB", "8 MiB", "4 MiB"
};
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
/*
* Chip is always specified.
*/
c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
- if (c) {
+ if (c)
return c->cmd(cmdtp, flag, argc, argv);
- } else {
- cmd_usage(cmdtp);
- return 1;
- }
+ else
+ return cmd_usage(cmdtp);
}
/***************************************************/
switch (argc) {
case 0:
case 1:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 2:
if (strncmp(argv[1],"res",3) == 0) {
puts ("\nReset IDE"
}
return rcode;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 3:
if (strncmp(argv[1],"dev",3) == 0) {
int dev = (int)simple_strtoul(argv[2], NULL, 10);
#endif
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
default:
/* at least 4 args */
printf ("%ld blocks written: %s\n",
n, (n==cnt) ? "OK" : "ERROR");
- if (n==cnt) {
+ if (n==cnt)
return 0;
- } else {
+ else
return 1;
- }
} else {
- cmd_usage(cmdtp);
- rcode = 1;
+ return cmd_usage(cmdtp);
}
return rcode;
boot_device = argv[2];
break;
default:
- cmd_usage(cmdtp);
show_boot_progress (-42);
- return 1;
+ return cmd_usage(cmdtp);
}
show_boot_progress (42);
int do_interrupts(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- if (argc != 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 2)
+ return cmd_usage(cmdtp);
/* on */
- if (strncmp(argv[1], "on", 2) == 0) {
+ if (strncmp(argv[1], "on", 2) == 0)
enable_interrupts();
- } else {
+ else
disable_interrupts();
- }
return 0;
}
int value, w;
/* Validate arguments */
- if ((argc != 4)){
- cmd_usage(cmdtp);
- return 1;
- }
+ if ((argc != 4))
+ return cmd_usage(cmdtp);
/* Check for a data width specification.
* Defaults to long (4) if no specification.
if (strcmp(argv[1], "on") == 0)
hwflow_onoff(1);
else
- cmd_usage(cmdtp);
+ return cmd_usage(cmdtp);
}
printf("RTS/CTS hardware flow control: %s\n", hwflow_onoff(0) ? "on" : "off");
return 0;
}
return 0;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
}
size = dp_last_size;
length = dp_last_length;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if ((flag & CMD_FLAG_REPEAT) == 0) {
/* New command specified. Check for a size specification.
ulong addr, writeval, count;
int size;
- if ((argc < 3) || (argc > 4)) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if ((argc < 3) || (argc > 4))
+ return cmd_usage(cmdtp);
/* Check for size specification.
*/
int i;
ulong count;
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
count = simple_strtoul(argv[3], NULL, 10);
int i;
ulong count;
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
count = simple_strtoul(argv[3], NULL, 10);
int size;
int rcode = 0;
- if (argc != 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 4)
+ return cmd_usage(cmdtp);
/* Check for size specification.
*/
ulong addr, dest, count;
int size;
- if (argc != 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 4)
+ return cmd_usage(cmdtp);
/* Check for size specification.
*/
volatile ushort *shortp;
volatile u_char *cp;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
/* Check for a size spefication.
* Defaults to long if no or incorrect specification.
volatile ushort *shortp;
volatile u_char *cp;
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
/* Check for a size spefication.
* Defaults to long if no or incorrect specification.
int nbytes, size;
extern char console_buffer[];
- if (argc != 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 2)
+ return cmd_usage(cmdtp);
#ifdef CONFIG_BOOT_RETRY_TIME
reset_cmd_timeout(); /* got a good command to get here */
ulong crc;
ulong *ptr;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
addr = simple_strtoul (argv[1], NULL, 16);
addr += base_address;
char * const *av;
if (argc < 3) {
- usage:
- cmd_usage(cmdtp);
- return 1;
+usage:
+ return cmd_usage(cmdtp);
}
av = argv + 1;
unsigned int i;
u8 output[16];
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
addr = simple_strtoul(argv[1], NULL, 16);
len = simple_strtoul(argv[2], NULL, 16);
unsigned int i;
u8 output[20];
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
addr = simple_strtoul(argv[1], NULL, 16);
len = simple_strtoul(argv[2], NULL, 16);
dst = simple_strtoul(argv[2], NULL, 16);
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return !!gunzip((void *) dst, dst_len, (void *) src, &src_len);
unsigned int num;
unsigned int blocking;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
fslnum = (unsigned int)simple_strtoul (argv[1], NULL, 16);
blocking = (unsigned int)simple_strtoul (argv[2], NULL, 16);
if (fslnum < 0 || fslnum >= XILINX_FSL_NUMBER) {
puts ("Bad number of FSL\n");
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
switch (fslnum) {
unsigned int num;
unsigned int blocking;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
fslnum = (unsigned int)simple_strtoul (argv[1], NULL, 16);
num = (unsigned int)simple_strtoul (argv[2], NULL, 16);
blocking = (unsigned int)simple_strtoul (argv[3], NULL, 16);
- if (fslnum < 0 || fslnum >= XILINX_FSL_NUMBER) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (fslnum < 0 || fslnum >= XILINX_FSL_NUMBER)
+ return cmd_usage(cmdtp);
switch (fslnum) {
#if (XILINX_FSL_NUMBER > 0)
unsigned int reg = 0;
unsigned int val = 0;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
reg = (unsigned int)simple_strtoul (argv[1], NULL, 16);
val = (unsigned int)simple_strtoul (argv[2], NULL, 16);
switch (reg) {
int rcode = 0;
char *devname;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
#if defined(CONFIG_MII_INIT)
mii_init ();
else
miiphy_set_current_dev (argv[2]);
} else {
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
/*
ulong start = get_timer(0);
ulong delay;
- if (argc != 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 2)
+ return cmd_usage(cmdtp);
delay = simple_strtoul(argv[1], NULL, 10) * CONFIG_SYS_HZ;
while (get_timer(start) < delay) {
- if (ctrlc ()) {
+ if (ctrlc ())
return (-1);
- }
+
udelay (100);
}
{
int dev;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if (strcmp(argv[1], "init") == 0) {
if (argc == 2) {
} else if (argc == 3) {
dev = (int)simple_strtoul(argv[2], NULL, 10);
} else {
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
if (mmc_legacy_init(dev) != 0) {
#endif
curr_device = dev;
} else {
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
printf("mmc%d is current device\n", curr_device);
} else {
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
return 0;
{
unsigned long cpuid;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
cpuid = simple_strtoul(argv[1], NULL, 10);
if (cpuid >= cpu_numcores()) {
if (argc == 3) {
- if (strncmp(argv[2], "reset", 5) == 0) {
+ if (strncmp(argv[2], "reset", 5) == 0)
cpu_reset(cpuid);
- } else if (strncmp(argv[2], "status", 6) == 0) {
+ else if (strncmp(argv[2], "status", 6) == 0)
cpu_status(cpuid);
- } else if (strncmp(argv[2], "disable", 7) == 0) {
+ else if (strncmp(argv[2], "disable", 7) == 0)
return cpu_disable(cpuid);
- } else {
- cmd_usage(cmdtp);
- return 1;
- }
+ else
+ return cmd_usage(cmdtp);
+
return 0;
}
/* 4 or greater, make sure its release */
- if (strncmp(argv[2], "release", 7) != 0) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (strncmp(argv[2], "release", 7) != 0)
+ return cmd_usage(cmdtp);
- if (cpu_release(cpuid, argc - 3, argv + 3)) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (cpu_release(cpuid, argc - 3, argv + 3))
+ return cmd_usage(cmdtp);
return 0;
}
return delete_partition(argv[2]);
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
/***************************************************/
return ret;
usage:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
#endif
#endif
usage:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(nand, CONFIG_SYS_MAXARGS, 1, do_nand,
#if defined(CONFIG_CMD_MTDPARTS)
usage:
#endif
- cmd_usage(cmdtp);
show_boot_progress(-53);
- return 1;
+ return cmd_usage(cmdtp);
}
show_boot_progress(53);
break;
- default: cmd_usage(cmdtp);
+ default:
show_boot_progress (-80);
- return 1;
+ return cmd_usage(cmdtp);
}
show_boot_progress (80);
return -1;
NetPingIP = string_to_ip(argv[1]);
- if (NetPingIP == 0) {
- cmd_usage(cmdtp);
- return -1;
- }
+ if (NetPingIP == 0)
+ return cmd_usage(cmdtp);
if (NetLoop(PING) < 0) {
printf("ping failed; host %s is not alive\n", argv[1]);
#if defined(CONFIG_CMD_DNS)
int do_dns(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- if (argc == 1) {
- cmd_usage(cmdtp);
- return -1;
- }
+ if (argc == 1)
+ return cmd_usage(cmdtp);
/*
* We should check for a valid hostname:
int do_setenv (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
return _do_setenv (flag, argc, argv);
}
local_args[2] = NULL;
local_args[3] = NULL;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
+
/* Check the syntax */
switch (argc) {
case 1:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 2: /* askenv envname */
sprintf (message, "Please enter '%s':", argv[1]);
char *init_val;
int len;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
/* Set read buffer to initial value or empty sting */
init_val = getenv(argv[1]);
size_t retlen = 0;
if (argc < 3)
- {
- cmd_usage(cmdtp);
- return 1;
- }
+ return cmd_usage(cmdtp);
s = strchr(argv[0], '.');
if ((s != NULL) && (!strcmp(s, ".oob")))
size_t retlen = 0;
if (argc < 3)
- {
- cmd_usage(cmdtp);
- return 1;
- }
+ return cmd_usage(cmdtp);
addr = (ulong)simple_strtoul(argv[1], NULL, 16);
char *s;
if (argc < 2)
- {
- cmd_usage(cmdtp);
- return 1;
- }
+ return cmd_usage(cmdtp);
s = strchr(argv[0], '.');
ofs = (int)simple_strtoul(argv[1], NULL, 16);
argv += 2;
if (argc <= 0)
- {
- cmd_usage(cmdtp);
- return 1;
- }
+ return cmd_usage(cmdtp);
while (argc > 0) {
addr = simple_strtoul(*argv, NULL, 16);
c = find_cmd_tbl(argv[0], &cmd_onenand_sub[0], ARRAY_SIZE(cmd_onenand_sub));
- if (c) {
- return c->cmd(cmdtp, flag, argc, argv);
- } else {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (c)
+ return c->cmd(cmdtp, flag, argc, argv);
+ else
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
if (argc < 4) {
usage:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
prompt_user = false;
return 1;
usage:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
/***************************************************/
uint size = out_last_size;
uint value = out_last_value;
- if (argc != 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 3)
+ return cmd_usage(cmdtp);
if ((flag & CMD_FLAG_REPEAT) == 0) {
- /* New command specified. Check for a size specification.
+ /*
+ * New command specified. Check for a size specification.
* Defaults to long if no or incorrect specification.
*/
size = cmd_get_data_size (argv[0], 1);
uint addr = in_last_addr;
uint size = in_last_size;
- if (argc != 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 2)
+ return cmd_usage(cmdtp);
if ((flag & CMD_FLAG_REPEAT) == 0) {
- /* New command specified. Check for a size specification.
+ /*
+ * New command specified. Check for a size specification.
* Defaults to long if no or incorrect specification.
*/
size = cmd_get_data_size (argv[0], 1);
block_dev_desc_t *dev_desc=NULL;
int part_length;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
+
dev = (int)simple_strtoul (argv[2], &ep, 16);
dev_desc = get_dev(argv[1],dev);
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
if (!filename) {
switch (argc) {
case 0:
case 1:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 2:
if (strncmp(argv[1],"inf", 3) == 0) {
int i;
}
return rc;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 3:
if (strncmp(argv[1], "dev", 3) == 0) {
int dev = (int)simple_strtoul(argv[2], NULL, 10);
}
return rc;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
default: /* at least 4 args */
if (strcmp(argv[1], "read") == 0) {
n, (n == cnt) ? "OK" : "ERROR");
return (n == cnt) ? 0 : 1;
} else {
- cmd_usage(cmdtp);
- rc = 1;
+ return cmd_usage(cmdtp);
}
return rc;
boot_device = argv[2];
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
if (!boot_device) {
{
switch (argc) {
case 0:
- case 1: cmd_usage(cmdtp); return 1;
+ case 1: return cmd_usage(cmdtp);
+
case 2:
if (strncmp(argv[1],"res",3) == 0) {
printf("\nReset SCSI\n");
printf("\nno SCSI devices available\n");
return 1;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
case 3:
if (strncmp(argv[1],"dev",3) == 0) {
int dev = (int)simple_strtoul(argv[2], NULL, 10);
}
return 1;
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
default:
/* at least 4 args */
if (strcmp(argv[1],"read") == 0) {
return 0;
}
} /* switch */
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
/****************************************************************************************
int w;
/* Validate arguments */
- if ((argc != 5) || (strlen(argv[3]) != 1)) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if ((argc != 5) || (strlen(argv[3]) != 1))
+ return cmd_usage(cmdtp);
w = cmd_get_data_size(argv[0], 4);
return do_spi_flash_erase(argc - 1, argv + 1);
usage:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
int do_strings(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- if (argc == 1) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc == 1)
+ return cmd_usage(cmdtp);
if ((flag & CMD_FLAG_REPEAT) == 0) {
start_addr = (char *)simple_strtoul(argv[1], NULL, 16);
ulong addr = 0;
int err = 0;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if (mtdparts_init() != 0) {
printf("Error initializing mtdparts!\n");
return 0;
}
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
/* todo: get dev number for NAND... */
ubi_dev.nr = 0;
char *vol_name;
int ret;
- if (argc != 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 2)
+ return cmd_usage(cmdtp);
+
vol_name = argv[1];
debug("Using volume %s\n", vol_name);
return -1;
}
- if (argc < 3) {
- cmd_usage(cmdtp);
- return -1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
addr = simple_strtoul(argv[1], &endp, 16);
- if (endp == argv[1]) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (endp == argv[1])
+ return cmd_usage(cmdtp);
filename = argv[2];
if (argc == 4) {
size = simple_strtoul(argv[3], &endp, 16);
- if (endp == argv[3]) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (endp == argv[3])
+ return cmd_usage(cmdtp);
}
debug("Loading file '%s' to address 0x%08x (size %d)\n", filename, addr, size);
boot_device = argv[2];
break;
default:
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
if (!boot_device) {
block_dev_desc_t *stor_dev;
#endif
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if ((strncmp(argv[1], "reset", 5) == 0) ||
(strncmp(argv[1], "start", 5) == 0)) {
return 0;
}
#endif /* CONFIG_USB_STORAGE */
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
#ifdef CONFIG_USB_STORAGE
{
ulong bitmap;
- if (argc != 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 2)
+ return cmd_usage(cmdtp);
if (argv[1][0] == '/') { /* select bitmap by number */
bitmap = simple_strtoul(argv[1]+1, NULL, 10);
puts (cmdtp->help);
putc ('\n');
#endif /* CONFIG_SYS_LONGHELP */
- return 0;
+ return 1;
}
#ifdef CONFIG_AUTO_COMPLETE
#endif
if (gd->env_valid == 0) {
-#if defined(CONFIG_GTH) || defined(CONFIG_ENV_IS_NOWHERE) /* Environment not changable */
+#if defined(CONFIG_ENV_IS_NOWHERE) /* Environment not changable */
puts ("Using default environment\n\n");
#else
puts ("*** Warning - bad CRC, using default environment\n\n");
* (C) Copyright 2007
* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
off = fdt_path_offset(blob, "/aliases");
fdt_delprop(blob, off, alias);
}
+
+/* Helper to read a big number; size is in cells (not bytes) */
+static inline u64 of_read_number(const __be32 *cell, int size)
+{
+ u64 r = 0;
+ while (size--)
+ r = (r << 32) | be32_to_cpu(*(cell++));
+ return r;
+}
+
+static int of_n_cells(const void *blob, int nodeoffset, const char *name)
+{
+ int np;
+ const int *ip;
+
+ do {
+ np = fdt_parent_offset(blob, nodeoffset);
+
+ if (np >= 0)
+ nodeoffset = np;
+ ip = (int *)fdt_getprop(blob, nodeoffset, name, NULL);
+ if (ip)
+ return be32_to_cpup(ip);
+ } while (np >= 0);
+
+ /* No #<NAME>-cells property for the root node */
+ return 1;
+}
+
+int of_n_addr_cells(const void *blob, int nodeoffset)
+{
+ return of_n_cells(blob, nodeoffset, "#address-cells");
+}
+
+int of_n_size_cells(const void *blob, int nodeoffset)
+{
+ return of_n_cells(blob, nodeoffset, "#size-cells");
+}
+
+#define PRu64 "%llx"
+
+/* Max address size we deal with */
+#define OF_MAX_ADDR_CELLS 4
+#define OF_BAD_ADDR ((u64)-1)
+#define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
+ (ns) > 0)
+
+/* Debug utility */
+#ifdef DEBUG
+static void of_dump_addr(const char *s, const u32 *addr, int na)
+{
+ printf("%s", s);
+ while(na--)
+ printf(" %08x", *(addr++));
+ printf("\n");
+}
+#else
+static void of_dump_addr(const char *s, const u32 *addr, int na) { }
+#endif
+
+/* Callbacks for bus specific translators */
+struct of_bus {
+ const char *name;
+ const char *addresses;
+ void (*count_cells)(void *blob, int offset,
+ int *addrc, int *sizec);
+ u64 (*map)(u32 *addr, const u32 *range,
+ int na, int ns, int pna);
+ int (*translate)(u32 *addr, u64 offset, int na);
+};
+
+/* Default translator (generic bus) */
+static void of_bus_default_count_cells(void *blob, int offset,
+ int *addrc, int *sizec)
+{
+ if (addrc)
+ *addrc = of_n_addr_cells(blob, offset);
+ if (sizec)
+ *sizec = of_n_size_cells(blob, offset);
+}
+
+static u64 of_bus_default_map(u32 *addr, const u32 *range,
+ int na, int ns, int pna)
+{
+ u64 cp, s, da;
+
+ cp = of_read_number(range, na);
+ s = of_read_number(range + na + pna, ns);
+ da = of_read_number(addr, na);
+
+ debug("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n",
+ cp, s, da);
+
+ if (da < cp || da >= (cp + s))
+ return OF_BAD_ADDR;
+ return da - cp;
+}
+
+static int of_bus_default_translate(u32 *addr, u64 offset, int na)
+{
+ u64 a = of_read_number(addr, na);
+ memset(addr, 0, na * 4);
+ a += offset;
+ if (na > 1)
+ addr[na - 2] = a >> 32;
+ addr[na - 1] = a & 0xffffffffu;
+
+ return 0;
+}
+
+/* Array of bus specific translators */
+static struct of_bus of_busses[] = {
+ /* Default */
+ {
+ .name = "default",
+ .addresses = "reg",
+ .count_cells = of_bus_default_count_cells,
+ .map = of_bus_default_map,
+ .translate = of_bus_default_translate,
+ },
+};
+
+static int of_translate_one(void * blob, int parent, struct of_bus *bus,
+ struct of_bus *pbus, u32 *addr,
+ int na, int ns, int pna, const char *rprop)
+{
+ const u32 *ranges;
+ int rlen;
+ int rone;
+ u64 offset = OF_BAD_ADDR;
+
+ /* Normally, an absence of a "ranges" property means we are
+ * crossing a non-translatable boundary, and thus the addresses
+ * below the current not cannot be converted to CPU physical ones.
+ * Unfortunately, while this is very clear in the spec, it's not
+ * what Apple understood, and they do have things like /uni-n or
+ * /ht nodes with no "ranges" property and a lot of perfectly
+ * useable mapped devices below them. Thus we treat the absence of
+ * "ranges" as equivalent to an empty "ranges" property which means
+ * a 1:1 translation at that level. It's up to the caller not to try
+ * to translate addresses that aren't supposed to be translated in
+ * the first place. --BenH.
+ */
+ ranges = (u32 *)fdt_getprop(blob, parent, rprop, &rlen);
+ if (ranges == NULL || rlen == 0) {
+ offset = of_read_number(addr, na);
+ memset(addr, 0, pna * 4);
+ debug("OF: no ranges, 1:1 translation\n");
+ goto finish;
+ }
+
+ debug("OF: walking ranges...\n");
+
+ /* Now walk through the ranges */
+ rlen /= 4;
+ rone = na + pna + ns;
+ for (; rlen >= rone; rlen -= rone, ranges += rone) {
+ offset = bus->map(addr, ranges, na, ns, pna);
+ if (offset != OF_BAD_ADDR)
+ break;
+ }
+ if (offset == OF_BAD_ADDR) {
+ debug("OF: not found !\n");
+ return 1;
+ }
+ memcpy(addr, ranges + na, 4 * pna);
+
+ finish:
+ of_dump_addr("OF: parent translation for:", addr, pna);
+ debug("OF: with offset: "PRu64"\n", offset);
+
+ /* Translate it into parent bus space */
+ return pbus->translate(addr, offset, pna);
+}
+
+/*
+ * Translate an address from the device-tree into a CPU physical address,
+ * this walks up the tree and applies the various bus mappings on the
+ * way.
+ *
+ * Note: We consider that crossing any level with #size-cells == 0 to mean
+ * that translation is impossible (that is we are not dealing with a value
+ * that can be mapped to a cpu physical address). This is not really specified
+ * that way, but this is traditionally the way IBM at least do things
+ */
+u64 __of_translate_address(void *blob, int node_offset, const u32 *in_addr,
+ const char *rprop)
+{
+ int parent;
+ struct of_bus *bus, *pbus;
+ u32 addr[OF_MAX_ADDR_CELLS];
+ int na, ns, pna, pns;
+ u64 result = OF_BAD_ADDR;
+
+ debug("OF: ** translation for device %s **\n",
+ fdt_get_name(blob, node_offset, NULL));
+
+ /* Get parent & match bus type */
+ parent = fdt_parent_offset(blob, node_offset);
+ if (parent < 0)
+ goto bail;
+ bus = &of_busses[0];
+
+ /* Cound address cells & copy address locally */
+ bus->count_cells(blob, node_offset, &na, &ns);
+ if (!OF_CHECK_COUNTS(na, ns)) {
+ printf("%s: Bad cell count for %s\n", __FUNCTION__,
+ fdt_get_name(blob, node_offset, NULL));
+ goto bail;
+ }
+ memcpy(addr, in_addr, na * 4);
+
+ debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
+ bus->name, na, ns, fdt_get_name(blob, parent, NULL));
+ of_dump_addr("OF: translating address:", addr, na);
+
+ /* Translate */
+ for (;;) {
+ /* Switch to parent bus */
+ node_offset = parent;
+ parent = fdt_parent_offset(blob, node_offset);
+
+ /* If root, we have finished */
+ if (parent < 0) {
+ debug("OF: reached root node\n");
+ result = of_read_number(addr, na);
+ break;
+ }
+
+ /* Get new parent bus and counts */
+ pbus = &of_busses[0];
+ pbus->count_cells(blob, node_offset, &pna, &pns);
+ if (!OF_CHECK_COUNTS(pna, pns)) {
+ printf("%s: Bad cell count for %s\n", __FUNCTION__,
+ fdt_get_name(blob, node_offset, NULL));
+ break;
+ }
+
+ debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
+ pbus->name, pna, pns, fdt_get_name(blob, parent, NULL));
+
+ /* Apply bus translation */
+ if (of_translate_one(blob, node_offset, bus, pbus,
+ addr, na, ns, pna, rprop))
+ break;
+
+ /* Complete the move up one level */
+ na = pna;
+ ns = pns;
+ bus = pbus;
+
+ of_dump_addr("OF: one level translation:", addr, na);
+ }
+ bail:
+
+ return result;
+}
+
+u64 fdt_translate_address(void *blob, int node_offset, const u32 *in_addr)
+{
+ return __of_translate_address(blob, node_offset, in_addr, "ranges");
+}
+
+/**
+ * fdt_node_offset_by_compat_reg: Find a node that matches compatiable and
+ * who's reg property matches a physical cpu address
+ *
+ * @blob: ptr to device tree
+ * @compat: compatiable string to match
+ * @compat_off: property name
+ *
+ */
+int fdt_node_offset_by_compat_reg(void *blob, const char *compat,
+ phys_addr_t compat_off)
+{
+ int len, off = fdt_node_offset_by_compatible(blob, -1, compat);
+ while (off != -FDT_ERR_NOTFOUND) {
+ u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", &len);
+ if (reg) {
+ if (compat_off == fdt_translate_address(blob, off, reg))
+ return off;
+ }
+ off = fdt_node_offset_by_compatible(blob, off, compat);
+ }
+
+ return -FDT_ERR_NOTFOUND;
+}
+
+
}
#endif
/* found - check max args */
- if ((child->argc - i) > cmdtp->maxargs) {
- cmd_usage(cmdtp);
- return -1;
- }
+ if ((child->argc - i) > cmdtp->maxargs)
+ return cmd_usage(cmdtp);
#endif
child->argv+=i; /* XXX horrible hack */
#ifndef __U_BOOT__
{
int i;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
for (i=1; i<argc; ++i) {
char *arg;
void usb_show_progress(void)
{
- printf(".");
+ debug(".");
}
/*******************************************************************************
for (i = 0; i < USB_MAX_STOR_DEV; i++) {
memset(&usb_dev_desc[i], 0, sizeof(block_dev_desc_t));
- usb_dev_desc[i].target = 0xff;
usb_dev_desc[i].if_type = IF_TYPE_USB;
usb_dev_desc[i].dev = i;
usb_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
+ usb_dev_desc[i].target = 0xff;
+ usb_dev_desc[i].type = DEV_TYPE_UNKNOWN;
usb_dev_desc[i].block_read = usb_stor_read;
usb_dev_desc[i].block_write = usb_stor_write;
}
usb_disable_asynch(0); /* asynch transfer allowed */
if (blkcnt >= USB_MAX_READ_BLK)
- printf("\n");
+ debug("\n");
return blkcnt;
}
usb_disable_asynch(0); /* asynch transfer allowed */
if (blkcnt >= USB_MAX_WRITE_BLK)
- printf("\n");
+ debug("\n");
return blkcnt;
}
(buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) ) {
return (-1);
} /* no DOS Signature at all */
- if(strncmp((char *)&buffer[DOS_PBR_FSTYPE_OFFSET],"FAT",3)==0)
+ if (strncmp((char *)&buffer[DOS_PBR_FSTYPE_OFFSET],"FAT",3)==0 ||
+ strncmp((char *)&buffer[DOS_PBR32_FSTYPE_OFFSET],"FAT32",5)==0) {
return DOS_PBR; /* is PBR */
+ }
return DOS_MBR; /* Is MBR */
}
#ifdef CONFIG_ISO_PARTITION
/* Make the buffers bigger if ISO partition support is enabled -- CD-ROMS
have 2048 byte blocks */
-#define DEFAULT_SECTOR_SIZE 2048
+#define DEFAULT_SECTOR_SIZE 2048
#else
#define DEFAULT_SECTOR_SIZE 512
#endif
#define DOS_PART_TBL_OFFSET 0x1be
#define DOS_PART_MAGIC_OFFSET 0x1fe
#define DOS_PBR_FSTYPE_OFFSET 0x36
+#define DOS_PBR32_FSTYPE_OFFSET 0x52
#define DOS_PBR_MEDIA_TYPE_OFFSET 0x15
#define DOS_MBR 0
#define DOS_PBR 1
if (!c || !((argc == (c->maxargs)) ||
(((int)c->cmd == PCA953X_CMD_DEVICE) &&
(argc == (c->maxargs - 1))))) {
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
/* arg2 used as chip number or pin number */
#endif
#include <i2c.h>
+#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
+# include <asm/gpio.h>
+
+# ifndef I2C_GPIO_SYNC
+# define I2C_GPIO_SYNC
+# endif
+
+# ifndef I2C_INIT
+# define I2C_INIT \
+ do { \
+ gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
+ gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
+ } while (0)
+# endif
+
+# ifndef I2C_ACTIVE
+# define I2C_ACTIVE do { } while (0)
+# endif
+
+# ifndef I2C_TRISTATE
+# define I2C_TRISTATE do { } while (0)
+# endif
+
+# ifndef I2C_READ
+# define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
+# endif
+
+# ifndef I2C_SDA
+# define I2C_SDA(bit) \
+ do { \
+ if (bit) \
+ gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
+ else \
+ gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
+ I2C_GPIO_SYNC; \
+ } while (0)
+# endif
+
+# ifndef I2C_SCL
+# define I2C_SCL(bit) \
+ do { \
+ gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
+ I2C_GPIO_SYNC; \
+ } while (0)
+# endif
+
+# ifndef I2C_DELAY
+# define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+# endif
+
+#endif
+
/* #define DEBUG_I2C */
#ifdef DEBUG_I2C
if (!c || !((argc == (c->maxargs)) ||
(((int)c->cmd == DS4510_CMD_DEVICE) &&
(argc == (c->maxargs - 1))))) {
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
/* arg2 used as chip addr and pin number */
#ifdef CONFIG_CMD_DS4510_MEM
/* Only eeprom, seeprom, and sram commands should make it here */
- if (strcmp(argv[2], "read") == 0) {
+ if (strcmp(argv[2], "read") == 0)
rw_func = ds4510_mem_read;
- } else if (strcmp(argv[2], "write") == 0) {
+ else if (strcmp(argv[2], "write") == 0)
rw_func = ds4510_mem_write;
- } else {
- cmd_usage(cmdtp);
- return 1;
- }
+ else
+ return cmd_usage(cmdtp);
addr = simple_strtoul(argv[3], NULL, 16);
off += simple_strtoul(argv[4], NULL, 16);
defined(CONFIG_P1013) || defined(CONFIG_P1022) || \
defined(CONFIG_P2010) || defined(CONFIG_P2020)
#define FSL_HW_NUM_LAWS 12
-#elif defined(CONFIG_PPC_P4080)
+#elif defined(CONFIG_PPC_P3041) || defined(CONFIG_PPC_P4080) || \
+ defined(CONFIG_PPC_P5020)
#define FSL_HW_NUM_LAWS 32
#else
#error FSL_HW_NUM_LAWS not defined for this platform
u32 val;
/* at least two arguments please */
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
cmd = argv[1];
if (strcmp(cmd, "dump") == 0) {
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
+
nregs = simple_strtoul(argv[2], NULL, 16);
pmic_dump(nregs);
return 0;
}
if (strcmp(cmd, "write") == 0) {
- if (argc < 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 4)
+ return cmd_usage(cmdtp);
+
nregs = simple_strtoul(argv[2], NULL, 16);
val = simple_strtoul(argv[3], NULL, 16);
pmic_reg_write(nregs, val);
#include <libfdt.h>
#include <fdt_support.h>
-void ft_fsl_pci_setup(void *blob, const char *pci_alias,
- struct pci_controller *hose)
+void ft_fsl_pci_setup(void *blob, const char *pci_compat,
+ struct pci_controller *hose, unsigned long ctrl_addr)
{
- int off = fdt_path_offset(blob, pci_alias);
+ int off;
u32 bus_range[2];
+ phys_addr_t p_ctrl_addr = (phys_addr_t)ctrl_addr;
+
+ /* convert ctrl_addr to true physical address */
+ p_ctrl_addr = (phys_addr_t)ctrl_addr - CONFIG_SYS_CCSRBAR;
+ p_ctrl_addr += CONFIG_SYS_CCSRBAR_PHYS;
+
+ off = fdt_node_offset_by_compat_reg(blob, pci_compat, p_ctrl_addr);
if (off < 0)
return;
/* We assume a cfg_addr not being set means we didn't setup the controller */
if ((hose == NULL) || (hose->cfg_addr == NULL)) {
- fdt_del_node_and_alias(blob, pci_alias);
+ fdt_del_node(blob, off);
} else {
bus_range[0] = 0;
bus_range[1] = hose->last_busno - hose->first_busno;
{
ulong addr;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
if (strcmp(argv[1], "fw") == 0) {
addr = simple_strtoul(argv[2], NULL, 16);
return qe_upload_firmware((const struct qe_firmware *) addr);
}
- cmd_usage(cmdtp);
- return 1;
+ return cmd_usage(cmdtp);
}
U_BOOT_CMD(
case 8:
padded_line -= width;
if (VIDEO_DATA_FORMAT == GDF__8BIT_INDEX) {
- /* Copy colormap */
+ /* Copy colormap */
for (xcount = 0; xcount < colors; ++xcount) {
cte = bmp->color_table[xcount];
video_set_lut (xcount, cte.red, cte.green, cte.blue);
#ifdef CONFIG_VIDEO_BMP_LOGO
source = bmp_logo_bitmap;
- /* Allocate temporary space for computing colormap */
+ /* Allocate temporary space for computing colormap */
logo_red = malloc (BMP_LOGO_COLORS);
logo_green = malloc (BMP_LOGO_COLORS);
logo_blue = malloc (BMP_LOGO_COLORS);
- /* Compute color map */
+ /* Compute color map */
for (i = 0; i < VIDEO_LOGO_COLORS; i++) {
logo_red[i] = (bmp_logo_palette[i] & 0x0f00) >> 4;
logo_green[i] = (bmp_logo_palette[i] & 0x00f0);
/*
* Convert a string to lowercase.
*/
-static void
-downcase(char *str)
+static void downcase (char *str)
{
while (*str != '\0') {
TOLOWER(*str);
}
}
-static block_dev_desc_t *cur_dev = NULL;
+static block_dev_desc_t *cur_dev = NULL;
+
static unsigned long part_offset = 0;
+
static int cur_part = 1;
#define DOS_PART_TBL_OFFSET 0x1be
#define DOS_PART_MAGIC_OFFSET 0x1fe
#define DOS_FS_TYPE_OFFSET 0x36
+#define DOS_FS32_TYPE_OFFSET 0x52
-int disk_read (__u32 startblock, __u32 getsize, __u8 * bufptr)
+static int disk_read (__u32 startblock, __u32 getsize, __u8 * bufptr)
{
- startblock += part_offset;
if (cur_dev == NULL)
return -1;
+
+ startblock += part_offset;
+
if (cur_dev->block_read) {
- return cur_dev->block_read (cur_dev->dev
- , startblock, getsize, (unsigned long *)bufptr);
+ return cur_dev->block_read(cur_dev->dev, startblock, getsize,
+ (unsigned long *) bufptr);
}
return -1;
}
-
-int
-fat_register_device(block_dev_desc_t *dev_desc, int part_no)
+int fat_register_device (block_dev_desc_t * dev_desc, int part_no)
{
unsigned char buffer[SECTOR_SIZE];
+
disk_partition_t info;
if (!dev_desc->block_read)
return -1;
+
cur_dev = dev_desc;
/* check if we have a MBR (on floppies we have only a PBR) */
- if (dev_desc->block_read (dev_desc->dev, 0, 1, (ulong *) buffer) != 1) {
- printf ("** Can't read from device %d **\n", dev_desc->dev);
+ if (dev_desc->block_read(dev_desc->dev, 0, 1, (ulong *)buffer) != 1) {
+ printf("** Can't read from device %d **\n",
+ dev_desc->dev);
return -1;
}
if (buffer[DOS_PART_MAGIC_OFFSET] != 0x55 ||
- buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) {
+ buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) {
/* no signature found */
return -1;
}
defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE) )
- /* First we assume, there is a MBR */
- if (!get_partition_info (dev_desc, part_no, &info)) {
+ /* First we assume there is a MBR */
+ if (!get_partition_info(dev_desc, part_no, &info)) {
part_offset = info.start;
cur_part = part_no;
- } else if (!strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET], "FAT", 3)) {
+ } else if ((strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET], "FAT", 3) == 0) ||
+ (strncmp((char *)&buffer[DOS_FS32_TYPE_OFFSET], "FAT32", 5) == 0)) {
/* ok, we assume we are on a PBR only */
cur_part = 1;
part_offset = 0;
} else {
- printf ("** Partition %d not valid on device %d **\n",
- part_no, dev_desc->dev);
+ printf("** Partition %d not valid on device %d **\n",
+ part_no, dev_desc->dev);
return -1;
}
#else
- if (!strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET],"FAT",3)) {
+ if ((strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET], "FAT", 3) == 0) ||
+ (strncmp((char *)&buffer[DOS_FS32_TYPE_OFFSET], "FAT32", 5) == 0)) {
/* ok, we assume we are on a PBR only */
cur_part = 1;
part_offset = 0;
return 0;
}
-
/*
* Get the first occurence of a directory delimiter ('/' or '\') in a string.
* Return index into string if found, -1 otherwise.
*/
-static int
-dirdelim(char *str)
+static int dirdelim (char *str)
{
char *start = str;
while (*str != '\0') {
- if (ISDIRDELIM(*str)) return str - start;
+ if (ISDIRDELIM(*str))
+ return str - start;
str++;
}
return -1;
{
char *ptr;
- memcpy (s_name, dirent->name, 8);
+ memcpy(s_name, dirent->name, 8);
s_name[8] = '\0';
ptr = s_name;
while (*ptr && *ptr != ' ')
if (dirent->ext[0] && dirent->ext[0] != ' ') {
*ptr = '.';
ptr++;
- memcpy (ptr, dirent->ext, 3);
+ memcpy(ptr, dirent->ext, 3);
ptr[3] = '\0';
while (*ptr && *ptr != ' ')
ptr++;
*s_name = '\0';
else if (*s_name == aRING)
*s_name = DELETED_FLAG;
- downcase (s_name);
+ downcase(s_name);
}
/*
* Get the entry at index 'entry' in a FAT (12/16/32) table.
* On failure 0x00 is returned.
*/
-static __u32
-get_fatent(fsdata *mydata, __u32 entry)
+static __u32 get_fatent (fsdata *mydata, __u32 entry)
{
__u32 bufnum;
- __u32 offset;
+ __u32 off16, offset;
__u32 ret = 0x00;
+ __u16 val1, val2;
switch (mydata->fatsize) {
case 32:
return ret;
}
+ debug("FAT%d: entry: 0x%04x = %d, offset: 0x%04x = %d\n",
+ mydata->fatsize, entry, entry, offset, offset);
+
/* Read a new block of FAT entries into the cache. */
if (bufnum != mydata->fatbufnum) {
- int getsize = FATBUFSIZE/FS_BLOCK_SIZE;
+ int getsize = FATBUFSIZE / FS_BLOCK_SIZE;
__u8 *bufptr = mydata->fatbuf;
__u32 fatlength = mydata->fatlength;
__u32 startblock = bufnum * FATBUFBLOCKS;
fatlength *= SECTOR_SIZE; /* We want it in bytes now */
startblock += mydata->fat_sect; /* Offset from start of disk */
- if (getsize > fatlength) getsize = fatlength;
+ if (getsize > fatlength)
+ getsize = fatlength;
if (disk_read(startblock, getsize, bufptr) < 0) {
- FAT_DPRINT("Error reading FAT blocks\n");
+ debug("Error reading FAT blocks\n");
return ret;
}
mydata->fatbufnum = bufnum;
/* Get the actual entry from the table */
switch (mydata->fatsize) {
case 32:
- ret = FAT2CPU32(((__u32*)mydata->fatbuf)[offset]);
+ ret = FAT2CPU32(((__u32 *) mydata->fatbuf)[offset]);
break;
case 16:
- ret = FAT2CPU16(((__u16*)mydata->fatbuf)[offset]);
+ ret = FAT2CPU16(((__u16 *) mydata->fatbuf)[offset]);
break;
- case 12: {
- __u32 off16 = (offset*3)/4;
- __u16 val1, val2;
+ case 12:
+ off16 = (offset * 3) / 4;
switch (offset & 0x3) {
case 0:
- ret = FAT2CPU16(((__u16*)mydata->fatbuf)[off16]);
+ ret = FAT2CPU16(((__u16 *) mydata->fatbuf)[off16]);
ret &= 0xfff;
break;
case 1:
- val1 = FAT2CPU16(((__u16*)mydata->fatbuf)[off16]);
+ val1 = FAT2CPU16(((__u16 *)mydata->fatbuf)[off16]);
val1 &= 0xf000;
- val2 = FAT2CPU16(((__u16*)mydata->fatbuf)[off16+1]);
+ val2 = FAT2CPU16(((__u16 *)mydata->fatbuf)[off16 + 1]);
val2 &= 0x00ff;
ret = (val2 << 4) | (val1 >> 12);
break;
case 2:
- val1 = FAT2CPU16(((__u16*)mydata->fatbuf)[off16]);
+ val1 = FAT2CPU16(((__u16 *)mydata->fatbuf)[off16]);
val1 &= 0xff00;
- val2 = FAT2CPU16(((__u16*)mydata->fatbuf)[off16+1]);
+ val2 = FAT2CPU16(((__u16 *)mydata->fatbuf)[off16 + 1]);
val2 &= 0x000f;
ret = (val2 << 8) | (val1 >> 8);
break;
case 3:
- ret = FAT2CPU16(((__u16*)mydata->fatbuf)[off16]);;
+ ret = FAT2CPU16(((__u16 *)mydata->fatbuf)[off16]);
ret = (ret & 0xfff0) >> 4;
break;
default:
break;
}
+ break;
}
- break;
- }
- FAT_DPRINT("ret: %d, offset: %d\n", ret, offset);
+ debug("FAT%d: ret: %08x, offset: %04x\n",
+ mydata->fatsize, ret, offset);
return ret;
}
-
/*
* Read at most 'size' bytes from the specified cluster into 'buffer'.
* Return 0 on success, -1 otherwise.
*/
static int
-get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, unsigned long size)
+get_cluster (fsdata *mydata, __u32 clustnum, __u8 *buffer,
+ unsigned long size)
{
int idx = 0;
__u32 startsect;
if (clustnum > 0) {
- startsect = mydata->data_begin + clustnum*mydata->clust_size;
+ startsect = mydata->data_begin +
+ clustnum * mydata->clust_size;
} else {
startsect = mydata->rootdir_sect;
}
- FAT_DPRINT("gc - clustnum: %d, startsect: %d\n", clustnum, startsect);
- if (disk_read(startsect, size/FS_BLOCK_SIZE , buffer) < 0) {
- FAT_DPRINT("Error reading data\n");
+ debug("gc - clustnum: %d, startsect: %d\n", clustnum, startsect);
+
+ if (disk_read(startsect, size / FS_BLOCK_SIZE, buffer) < 0) {
+ debug("Error reading data\n");
return -1;
}
- if(size % FS_BLOCK_SIZE) {
+ if (size % FS_BLOCK_SIZE) {
__u8 tmpbuf[FS_BLOCK_SIZE];
- idx= size/FS_BLOCK_SIZE;
+
+ idx = size / FS_BLOCK_SIZE;
if (disk_read(startsect + idx, 1, tmpbuf) < 0) {
- FAT_DPRINT("Error reading data\n");
+ debug("Error reading data\n");
return -1;
}
- buffer += idx*FS_BLOCK_SIZE;
+ buffer += idx * FS_BLOCK_SIZE;
memcpy(buffer, tmpbuf, size % FS_BLOCK_SIZE);
return 0;
return 0;
}
-
/*
* Read at most 'maxsize' bytes from the file associated with 'dentptr'
* into 'buffer'.
* Return the number of bytes read or -1 on fatal errors.
*/
static long
-get_contents(fsdata *mydata, dir_entry *dentptr, __u8 *buffer,
- unsigned long maxsize)
+get_contents (fsdata *mydata, dir_entry *dentptr, __u8 *buffer,
+ unsigned long maxsize)
{
unsigned long filesize = FAT2CPU32(dentptr->size), gotsize = 0;
unsigned int bytesperclust = mydata->clust_size * SECTOR_SIZE;
__u32 endclust, newclust;
unsigned long actsize;
- FAT_DPRINT("Filesize: %ld bytes\n", filesize);
+ debug("Filesize: %ld bytes\n", filesize);
+
+ if (maxsize > 0 && filesize > maxsize)
+ filesize = maxsize;
- if (maxsize > 0 && filesize > maxsize) filesize = maxsize;
+ debug("%ld bytes\n", filesize);
- FAT_DPRINT("Reading: %ld bytes\n", filesize);
+ actsize = bytesperclust;
+ endclust = curclust;
- actsize=bytesperclust;
- endclust=curclust;
do {
/* search for consecutive clusters */
- while(actsize < filesize) {
+ while (actsize < filesize) {
newclust = get_fatent(mydata, endclust);
- if((newclust -1)!=endclust)
+ if ((newclust - 1) != endclust)
goto getit;
if (CHECK_CLUST(newclust, mydata->fatsize)) {
- FAT_DPRINT("curclust: 0x%x\n", newclust);
- FAT_DPRINT("Invalid FAT entry\n");
+ debug("curclust: 0x%x\n", newclust);
+ debug("Invalid FAT entry\n");
return gotsize;
}
- endclust=newclust;
- actsize+= bytesperclust;
+ endclust = newclust;
+ actsize += bytesperclust;
}
+
/* actsize >= file size */
actsize -= bytesperclust;
+
/* get remaining clusters */
if (get_cluster(mydata, curclust, buffer, (int)actsize) != 0) {
- FAT_ERROR("Error reading cluster\n");
+ printf("Error reading cluster\n");
return -1;
}
+
/* get remaining bytes */
gotsize += (int)actsize;
filesize -= actsize;
buffer += actsize;
- actsize= filesize;
+ actsize = filesize;
if (get_cluster(mydata, endclust, buffer, (int)actsize) != 0) {
- FAT_ERROR("Error reading cluster\n");
+ printf("Error reading cluster\n");
return -1;
}
- gotsize+=actsize;
+ gotsize += actsize;
return gotsize;
getit:
if (get_cluster(mydata, curclust, buffer, (int)actsize) != 0) {
- FAT_ERROR("Error reading cluster\n");
+ printf("Error reading cluster\n");
return -1;
}
gotsize += (int)actsize;
filesize -= actsize;
buffer += actsize;
+
curclust = get_fatent(mydata, endclust);
if (CHECK_CLUST(curclust, mydata->fatsize)) {
- FAT_DPRINT("curclust: 0x%x\n", curclust);
- FAT_ERROR("Invalid FAT entry\n");
+ debug("curclust: 0x%x\n", curclust);
+ printf("Invalid FAT entry\n");
return gotsize;
}
- actsize=bytesperclust;
- endclust=curclust;
+ actsize = bytesperclust;
+ endclust = curclust;
} while (1);
}
-
#ifdef CONFIG_SUPPORT_VFAT
/*
* Extract the file name information from 'slotptr' into 'l_name',
* starting at l_name[*idx].
* Return 1 if terminator (zero byte) is found, 0 otherwise.
*/
-static int
-slot2str(dir_slot *slotptr, char *l_name, int *idx)
+static int slot2str (dir_slot *slotptr, char *l_name, int *idx)
{
int j;
for (j = 0; j <= 8; j += 2) {
l_name[*idx] = slotptr->name0_4[j];
- if (l_name[*idx] == 0x00) return 1;
+ if (l_name[*idx] == 0x00)
+ return 1;
(*idx)++;
}
for (j = 0; j <= 10; j += 2) {
l_name[*idx] = slotptr->name5_10[j];
- if (l_name[*idx] == 0x00) return 1;
+ if (l_name[*idx] == 0x00)
+ return 1;
(*idx)++;
}
for (j = 0; j <= 2; j += 2) {
l_name[*idx] = slotptr->name11_12[j];
- if (l_name[*idx] == 0x00) return 1;
+ if (l_name[*idx] == 0x00)
+ return 1;
(*idx)++;
}
return 0;
}
-
/*
* Extract the full long filename starting at 'retdent' (which is really
* a slot) into 'l_name'. If successful also copy the real directory entry
* into 'retdent'
* Return 0 on success, -1 otherwise.
*/
-__attribute__ ((__aligned__(__alignof__(dir_entry))))
+__attribute__ ((__aligned__ (__alignof__ (dir_entry))))
__u8 get_vfatname_block[MAX_CLUSTSIZE];
+
static int
-get_vfatname(fsdata *mydata, int curclust, __u8 *cluster,
- dir_entry *retdent, char *l_name)
+get_vfatname (fsdata *mydata, int curclust, __u8 *cluster,
+ dir_entry *retdent, char *l_name)
{
dir_entry *realdent;
- dir_slot *slotptr = (dir_slot*) retdent;
- __u8 *nextclust = cluster + mydata->clust_size * SECTOR_SIZE;
- __u8 counter = (slotptr->id & ~LAST_LONG_ENTRY_MASK) & 0xff;
+ dir_slot *slotptr = (dir_slot *)retdent;
+ __u8 *nextclust = cluster + mydata->clust_size * SECTOR_SIZE;
+ __u8 counter = (slotptr->id & ~LAST_LONG_ENTRY_MASK) & 0xff;
int idx = 0;
- while ((__u8*)slotptr < nextclust) {
- if (counter == 0) break;
+ while ((__u8 *)slotptr < nextclust) {
+ if (counter == 0)
+ break;
if (((slotptr->id & ~LAST_LONG_ENTRY_MASK) & 0xff) != counter)
return -1;
slotptr++;
counter--;
}
- if ((__u8*)slotptr >= nextclust) {
+ if ((__u8 *)slotptr >= nextclust) {
dir_slot *slotptr2;
slotptr--;
curclust = get_fatent(mydata, curclust);
if (CHECK_CLUST(curclust, mydata->fatsize)) {
- FAT_DPRINT("curclust: 0x%x\n", curclust);
- FAT_ERROR("Invalid FAT entry\n");
+ debug("curclust: 0x%x\n", curclust);
+ printf("Invalid FAT entry\n");
return -1;
}
+
if (get_cluster(mydata, curclust, get_vfatname_block,
mydata->clust_size * SECTOR_SIZE) != 0) {
- FAT_DPRINT("Error: reading directory block\n");
+ debug("Error: reading directory block\n");
return -1;
}
- slotptr2 = (dir_slot*) get_vfatname_block;
- while (slotptr2->id > 0x01) {
+
+ slotptr2 = (dir_slot *)get_vfatname_block;
+ while (slotptr2->id > 0x01)
slotptr2++;
- }
+
/* Save the real directory entry */
- realdent = (dir_entry*)slotptr2 + 1;
- while ((__u8*)slotptr2 >= get_vfatname_block) {
+ realdent = (dir_entry *)slotptr2 + 1;
+ while ((__u8 *)slotptr2 >= get_vfatname_block) {
slot2str(slotptr2, l_name, &idx);
slotptr2--;
}
} else {
/* Save the real directory entry */
- realdent = (dir_entry*)slotptr;
+ realdent = (dir_entry *)slotptr;
}
do {
slotptr--;
- if (slot2str(slotptr, l_name, &idx)) break;
+ if (slot2str(slotptr, l_name, &idx))
+ break;
} while (!(slotptr->id & LAST_LONG_ENTRY_MASK));
l_name[idx] = '\0';
- if (*l_name == DELETED_FLAG) *l_name = '\0';
- else if (*l_name == aRING) *l_name = DELETED_FLAG;
+ if (*l_name == DELETED_FLAG)
+ *l_name = '\0';
+ else if (*l_name == aRING)
+ *l_name = DELETED_FLAG;
downcase(l_name);
/* Return the real directory entry */
return 0;
}
-
/* Calculate short name checksum */
-static __u8
-mkcksum(const char *str)
+static __u8 mkcksum (const char *str)
{
int i;
+
__u8 ret = 0;
for (i = 0; i < 11; i++) {
- ret = (((ret&1)<<7)|((ret&0xfe)>>1)) + str[i];
+ ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + str[i];
}
return ret;
}
-#endif
-
+#endif /* CONFIG_SUPPORT_VFAT */
/*
* Get the directory entry associated with 'filename' from the directory
* starting at 'startsect'
*/
-__attribute__ ((__aligned__(__alignof__(dir_entry))))
+__attribute__ ((__aligned__ (__alignof__ (dir_entry))))
__u8 get_dentfromdir_block[MAX_CLUSTSIZE];
-static dir_entry *get_dentfromdir (fsdata * mydata, int startsect,
- char *filename, dir_entry * retdent,
+
+static dir_entry *get_dentfromdir (fsdata *mydata, int startsect,
+ char *filename, dir_entry *retdent,
int dols)
{
- __u16 prevcksum = 0xffff;
- __u32 curclust = START (retdent);
- int files = 0, dirs = 0;
+ __u16 prevcksum = 0xffff;
+ __u32 curclust = START(retdent);
+ int files = 0, dirs = 0;
- FAT_DPRINT ("get_dentfromdir: %s\n", filename);
- while (1) {
- dir_entry *dentptr;
- int i;
+ debug("get_dentfromdir: %s\n", filename);
+
+ while (1) {
+ dir_entry *dentptr;
+
+ int i;
+
+ if (get_cluster(mydata, curclust, get_dentfromdir_block,
+ mydata->clust_size * SECTOR_SIZE) != 0) {
+ debug("Error: reading directory block\n");
+ return NULL;
+ }
+
+ dentptr = (dir_entry *)get_dentfromdir_block;
+
+ for (i = 0; i < DIRENTSPERCLUST; i++) {
+ char s_name[14], l_name[256];
- if (get_cluster (mydata, curclust, get_dentfromdir_block,
- mydata->clust_size * SECTOR_SIZE) != 0) {
- FAT_DPRINT ("Error: reading directory block\n");
- return NULL;
- }
- dentptr = (dir_entry *) get_dentfromdir_block;
- for (i = 0; i < DIRENTSPERCLUST; i++) {
- char s_name[14], l_name[256];
-
- l_name[0] = '\0';
- if (dentptr->name[0] == DELETED_FLAG) {
- dentptr++;
- continue;
- }
- if ((dentptr->attr & ATTR_VOLUME)) {
+ l_name[0] = '\0';
+ if (dentptr->name[0] == DELETED_FLAG) {
+ dentptr++;
+ continue;
+ }
+ if ((dentptr->attr & ATTR_VOLUME)) {
#ifdef CONFIG_SUPPORT_VFAT
- if ((dentptr->attr & ATTR_VFAT) &&
- (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
- prevcksum = ((dir_slot *) dentptr)
- ->alias_checksum;
- get_vfatname (mydata, curclust, get_dentfromdir_block,
- dentptr, l_name);
- if (dols) {
- int isdir = (dentptr->attr & ATTR_DIR);
- char dirc;
- int doit = 0;
-
- if (isdir) {
- dirs++;
- dirc = '/';
- doit = 1;
- } else {
- dirc = ' ';
- if (l_name[0] != 0) {
- files++;
- doit = 1;
- }
+ if ((dentptr->attr & ATTR_VFAT) &&
+ (dentptr-> name[0] & LAST_LONG_ENTRY_MASK)) {
+ prevcksum = ((dir_slot *)dentptr)->alias_checksum;
+ get_vfatname(mydata, curclust,
+ get_dentfromdir_block,
+ dentptr, l_name);
+ if (dols) {
+ int isdir;
+ char dirc;
+ int doit = 0;
+
+ isdir = (dentptr->attr & ATTR_DIR);
+
+ if (isdir) {
+ dirs++;
+ dirc = '/';
+ doit = 1;
+ } else {
+ dirc = ' ';
+ if (l_name[0] != 0) {
+ files++;
+ doit = 1;
+ }
+ }
+ if (doit) {
+ if (dirc == ' ') {
+ printf(" %8ld %s%c\n",
+ (long)FAT2CPU32(dentptr->size),
+ l_name,
+ dirc);
+ } else {
+ printf(" %s%c\n",
+ l_name,
+ dirc);
+ }
+ }
+ dentptr++;
+ continue;
+ }
+ debug("vfatname: |%s|\n", l_name);
+ } else
+#endif
+ {
+ /* Volume label or VFAT entry */
+ dentptr++;
+ continue;
+ }
}
- if (doit) {
- if (dirc == ' ') {
- printf (" %8ld %s%c\n",
- (long) FAT2CPU32 (dentptr->size),
- l_name, dirc);
- } else {
- printf (" %s%c\n", l_name, dirc);
- }
+ if (dentptr->name[0] == 0) {
+ if (dols) {
+ printf("\n%d file(s), %d dir(s)\n\n",
+ files, dirs);
+ }
+ debug("Dentname == NULL - %d\n", i);
+ return NULL;
}
- dentptr++;
- continue;
- }
- FAT_DPRINT ("vfatname: |%s|\n", l_name);
- } else
-#endif
- {
- /* Volume label or VFAT entry */
- dentptr++;
- continue;
- }
- }
- if (dentptr->name[0] == 0) {
- if (dols) {
- printf ("\n%d file(s), %d dir(s)\n\n", files, dirs);
- }
- FAT_DPRINT ("Dentname == NULL - %d\n", i);
- return NULL;
- }
#ifdef CONFIG_SUPPORT_VFAT
- if (dols && mkcksum (dentptr->name) == prevcksum) {
- dentptr++;
- continue;
- }
+ if (dols && mkcksum(dentptr->name) == prevcksum) {
+ dentptr++;
+ continue;
+ }
#endif
- get_name (dentptr, s_name);
- if (dols) {
- int isdir = (dentptr->attr & ATTR_DIR);
- char dirc;
- int doit = 0;
-
- if (isdir) {
- dirs++;
- dirc = '/';
- doit = 1;
- } else {
- dirc = ' ';
- if (s_name[0] != 0) {
- files++;
- doit = 1;
- }
+ get_name(dentptr, s_name);
+ if (dols) {
+ int isdir = (dentptr->attr & ATTR_DIR);
+ char dirc;
+ int doit = 0;
+
+ if (isdir) {
+ dirs++;
+ dirc = '/';
+ doit = 1;
+ } else {
+ dirc = ' ';
+ if (s_name[0] != 0) {
+ files++;
+ doit = 1;
+ }
+ }
+
+ if (doit) {
+ if (dirc == ' ') {
+ printf(" %8ld %s%c\n",
+ (long)FAT2CPU32(dentptr->size),
+ s_name, dirc);
+ } else {
+ printf(" %s%c\n",
+ s_name, dirc);
+ }
+ }
+
+ dentptr++;
+ continue;
+ }
+
+ if (strcmp(filename, s_name)
+ && strcmp(filename, l_name)) {
+ debug("Mismatch: |%s|%s|\n", s_name, l_name);
+ dentptr++;
+ continue;
+ }
+
+ memcpy(retdent, dentptr, sizeof(dir_entry));
+
+ debug("DentName: %s", s_name);
+ debug(", start: 0x%x", START(dentptr));
+ debug(", size: 0x%x %s\n",
+ FAT2CPU32(dentptr->size),
+ (dentptr->attr & ATTR_DIR) ? "(DIR)" : "");
+
+ return retdent;
}
- if (doit) {
- if (dirc == ' ') {
- printf (" %8ld %s%c\n",
- (long) FAT2CPU32 (dentptr->size), s_name,
- dirc);
- } else {
- printf (" %s%c\n", s_name, dirc);
- }
+
+ curclust = get_fatent(mydata, curclust);
+ if (CHECK_CLUST(curclust, mydata->fatsize)) {
+ debug("curclust: 0x%x\n", curclust);
+ printf("Invalid FAT entry\n");
+ return NULL;
}
- dentptr++;
- continue;
- }
- if (strcmp (filename, s_name) && strcmp (filename, l_name)) {
- FAT_DPRINT ("Mismatch: |%s|%s|\n", s_name, l_name);
- dentptr++;
- continue;
- }
- memcpy (retdent, dentptr, sizeof (dir_entry));
-
- FAT_DPRINT ("DentName: %s", s_name);
- FAT_DPRINT (", start: 0x%x", START (dentptr));
- FAT_DPRINT (", size: 0x%x %s\n",
- FAT2CPU32 (dentptr->size),
- (dentptr->attr & ATTR_DIR) ? "(DIR)" : "");
-
- return retdent;
- }
- curclust = get_fatent (mydata, curclust);
- if (CHECK_CLUST(curclust, mydata->fatsize)) {
- FAT_DPRINT ("curclust: 0x%x\n", curclust);
- FAT_ERROR ("Invalid FAT entry\n");
- return NULL;
- }
- }
-
- return NULL;
-}
+ }
+ return NULL;
+}
/*
* Read boot sector and volume info from a FAT filesystem
*/
static int
-read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize)
+read_bootsectandvi (boot_sector *bs, volume_info *volinfo, int *fatsize)
{
__u8 block[FS_BLOCK_SIZE];
+
volume_info *vistart;
- if (disk_read(0, 1, block) < 0) {
- FAT_DPRINT("Error: reading block\n");
+ if (disk_read (0, 1, block) < 0) {
+ debug("Error: reading block\n");
return -1;
}
memcpy(bs, block, sizeof(boot_sector));
- bs->reserved = FAT2CPU16(bs->reserved);
- bs->fat_length = FAT2CPU16(bs->fat_length);
- bs->secs_track = FAT2CPU16(bs->secs_track);
- bs->heads = FAT2CPU16(bs->heads);
-#if 0 /* UNUSED */
- bs->hidden = FAT2CPU32(bs->hidden);
-#endif
- bs->total_sect = FAT2CPU32(bs->total_sect);
+ bs->reserved = FAT2CPU16(bs->reserved);
+ bs->fat_length = FAT2CPU16(bs->fat_length);
+ bs->secs_track = FAT2CPU16(bs->secs_track);
+ bs->heads = FAT2CPU16(bs->heads);
+ bs->total_sect = FAT2CPU32(bs->total_sect);
/* FAT32 entries */
if (bs->fat_length == 0) {
/* Assume FAT32 */
bs->fat32_length = FAT2CPU32(bs->fat32_length);
- bs->flags = FAT2CPU16(bs->flags);
+ bs->flags = FAT2CPU16(bs->flags);
bs->root_cluster = FAT2CPU32(bs->root_cluster);
- bs->info_sector = FAT2CPU16(bs->info_sector);
- bs->backup_boot = FAT2CPU16(bs->backup_boot);
- vistart = (volume_info*) (block + sizeof(boot_sector));
+ bs->info_sector = FAT2CPU16(bs->info_sector);
+ bs->backup_boot = FAT2CPU16(bs->backup_boot);
+ vistart = (volume_info *)(block + sizeof(boot_sector));
*fatsize = 32;
} else {
- vistart = (volume_info*) &(bs->fat32_length);
+ vistart = (volume_info *)&(bs->fat32_length);
*fatsize = 0;
}
memcpy(volinfo, vistart, sizeof(volume_info));
if (*fatsize == 32) {
- if (strncmp(FAT32_SIGN, vistart->fs_type, SIGNLEN) == 0) {
+ if (strncmp(FAT32_SIGN, vistart->fs_type, SIGNLEN) == 0)
return 0;
- }
} else {
if (strncmp(FAT12_SIGN, vistart->fs_type, SIGNLEN) == 0) {
*fatsize = 12;
}
}
- FAT_DPRINT("Error: broken fs_type sign\n");
+ debug("Error: broken fs_type sign\n");
return -1;
}
-__attribute__ ((__aligned__(__alignof__(dir_entry))))
+__attribute__ ((__aligned__ (__alignof__ (dir_entry))))
__u8 do_fat_read_block[MAX_CLUSTSIZE];
+
long
do_fat_read (const char *filename, void *buffer, unsigned long maxsize,
int dols)
{
- char fnamecopy[2048];
- boot_sector bs;
- volume_info volinfo;
- fsdata datablock;
- fsdata *mydata = &datablock;
- dir_entry *dentptr;
- __u16 prevcksum = 0xffff;
- char *subname = "";
- int rootdir_size, cursect;
- int idx, isdir = 0;
- int files = 0, dirs = 0;
- long ret = 0;
- int firsttime;
-
- if (read_bootsectandvi (&bs, &volinfo, &mydata->fatsize)) {
- FAT_DPRINT ("Error: reading boot sector\n");
- return -1;
- }
- if (mydata->fatsize == 32) {
- mydata->fatlength = bs.fat32_length;
- } else {
- mydata->fatlength = bs.fat_length;
- }
- mydata->fat_sect = bs.reserved;
- cursect = mydata->rootdir_sect
- = mydata->fat_sect + mydata->fatlength * bs.fats;
- mydata->clust_size = bs.cluster_size;
- if (mydata->fatsize == 32) {
- rootdir_size = mydata->clust_size;
- mydata->data_begin = mydata->rootdir_sect /* + rootdir_size */
- - (mydata->clust_size * 2);
- } else {
- rootdir_size = ((bs.dir_entries[1] * (int) 256 + bs.dir_entries[0])
- * sizeof (dir_entry)) / SECTOR_SIZE;
- mydata->data_begin = mydata->rootdir_sect + rootdir_size
- - (mydata->clust_size * 2);
- }
- mydata->fatbufnum = -1;
-
- FAT_DPRINT ("FAT%d, fatlength: %d\n", mydata->fatsize,
- mydata->fatlength);
- FAT_DPRINT ("Rootdir begins at sector: %d, offset: %x, size: %d\n"
- "Data begins at: %d\n",
- mydata->rootdir_sect, mydata->rootdir_sect * SECTOR_SIZE,
- rootdir_size, mydata->data_begin);
- FAT_DPRINT ("Cluster size: %d\n", mydata->clust_size);
-
- /* "cwd" is always the root... */
- while (ISDIRDELIM (*filename))
- filename++;
- /* Make a copy of the filename and convert it to lowercase */
- strcpy (fnamecopy, filename);
- downcase (fnamecopy);
- if (*fnamecopy == '\0') {
- if (!dols)
- return -1;
- dols = LS_ROOT;
- } else if ((idx = dirdelim (fnamecopy)) >= 0) {
- isdir = 1;
- fnamecopy[idx] = '\0';
- subname = fnamecopy + idx + 1;
- /* Handle multiple delimiters */
- while (ISDIRDELIM (*subname))
- subname++;
- } else if (dols) {
- isdir = 1;
- }
-
- while (1) {
- int i;
+ char fnamecopy[2048];
+ boot_sector bs;
+ volume_info volinfo;
+ fsdata datablock;
+ fsdata *mydata = &datablock;
+ dir_entry *dentptr;
+ __u16 prevcksum = 0xffff;
+ char *subname = "";
+ int cursect;
+ int idx, isdir = 0;
+ int files = 0, dirs = 0;
+ long ret = 0;
+ int firsttime;
+ int root_cluster;
+ int j;
- if (disk_read (cursect, mydata->clust_size, do_fat_read_block) < 0) {
- FAT_DPRINT ("Error: reading rootdir block\n");
- return -1;
+ if (read_bootsectandvi(&bs, &volinfo, &mydata->fatsize)) {
+ debug("Error: reading boot sector\n");
+ return -1;
}
- dentptr = (dir_entry *) do_fat_read_block;
- for (i = 0; i < DIRENTSPERBLOCK; i++) {
- char s_name[14], l_name[256];
- l_name[0] = '\0';
- if ((dentptr->attr & ATTR_VOLUME)) {
+ root_cluster = bs.root_cluster;
+
+ if (mydata->fatsize == 32)
+ mydata->fatlength = bs.fat32_length;
+ else
+ mydata->fatlength = bs.fat_length;
+
+ mydata->fat_sect = bs.reserved;
+
+ cursect = mydata->rootdir_sect
+ = mydata->fat_sect + mydata->fatlength * bs.fats;
+
+ mydata->clust_size = bs.cluster_size;
+
+ if (mydata->fatsize == 32) {
+ mydata->data_begin = mydata->rootdir_sect -
+ (mydata->clust_size * 2);
+ } else {
+ int rootdir_size;
+
+ rootdir_size = ((bs.dir_entries[1] * (int)256 +
+ bs.dir_entries[0]) *
+ sizeof(dir_entry)) /
+ SECTOR_SIZE;
+ mydata->data_begin = mydata->rootdir_sect +
+ rootdir_size -
+ (mydata->clust_size * 2);
+ }
+
+ mydata->fatbufnum = -1;
+
#ifdef CONFIG_SUPPORT_VFAT
- if ((dentptr->attr & ATTR_VFAT) &&
- (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
- prevcksum = ((dir_slot *) dentptr)->alias_checksum;
- get_vfatname (mydata, 0, do_fat_read_block, dentptr, l_name);
- if (dols == LS_ROOT) {
- int isdir = (dentptr->attr & ATTR_DIR);
- char dirc;
- int doit = 0;
-
- if (isdir) {
- dirs++;
- dirc = '/';
- doit = 1;
- } else {
- dirc = ' ';
- if (l_name[0] != 0) {
- files++;
- doit = 1;
- }
- }
- if (doit) {
- if (dirc == ' ') {
- printf (" %8ld %s%c\n",
- (long) FAT2CPU32 (dentptr->size),
- l_name, dirc);
- } else {
- printf (" %s%c\n", l_name, dirc);
- }
- }
- dentptr++;
- continue;
- }
- FAT_DPRINT ("Rootvfatname: |%s|\n", l_name);
- } else
+ debug("VFAT Support enabled\n");
#endif
- {
- /* Volume label or VFAT entry */
- dentptr++;
- continue;
- }
- } else if (dentptr->name[0] == 0) {
- FAT_DPRINT ("RootDentname == NULL - %d\n", i);
- if (dols == LS_ROOT) {
- printf ("\n%d file(s), %d dir(s)\n\n", files, dirs);
- return 0;
+ debug("FAT%d, fat_sect: %d, fatlength: %d\n",
+ mydata->fatsize, mydata->fat_sect, mydata->fatlength);
+ debug("Rootdir begins at cluster: %d, sector: %d, offset: %x\n"
+ "Data begins at: %d\n",
+ root_cluster,
+ mydata->rootdir_sect,
+ mydata->rootdir_sect * SECTOR_SIZE, mydata->data_begin);
+ debug("Cluster size: %d\n", mydata->clust_size);
+
+ /* "cwd" is always the root... */
+ while (ISDIRDELIM(*filename))
+ filename++;
+
+ /* Make a copy of the filename and convert it to lowercase */
+ strcpy(fnamecopy, filename);
+ downcase(fnamecopy);
+
+ if (*fnamecopy == '\0') {
+ if (!dols)
+ return -1;
+
+ dols = LS_ROOT;
+ } else if ((idx = dirdelim(fnamecopy)) >= 0) {
+ isdir = 1;
+ fnamecopy[idx] = '\0';
+ subname = fnamecopy + idx + 1;
+
+ /* Handle multiple delimiters */
+ while (ISDIRDELIM(*subname))
+ subname++;
+ } else if (dols) {
+ isdir = 1;
+ }
+
+ j = 0;
+ while (1) {
+ int i;
+
+ debug("FAT read sect=%d, clust_size=%d, DIRENTSPERBLOCK=%d\n",
+ cursect, mydata->clust_size, DIRENTSPERBLOCK);
+
+ if (disk_read(cursect, mydata->clust_size, do_fat_read_block) < 0) {
+ debug("Error: reading rootdir block\n");
+ return -1;
}
- return -1;
- }
+
+ dentptr = (dir_entry *) do_fat_read_block;
+
+ for (i = 0; i < DIRENTSPERBLOCK; i++) {
+ char s_name[14], l_name[256];
+
+ l_name[0] = '\0';
+ if ((dentptr->attr & ATTR_VOLUME)) {
+#ifdef CONFIG_SUPPORT_VFAT
+ if ((dentptr->attr & ATTR_VFAT) &&
+ (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) {
+ prevcksum =
+ ((dir_slot *)dentptr)->alias_checksum;
+
+ get_vfatname(mydata, 0,
+ do_fat_read_block,
+ dentptr, l_name);
+
+ if (dols == LS_ROOT) {
+ char dirc;
+ int doit = 0;
+ int isdir =
+ (dentptr->attr & ATTR_DIR);
+
+ if (isdir) {
+ dirs++;
+ dirc = '/';
+ doit = 1;
+ } else {
+ dirc = ' ';
+ if (l_name[0] != 0) {
+ files++;
+ doit = 1;
+ }
+ }
+ if (doit) {
+ if (dirc == ' ') {
+ printf(" %8ld %s%c\n",
+ (long)FAT2CPU32(dentptr->size),
+ l_name,
+ dirc);
+ } else {
+ printf(" %s%c\n",
+ l_name,
+ dirc);
+ }
+ }
+ dentptr++;
+ continue;
+ }
+ debug("Rootvfatname: |%s|\n",
+ l_name);
+ } else
+#endif
+ {
+ /* Volume label or VFAT entry */
+ dentptr++;
+ continue;
+ }
+ } else if (dentptr->name[0] == 0) {
+ debug("RootDentname == NULL - %d\n", i);
+ if (dols == LS_ROOT) {
+ printf("\n%d file(s), %d dir(s)\n\n",
+ files, dirs);
+ return 0;
+ }
+ return -1;
+ }
#ifdef CONFIG_SUPPORT_VFAT
- else if (dols == LS_ROOT
- && mkcksum (dentptr->name) == prevcksum) {
- dentptr++;
- continue;
- }
+ else if (dols == LS_ROOT &&
+ mkcksum(dentptr->name) == prevcksum) {
+ dentptr++;
+ continue;
+ }
#endif
- get_name (dentptr, s_name);
- if (dols == LS_ROOT) {
- int isdir = (dentptr->attr & ATTR_DIR);
- char dirc;
- int doit = 0;
-
- if (isdir) {
- dirc = '/';
- if (s_name[0] != 0) {
- dirs++;
- doit = 1;
- }
+ get_name(dentptr, s_name);
+
+ if (dols == LS_ROOT) {
+ int isdir = (dentptr->attr & ATTR_DIR);
+ char dirc;
+ int doit = 0;
+
+ if (isdir) {
+ dirc = '/';
+ if (s_name[0] != 0) {
+ dirs++;
+ doit = 1;
+ }
+ } else {
+ dirc = ' ';
+ if (s_name[0] != 0) {
+ files++;
+ doit = 1;
+ }
+ }
+ if (doit) {
+ if (dirc == ' ') {
+ printf(" %8ld %s%c\n",
+ (long)FAT2CPU32(dentptr->size),
+ s_name, dirc);
+ } else {
+ printf(" %s%c\n",
+ s_name, dirc);
+ }
+ }
+ dentptr++;
+ continue;
+ }
+
+ if (strcmp(fnamecopy, s_name)
+ && strcmp(fnamecopy, l_name)) {
+ debug("RootMismatch: |%s|%s|\n", s_name,
+ l_name);
+ dentptr++;
+ continue;
+ }
+
+ if (isdir && !(dentptr->attr & ATTR_DIR))
+ return -1;
+
+ debug("RootName: %s", s_name);
+ debug(", start: 0x%x", START(dentptr));
+ debug(", size: 0x%x %s\n",
+ FAT2CPU32(dentptr->size),
+ isdir ? "(DIR)" : "");
+
+ goto rootdir_done; /* We got a match */
+ }
+ debug("END LOOP: j=%d clust_size=%d\n", j,
+ mydata->clust_size);
+
+ /*
+ * On FAT32 we must fetch the FAT entries for the next
+ * root directory clusters when a cluster has been
+ * completely processed.
+ */
+ if ((mydata->fatsize == 32) && (++j == mydata->clust_size)) {
+ int nxtsect;
+ int nxt_clust;
+
+ nxt_clust = get_fatent(mydata, root_cluster);
+
+ nxtsect = mydata->data_begin +
+ (nxt_clust * mydata->clust_size);
+
+ debug("END LOOP: sect=%d, root_clust=%d, "
+ "n_sect=%d, n_clust=%d\n",
+ cursect, root_cluster,
+ nxtsect, nxt_clust);
+
+ root_cluster = nxt_clust;
+
+ cursect = nxtsect;
+ j = 0;
} else {
- dirc = ' ';
- if (s_name[0] != 0) {
- files++;
- doit = 1;
- }
+ cursect++;
}
- if (doit) {
- if (dirc == ' ') {
- printf (" %8ld %s%c\n",
- (long) FAT2CPU32 (dentptr->size), s_name,
- dirc);
- } else {
- printf (" %s%c\n", s_name, dirc);
- }
+ }
+rootdir_done:
+
+ firsttime = 1;
+
+ while (isdir) {
+ int startsect = mydata->data_begin
+ + START(dentptr) * mydata->clust_size;
+ dir_entry dent;
+ char *nextname = NULL;
+
+ dent = *dentptr;
+ dentptr = &dent;
+
+ idx = dirdelim(subname);
+
+ if (idx >= 0) {
+ subname[idx] = '\0';
+ nextname = subname + idx + 1;
+ /* Handle multiple delimiters */
+ while (ISDIRDELIM(*nextname))
+ nextname++;
+ if (dols && *nextname == '\0')
+ firsttime = 0;
+ } else {
+ if (dols && firsttime) {
+ firsttime = 0;
+ } else {
+ isdir = 0;
+ }
}
- dentptr++;
- continue;
- }
- if (strcmp (fnamecopy, s_name) && strcmp (fnamecopy, l_name)) {
- FAT_DPRINT ("RootMismatch: |%s|%s|\n", s_name, l_name);
- dentptr++;
- continue;
- }
- if (isdir && !(dentptr->attr & ATTR_DIR))
- return -1;
- FAT_DPRINT ("RootName: %s", s_name);
- FAT_DPRINT (", start: 0x%x", START (dentptr));
- FAT_DPRINT (", size: 0x%x %s\n",
- FAT2CPU32 (dentptr->size), isdir ? "(DIR)" : "");
-
- goto rootdir_done; /* We got a match */
- }
- cursect++;
- }
- rootdir_done:
-
- firsttime = 1;
- while (isdir) {
- int startsect = mydata->data_begin
- + START (dentptr) * mydata->clust_size;
- dir_entry dent;
- char *nextname = NULL;
-
- dent = *dentptr;
- dentptr = &dent;
-
- idx = dirdelim (subname);
- if (idx >= 0) {
- subname[idx] = '\0';
- nextname = subname + idx + 1;
- /* Handle multiple delimiters */
- while (ISDIRDELIM (*nextname))
- nextname++;
- if (dols && *nextname == '\0')
- firsttime = 0;
- } else {
- if (dols && firsttime) {
- firsttime = 0;
- } else {
- isdir = 0;
- }
- }
+ if (get_dentfromdir(mydata, startsect, subname, dentptr,
+ isdir ? 0 : dols) == NULL) {
+ if (dols && !isdir)
+ return 0;
+ return -1;
+ }
- if (get_dentfromdir (mydata, startsect, subname, dentptr,
- isdir ? 0 : dols) == NULL) {
- if (dols && !isdir)
- return 0;
- return -1;
+ if (idx >= 0) {
+ if (!(dentptr->attr & ATTR_DIR))
+ return -1;
+ subname = nextname;
+ }
}
- if (idx >= 0) {
- if (!(dentptr->attr & ATTR_DIR))
- return -1;
- subname = nextname;
- }
- }
- ret = get_contents (mydata, dentptr, buffer, maxsize);
- FAT_DPRINT ("Size: %d, got: %ld\n", FAT2CPU32 (dentptr->size), ret);
+ ret = get_contents(mydata, dentptr, buffer, maxsize);
+ debug("Size: %d, got: %ld\n", FAT2CPU32(dentptr->size), ret);
- return ret;
+ return ret;
}
-
-int
-file_fat_detectfs(void)
+int file_fat_detectfs (void)
{
- boot_sector bs;
- volume_info volinfo;
- int fatsize;
- char vol_label[12];
+ boot_sector bs;
+ volume_info volinfo;
+ int fatsize;
+ char vol_label[12];
- if(cur_dev==NULL) {
+ if (cur_dev == NULL) {
printf("No current device\n");
return 1;
}
+
#if defined(CONFIG_CMD_IDE) || \
defined(CONFIG_CMD_MG_DISK) || \
defined(CONFIG_CMD_SATA) || \
defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC)
printf("Interface: ");
- switch(cur_dev->if_type) {
- case IF_TYPE_IDE : printf("IDE"); break;
- case IF_TYPE_SATA : printf("SATA"); break;
- case IF_TYPE_SCSI : printf("SCSI"); break;
- case IF_TYPE_ATAPI : printf("ATAPI"); break;
- case IF_TYPE_USB : printf("USB"); break;
- case IF_TYPE_DOC : printf("DOC"); break;
- case IF_TYPE_MMC : printf("MMC"); break;
- default : printf("Unknown");
- }
- printf("\n Device %d: ",cur_dev->dev);
+ switch (cur_dev->if_type) {
+ case IF_TYPE_IDE:
+ printf("IDE");
+ break;
+ case IF_TYPE_SATA:
+ printf("SATA");
+ break;
+ case IF_TYPE_SCSI:
+ printf("SCSI");
+ break;
+ case IF_TYPE_ATAPI:
+ printf("ATAPI");
+ break;
+ case IF_TYPE_USB:
+ printf("USB");
+ break;
+ case IF_TYPE_DOC:
+ printf("DOC");
+ break;
+ case IF_TYPE_MMC:
+ printf("MMC");
+ break;
+ default:
+ printf("Unknown");
+ }
+
+ printf("\n Device %d: ", cur_dev->dev);
dev_print(cur_dev);
#endif
- if(read_bootsectandvi(&bs, &volinfo, &fatsize)) {
+
+ if (read_bootsectandvi(&bs, &volinfo, &fatsize)) {
printf("\nNo valid FAT fs found\n");
return 1;
}
- memcpy (vol_label, volinfo.volume_label, 11);
+
+ memcpy(vol_label, volinfo.volume_label, 11);
vol_label[11] = '\0';
- volinfo.fs_type[5]='\0';
- printf("Partition %d: Filesystem: %s \"%s\"\n"
- ,cur_part,volinfo.fs_type,vol_label);
+ volinfo.fs_type[5] = '\0';
+
+ printf("Partition %d: Filesystem: %s \"%s\"\n", cur_part,
+ volinfo.fs_type, vol_label);
+
return 0;
}
-
-int
-file_fat_ls(const char *dir)
+int file_fat_ls (const char *dir)
{
return do_fat_read(dir, NULL, 0, LS_YES);
}
-
-long
-file_fat_read(const char *filename, void *buffer, unsigned long maxsize)
+long file_fat_read (const char *filename, void *buffer, unsigned long maxsize)
{
- printf("reading %s\n",filename);
+ printf("reading %s\n", filename);
return do_fat_read(filename, buffer, maxsize, LS_NO);
}
const char *
file_getfsname(int idx)
{
- if (idx < 0 || idx >= NUM_FILESYS) return NULL;
+ if (idx < 0 || idx >= NUM_FILESYS)
+ return NULL;
return filesystems[idx].name;
}
-
static void
pathcpy(char *dest, const char *src)
{
return;
}
++dest;
- if (ISDIRDELIM(*src)) {
+
+ if (ISDIRDELIM(*src))
while (ISDIRDELIM(*src)) src++;
- } else {
+ else
src++;
- }
} while (1);
}
-
int
file_cd(const char *path)
{
return 0;
}
-
int
file_detectfs(void)
{
return current_filesystem;
}
-
int
file_ls(const char *dir)
{
return filesystems[current_filesystem].ls(arg);
}
-
long
file_read(const char *filename, void *buffer, unsigned long maxsize)
{
#endif /* CONFIG_GENIETV */
-/*** GTH ******************************************************/
-
-#ifdef CONFIG_GTH
-#ifdef CONFIG_FEC_ENET
-#define FEC_ENET /* use FEC for EThernet */
-#endif /* CONFIG_FEC_ETHERNET */
-
-/* This ENET stuff is for GTH 10 Mbit ( SCC ) */
-#define PROFF_ENET PROFF_SCC1
-#define CPM_CR_ENET CPM_CR_CH_SCC1
-#define SCC_ENET 0
-
-#define PA_ENET_RXD ((ushort)0x0001) /* PA15 */
-#define PA_ENET_TXD ((ushort)0x0002) /* PA14 */
-#define PA_ENET_TCLK ((ushort)0x0800) /* PA4 */
-#define PA_ENET_RCLK ((ushort)0x0400) /* PA5 */
-
-#define PB_ENET_TENA ((uint)0x00001000) /* PB19 */
-
-#define PC_ENET_CLSN ((ushort)0x0010) /* PC11 */
-#define PC_ENET_RENA ((ushort)0x0020) /* PC10 */
-
-/* NOTE. This is reset for 10Mbit port only */
-#define PC_ENET_RESET ((ushort)0x0100) /* PC 7 */
-
-#define SICR_ENET_MASK ((uint)0x000000ff)
-
-/* TCLK PA4 -->CLK4, RCLK PA5 -->CLK3 */
-#define SICR_ENET_CLKRT ((uint)0x00000037)
-
-#endif /* CONFIG_GTH */
-
/*** HERMES-PRO ******************************************************/
/* The HERMES-PRO uses the FEC on a MPC860T for Ethernet */
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
#define PCI_SPEED 33333000 /* CPLD currenlty does not have PCI setup info */
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCI2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
/* DDR Setup */
#define CONFIG_FSL_DDR2
+++ /dev/null
-/*
- * Parameters for GTH board
- * Based on FADS860T
- * by thomas.lange@corelatus.com
-
- * A collection of structures, addresses, and values associated with
- * the Motorola 860T FADS board. Copied from the MBX stuff.
- * Magnus Damm added defines for 8xxrom and extended bd_info.
- * Helmut Buchsbaum added bitvalues for BCSRx
- *
- * Copyright (c) 1998 Dan Malek (dmalek@jlc.net)
- */
-
-/*
- * ff000000 -> ff00ffff : IMAP internal in the cpu
- * e0000000 -> ennnnnnn : pcmcia
- * 98000000 -> 983nnnnn : FPGA 4MB
- * 90000000 -> 903nnnnn : FPGA 4MB
- * 80000000 -> 80nnnnnn : flash connected to CS0, final ( real ) location
- * 00000000 -> nnnnnnnn : sdram
- */
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#include <mpc8xx_irq.h>
-
-#define CONFIG_MPC860 1
-#define CONFIG_MPC860T 1
-#define CONFIG_GTH 1
-
-#define CONFIG_MISC_INIT_R 1
-
-#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
-#undef CONFIG_8xx_CONS_SMC2
-#undef CONFIG_8xx_CONS_NONE
-#define CONFIG_BAUDRATE 9600
-#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-
-#define MPC8XX_FACT 3 /* Multiply by 3 */
-#define MPC8XX_XIN 16384000 /* 16.384 MHz */
-#define MPC8XX_HZ ((MPC8XX_XIN) * (MPC8XX_FACT))
-
-#define CONFIG_BOOTDELAY 1 /* autoboot after 0 seconds */
-
-#define CONFIG_ENV_OVERWRITE 1 /* Allow change of ethernet address */
-
-#define CONFIG_BOOT_RETRY_TIME 5 /* Retry boot in 5 secs */
-
-#define CONFIG_RESET_TO_RETRY 1 /* If timeout waiting for command, perform a reset */
-
-/* Only interrupt boot if space is pressed */
-/* If a long serial cable is connected but */
-/* other end is dead, garbage will be read */
-#define CONFIG_AUTOBOOT_KEYED 1
-#define CONFIG_AUTOBOOT_PROMPT \
- "Press space to abort autoboot in %d second\n", bootdelay
-#define CONFIG_AUTOBOOT_DELAY_STR "d"
-#define CONFIG_AUTOBOOT_STOP_STR " "
-
-#if 0
-/* Net boot */
-/* Loads a tftp image and starts it */
-#define CONFIG_BOOTCOMMAND "bootp;bootm 100000" /* autoboot command */
-#define CONFIG_BOOTARGS "panic=1"
-#else
-/* Compact flash boot */
-#define CONFIG_BOOTARGS "panic=1 root=/dev/hda7"
-#define CONFIG_BOOTCOMMAND "disk 100000 0:5;bootm 100000"
-#endif
-
-/* Enable watchdog */
-#define CONFIG_WATCHDOG 1
-
-/* choose SCC1 ethernet (10BASET on motherboard)
- * or FEC ethernet (10/100 on daughterboard)
- */
-#if 1
-#define CONFIG_SCC1_ENET 1 /* use SCC1 ethernet */
-#undef CONFIG_FEC_ENET /* disable FEC ethernet */
-#define CONFIG_SYS_DISCOVER_PHY
-#else
-#undef CONFIG_SCC1_ENET /* disable SCC1 ethernet */
-#define CONFIG_FEC_ENET 1 /* use FEC ethernet */
-#define CONFIG_SYS_DISCOVER_PHY
-#endif
-#if defined(CONFIG_SCC1_ENET) && defined(CONFIG_FEC_ENET)
-#error Both CONFIG_SCC1_ENET and CONFIG_FEC_ENET configured
-#endif
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_IDE
-
-
-#define CONFIG_MAC_PARTITION
-#define CONFIG_DOS_PARTITION
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_PROMPT "=>" /* Monitor Command Prompt */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x0400000 /* 1 ... 4 MB in DRAM */
-
-/* Default location to load data from net */
-#define CONFIG_SYS_LOAD_ADDR 0x100000
-
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400 }
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR 0xFF000000
-#define CONFIG_SYS_IMMR_SIZE ((uint)(64 * 1024))
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-
-#define CONFIG_SYS_FLASH_BASE 0x80000000
-
-#define CONFIG_SYS_FLASH_SIZE ((uint)(8 * 1024 * 1024)) /* max 8Mbyte */
-
-#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
-
-#define CONFIG_SYS_MONITOR_BASE TEXT_BASE
-
-#define CONFIG_SYS_MALLOC_LEN (384 << 10) /* Reserve 384 kB for malloc() */
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-#undef CONFIG_ENV_IS_IN_EEPROM
-#define CONFIG_ENV_OFFSET 0x000E0000
-#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
-
-#define CONFIG_ENV_SECT_SIZE 0x50000 /* see README - env sector total size */
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control 11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#if defined(CONFIG_WATCHDOG)
-#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
- SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP)
-#else
-#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
-#endif
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration 11-6
- *-----------------------------------------------------------------------
- * PCMCIA config., multi-function pin tri-state
- */
-#define CONFIG_SYS_SIUMCR (SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control 11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
-
-/*----------------------------------------------------------------------
- * RTCSC - Real-Time Clock Status and Control Register 11-27
- *-----------------------------------------------------------------------
- */
-
-/*FIXME dont use for now */
-/*#define CONFIG_SYS_RTCSC (RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE) */
-/*#define CONFIG_SYS_RTCSC (RTCSC_RTF) */
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control 11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR (PISCR_PS | PISCR_PITF)
-/* PITE */
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30
- *-----------------------------------------------------------------------
- * set the PLL, the low-power modes and the reset control (15-29)
- */
-#define CONFIG_SYS_PLPRCR (((MPC8XX_FACT-1) << PLPRCR_MF_SHIFT) | \
- PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register 15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-
-/* FIXME check values */
-#define SCCR_MASK SCCR_EBDF11
-#define CONFIG_SYS_SCCR (SCCR_TBS|SCCR_RTSEL|SCCR_COM00|SCCR_DFSYNC00|SCCR_DFBRG00|SCCR_DFNL000|SCCR_DFNH000|SCCR_DFLCD000|SCCR_DFALCD00)
-
- /*-----------------------------------------------------------------------
- *
- *-----------------------------------------------------------------------
- *
- */
-#define CONFIG_SYS_DER 0
-
-/* Because of the way the 860 starts up and assigns CS0 the
-* entire address space, we have to set the memory controller
-* differently. Normally, you write the option register
-* first, and then enable the chip select by writing the
-* base register. For CS0, you must write the base register
-* first, followed by the option register.
-*/
-
-/*
- * Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-/* the other CS:s are determined by looking at parameters in BCSRx */
-
-#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
-
-#define CONFIG_SYS_REMAP_OR_AM 0xFF800000 /* 4 MB OR addr mask */
-#define CONFIG_SYS_PRELIM_OR_AM 0xFF800000 /* OR addr mask */
-
-#define FPGA_2_BASE 0x90000000
-#define FPGA_3_BASE 0x98000000
-
-/* FLASH timing: ACS = 10, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 0 */
-#define CONFIG_SYS_OR_TIMING_FLASH (OR_CSNT_SAM | OR_ACS_DIV4 | OR_BI | OR_SCY_3_CLK | OR_TRLX)
-
-#define CONFIG_SYS_OR0_REMAP (CONFIG_SYS_REMAP_OR_AM | CONFIG_SYS_OR_TIMING_FLASH)
-
-
-#define CONFIG_SYS_OR0_PRELIM (CONFIG_SYS_PRELIM_OR_AM | CONFIG_SYS_OR_TIMING_FLASH) /* 1 Mbyte until detected and only 1 Mbyte is needed*/
-#define CONFIG_SYS_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V | BR_PS_16 )
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
-#define CONFIG_ETHADDR DE:AD:BE:EF:00:01 /* Ethernet address */
-
-#ifdef CONFIG_MPC860T
-
-/* Interrupt level assignments.
-*/
-#define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */
-
-#endif /* CONFIG_MPC860T */
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-/* Machine type
-*/
-#define _MACH_8xx (_MACH_gth)
-
-#ifdef CONFIG_MPC860
-#define PCMCIA_SLOT_A 1
-#define CONFIG_PCMCIA_SLOT_A 1
-#endif
-
-#define CONFIG_SYS_PCMCIA_MEM_ADDR (0xE0000000)
-#define CONFIG_SYS_PCMCIA_MEM_SIZE ( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_DMA_ADDR (0xE4000000)
-#define CONFIG_SYS_PCMCIA_DMA_SIZE ( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_ATTRB_ADDR (0xE8000000)
-#define CONFIG_SYS_PCMCIA_ATTRB_SIZE ( 64 << 20 )
-#define CONFIG_SYS_PCMCIA_IO_ADDR (0xEC000000)
-#define CONFIG_SYS_PCMCIA_IO_SIZE ( 64 << 20 )
-
-#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */
-#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
-#undef CONFIG_IDE_LED /* LED for ide not supported */
-#undef CONFIG_IDE_RESET /* reset for ide not supported */
-
-#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
-#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
-
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
-#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
-/* Offset for data I/O */
-#define CONFIG_SYS_ATA_DATA_OFFSET (CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320)
-/* Offset for normal register accesses */
-#define CONFIG_SYS_ATA_REG_OFFSET (2 * CONFIG_SYS_PCMCIA_MEM_SIZE + 0x320)
-/* Offset for alternate registers */
-#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
-
-#define CONFIG_8xx_GCLK_FREQ MPC8XX_HZ /* Force it - dont measure it */
-
-#define PA_FRONT_LED ((u16)0x4) /* PA 13 */
-#define PA_FL_CONFIG ((u16)0x20) /* PA 10 */
-#define PA_FL_CE ((u16)0x1000) /* PA 3 */
-
-#define PB_ID_GND ((u32)1) /* PB 31 */
-#define PB_REV_1 ((u32)2) /* PB 30 */
-#define PB_REV_0 ((u32)4) /* PB 29 */
-#define PB_BLUE_LED ((u32)0x400) /* PB 21 */
-#define PB_EEPROM ((u32)0x800) /* PB 20 */
-#define PB_ID_3 ((u32)0x2000) /* PB 18 */
-#define PB_ID_2 ((u32)0x4000) /* PB 17 */
-#define PB_ID_1 ((u32)0x8000) /* PB 16 */
-#define PB_ID_0 ((u32)0x10000) /* PB 15 */
-
-/* NOTE. This is reset for 100Mbit port only */
-#define PC_ENET100_RESET ((ushort)0x0080) /* PC 8 */
-
-#endif /* __CONFIG_H */
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
+#define CONFIG_SYS_HAS_SERDES /* has SERDES */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_E1000 1 /* Defind e1000 pci Ethernet card*/
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#endif
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR + 0x8000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR + 0xa000)
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR + 0x9000)
-#define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_CCSRBAR + 0xb000)
-
/* DDR Setup */
#define CONFIG_VERY_BIG_RAM
#define CONFIG_FSL_DDR2
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_CCSRBAR+0xb000)
-
/* DDR Setup */
#define CONFIG_FSL_DDR2
#undef CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCI2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
-
/* DDR Setup */
#define CONFIG_FSL_DDR2
#undef CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
-
/* DDR Setup */
#define CONFIG_FSL_DDR2
#undef CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#endif
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
-
/* DDR Setup */
#define CONFIG_FSL_DDR3
#undef CONFIG_FSL_DDR_INTERACTIVE
#endif
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
-
/* DDR Setup */
#define CONFIG_VERY_BIG_RAM
#define CONFIG_FSL_DDR2
#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-
#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR+0x2c000)
/* DDR Setup */
/*
- * Copyright 2006 Freescale Semiconductor.
+ * Copyright 2006, 2010 Freescale Semiconductor.
*
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
#ifndef CONFIG_RIO /* RIO/PCI are mutually exclusive */
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
-#define CONFIG_PCI1 1 /* PCIE controler 1 (ULI bridge) */
-#define CONFIG_PCI2 1 /* PCIE controler 2 (slot) */
+#define CONFIG_PCIE1 1 /* PCIE controler 1 (ULI bridge) */
+#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot) */
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */
#endif
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW
#endif
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCI2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-
/*
* DDR Setup
*/
* Addresses are mapped 1-1.
*/
-#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000
+#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCI1_MEM_BUS 0xe0000000
-#define CONFIG_SYS_PCI1_MEM_PHYS 0x0000000c00000000ULL
+#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS 0x0000000c00000000ULL
#else
-#define CONFIG_SYS_PCI1_MEM_BUS CONFIG_SYS_PCI1_MEM_VIRT
-#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_VIRT
+#define CONFIG_SYS_PCIE1_MEM_BUS CONFIG_SYS_PCIE1_MEM_VIRT
+#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_VIRT
#endif
-#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCI1_IO_BUS 0x00000000
-#define CONFIG_SYS_PCI1_IO_VIRT 0xffc00000
-#define CONFIG_SYS_PCI1_IO_PHYS (CONFIG_SYS_PCI1_IO_VIRT \
+#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
+#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE1_IO_VIRT 0xffc00000
+#define CONFIG_SYS_PCIE1_IO_PHYS (CONFIG_SYS_PCIE1_IO_VIRT \
| CONFIG_SYS_PHYS_ADDR_HIGH)
-#define CONFIG_SYS_PCI1_IO_SIZE 0x00010000 /* 64K */
+#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64K */
#ifdef CONFIG_PHYS_64BIT
/*
- * Use the same PCI bus address on PCI1 and PCI2 if we have PHYS_64BIT.
+ * Use the same PCI bus address on PCIE1 and PCIE2 if we have PHYS_64BIT.
* This will increase the amount of PCI address space available for
* for mapping RAM.
*/
-#define CONFIG_SYS_PCI2_MEM_BUS CONFIG_SYS_PCI1_MEM_BUS
+#define CONFIG_SYS_PCIE2_MEM_BUS CONFIG_SYS_PCIE1_MEM_BUS
#else
-#define CONFIG_SYS_PCI2_MEM_BUS (CONFIG_SYS_PCI1_MEM_BUS \
- + CONFIG_SYS_PCI1_MEM_SIZE)
+#define CONFIG_SYS_PCIE2_MEM_BUS (CONFIG_SYS_PCIE1_MEM_BUS \
+ + CONFIG_SYS_PCIE1_MEM_SIZE)
#endif
-#define CONFIG_SYS_PCI2_MEM_VIRT (CONFIG_SYS_PCI1_MEM_VIRT \
- + CONFIG_SYS_PCI1_MEM_SIZE)
-#define CONFIG_SYS_PCI2_MEM_PHYS (CONFIG_SYS_PCI1_MEM_PHYS \
- + CONFIG_SYS_PCI1_MEM_SIZE)
-#define CONFIG_SYS_PCI2_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCI2_IO_BUS 0x00000000
-#define CONFIG_SYS_PCI2_IO_VIRT (CONFIG_SYS_PCI1_IO_VIRT \
- + CONFIG_SYS_PCI1_IO_SIZE)
-#define CONFIG_SYS_PCI2_IO_PHYS (CONFIG_SYS_PCI1_IO_PHYS \
- + CONFIG_SYS_PCI1_IO_SIZE)
-#define CONFIG_SYS_PCI2_IO_SIZE CONFIG_SYS_PCI1_IO_SIZE
+#define CONFIG_SYS_PCIE2_MEM_VIRT (CONFIG_SYS_PCIE1_MEM_VIRT \
+ + CONFIG_SYS_PCIE1_MEM_SIZE)
+#define CONFIG_SYS_PCIE2_MEM_PHYS (CONFIG_SYS_PCIE1_MEM_PHYS \
+ + CONFIG_SYS_PCIE1_MEM_SIZE)
+#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
+#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE2_IO_VIRT (CONFIG_SYS_PCIE1_IO_VIRT \
+ + CONFIG_SYS_PCIE1_IO_SIZE)
+#define CONFIG_SYS_PCIE2_IO_PHYS (CONFIG_SYS_PCIE1_IO_PHYS \
+ + CONFIG_SYS_PCIE1_IO_SIZE)
+#define CONFIG_SYS_PCIE2_IO_SIZE CONFIG_SYS_PCIE1_IO_SIZE
#if defined(CONFIG_PCI)
#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS 1
/*PCIE video card used*/
-#define VIDEO_IO_OFFSET CONFIG_SYS_PCI2_IO_VIRT
+#define VIDEO_IO_OFFSET CONFIG_SYS_PCIE2_IO_VIRT
/*PCI video card used*/
-/*#define VIDEO_IO_OFFSET CONFIG_SYS_PCI1_IO_VIRT*/
+/*#define VIDEO_IO_OFFSET CONFIG_SYS_PCIE1_IO_VIRT*/
/* video */
#define CONFIG_VIDEO
#define CONFIG_ATI_RADEON_FB
#define CONFIG_VIDEO_LOGO
/*#define CONFIG_CONSOLE_CURSOR*/
-#define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_PCI2_IO_VIRT
+#define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_PCIE2_IO_VIRT
#endif
#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_SYS_SCSI_MAXDEVICE CONFIG_SYS_SCSI_MAX_DEVICE
#endif
-#define CONFIG_MPC86XX_PCI2
-
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_SYS_IBAT1U CONFIG_SYS_DBAT1U
/* if CONFIG_PCI:
- * BAT2 PCI1 and PCI1 MEM
+ * BAT2 PCIE1 and PCIE1 MEM
* if CONFIG_RIO
* BAT2 Rapidio Memory
*/
#ifdef CONFIG_PCI
-#define CONFIG_SYS_DBAT2L (BAT_PHYS_ADDR(CONFIG_SYS_PCI1_MEM_PHYS) \
+#define CONFIG_SYS_DBAT2L (BAT_PHYS_ADDR(CONFIG_SYS_PCIE1_MEM_PHYS) \
| BATL_PP_RW | BATL_CACHEINHIBIT \
| BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U (CONFIG_SYS_PCI1_MEM_VIRT | BATU_BL_1G \
+#define CONFIG_SYS_DBAT2U (CONFIG_SYS_PCIE1_MEM_VIRT | BATU_BL_1G \
| BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT2L (BAT_PHYS_ADDR(CONFIG_SYS_PCI1_MEM_PHYS) \
+#define CONFIG_SYS_IBAT2L (BAT_PHYS_ADDR(CONFIG_SYS_PCIE1_MEM_PHYS) \
| BATL_PP_RW | BATL_CACHEINHIBIT)
#define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U
#else /* CONFIG_RIO */
#endif
/*
- * BAT4 PCI1_IO and PCI2_IO
+ * BAT4 PCIE1_IO and PCIE2_IO
*/
-#define CONFIG_SYS_DBAT4L (BAT_PHYS_ADDR(CONFIG_SYS_PCI1_IO_PHYS) \
+#define CONFIG_SYS_DBAT4L (BAT_PHYS_ADDR(CONFIG_SYS_PCIE1_IO_PHYS) \
| BATL_PP_RW | BATL_CACHEINHIBIT \
| BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCI1_IO_VIRT | BATU_BL_128K \
+#define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCIE1_IO_VIRT | BATU_BL_128K \
| BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT4L (BAT_PHYS_ADDR(CONFIG_SYS_PCI1_IO_PHYS) \
+#define CONFIG_SYS_IBAT4L (BAT_PHYS_ADDR(CONFIG_SYS_PCIE1_IO_PHYS) \
| BATL_PP_RW | BATL_CACHEINHIBIT)
#define CONFIG_SYS_IBAT4U CONFIG_SYS_DBAT4U
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
+#define CONFIG_SYS_HAS_SERDES /* has SERDES */
#define CONFIG_PHYS_64BIT
#define CONFIG_ENABLE_36BIT_PHYS
#define CONFIG_SYS_CCSRBAR_PHYS 0xfffe00000ull
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR + 0x9000) /* pci0 */
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR + 0xa000) /* pci1 */
-#define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_CCSRBAR + 0xb000) /* pci2 */
-
/* DDR Setup */
#define CONFIG_DDR_SPD
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#endif
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
-
/* DDR Setup */
#define CONFIG_FSL_DDR2
#undef CONFIG_FSL_DDR_INTERACTIVE
#endif
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
-
/* DDR Setup */
#define CONFIG_VERY_BIG_RAM
#define CONFIG_FSL_DDR3 1
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR + 0x8000)
-#define CONFIG_SYS_PCI2_ADDR (CONFIG_SYS_CCSRBAR + 0x9000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR + 0xa000)
-
/*
* DDR Setup
*/
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR + 0x8000)
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR + 0x9000)
/*
* Diagnostics
#define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR + 0x8000)
/*
* Diagnostics
#define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR + 0xa000)
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR + 0x9000)
/*
* Diagnostics
#define CONFIG_SYS_PCIE0_XCFGBASE 0xc3000000
#define CONFIG_SYS_PCIE1_XCFGBASE 0xc3001000
+/*
+ * BCSR bits as defined in the Canyonlands board user manual.
+ */
+#define BCSR_USBCTRL_OTG_RST 0x32
+#define BCSR_USBCTRL_HOST_RST 0x01
+#define BCSR_SELECT_PCIE 0x10
+
#define CONFIG_SYS_PCIE0_UTLBASE 0xc08010000ULL /* 36bit physical addr */
/* base address of inbound PCIe window */
#define CONFIG_SYS_USB_OHCI_REGS_BASE (CONFIG_SYS_AHB_BASE | 0xd0000)
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "ppc440"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
+#define CONFIG_SYS_USB_OHCI_BOARD_INIT
#endif
/*
*/
#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ECCTEST
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_PCI
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */
#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCI2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000)
-
/* DDR Setup */
#define CONFIG_FSL_DDR2
#undef CONFIG_FSL_DDR_INTERACTIVE
#define CONFIG_SYS_SCRATCH_VA 0xe8000000
#define CONFIG_PCI 1 /* Enable PCIE */
-#define CONFIG_PCI1 1 /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCI2 1 /* PCIE controler 2 (slot 2) */
+#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW
-#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000)
-#define CONFIG_SYS_PCI2_ADDR (CONFIG_SYS_CCSRBAR+0x9000)
-
/*
* DDR Setup
*/
* General PCI
* Addresses are mapped 1-1.
*/
-#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BUS
-#define CONFIG_SYS_PCI1_MEM_VIRT CONFIG_SYS_PCI1_MEM_BUS
-#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCI1_IO_BUS 0xe2000000
-#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BUS
-#define CONFIG_SYS_PCI1_IO_VIRT CONFIG_SYS_PCI1_IO_BUS
-#define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */
-
-#define CONFIG_SYS_PCI2_MEM_BUS 0xa0000000
-#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BUS
-#define CONFIG_SYS_PCI2_MEM_VIRT CONFIG_SYS_PCI2_MEM_BUS
-#define CONFIG_SYS_PCI2_MEM_SIZE 0x10000000 /* 256M */
-#define CONFIG_SYS_PCI2_IO_BUS 0xe3000000
-#define CONFIG_SYS_PCI2_IO_PHYS CONFIG_SYS_PCI2_IO_BUS
-#define CONFIG_SYS_PCI2_IO_VIRT CONFIG_SYS_PCI2_IO_BUS
-#define CONFIG_SYS_PCI2_IO_SIZE 0x1000000 /* 16M */
+#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS
+#define CONFIG_SYS_PCIE1_MEM_VIRT CONFIG_SYS_PCIE1_MEM_BUS
+#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
+#define CONFIG_SYS_PCIE1_IO_BUS 0xe2000000
+#define CONFIG_SYS_PCIE1_IO_PHYS CONFIG_SYS_PCIE1_IO_BUS
+#define CONFIG_SYS_PCIE1_IO_VIRT CONFIG_SYS_PCIE1_IO_BUS
+#define CONFIG_SYS_PCIE1_IO_SIZE 0x1000000 /* 16M */
+
+#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000
+#define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BUS
+#define CONFIG_SYS_PCIE2_MEM_VIRT CONFIG_SYS_PCIE2_MEM_BUS
+#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCIE2_IO_BUS 0xe3000000
+#define CONFIG_SYS_PCIE2_IO_PHYS CONFIG_SYS_PCIE2_IO_BUS
+#define CONFIG_SYS_PCIE2_IO_VIRT CONFIG_SYS_PCIE2_IO_BUS
+#define CONFIG_SYS_PCIE2_IO_SIZE 0x1000000 /* 16M */
#if defined(CONFIG_PCI)
* 0xa000_0000 512M PCI-Express 2 Memory
* Changed it for operating from 0xd0000000
*/
-#define CONFIG_SYS_DBAT1L ( CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW \
+#define CONFIG_SYS_DBAT1L ( CONFIG_SYS_PCIE1_MEM_PHYS | BATL_PP_RW \
| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCI1_MEM_VIRT | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCIE1_MEM_VIRT | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCIE1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
#define CONFIG_SYS_IBAT1U CONFIG_SYS_DBAT1U
/*
* 0xe300_0000 16M PCI-Express 2 I/0
* Note that this is at 0xe0000000
*/
-#define CONFIG_SYS_DBAT4L ( CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW \
+#define CONFIG_SYS_DBAT4L ( CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW \
| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCI1_IO_VIRT | BATU_BL_32M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCIE1_IO_VIRT | BATU_BL_32M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
#define CONFIG_SYS_IBAT4U CONFIG_SYS_DBAT4U
/*
#define CONFIG_SYS_FLASH_SIZE (64 << 20)
#define CONFIG_SYS_FPGA1_BASE 0xe0000000
-#define CONFIG_SYS_FPGA2_BASE 0xe0100000
-#define CONFIG_SYS_FPGA3_BASE 0xe0200000
+#define CONFIG_SYS_FPGA2_BASE 0xe2000000
+#define CONFIG_SYS_FPGA3_BASE 0xe4000000
#define CONFIG_SYS_BOOT_BASE_ADDR 0xFF000000 /* EBC Boot Space */
#define CONFIG_SYS_FLASH_BASE_PHYS_H 0x4
(((u64)CONFIG_SYS_FLASH_BASE_PHYS_H << 32) \
| (u64)CONFIG_SYS_FLASH_BASE_PHYS_L)
-#define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 64k */
+#define CONFIG_SYS_OCM_BASE 0xE7000000 /* OCM: 64k */
#define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */
#define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000
#define CONFIG_SYS_PERIPHERAL_BASE 0xEF600000 /* internal periph. */
-#define CONFIG_SYS_AHB_BASE 0xE2000000 /* int. AHB periph. */
-
/*
* Initial RAM & stack pointer (placed in OCM)
*/
#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD reset cmd */
+#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* use status poll method */
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
/*
* DDR2 SDRAM
*/
+#define CONFIG_SYS_MBYTES_SDRAM 256
+#define CONFIG_DDR_ECC
#define CONFIG_AUTOCALIB "silent\0" /* default is non-verbose */
#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION /* IBM DDR autocalibration */
#define DEBUG_PPC4xx_DDR_AUTOCALIBRATION /* dynamic DDR autocal debug */
#undef CONFIG_PPC4xx_DDR_METHOD_A
+#define CONFIG_DDR_RFDC_FIXED 0x000001D7 /* optimal value */
/* DDR1/2 SDRAM Device Control Register Data Values */
/* Memory Queue */
#define CONFIG_SYS_SDRAM_CONF1HB 0x80001C80
#define CONFIG_SYS_SDRAM_CONFPATHB 0x10a68000
-#define CONFIG_DDR_ECC
-#define CONFIG_SYS_MBYTES_SDRAM 256
-
#define CAS_LATENCY JEDEC_MA_MR_CL_DDR2_5_0_CLK
/* DDR1/2 SDRAM Device Control Register Data Values */
* Commands additional to the ones defined in amcc-common.h
*/
#define CONFIG_CMD_CHIP_CONFIG
+#define CONFIG_CMD_ECCTEST
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
#define CONFIG_SYS_EBC_PB1AP (EBC_BXAP_BME_DISABLED | \
EBC_BXAP_TWT_ENCODE(5) | \
EBC_BXAP_CSN_ENCODE(0) | \
- EBC_BXAP_OEN_ENCODE(4) | \
+ EBC_BXAP_OEN_ENCODE(3) | \
EBC_BXAP_WBN_ENCODE(0) | \
EBC_BXAP_WBF_ENCODE(0) | \
EBC_BXAP_TH_ENCODE(1) | \
EBC_BXAP_BEM_RW | \
EBC_BXAP_PEN_DISABLED)
#define CONFIG_SYS_EBC_PB1CR (EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FPGA1_BASE) | \
- EBC_BXCR_BS_1MB | \
+ EBC_BXCR_BS_32MB | \
EBC_BXCR_BU_RW | \
EBC_BXCR_BW_32BIT)
#define CONFIG_SYS_EBC_PB2AP (EBC_BXAP_BME_DISABLED | \
EBC_BXAP_TWT_ENCODE(5) | \
EBC_BXAP_CSN_ENCODE(0) | \
- EBC_BXAP_OEN_ENCODE(4) | \
+ EBC_BXAP_OEN_ENCODE(3) | \
EBC_BXAP_WBN_ENCODE(0) | \
EBC_BXAP_WBF_ENCODE(0) | \
EBC_BXAP_TH_ENCODE(1) | \
EBC_BXAP_BEM_RW | \
EBC_BXAP_PEN_DISABLED)
#define CONFIG_SYS_EBC_PB2CR (EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FPGA2_BASE) | \
- EBC_BXCR_BS_1MB | \
+ EBC_BXCR_BS_16MB | \
EBC_BXCR_BU_RW | \
EBC_BXCR_BW_32BIT)
#define CONFIG_SYS_EBC_PB3AP (EBC_BXAP_BME_DISABLED | \
EBC_BXAP_TWT_ENCODE(5) | \
EBC_BXAP_CSN_ENCODE(0) | \
- EBC_BXAP_OEN_ENCODE(4) | \
+ EBC_BXAP_OEN_ENCODE(3) | \
EBC_BXAP_WBN_ENCODE(0) | \
EBC_BXAP_WBF_ENCODE(0) | \
EBC_BXAP_TH_ENCODE(1) | \
EBC_BXAP_BEM_RW | \
EBC_BXAP_PEN_DISABLED)
#define CONFIG_SYS_EBC_PB3CR (EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FPGA3_BASE) | \
- EBC_BXCR_BS_1MB | \
+ EBC_BXCR_BS_16MB | \
EBC_BXCR_BU_RW | \
EBC_BXCR_BW_32BIT)
#define SECTOR_SIZE FS_BLOCK_SIZE
-#define FS_BLOCK_SIZE 512
+#define FS_BLOCK_SIZE 512
#if FS_BLOCK_SIZE != SECTOR_SIZE
#error FS_BLOCK_SIZE != SECTOR_SIZE - This code needs to be fixed!
#define SIGNLEN 8
/* File attributes */
-#define ATTR_RO 1
-#define ATTR_HIDDEN 2
-#define ATTR_SYS 4
-#define ATTR_VOLUME 8
-#define ATTR_DIR 16
-#define ATTR_ARCH 32
+#define ATTR_RO 1
+#define ATTR_HIDDEN 2
+#define ATTR_SYS 4
+#define ATTR_VOLUME 8
+#define ATTR_DIR 16
+#define ATTR_ARCH 32
-#define ATTR_VFAT (ATTR_RO | ATTR_HIDDEN | ATTR_SYS | ATTR_VOLUME)
+#define ATTR_VFAT (ATTR_RO | ATTR_HIDDEN | ATTR_SYS | ATTR_VOLUME)
#define DELETED_FLAG ((char)0xe5) /* Marks deleted files when in name[0] */
#define aRING 0x05 /* Used as special character in name[0] */
-/* Indicates that the entry is the last long entry in a set of long
+/*
+ * Indicates that the entry is the last long entry in a set of long
* dir entries
*/
#define LAST_LONG_ENTRY_MASK 0x40
/* Flags telling whether we should read a file or list a directory */
-#define LS_NO 0
-#define LS_YES 1
-#define LS_DIR 1
-#define LS_ROOT 2
+#define LS_NO 0
+#define LS_YES 1
+#define LS_DIR 1
+#define LS_ROOT 2
-#ifdef DEBUG
-#define FAT_DPRINT(args...) printf(args)
-#else
-#define FAT_DPRINT(args...)
-#endif
-#define FAT_ERROR(arg) printf(arg)
-
-#define ISDIRDELIM(c) ((c) == '/' || (c) == '\\')
+#define ISDIRDELIM(c) ((c) == '/' || (c) == '\\')
#define FSTYPE_NONE (-1)
} dir_entry;
typedef struct dir_slot {
- __u8 id; /* Sequence number for slot */
- __u8 name0_4[10]; /* First 5 characters in name */
- __u8 attr; /* Attribute byte */
- __u8 reserved; /* Unused */
- __u8 alias_checksum;/* Checksum for 8.3 alias */
- __u8 name5_10[12]; /* 6 more characters in name */
- __u16 start; /* Unused */
- __u8 name11_12[4]; /* Last 2 characters in name */
+ __u8 id; /* Sequence number for slot */
+ __u8 name0_4[10]; /* First 5 characters in name */
+ __u8 attr; /* Attribute byte */
+ __u8 reserved; /* Unused */
+ __u8 alias_checksum;/* Checksum for 8.3 alias */
+ __u8 name5_10[12]; /* 6 more characters in name */
+ __u16 start; /* Unused */
+ __u8 name11_12[4]; /* Last 2 characters in name */
} dir_slot;
-/* Private filesystem parameters
+/*
+ * Private filesystem parameters
*
* Note: FAT buffer has to be 32 bit aligned
* (see FAT32 accesses)
unsigned long maxsize);
struct filesystem {
- file_detectfs_func *detect;
- file_ls_func *ls;
- file_read_func *read;
- const char name[12];
+ file_detectfs_func *detect;
+ file_ls_func *ls;
+ file_read_func *read;
+ const char name[12];
};
/* FAT tables */
void fdt_fixup_mtdparts(void *fdt, void *node_info, int node_info_size);
void fdt_del_node_and_alias(void *blob, const char *alias);
+u64 fdt_translate_address(void *blob, int node_offset, const u32 *in_addr);
+int fdt_node_offset_by_compat_reg(void *blob, const char *compat,
+ phys_addr_t compat_off);
#endif /* ifdef CONFIG_OF_LIBFDT */
#endif /* ifndef __FDT_SUPPORT_H */
- /*
+/*
* (C) Copyright 1997-2002 ELTEC Elektronik AG
* Frank Gottschling <fgottschling@eltec.de>
*
int n, sect_first, sect_last;
int rcode = 0;
- if (argc < 2) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 2)
+ return cmd_usage(cmdtp);
if (strcmp(argv[1], "all") == 0) {
for (bank=1; bank<=CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
return rcode;
}
- if (argc != 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 3)
+ return cmd_usage(cmdtp);
if (strcmp(argv[1], "bank") == 0) {
bank = simple_strtoul(argv[2], NULL, 16);
addr_first = simple_strtoul(argv[1], NULL, 16);
addr_last = simple_strtoul(argv[2], NULL, 16);
- if (addr_first >= addr_last) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (addr_first >= addr_last)
+ return cmd_usage(cmdtp);
printf ("Erase Flash from 0x%08lx to 0x%08lx ", addr_first, addr_last);
rcode = flash_sect_erase(addr_first, addr_last);
int i, p, n, sect_first, sect_last;
int rcode = 0;
- if (argc < 3) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc < 3)
+ return cmd_usage(cmdtp);
if (strcmp(argv[1], "off") == 0)
p = 0;
else if (strcmp(argv[1], "on") == 0)
p = 1;
- else {
- cmd_usage(cmdtp);
- return 1;
- }
+ else
+ return cmd_usage(cmdtp);
if (strcmp(argv[2], "all") == 0) {
for (bank=1; bank<=CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
return rcode;
}
- if (argc != 4) {
- cmd_usage(cmdtp);
- return 1;
- }
+ if (argc != 4)
+ return cmd_usage(cmdtp);
if (strcmp(argv[2], "bank") == 0) {
bank = simple_strtoul(argv[3], NULL, 16);
}
#if defined(CONFIG_SYS_FLASH_PROTECTION)
- if (!rcode) puts (" done\n");
+ if (!rcode)
+ puts(" done\n");
#endif /* CONFIG_SYS_FLASH_PROTECTION */
return rcode;
addr_first = simple_strtoul(argv[2], NULL, 16);
addr_last = simple_strtoul(argv[3], NULL, 16);
- if (addr_first >= addr_last) {
- cmd_usage(cmdtp);
- return 1;
- }
- rcode = flash_sect_protect (p, addr_first, addr_last);
- return rcode;
+ if (addr_first >= addr_last)
+ return cmd_usage(cmdtp);
+
+ return flash_sect_protect (p, addr_first, addr_last);
}
int flash_sect_protect (int p, ulong addr_first, ulong addr_last)
{
projects / karo-tx-uboot.git / commitdiff