karo: tx6ul-8013: prevent stall of mxs_reset() of the LCDIF controller

diff --git a/board/karo/tx6/tx6ul_ll_init.S b/board/karo/tx6/tx6ul_ll_init.S
index 0e15109deada439218254873469ae254ff7e830f..c80f7f4cdd130a96fde7f8f893ab00cf08964aac 100644 (file)
--- a/board/karo/tx6/tx6ul_ll_init.S
+++ b/board/karo/tx6/tx6ul_ll_init.S
@@ -580,7 +580,7 @@ dcd_hdr:
        MXC_DCD_ITEM(IOMUXC_SW_MUX_CTL_PAD_SNVS_TAMPER1, 0x00000015)
        MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_SNVS_TAMPER0, 0x0000f0b9)
        MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_SNVS_TAMPER1, 0x0000f0b9)
        MXC_DCD_ITEM(IOMUXC_SW_MUX_CTL_PAD_SNVS_TAMPER1, 0x00000015)
        MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_SNVS_TAMPER0, 0x0000f0b9)
        MXC_DCD_ITEM(IOMUXC_SW_PAD_CTL_PAD_SNVS_TAMPER1, 0x0000f0b9)

-#ifndef CONFIG_TX6_EMMC
+#ifdef CONFIG_TX6_NAND

        /* switch NFC clock to 99MHz */
        MXC_DCD_CMD_WRT(MXC_DCD_CMD_SZ_WORD, MXC_DCD_CMD_FLAG_CLR)
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR4, CCGR(14))
        /* switch NFC clock to 99MHz */
        MXC_DCD_CMD_WRT(MXC_DCD_CMD_SZ_WORD, MXC_DCD_CMD_FLAG_CLR)
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR4, CCGR(14))


@@ -592,8 +592,8 @@ dcd_hdr:
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR2, CCGR(7))
        MXC_DCD_CMD_WRT(MXC_DCD_CMD_SZ_WORD, MXC_DCD_CMD_FLAG_WRITE)
 #endif
        MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CCGR2, CCGR(7))
        MXC_DCD_CMD_WRT(MXC_DCD_CMD_SZ_WORD, MXC_DCD_CMD_FLAG_WRITE)
 #endif

-       MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CSCDR2, 0x00012090) /* default: 0x0002a150 */
-
+       /* switch LCDIF clk source to PLL5 */
+       MXC_DCD_ITEM(CCM_BASE_ADDR + CCM_CSCDR2, 0x00011150) /* default: 0x00029150 */

        MXC_DCD_ITEM(ANATOP_BASE_ADDR + ANATOP_PLL_ENET, 0x00002005) /* ENET PLL */
 
        /* enable all relevant clocks... */
        MXC_DCD_ITEM(ANATOP_BASE_ADDR + ANATOP_PLL_ENET, 0x00002005) /* ENET PLL */
 
        /* enable all relevant clocks... */