]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
Merge remote branch 'remotes/origin/karo-tx53' into karo-tx51 KARO-TX51-2012-08-28
authorLothar Waßmann <LW@KARO-electronics.de>
Tue, 28 Aug 2012 06:51:55 +0000 (08:51 +0200)
committerLothar Waßmann <LW@KARO-electronics.de>
Tue, 28 Aug 2012 06:51:55 +0000 (08:51 +0200)
common/cmd_bootce.c
drivers/mtd/nand/am33xx_nand.c
drivers/net/cpsw.c
include/configs/tx48.h

index 1c43c3ba301918b89c9c46d07f2831f730bcd18e..f99f34eb13666ea66fc0ba6ec673f953e2799c91 100644 (file)
@@ -857,11 +857,18 @@ static int ce_send_bootme(ce_net *net)
        return ce_send_frame(net);
 }
 
-static void ce_init_download_link(ce_net *net, ce_bin *bin,
+static int ce_init_download_link(ce_net *net, ce_bin *bin,
                                struct sockaddr_in *host_addr, int verbose)
 {
+       int ret;
        unsigned long aligned_address;
 
+       if (!eth_get_dev()) {
+               printf("No network interface available\n");
+               return -ENODEV;
+       }
+       printf("Usinge device '%s'\n", eth_get_name());
+
        /* Initialize EDBG link for download */
        memset(net, 0, sizeof(*net));
 
@@ -902,12 +909,11 @@ static void ce_init_download_link(ce_net *net, ce_bin *bin,
 #ifdef CONFIG_NET_MULTI
        eth_set_current();
 #endif
-       if (eth_init(gd->bd) < 0) {
-#ifdef ET_DEBUG
-               puts("ceconnect: failed to init ethernet !\n");
-#endif
+       ret = eth_init(gd->bd);
+       if (ret < 0) {
+               printf("ceconnect: failed to init ethernet: %d\n", ret);
                eth_halt();
-               return;
+               return ret;
        }
 #ifdef ET_DEBUG
        puts("ceconnect: init ethernet done!\n");
@@ -917,6 +923,7 @@ static void ce_init_download_link(ce_net *net, ce_bin *bin,
        NetOurGatewayIP = getenv_IPaddr("gatewayip");
        NetOurSubnetMask = getenv_IPaddr("netmask");
        NetServerIP = getenv_IPaddr("serverip");
+       return 0;
 }
 
 static int do_ceconnect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
@@ -946,7 +953,9 @@ static int do_ceconnect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[
 
        memset(&host_ip_addr, 0xff, sizeof(host_ip_addr));
 
-       ce_init_download_link(&g_net, &g_bin, &host_ip_addr, verbose);
+       if (ce_init_download_link(&g_net, &g_bin, &host_ip_addr, verbose) != 0)
+               return 1;
+
        while (1) {
                if (g_net.link) {
                        recv_timeout = 3;
index efc420aafe5c82b38a0d5bd156422295aae5ebda..b59a98d1aab4c3f367247895ddc21ade8b0ff0bd 100644 (file)
@@ -827,14 +827,27 @@ void am33xx_nand_switch_ecc(nand_ecc_modes_t hardware, int32_t mode)
        nand->options &= ~NAND_OWN_BUFFERS;
        return;
 }
-#endif
 
-#ifdef CONFIG_SPL_BUILD
+static int am33xx_scan_bbt(struct mtd_info *mtd)
+{
+       int ret;
+
+       am33xx_nand_switch_ecc(NAND_ECC_HW, 0);
+       ret = nand_default_bbt(mtd);
+       am33xx_nand_switch_ecc(NAND_ECC_HW, 2);
+       return ret;
+}
+#else /* CONFIG_SPL_BUILD */
 /* Check wait pin as dev ready indicator */
 static int am33xx_spl_dev_ready(struct mtd_info *mtd)
 {
        return gpmc_cfg->status & (1 << 8);
 }
+
+static int am33xx_scan_bbt(struct mtd_info *mtd)
+{
+       return 0;
+}
 #endif
 
 /*
@@ -884,6 +897,8 @@ int board_nand_init(struct nand_chip *nand)
 
        nand->cmd_ctrl = am33xx_nand_hwcontrol;
        nand->options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_NO_AUTOINCR;
+       nand->scan_bbt = am33xx_scan_bbt;
+
        /* If we are 16 bit dev, our gpmc config tells us that */
        if ((readl(&gpmc_cfg->cs[cs].config1) & 0x3000) == 0x1000) {
                nand->options |= NAND_BUSWIDTH_16;
@@ -901,7 +916,7 @@ int board_nand_init(struct nand_chip *nand)
        /* For undocumented reasons we need to currently keep our environment
         * in 1-bit ECC so we configure ourself thusly. */
        nand_curr_device = 0;
-       am33xx_nand_switch_ecc(NAND_ECC_HW, 0);
+       am33xx_nand_switch_ecc(NAND_ECC_HW, 2);
 #else
        /* The NAND chip present requires that we have written data in with
         * at least 4-bit ECC so we configure outself for that in SPL.
index 80279d7c1456236646ec6ce9db7958ee2fca9f28..d4c0818397197729b329d28095fcbd58649fe004 100644 (file)
@@ -18,7 +18,7 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
-//#define DEBUG
+
 #include <common.h>
 #include <command.h>
 #include <net.h>
@@ -201,23 +201,9 @@ struct cpdma_chan {
        void                    *hdp, *cp, *rxfree;
 };
 
-#if 0
-#define desc_write(desc, fld, val)     __raw_writel((u32)(val), &(desc)->fld)
-#define desc_read(desc, fld)           __raw_readl(&(desc)->fld)
-#define desc_read_ptr(desc, fld)       ((void *)__raw_readl(&(desc)->fld))
-#else
-#define desc_write(desc, fld, val)     ((desc)->dma_desc->fld = (u32)(val))
-#define desc_read(desc, fld)           __desc_read(&(desc)->dma_desc->fld, #fld, __func__, __LINE__)
-static inline u32 __desc_read(u32 *fld, const char *name,
-                       const char *fn, int ln)
-{
-       u32 val = *fld;
-
-       debug("%s@%d: %s@%p=%08x\n", fn, ln, name, fld, val);
-       return val;
-}
-#define desc_read_ptr(desc, fld)       ((void *)desc_read(desc->dma_desc, fld))
-#endif
+#define desc_write(desc, fld, val)     __raw_writel((u32)(val), &(desc)->dma_desc->fld)
+#define desc_read(desc, fld)           __raw_readl(&(desc)->dma_desc->fld)
+#define desc_read_ptr(desc, fld)       ((void *)__raw_readl(&(desc)->dma_desc->fld))
 
 #define chan_write(chan, fld, val)     __raw_writel((u32)(val), (chan)->fld)
 #define chan_read(chan, fld)           __raw_readl((chan)->fld)
@@ -240,11 +226,11 @@ struct cpsw_priv {
        struct cpsw_slave               *slaves;
 };
 
-#define for_each_slave(priv, func, arg...)                     \
-       do {                                                    \
-               int idx;                                        \
+#define for_each_slave(priv, func, arg...)     \
+       do {                                                            \
+               int idx;                                                \
                for (idx = 0; idx < (priv)->data->slaves; idx++)        \
-                       (func)((priv)->slaves + idx, ##arg);    \
+                       (func)((priv)->slaves + idx, ##arg);            \
        } while (0)
 
 static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)
@@ -554,7 +540,7 @@ static inline void soft_reset(void *reg)
 {
        int loops = 0;
 
-       debug("%s\n", __func__);
+       debug("%s %p\n", __func__, reg);
        __raw_writel(1, reg);
        while (__raw_readl(reg) & 1) {
                loops++;
@@ -573,6 +559,7 @@ static void cpsw_set_slave_mac(struct cpsw_slave *slave,
        __raw_writel(mac_lo(priv->dev->enetaddr), &slave->regs->sa_lo);
 }
 
+#define NUM_TRIES 50
 static void cpsw_slave_update_link(struct cpsw_slave *slave,
                                   struct cpsw_priv *priv, int *link)
 {
@@ -581,38 +568,42 @@ static void cpsw_slave_update_link(struct cpsw_slave *slave,
        int speed, duplex;
        unsigned short reg;
        u32 mac_control = 0;
+       int retries = NUM_TRIES;
 
-       debug("%s@%d\n", __func__, __LINE__);
-       if (miiphy_read(name, phy_id, MII_BMSR, &reg)) {
-               printf("Failed to read PHY reg\n");
-               return; /* could not read, assume no link */
-       }
+       while (retries-- > 0) {
+               if (miiphy_read(name, phy_id, MII_BMSR, &reg)) {
+                       printf("Failed to read PHY reg\n");
+                       return; /* could not read, assume no link */
+               }
 
-       if (reg & BMSR_LSTATUS) { /* link up */
-               speed = miiphy_speed(name, phy_id);
-               duplex = miiphy_duplex(name, phy_id);
-
-               *link = 1;
-               mac_control = priv->data->mac_control;
-               if (speed == 10)
-                       mac_control |= BIT(18); /* In Band mode */
-               else if (speed == 100)
-                       mac_control |= BIT(15);
-               else if (speed == 1000) {
-                       if (priv->data->gigabit_en)
-                               mac_control |= BIT(7);
-                       else {
-                               /* Disable gigabit as it's non-functional */
-                               mac_control &= ~BIT(7);
-                               speed = 100;
+               if (reg & BMSR_LSTATUS) { /* link up */
+                       speed = miiphy_speed(name, phy_id);
+                       duplex = miiphy_duplex(name, phy_id);
+
+                       *link = 1;
+                       mac_control = priv->data->mac_control;
+                       if (speed == 10)
+                               mac_control |= BIT(18); /* In Band mode */
+                       else if (speed == 100)
+                               mac_control |= BIT(15);
+                       else if (speed == 1000) {
+                               if (priv->data->gigabit_en)
+                                       mac_control |= BIT(7);
+                               else {
+                                       /* Disable gigabit as it's non-functional */
+                                       mac_control &= ~BIT(7);
+                                       speed = 100;
+                               }
                        }
-               }
 
-               if (duplex == FULL)
-                       mac_control |= BIT(0);  /* FULLDUPLEXEN */
+                       if (duplex == FULL)
+                               mac_control |= BIT(0);  /* FULLDUPLEXEN */
+                       break;
+               }
+               udelay(100000);
        }
-       debug("%s: mac_control: %08x -> %08x\n", __func__,
-               slave->mac_control, mac_control);
+       debug("%s: mac_control: %08x -> %08x after %u loops\n", __func__,
+               slave->mac_control, mac_control, NUM_TRIES - retries);
 
        if (mac_control == slave->mac_control)
                return;
@@ -625,11 +616,8 @@ static void cpsw_slave_update_link(struct cpsw_slave *slave,
                printf("link down on port %d\n", slave->slave_num);
        }
 
-       debug("%s@%d\n", __func__, __LINE__);
        __raw_writel(mac_control, &slave->sliver->mac_control);
-       debug("%s@%d\n", __func__, __LINE__);
        slave->mac_control = mac_control;
-       debug("%s: done\n", __func__);
 }
 
 static int cpsw_update_link(struct cpsw_priv *priv)
@@ -674,26 +662,6 @@ static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv)
        priv->data->phy_init(priv->dev->name, slave->data->phy_id);
 }
 
-#ifdef DEBUG
-#define cpdma_desc_get(d)      __cpdma_desc_get(d, __func__, __LINE__)
-#define cpdma_desc_put(d)      __cpdma_desc_put(d, __func__, __LINE__)
-
-static void __cpdma_desc_get(struct cpsw_desc *desc,
-                       const char *fn, int ln)
-{
-       debug("%s@%d: Invalidating DCACHE range: %p..%p\n", fn, ln,
-               desc->dma_desc, &desc->dma_desc[1]);
-       invalidate_dcache_range((u32)desc->dma_desc, (u32)(&desc->dma_desc[1]));
-}
-
-static void __cpdma_desc_put(struct cpsw_desc *desc,
-                       const char *fn, int ln)
-{
-       debug("%s@%d: Flushing DCACHE range: %p..%p\n", fn, ln,
-               desc->dma_desc, &desc->dma_desc[1]);
-       flush_dcache_range((u32)desc->dma_desc, (u32)(&desc->dma_desc[1]));
-}
-#else
 static void cpdma_desc_get(struct cpsw_desc *desc)
 {
        invalidate_dcache_range((u32)desc->dma_desc, (u32)(&desc->dma_desc[1]));
@@ -703,7 +671,6 @@ static void cpdma_desc_put(struct cpsw_desc *desc)
 {
        flush_dcache_range((u32)desc->dma_desc, (u32)(&desc->dma_desc[1]));
 }
-#endif
 
 static struct cpsw_desc *cpdma_desc_alloc(struct cpsw_priv *priv)
 {
@@ -736,9 +703,6 @@ static int cpdma_submit(struct cpsw_priv *priv, struct cpdma_chan *chan,
                return -EINVAL;
        }
 
-       debug("%s@%d: buffer %p..%p\n", __func__, __LINE__,
-               buffer, buffer + len);
-
        flush_dcache_range((u32)buffer, (u32)buffer + len);
 
        desc = cpdma_desc_alloc(priv);
@@ -757,10 +721,10 @@ static int cpdma_submit(struct cpsw_priv *priv, struct cpdma_chan *chan,
        desc_write(desc, hw_buffer, buffer);
        desc_write(desc, hw_len,    len);
        desc_write(desc, hw_mode,   mode | len);
-       //desc_write(desc, sw_buffer, buffer);
+
        desc->sw_buffer = buffer;
-//     desc_write(desc, sw_len,    len);
 
+       cpdma_desc_put(desc);
        if (!chan->head) {
                /* simple case - first packet enqueued */
                chan->head = desc;
@@ -768,7 +732,6 @@ static int cpdma_submit(struct cpsw_priv *priv, struct cpdma_chan *chan,
                chan_write(chan, hdp, desc->dma_desc);
                goto done;
        }
-       cpdma_desc_put(desc);
 
        /* not the first packet - enqueue at the tail */
        prev = chan->tail;
@@ -802,21 +765,17 @@ static int cpdma_process(struct cpsw_priv *priv, struct cpdma_chan *chan,
 
        cpdma_desc_get(desc);
 
-       debug("%s@%d desc=%p chan=%p\n", __func__, __LINE__, desc->dma_desc, chan);
        status = desc_read(desc, hw_mode);
+       if (status & CPDMA_DESC_OWNER)
+               return -EBUSY;
 
        if (len)
                *len = status & 0x7ff;
-       debug("%s@%d: status=%08x len=%u\n", __func__, __LINE__,
-               status, *len);
 
        if (buffer)
                *buffer = desc->sw_buffer;
        debug("%s@%d: buffer=%p\n", __func__, __LINE__, desc->sw_buffer);
 
-       if (status & CPDMA_DESC_OWNER)
-               return -EBUSY;
-
        chan->head = desc->next;
        chan_write(chan, cp, desc->dma_desc);
 
@@ -928,12 +887,12 @@ static int cpsw_init(struct eth_device *dev, bd_t *bis)
                }
        }
 
-       return 0;
+       return ret;
 }
 
 static void cpsw_halt(struct eth_device *dev)
 {
-       struct cpsw_priv        *priv = dev->priv;
+       struct cpsw_priv *priv = dev->priv;
 
        debug("%s\n", __func__);
        priv->data->control(0);
@@ -941,22 +900,21 @@ static void cpsw_halt(struct eth_device *dev)
 
 static int cpsw_send(struct eth_device *dev, volatile void *packet, int length)
 {
-       struct cpsw_priv        *priv = dev->priv;
-       volatile void *buffer = (volatile void *)0xeeeeeeee;
-       int len = 0x77777777;
+       struct cpsw_priv *priv = dev->priv;
+       volatile void *buffer;
+       int len;
 
-       debug("%s@%d sending packet %p..%p\n", __func__, __LINE__,
+       debug("%s@%d: sending packet %p..%p\n", __func__, __LINE__,
                packet, packet + length - 1);
-       if (!cpsw_update_link(priv))
+
+       if (!priv->data->mac_control && !cpsw_update_link(priv)) {
+               printf("%s: Cannot send packet; link is down\n", __func__);
                return -EIO;
+       }
 
-       debug("%s@%d\n", __func__, __LINE__);
        /* first reap completed packets */
-       while (cpdma_process(priv, &priv->tx_chan, &buffer, &len) >= 0) {
-               debug("%s@%d: buffer=%p len=%d\n", __func__, __LINE__,
-                       buffer, len);
-       }
-       debug("%s@%d\n", __func__, __LINE__);
+       while (cpdma_process(priv, &priv->tx_chan, &buffer, &len) == 0)
+               /* NOP */;
 
        return cpdma_submit(priv, &priv->tx_chan, packet, length);
 }
@@ -967,16 +925,15 @@ static int cpsw_recv(struct eth_device *dev)
        volatile void *buffer;
        int len;
 
-       debug("%s@%d\n", __func__, __LINE__);
-       while (cpdma_process(priv, &priv->rx_chan, &buffer, &len) >= 0) {
-               debug("invalidating %p..%p\n", buffer,
-                       buffer + ALIGN(len, CONFIG_SYS_CACHELINE_SIZE));
-               invalidate_dcache_range((u32)buffer,
-                       (u32)buffer + ALIGN(len, CONFIG_SYS_CACHELINE_SIZE));
-               NetReceive(buffer, len);
-               cpdma_submit(priv, &priv->rx_chan, buffer, PKTSIZE);
+       while (cpdma_process(priv, &priv->rx_chan, &buffer, &len) == 0) {
+               if (buffer) {
+                       NetReceive(buffer, len);
+                       cpdma_submit(priv, &priv->rx_chan, buffer, PKTSIZE);
+               } else {
+                       printf("NULL buffer returned from cpdma_process\n");
+                       return -EIO;
+               }
        }
-       debug("%s@%d: done\n", __func__, __LINE__);
        return 0;
 }
 
@@ -1057,12 +1014,9 @@ int cpsw_register(struct cpsw_platform_data *data)
        dev->recv       = cpsw_recv;
        dev->priv       = priv;
 
-       debug("%s@%d\n", __func__, __LINE__);
        eth_register(dev);
 
-       debug("%s@%d\n", __func__, __LINE__);
        cpsw_mdio_init(dev->name, data->mdio_base, data->mdio_div);
 
-       debug("%s@%d: done\n", __func__, __LINE__);
        return 1;
 }
index 3592aa43fb551b8e14d8b8da6945ccfdb8d44e13..0b1726c122eed3b25b459fbc7b45f5aa44c41546 100644 (file)
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_BOARD_LATE_INIT
-#define CONFIG_SPLASH_SCREEN
-#define CONFIG_SPLASH_SCREEN_ALIGN
-#define CONFIG_VIDEO_DA8XX
-#define DAVINCI_LCD_CNTL_BASE          0x4830e000
 
 /* LCD Logo and Splash screen support */
 #define CONFIG_LCD
 #ifdef CONFIG_LCD
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_VIDEO_DA8XX
+#define DAVINCI_LCD_CNTL_BASE          0x4830e000
 #define CONFIG_LCD_LOGO
 #define LCD_BPP                                LCD_COLOR24
 #define CONFIG_CMD_BMP
 #define CONFIG_STACKSIZE               SZ_64K
 #define CONFIG_SYS_MALLOC_LEN          SZ_4M
 
-#define CONFIG_SYS_MEMTEST_START       (PHYS_SDRAM_1 + (64 * 1024 * 1024))
-#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START + \
-                                       (8 * 1024 * 1024))
-
+#define CONFIG_SYS_MEMTEST_START       (PHYS_SDRAM_1 + SZ_64M)
+#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START + SZ_8M)
 
 /*
  * U-Boot general configurations
@@ -91,7 +89,6 @@
 */
 #ifdef CONFIG_OF_LIBFDT /* set via cmdline parameter thru boards.cfg */
 #define CONFIG_FDT_FIXUP_PARTITIONS
-#define CONFIG_OF_CONTROL
 #define CONFIG_OF_EMBED
 #define CONFIG_OF_BOARD_SETUP
 #define CONFIG_DEFAULT_DEVICE_TREE     tx48
  */
 #define xstr(s)        str(s)
 #define str(s) #s
+#define __pfx(x, s)    (x##s)
+#define _pfx(x, s)     __pfx(x, s)
 
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 #define CONFIG_SYS_AUTOLOAD    "no"
 #define CONFIG_BOOTFILE                "uImage"
-#define CONFIG_BOOTARGS                "console=ttymO0,115200 ro debug panic=1"
+#define CONFIG_BOOTARGS                "console=ttyO0,115200 ro debug panic=1"
 #define CONFIG_BOOTCOMMAND     "run bootcmd_nand"
-#define CONFIG_LOADADDR                0x81000000
-#define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
+#define CONFIG_LOADADDR                83000000
+#define CONFIG_SYS_LOAD_ADDR   _pfx(0x, CONFIG_LOADADDR)
 #define CONFIG_U_BOOT_IMG_SIZE SZ_1M
 #define CONFIG_HW_WATCHDOG
 
  * Extra Environments
  */
 #ifdef CONFIG_OF_LIBFDT
-#define CONFIG_FDT_FIXUP_PARTITIONS
-
 #define TX48_BOOTM_CMD                                                 \
-       "bootm_cmd=fdt addr ${fdtcontroladdr};"                         \
-       "fdt board;"                                                    \
-       "bootm ${loadaddr} - ${fdtaddr}\0"
+       "bootm_cmd=fdt boardsetup;bootm ${loadaddr} - ${fdtaddr}\0"
 #else
 #define TX48_BOOTM_CMD                                                 \
        "bootm_cmd=bootm\0"
        "bootargs_mmc=run default_bootargs;set bootargs ${bootargs}"    \
        " root=/dev/mmcblk0p2 rootwait\0"                               \
        "bootargs_nand=run default_bootargs;set bootargs ${bootargs}"   \
-       " root=/dev/mtdblock4 rootfstype=jffs2\0"               \
+       " root=/dev/mtdblock4 rootfstype=jffs2\0"                       \
        "nfsroot=/tftpboot/rootfs\0"                                    \
        "bootargs_nfs=run default_bootargs;set bootargs ${bootargs}"    \
        " root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},nolock\0"\
        TX48_BOOTM_CMD                                                  \
        "default_bootargs=set bootargs " CONFIG_BOOTARGS                \
        " ${mtdparts} video=${video_mode} ${append_bootargs}\0"         \
-       "fdtcontroladdr=80004000\0"                                     \
+       "cpu_clk=400\0"                                                 \
+       "fdtaddr=80004000\0"                                            \
        "mtdids=" MTDIDS_DEFAULT "\0"                                   \
        "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
+       "otg_mode=device\0"                                             \
        "touchpanel=tsc2007\0"                                          \
        "video_mode=640x480MR-24@60\0"
 
 #define CONFIG_CMD_NAND
 #define CONFIG_CMD_MTDPARTS
 #define CONFIG_CMD_BOOTCE
+#define CONFIG_CMD_TIME
 
 /*
  * Serial Driver
 #define CONFIG_SYS_NS16550_REG_SIZE    (-4)
 #define CONFIG_SYS_NS16550_CLK         48000000
 #define CONFIG_SYS_NS16550_COM1                0x44e09000      /* UART0 */
+#define CONFIG_CONS_INDEX              1
+#define CONFIG_BAUDRATE                        115200          /* Default baud rate */
+#define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, }
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
 
 /*
  * Ethernet Driver
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_PING
+/* Add for working with "strict" DHCP server */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
 
-#define CONFIG_NET_RETRY_COUNT        10
 #define CONFIG_NET_MULTI
 #define CONFIG_PHY_GIGE
 #endif
        xstr(CONFIG_ENV_SIZE)                                           \
        "(env),"                                                        \
        xstr(CONFIG_ENV_SIZE)                                           \
-       "(env2),4m(linux),16m(rootfs),-(userfs)"
+       "(env2),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
 #else
 #define MTDPARTS_DEFAULT               "mtdparts=" MTD_NAME ":"        \
        "128k(u-boot-spl),"                                             \
        "1m(u-boot),"                                                   \
        xstr(CONFIG_ENV_SIZE)                                           \
-       "(env),4m(linux),16m(rootfs),-(userfs)"
+       "(env),4m(linux),16m(rootfs),256k(dtb),-(userfs)"
 #endif
 
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
 #define CONFIG_SYS_TIMERBASE           0x48040000      /* Use Timer2 */
 #define CONFIG_SYS_PTV                 2       /* Divisor: 2^(PTV+1) => 8 */
 
-#define CONFIG_BAUDRATE                115200
-#define CONFIG_SYS_BAUDRATE_TABLE      { 110, 300, 600, 1200, 2400, \
-               4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX              1
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_TEXT_BASE           0x402F0400
-#define CONFIG_SPL_MAX_SIZE            (46 * 1024)
+#define CONFIG_SPL_MAX_SIZE            (46 * SZ_1K)
 #define CONFIG_SPL_GPIO_SUPPORT
 #ifdef CONFIG_NAND_AM33XX
 #define CONFIG_SPL_NAND_SUPPORT
                                         50, 51, 52, 53, 54, 55, 56, 57, }
 #endif
 
-#define CONFIG_SPL_BSS_START_ADDR      0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE                0x80000         /* 512 KB */
+#define CONFIG_SPL_BSS_START_ADDR      PHYS_SDRAM_1
+#define CONFIG_SPL_BSS_MAX_SIZE                SZ_512K
 
 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        0x300 /* address 0x60000 */
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS     0x200 /* 256 KB */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS     (SZ_512K / 512)
 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION   1
 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME       "u-boot-tx48.img"
 #define CONFIG_SPL_MMC_SUPPORT
  * other needs.
  */
 #define CONFIG_SYS_TEXT_BASE           0x80800000
-#define CONFIG_SYS_SPL_MALLOC_START    0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
+#define CONFIG_SYS_SPL_MALLOC_START    (PHYS_SDRAM_1 + SZ_2M + SZ_32K)
+#define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_1M
 
 /* Since SPL did pll and ddr initialization for us,
  * we don't need to do it twice.
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #endif
 
-/* Unsupported features */
-#undef CONFIG_USE_IRQ
-
 #endif /* __TX48_H */