- Building & Flashing U-Boot for TX53
- ===================================
+ U-Boot for TX53
+ ===============
Building U-Boot
---------------
If you want to revive a bricked module, you can use one of the
flashtools provided with the BSP to reprogram the flash.
+
+
+U-Boot Features
+---------------
+
+Environment variables:
+
+cpu_clk <CPU freq [MHz]>
+touchpanel {tsc2007|edt-ft5x06}
+otg_mode [host|device|none]
+video_mode <video mode as understood by Linux fb_find_mode() function>
+ e.g.: VGA-1:640x480MR-24@60
+baseboard {stk5-v3|stk5-v5} selects type of baseboard
+ 'stk5-v5' setting enables CAN transceiver switch on GPIO4_21 and
+ disables USB Host mode on USBOTG port.
+ strings not starting in 'stk5' prevent the STK5 specific
+ pad initialization to be done.
+splashimage memory address of a BMP file to be displayed instead of
+ the built-in logo. Since NAND flash is not accessible in
+ a memory mapped fashion, U-Boot will try to load the
+ contents of the flash partition 'logo' to the address
+ given with 'splashimage'.
+
+Note: Some variables (like 'cpu_clk' or 'splashimage') may render the
+ board unbootable if incorrectly set. Therefore these variables
+ will not be evaluated in case the board has been reset through a
+ watchdog reset or a character is available on the serial console
+ during startup to give the user a chance to recover from this
+ situation.
DECLARE_GLOBAL_DATA_PTR;
-#define IOMUX_SION IOMUX_PAD(0, 0, IOMUX_CONFIG_SION, 0, 0, 0)
-
#define MX53_GPIO_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP)
gpio_request_array(tx53_gpios, ARRAY_SIZE(tx53_gpios));
mxc_iomux_v3_setup_multiple_pads(tx53_pads, ARRAY_SIZE(tx53_pads));
+ writel(0x77777777, AIPS1_BASE_ADDR + 0x00);
+ writel(0x77777777, AIPS1_BASE_ADDR + 0x04);
+
+ writel(0x00000000, AIPS1_BASE_ADDR + 0x40);
+ writel(0x00000000, AIPS1_BASE_ADDR + 0x44);
+ writel(0x00000000, AIPS1_BASE_ADDR + 0x48);
+ writel(0x00000000, AIPS1_BASE_ADDR + 0x4c);
+ writel(0x00000000, AIPS1_BASE_ADDR + 0x50);
+
+ writel(0x77777777, AIPS2_BASE_ADDR + 0x00);
+ writel(0x77777777, AIPS2_BASE_ADDR + 0x04);
+
+ writel(0x00000000, AIPS2_BASE_ADDR + 0x40);
+ writel(0x00000000, AIPS2_BASE_ADDR + 0x44);
+ writel(0x00000000, AIPS2_BASE_ADDR + 0x48);
+ writel(0x00000000, AIPS2_BASE_ADDR + 0x4c);
+ writel(0x00000000, AIPS2_BASE_ADDR + 0x50);
+
return 0;
}
static void tx53_move_fdt(void)
{
- unsigned long fdt_addr = getenv_ulong("fdtcontroladdr", 16, 0);
- void *fdt = NULL;
+ const void *fdt = gd->fdt_blob;
+ unsigned long fdt_addr = getenv_ulong("fdtaddr", 16, 0);
- if (!fdt_addr)
- return;
-
-#ifdef CONFIG_OF_EMBED
- fdt = _binary_dt_dtb_start;
-#elif defined CONFIG_OF_SEPARATE
- fdt = (void *)(_end_ofs + _TEXT_BASE);
-#endif
- if (!fdt)
+ if (!fdt || !fdt_addr) {
+ printf("fdt=%p fdt_addr=%08lx\n", fdt, fdt_addr);
return;
+ }
if (fdt_check_header(fdt)) {
printf("ERROR: No valid FDT found at %p\n", fdt);
return;
}
- size_t fdt_len = fdt_totalsize(fdt);
- memmove((void *)fdt_addr, fdt, fdt_len);
+ memmove((void *)fdt_addr, fdt, fdt_totalsize(fdt));
set_working_fdt_addr((void *)fdt_addr);
}
unsigned long cpu_clk = getenv_ulong("cpu_clk", 10, 0);
int ret;
+ if (tstc() || (wrsr & WRSR_TOUT))
+ return;
+
if (cpu_clk == 0 || cpu_clk == mxc_get_clock(MXC_ARM_CLK) / 1000000)
return;
"edt,edt-ft5x06",
};
-static void fdt_del_node_by_name(void *blob, const char *name)
+static void fdt_del_tp_node(void *blob, const char *name)
{
int offs = fdt_node_offset_by_compatible(blob, -1, name);
+ uint32_t ph1 = 0, ph2 = 0;
+ const uint32_t *prop;
if (offs < 0) {
debug("node '%s' not found: %d\n", name, offs);
return;
}
+
+ prop = fdt_getprop(blob, offs, "reset-switch", NULL);
+ if (prop)
+ ph1 = be32_to_cpu(*prop);
+
+ prop = fdt_getprop(blob, offs, "wake-switch", NULL);
+ if (prop)
+ ph2 = be32_to_cpu(*prop);
+
debug("Removing node '%s' from DT\n", name);
fdt_del_node(blob, offs);
+
+ if (ph1) {
+ offs = fdt_node_offset_by_phandle(blob, ph1);
+ if (offs > 0) {
+ debug("Removing node @ %08x\n", offs);
+ fdt_del_node(blob, offs);
+ }
+ }
+ if (ph2) {
+ offs = fdt_node_offset_by_phandle(blob, ph2);
+ if (offs > 0) {
+ debug("Removing node @ %08x\n", offs);
+ fdt_del_node(blob, offs);
+ }
+ }
}
static void tx53_fixup_touchpanel(void *blob)
if (tp != NULL && *tp != '\0' && strcmp(model, tp + 1) == 0)
continue;
- fdt_del_node_by_name(blob, tx53_touchpanels[i]);
+ fdt_del_tp_node(blob, tx53_touchpanels[i]);
}
}
}
}
+static void tx53_fdt_del_prop(void *blob, const char *compat, phys_addr_t offs,
+ const char *prop)
+{
+ int ret;
+ int offset;
+ const uint32_t *phandle;
+ uint32_t ph = 0;
+
+ offset = fdt_node_offset_by_compat_reg(blob, compat, offs);
+ if (offset <= 0)
+ return;
+
+ phandle = fdt_getprop(blob, offset, "transceiver-switch", NULL);
+ if (phandle) {
+ ph = be32_to_cpu(*phandle);
+ printf("phandle=%08x\n", ph);
+ }
+
+ debug("Removing property '%s' from node %s@%08lx\n", prop, compat, offs);
+ ret = fdt_delprop(blob, offset, prop);
+ if (ret)
+ printf("Failed to remove property '%s' from node %s@%08lx\n",
+ prop, compat, offs);
+
+ if (!ph)
+ return;
+
+ offset = fdt_node_offset_by_phandle(blob, ph);
+ printf("Node offset[%x]=%08x\n", ph, offset);
+ if (offset <= 0)
+ return;
+
+ debug("Removing node @ %08x\n", offset);
+ fdt_del_node(blob, offset);
+}
+
+static void tx53_fixup_flexcan(void *blob)
+{
+ const char *baseboard = getenv("baseboard");
+
+ if (baseboard && strcmp(baseboard, "stk5-v5") == 0)
+ return;
+
+ tx53_fdt_del_prop(blob, "fsl,p1010-flexcan", 0x53fc8000, "transceiver-switch");
+ tx53_fdt_del_prop(blob, "fsl,p1010-flexcan", 0x53fcc000, "transceiver-switch");
+}
+
void ft_board_setup(void *blob, bd_t *bd)
{
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
tx53_fixup_touchpanel(blob);
tx53_fixup_usb_otg(blob);
+ tx53_fixup_flexcan(blob);
}
#endif
#define CONFIG_TX53 /* TX53 SoM */
#define CONFIG_MX53 /* i.MX53 SoC */
#define CONFIG_SYS_MX5_IOMUX_V3
-#define CONFIG_MXC_GPIO /* GPIO control */
+#define CONFIG_MXC_GPIO /* GPIO control */
#define CONFIG_SYS_MX5_HCLK 24000000
#define CONFIG_SYS_MX5_CLK32 32768
#define CONFIG_SYS_DDR_CLKSEL 0
#define CONFIG_SHOW_ACTIVITY
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_LATE_INIT
-#define CONFIG_SPLASH_SCREEN
#define CONFIG_BOARD_EARLY_INIT_F
/* LCD Logo and Splash screen support */
#define CONFIG_LCD
#ifdef CONFIG_LCD
+#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_VIDEO_MX5
#define CONFIG_LCD_LOGO
*/
#define xstr(s) str(s)
#define str(s) #s
+#define __pfx(x, s) (x##s)
+#define _pfx(x, s) __pfx(x, s)
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_SYS_AUTOLOAD "no"
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_BOOTARGS "console=ttymxc0,115200 ro debug panic=1"
#define CONFIG_BOOTCOMMAND "run bootcmd_nand"
-#define CONFIG_LOADADDR 0x78000000
-#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_LOADADDR 78000000
+#define CONFIG_SYS_LOAD_ADDR _pfx(0x, CONFIG_LOADADDR)
#define CONFIG_U_BOOT_IMG_SIZE SZ_1M
#define CONFIG_HW_WATCHDOG
/*
* Extra Environments
*/
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CONFIG_EXTRA_ENV_SETTINGS \
"autostart=no\0" \
"baseboard=stk5-v3\0" \
"bootargs_mmc=run default_bootargs;set bootargs ${bootargs}" \
"default_bootargs=set bootargs " CONFIG_BOOTARGS \
" ${mtdparts} video=${video_mode} ${append_bootargs}\0" \
"cpu_clk=800\0" \
- "fdtcontroladdr=70004000\0" \
+ "fdtaddr=70004000\0" \
"mtdids=" MTDIDS_DEFAULT "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"otg_mode=device\0" \
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_GPIO
-#define CONFIG_CONS_INDEX 0
+#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200 /* Default baud rate */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, }
/*
- * FEC Driver
+ * Ethernet Driver
*/
#define CONFIG_FEC_MXC
#ifdef CONFIG_FEC_MXC
#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE MII100
#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
-#define CONFIG_ETH_PRIME
#define CONFIG_CMD_MII
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_NAND_MAX_CHIPS 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_IS_IN_MMC
#endif
#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_FSL_ESDHC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_USE_PIO
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_NUM 2
-#define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_FAT
#define CONFIG_BOOT_PARTITION_ACCESS
#define CONFIG_DOS_PARTITION
*/
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
-#define CONFIG_CMD_ENV
#define CONFIG_ENV_OVERWRITE
/* Associated with the MMC layout defined in mmcops.c */
#define CONFIG_ENV_OFFSET 0x400 /* 1 KB */
projects / karo-tx-uboot.git / commitdiff