ARM: mxs: use CONFIG_SPL_STACK to set up SPL stack pointer

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 0aa06125b9ec995602850bbeeda92ce43cf0ecc9..93689a18a5b6562b0f1d81d5cf3a97b09e919119 100644 (file)
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -204,7 +204,7 @@ static void mxs_mem_setup_cpu_and_hbus(void)
                &clkctrl_regs->hw_clkctrl_clkseq_clr);
 }
 
-void data_abort_memdetect_handler(void)
+static void data_abort_memdetect_handler(void)
 {
        asm volatile("subs pc, lr, #4");
 }

diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S
index 1b51f003f35efb9bfb08c7cee1f895bfec0564fb..2ac7ffe473a2a9405efdf3d2180445fdc8252ea7 100644 (file)
--- a/arch/arm/lib/vectors.S
+++ b/arch/arm/lib/vectors.S
@@ -117,10 +117,10 @@ fiq:
 /* IRQ stack memory (calculated at run-time) + 8 bytes */
 .globl IRQ_STACK_START_IN
 IRQ_STACK_START_IN:
-#ifndef IRAM_BASE_ADDR
+#ifndef CONFIG_SPL_STACK
        .word   0x0badc0de
 #else
-       .word   IRAM_BASE_ADDR + 0x20
+       .word   CONFIG_SPL_STACK
 #endif
 
 #ifdef CONFIG_USE_IRQ