Starterkit-4 Release 1.3

diff --git a/board/triton320/nand.c b/board/triton320/nand.c
index 819d5ce5afe650307c6b2b369391866d8a829e04..3e455c48b5a049c556c773a8c39fcf0da706b632 100755 (executable)
--- a/board/triton320/nand.c
+++ b/board/triton320/nand.c
@@ -230,8 +230,8 @@ static u_char dfc_read_byte(struct mtd_info *mtd)
 static void wait_us(unsigned long us)
 {
        unsigned long start = OSCR;
-       us *= OSCR_CLK_FREQ;
 
+       us = US_TO_OSCR(us);
        while ((OSCR - start) < us) {
                /* do nothing */
        }
@@ -251,9 +251,9 @@ static unsigned long dfc_wait_event(unsigned long event)
        if (!event)
                return 0xff000000;
        else if (event & (NDSR_CS0_CMDD | NDSR_CS0_BBD))
-               timeout = CFG_NAND_PROG_ERASE_TO * OSCR_CLK_FREQ;
+               timeout = US_TO_OSCR(CFG_NAND_PROG_ERASE_TO);
        else
-               timeout = CFG_NAND_OTHER_TO * OSCR_CLK_FREQ;
+               timeout = US_TO_OSCR(CFG_NAND_OTHER_TO);
 
        while(1) {
                ndsr = NDSR;

diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S
index 76d5a9490572bf0e16728560590d454d9f29bbad..c75e4b1c58947433089bf5e42a86df50883b1ffb 100755 (executable)
--- a/cpu/pxa/start.S
+++ b/cpu/pxa/start.S
@@ -252,10 +252,10 @@ cpu_init_crit:
 
        ldr     r0, =ACCR
        /* KaRo: do not clear other clock fields, otherwise boards still running in SDRAM will crash here */
-       ldr     r2, =~(ACCR_XN_MASK | ACCR_XL_MASK)
+       ldr     r2, =~(ACCR_SMC_MASK | ACCR_XN_MASK | ACCR_XL_MASK)
        ldr     r1, [r0]
        and     r2, r2, r1
-       ldr     r1, =(((CFG_MONAHANS_TURBO_RUN_MODE_RATIO<<8) & ACCR_XN_MASK) | \
+       ldr     r1, =((2 << 23) | ((CFG_MONAHANS_TURBO_RUN_MODE_RATIO << 8) & ACCR_XN_MASK) | \
                      (CFG_MONAHANS_RUN_MODE_OSC_RATIO & ACCR_XL_MASK))
        orr     r2, r2, r1
        str     r2, [r0]

diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index b246d1f769c3bfddeb3758dbb2f6b8bd5907a381..e93e1cb25fe3516313969e62194eb888e8edc8c5 100755 (executable)
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -881,7 +881,8 @@ typedef void                (*ExcpHndlr) (void) ;
 #define OMCR10         __REG(0x40A000D8)  /* OS Match Control Register 10 */
 #define OMCR11         __REG(0x40A000DC)  /* OS Match Control Register 11 */
 
-#define OSCR_CLK_FREQ   3.250             /* MHz */
+//#define OSCR_CLK_FREQ        3.250              /* MHz */
+#define US_TO_OSCR(u)  (((u) * 3250 + 999) / 1000)
 #endif /* CONFIG_CPU_MONAHANS */
 
 #define OSSR_M4                (1 << 4)        /* Match status channel 4 */