imx6: iomux: remove use of NO_PAD_CTRL

diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index 1a29b6f4bd0639ff06aef6056b70b1ca83b421db..72745f63e3bf8304cf5bdc4ae0a7837a994134ba 100644 (file)
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -130,7 +130,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = {
        MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT5__GPIO_7_0    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
+       MX6_PAD_SD3_DAT5__GPIO_7_0, /* CD */
 };
 
 iomux_v3_cfg_t const usdhc4_pads[] = {
@@ -140,7 +140,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = {
        MX6_PAD_SD4_DAT1__USDHC4_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD4_DAT2__USDHC4_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD4_DAT3__USDHC4_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_NANDF_D6__GPIO_2_6    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
+       MX6_PAD_NANDF_D6__GPIO_2_6, /* CD */
 };
 
 iomux_v3_cfg_t const enet_pads1[] = {
@@ -154,20 +154,20 @@ iomux_v3_cfg_t const enet_pads1[] = {
        MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL),
        MX6_PAD_ENET_REF_CLK__ENET_TX_CLK       | MUX_PAD_CTRL(ENET_PAD_CTRL),
        /* pin 35 - 1 (PHY_AD2) on reset */
-       MX6_PAD_RGMII_RXC__GPIO_6_30            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RXC__GPIO_6_30,
        /* pin 32 - 1 - (MODE0) all */
-       MX6_PAD_RGMII_RD0__GPIO_6_25            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RD0__GPIO_6_25,
        /* pin 31 - 1 - (MODE1) all */
-       MX6_PAD_RGMII_RD1__GPIO_6_27            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RD1__GPIO_6_27,
        /* pin 28 - 1 - (MODE2) all */
-       MX6_PAD_RGMII_RD2__GPIO_6_28            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RD2__GPIO_6_28,
        /* pin 27 - 1 - (MODE3) all */
-       MX6_PAD_RGMII_RD3__GPIO_6_29            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RD3__GPIO_6_29,
        /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
-       MX6_PAD_RGMII_RX_CTL__GPIO_6_24 | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RX_CTL__GPIO_6_24,
        /* pin 42 PHY nRST */
-       MX6_PAD_EIM_D23__GPIO_3_23              | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_ENET_RXD0__GPIO_1_27            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_EIM_D23__GPIO_3_23,
+       MX6_PAD_ENET_RXD0__GPIO_1_27,
 };
 
 iomux_v3_cfg_t const enet_pads2[] = {
@@ -229,7 +229,7 @@ static void setup_iomux_enet(void)
 }
 
 iomux_v3_cfg_t const usb_pads[] = {
-       MX6_PAD_GPIO_17__GPIO_7_12 | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_GPIO_17__GPIO_7_12,
 };
 
 static void setup_iomux_uart(void)
@@ -408,11 +408,11 @@ int setup_sata(void)
 
 static iomux_v3_cfg_t const backlight_pads[] = {
        /* Backlight on RGB connector: J15 */
-       MX6_PAD_SD1_DAT3__GPIO_1_21 | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_SD1_DAT3__GPIO_1_21,
 #define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21)
 
        /* Backlight on LVDS connector: J6 */
-       MX6_PAD_SD1_CMD__GPIO_1_18 | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_SD1_CMD__GPIO_1_18,
 #define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18)
 };
 

diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
index d42152734d137c0fb8ebb771ab12fca243557096..0d07f1b8a349610e32c4a035522534e0e6d2b80d 100644 (file)
--- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
+++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
@@ -60,7 +60,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = {
        MX6_PAD_SD4_DAT5__USDHC4_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD4_DAT6__USDHC4_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD4_DAT7__USDHC4_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_NANDF_D6__GPIO_2_6    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
+       MX6_PAD_NANDF_D6__GPIO_2_6, /* CD */
 };
 
 static void setup_iomux_uart(void)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 936f029b4ec88b5e4f9a4fba7fadb29c0bc91293..288da292d5b2538d8183822a920aee811f250af3 100644 (file)
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -61,7 +61,7 @@ iomux_v3_cfg_t const enet_pads[] = {
        MX6_PAD_RGMII_RD3__ENET_RGMII_RD3       | MUX_PAD_CTRL(ENET_PAD_CTRL),
        MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL),
        /* AR8031 PHY Reset */
-       MX6_PAD_ENET_CRS_DV__GPIO_1_25          | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_ENET_CRS_DV__GPIO_1_25,
 };
 
 static void setup_iomux_enet(void)
@@ -85,7 +85,7 @@ iomux_v3_cfg_t const usdhc2_pads[] = {
        MX6_PAD_NANDF_D5__USDHC2_DAT5   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_NANDF_D6__USDHC2_DAT6   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_NANDF_D7__USDHC2_DAT7   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_NANDF_D2__GPIO_2_2      | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
+       MX6_PAD_NANDF_D2__GPIO_2_2, /* CD */
 };
 
 iomux_v3_cfg_t const usdhc3_pads[] = {
@@ -99,7 +99,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = {
        MX6_PAD_SD3_DAT5__USDHC3_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD3_DAT6__USDHC3_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD3_DAT7__USDHC3_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_NANDF_D0__GPIO_2_0    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
+       MX6_PAD_NANDF_D0__GPIO_2_0, /* CD */
 };
 
 iomux_v3_cfg_t const usdhc4_pads[] = {

diff --git a/board/freescale/titanium/titanium.c b/board/freescale/titanium/titanium.c
index 6025eb73155fbd603e4be9b43bdaba43ea28c262..82e7f984eaf1a0f93910530728a83bf3fb18014c 100644 (file)
--- a/board/freescale/titanium/titanium.c
+++ b/board/freescale/titanium/titanium.c
@@ -94,7 +94,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = {
        MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-       MX6_PAD_SD3_DAT5__GPIO_7_0    | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
+       MX6_PAD_SD3_DAT5__GPIO_7_0, /* CD */
 };
 
 iomux_v3_cfg_t const enet_pads1[] = {
@@ -108,19 +108,19 @@ iomux_v3_cfg_t const enet_pads1[] = {
        MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL),
        MX6_PAD_ENET_REF_CLK__ENET_TX_CLK       | MUX_PAD_CTRL(ENET_PAD_CTRL),
        /* pin 35 - 1 (PHY_AD2) on reset */
-       MX6_PAD_RGMII_RXC__GPIO_6_30            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RXC__GPIO_6_30,
        /* pin 32 - 1 - (MODE0) all */
-       MX6_PAD_RGMII_RD0__GPIO_6_25            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RD0__GPIO_6_25,
        /* pin 31 - 1 - (MODE1) all */
-       MX6_PAD_RGMII_RD1__GPIO_6_27            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RD1__GPIO_6_27,
        /* pin 28 - 1 - (MODE2) all */
-       MX6_PAD_RGMII_RD2__GPIO_6_28            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RD2__GPIO_6_28,
        /* pin 27 - 1 - (MODE3) all */
-       MX6_PAD_RGMII_RD3__GPIO_6_29            | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RD3__GPIO_6_29,
        /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
-       MX6_PAD_RGMII_RX_CTL__GPIO_6_24         | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_RGMII_RX_CTL__GPIO_6_24,
        /* pin 42 PHY nRST */
-       MX6_PAD_EIM_D23__GPIO_3_23              | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_EIM_D23__GPIO_3_23,
 };
 
 iomux_v3_cfg_t const enet_pads2[] = {
@@ -133,25 +133,25 @@ iomux_v3_cfg_t const enet_pads2[] = {
 };
 
 iomux_v3_cfg_t nfc_pads[] = {
-       MX6_PAD_NANDF_CLE__RAWNAND_CLE          | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_ALE__RAWNAND_ALE          | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_WP_B__RAWNAND_RESETN      | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_RB0__RAWNAND_READY0       | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_CS0__RAWNAND_CE0N         | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_CS1__RAWNAND_CE1N         | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_CS2__RAWNAND_CE2N         | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_CS3__RAWNAND_CE3N         | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_SD4_CMD__RAWNAND_RDN            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_SD4_CLK__RAWNAND_WRN            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_D0__RAWNAND_D0            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_D1__RAWNAND_D1            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_D2__RAWNAND_D2            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_D3__RAWNAND_D3            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_D4__RAWNAND_D4            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_D5__RAWNAND_D5            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_D6__RAWNAND_D6            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_NANDF_D7__RAWNAND_D7            | MUX_PAD_CTRL(NO_PAD_CTRL),
-       MX6_PAD_SD4_DAT0__RAWNAND_DQS           | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_NANDF_CLE__RAWNAND_CLE,
+       MX6_PAD_NANDF_ALE__RAWNAND_ALE,
+       MX6_PAD_NANDF_WP_B__RAWNAND_RESETN,
+       MX6_PAD_NANDF_RB0__RAWNAND_READY0,
+       MX6_PAD_NANDF_CS0__RAWNAND_CE0N,
+       MX6_PAD_NANDF_CS1__RAWNAND_CE1N,
+       MX6_PAD_NANDF_CS2__RAWNAND_CE2N,
+       MX6_PAD_NANDF_CS3__RAWNAND_CE3N,
+       MX6_PAD_SD4_CMD__RAWNAND_RDN,
+       MX6_PAD_SD4_CLK__RAWNAND_WRN,
+       MX6_PAD_NANDF_D0__RAWNAND_D0,
+       MX6_PAD_NANDF_D1__RAWNAND_D1,
+       MX6_PAD_NANDF_D2__RAWNAND_D2,
+       MX6_PAD_NANDF_D3__RAWNAND_D3,
+       MX6_PAD_NANDF_D4__RAWNAND_D4,
+       MX6_PAD_NANDF_D5__RAWNAND_D5,
+       MX6_PAD_NANDF_D6__RAWNAND_D6,
+       MX6_PAD_NANDF_D7__RAWNAND_D7,
+       MX6_PAD_SD4_DAT0__RAWNAND_DQS,
 };
 
 static void setup_gpmi_nand(void)

diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index 2f7d93b915daced42f03d8306685a8723c61d866..2b9d4baaa0b1a0f3076cb5a9d375a76a8daad173 100644 (file)
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -63,7 +63,7 @@ iomux_v3_cfg_t const usdhc1_pads[] = {
        MX6_PAD_SD1_DAT2__USDHC1_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD1_DAT3__USDHC1_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        /* Carrier MicroSD Card Detect */
-       MX6_PAD_GPIO_2__GPIO_1_2      | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_GPIO_2__GPIO_1_2,
 };
 
 static iomux_v3_cfg_t const usdhc3_pads[] = {
@@ -74,7 +74,7 @@ static iomux_v3_cfg_t const usdhc3_pads[] = {
        MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        /* SOM MicroSD Card Detect */
-       MX6_PAD_EIM_DA9__GPIO_3_9     | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_EIM_DA9__GPIO_3_9,
 };
 
 static iomux_v3_cfg_t const enet_pads[] = {
@@ -94,7 +94,7 @@ static iomux_v3_cfg_t const enet_pads[] = {
        MX6_PAD_RGMII_RD3__ENET_RGMII_RD3       | MUX_PAD_CTRL(ENET_PAD_CTRL),
        MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL      | MUX_PAD_CTRL(ENET_PAD_CTRL),
        /* AR8031 PHY Reset */
-       MX6_PAD_EIM_D29__GPIO_3_29              | MUX_PAD_CTRL(NO_PAD_CTRL),
+       MX6_PAD_EIM_D29__GPIO_3_29,
 };
 
 static void setup_iomux_uart(void)