RC=0
# Helper funcs for parsing boards.cfg
-boards_by_field()
+targets_by_field()
{
- FS="[ \t]+"
- [ -n "$3" ] && FS="$3"
- awk \
- -v field="$1" \
- -v select="$2" \
- -F "$FS" \
- '($1 !~ /^#/ && $field == select) { print $7 }' \
- boards.cfg
+ field=$1
+ regexp=$2
+
+ awk '($1 !~ /^#/ && $'"$field"' ~ /^'"$regexp"'$/) { print $7 }' \
+ boards.cfg
}
-boards_by_arch() { boards_by_field 2 "$@" ; }
-boards_by_cpu() { boards_by_field 3 "$@" "[: \t]+" ; }
-boards_by_soc() { boards_by_field 4 "$@" ; }
+
+targets_by_arch() { targets_by_field 2 "$@" ; }
+targets_by_cpu() { targets_by_field 3 "$@" ; targets_by_field 3 "$@:.*" ; }
+targets_by_soc() { targets_by_field 4 "$@" ; }
#########################################################################
## MPC5xx Systems
#########################################################################
-LIST_5xx="$(boards_by_cpu mpc5xx)"
+LIST_5xx="$(targets_by_cpu mpc5xx)"
#########################################################################
## MPC5xxx Systems
#########################################################################
-LIST_5xxx="$(boards_by_cpu mpc5xxx)"
+LIST_5xxx="$(targets_by_cpu mpc5xxx)"
#########################################################################
## MPC512x Systems
#########################################################################
-LIST_512x="$(boards_by_cpu mpc512x)"
+LIST_512x="$(targets_by_cpu mpc512x)"
#########################################################################
## MPC8xx Systems
#########################################################################
-LIST_8xx="$(boards_by_cpu mpc8xx)"
+LIST_8xx="$(targets_by_cpu mpc8xx)"
#########################################################################
## PPC4xx Systems
#########################################################################
-LIST_4xx="$(boards_by_cpu ppc4xx)"
+LIST_4xx="$(targets_by_cpu ppc4xx)"
#########################################################################
## MPC824x Systems
#########################################################################
-LIST_824x="$(boards_by_cpu mpc824x)"
+LIST_824x="$(targets_by_cpu mpc824x)"
#########################################################################
## MPC8260 Systems (includes 8250, 8255 etc.)
#########################################################################
-LIST_8260="$(boards_by_cpu mpc8260)"
+LIST_8260="$(targets_by_cpu mpc8260)"
#########################################################################
## MPC83xx Systems (includes 8349, etc.)
#########################################################################
-LIST_83xx="$(boards_by_cpu mpc83xx)"
+LIST_83xx="$(targets_by_cpu mpc83xx)"
#########################################################################
## MPC85xx Systems (includes 8540, 8560 etc.)
#########################################################################
-LIST_85xx="$(boards_by_cpu mpc85xx)"
+LIST_85xx="$(targets_by_cpu mpc85xx)"
#########################################################################
## MPC86xx Systems
#########################################################################
-LIST_86xx="$(boards_by_cpu mpc86xx)"
+LIST_86xx="$(targets_by_cpu mpc86xx)"
#########################################################################
## 74xx/7xx Systems
#########################################################################
-LIST_74xx_7xx="$(boards_by_cpu 74xx_7xx)"
+LIST_74xx_7xx="$(targets_by_cpu 74xx_7xx)"
#########################################################################
## PowerPC groups
## StrongARM Systems
#########################################################################
-LIST_SA="$(boards_by_cpu sa1100)"
+LIST_SA="$(targets_by_cpu sa1100)"
#########################################################################
## ARM7 Systems
#########################################################################
-LIST_ARM7="$(boards_by_cpu arm720t)"
+LIST_ARM7="$(targets_by_cpu arm720t)"
#########################################################################
## ARM9 Systems
#########################################################################
-LIST_ARM9="$(boards_by_cpu arm920t) \
- $(boards_by_cpu arm926ejs) \
- $(boards_by_cpu arm946es) \
+LIST_ARM9="$(targets_by_cpu arm920t) \
+ $(targets_by_cpu arm926ejs) \
+ $(targets_by_cpu arm946es) \
"
#########################################################################
## ARM11 Systems
#########################################################################
-LIST_ARM11="$(boards_by_cpu arm1136) \
- $(boards_by_cpu arm1176) \
+LIST_ARM11="$(targets_by_cpu arm1136) \
+ $(targets_by_cpu arm1176) \
"
#########################################################################
## ARMV7 Systems
#########################################################################
-LIST_ARMV7="$(boards_by_cpu armv7)"
+LIST_ARMV7="$(targets_by_cpu armv7)"
#########################################################################
## AT91 Systems
#########################################################################
-LIST_at91="$(boards_by_soc at91)"
+LIST_at91="$(targets_by_soc at91)"
#########################################################################
## Xscale Systems
#########################################################################
-LIST_pxa="$(boards_by_cpu pxa)"
+LIST_pxa="$(targets_by_cpu pxa)"
-LIST_ixp="$(boards_by_cpu ixp)"
+LIST_ixp="$(targets_by_cpu ixp)"
#########################################################################
## SPEAr Systems
#########################################################################
-LIST_spear="$(boards_by_soc spear)"
+LIST_spear="$(targets_by_soc spear)"
#########################################################################
## ARM groups
#########################################################################
-LIST_arm="$(boards_by_arch arm)"
+LIST_arm="$(targets_by_arch arm)"
#########################################################################
## MIPS Systems (default = big endian)
## OpenRISC Systems
#########################################################################
-LIST_openrisc="$(boards_by_arch openrisc)"
+LIST_openrisc="$(targets_by_arch openrisc)"
#########################################################################
## x86 Systems
#########################################################################
-LIST_x86="$(boards_by_arch x86)"
+LIST_x86="$(targets_by_arch x86)"
#########################################################################
## Nios-II Systems
#########################################################################
-LIST_nios2="$(boards_by_arch nios2)"
+LIST_nios2="$(targets_by_arch nios2)"
#########################################################################
## MicroBlaze Systems
#########################################################################
-LIST_microblaze="$(boards_by_arch microblaze)"
+LIST_microblaze="$(targets_by_arch microblaze)"
#########################################################################
## ColdFire Systems
#########################################################################
-LIST_m68k="$(boards_by_arch m68k)"
+LIST_m68k="$(targets_by_arch m68k)"
LIST_coldfire=${LIST_m68k}
#########################################################################
## AVR32 Systems
#########################################################################
-LIST_avr32="$(boards_by_arch avr32)"
+LIST_avr32="$(targets_by_arch avr32)"
#########################################################################
## Blackfin Systems
#########################################################################
-LIST_blackfin="$(boards_by_arch blackfin)"
+LIST_blackfin="$(targets_by_arch blackfin)"
#########################################################################
## SH Systems
#########################################################################
-LIST_sh2="$(boards_by_cpu sh2)"
-LIST_sh3="$(boards_by_cpu sh3)"
-LIST_sh4="$(boards_by_cpu sh4)"
+LIST_sh2="$(targets_by_cpu sh2)"
+LIST_sh3="$(targets_by_cpu sh3)"
+LIST_sh4="$(targets_by_cpu sh4)"
-LIST_sh="$(boards_by_arch sh)"
+LIST_sh="$(targets_by_arch sh)"
#########################################################################
## SPARC Systems
#########################################################################
-LIST_sparc="$(boards_by_arch sparc)"
+LIST_sparc="$(targets_by_arch sparc)"
#########################################################################
## NDS32 Systems
#########################################################################
-LIST_nds32="$(boards_by_arch nds32)"
+LIST_nds32="$(targets_by_arch nds32)"
#-----------------------------------------------------------------------
local vendor=""
# Automatic mode
- local line=`awk -F '\ +' '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
+ local line=`awk '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
if [ -z "${line}" ] ; then echo "" ; return ; fi
set ${line}
get_target_maintainers() {
local name=`echo $1 | cut -d : -f 3`
- local line=`awk -F '\ +' '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
+ local line=`awk '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
if [ -z "${line}" ]; then
echo ""
return ;
local target=$1
# Automatic mode
- local line=`egrep -i "^[[:space:]]*${target}[[:space:]]" boards.cfg`
+ local line=`awk '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
if [ -z "${line}" ] ; then echo "" ; return ; fi
LIBS-$(CONFIG_OF_EMBED) += dts/libdts.o
LIBS-y += arch/$(ARCH)/lib/lib$(ARCH).o
LIBS-y += fs/libfs.o \
- fs/cbfs/libcbfs.o \
- fs/cramfs/libcramfs.o \
- fs/ext4/libext4fs.o \
- fs/fat/libfat.o \
- fs/fdos/libfdos.o \
- fs/jffs2/libjffs2.o \
- fs/reiserfs/libreiserfs.o \
- fs/sandbox/libsandboxfs.o \
- fs/ubifs/libubifs.o \
- fs/yaffs2/libyaffs2.o \
- fs/zfs/libzfs.o
+ fs/fat/libfat.o
LIBS-y += net/libnet.o
LIBS-y += disk/libdisk.o
-LIBS-y += drivers/bios_emulator/libatibiosemu.o
-LIBS-y += drivers/block/libblock.o
-LIBS-$(CONFIG_BOOTCOUNT_LIMIT) += drivers/bootcount/libbootcount.o
-LIBS-y += drivers/crypto/libcrypto.o
+LIBS-y += drivers/libdrivers.o
LIBS-y += drivers/dma/libdma.o
-LIBS-y += drivers/fpga/libfpga.o
LIBS-y += drivers/gpio/libgpio.o
-LIBS-y += drivers/hwmon/libhwmon.o
LIBS-y += drivers/i2c/libi2c.o
LIBS-y += drivers/input/libinput.o
-LIBS-y += drivers/misc/libmisc.o
LIBS-y += drivers/mmc/libmmc.o
LIBS-y += drivers/mtd/libmtd.o
LIBS-y += drivers/mtd/nand/libnand.o
LIBS-y += drivers/net/libnet.o
LIBS-y += drivers/net/phy/libphy.o
LIBS-y += drivers/pci/libpci.o
-LIBS-y += drivers/pcmcia/libpcmcia.o
LIBS-y += drivers/power/libpower.o \
drivers/power/fuel_gauge/libfuel_gauge.o \
drivers/power/mfd/libmfd.o \
drivers/power/pmic/libpmic.o \
drivers/power/battery/libbattery.o
LIBS-y += drivers/spi/libspi.o
-LIBS-y += drivers/dfu/libdfu.o
ifeq ($(CPU),mpc83xx)
LIBS-y += drivers/qe/libqe.o
LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
endif
-LIBS-y += drivers/rtc/librtc.o
LIBS-y += drivers/serial/libserial.o
-LIBS-y += drivers/sound/libsound.o
-LIBS-y += drivers/tpm/libtpm.o
-LIBS-y += drivers/twserial/libtws.o
LIBS-y += drivers/usb/eth/libusb_eth.o
LIBS-y += drivers/usb/gadget/libusb_gadget.o
LIBS-y += drivers/usb/host/libusb_host.o
LIBS-y += drivers/usb/musb-new/libusb_musb-new.o
LIBS-y += drivers/usb/phy/libusb_phy.o
LIBS-y += drivers/usb/ulpi/libusb_ulpi.o
-LIBS-y += drivers/video/libvideo.o
-LIBS-y += drivers/watchdog/libwatchdog.o
LIBS-y += common/libcommon.o
LIBS-y += lib/libfdt/libfdt.o
LIBS-y += api/libapi.o
LIBS-y += post/libpost.o
LIBS-y += test/libtest.o
-ifneq ($(CONFIG_OMAP_COMMON),)
-LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
-endif
-
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610))
LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o
endif
-ifeq ($(SOC),s5pc1xx)
-LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
-endif
-ifeq ($(SOC),exynos)
-LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
-endif
-ifneq ($(CONFIG_TEGRA),)
-LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o
-LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o
-LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o
-endif
+LIBS-$(CONFIG_ARM) += arch/arm/cpu/libcpu.o
LIBS := $(addprefix $(obj),$(sort $(LIBS-y)))
.PHONY : $(LIBS)
ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
+ALL-$(CONFIG_RAMBOOT_PBL) += $(obj)u-boot.pbl
ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
ALL-$(CONFIG_SPL_FRAMEWORK) += $(obj)u-boot.img
ALL-$(CONFIG_TPL) += $(obj)tpl/u-boot-tpl.bin
endif
endif
+build := -f $(TOPDIR)/scripts/Makefile.build -C
+
all: $(ALL-y) $(SUBDIR_EXAMPLES)
$(obj)u-boot.dtb: checkdtc $(obj)u-boot
- $(MAKE) -C dts binary
+ $(MAKE) $(build) dts binary
mv $(obj)dts/dt.dtb $@
$(obj)u-boot-dtb.bin: $(obj)u-boot.bin $(obj)u-boot.dtb
-d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin depend
- $(MAKE) -C $(SRCTREE)/arch/arm/imx-common $(OBJTREE)/u-boot.imx
+ $(MAKE) $(build) $(SRCTREE)/arch/arm/imx-common $(OBJTREE)/u-boot.imx
$(obj)u-boot.kwb: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \
$(call SPL_PAD_APPEND,$<,$(obj)u-boot.bin,tpl/u-boot-tpl-pad.bin,$(CONFIG_TPL_PAD_TO))
$(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
- $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+ $(MAKE) $(build) $(SRCTREE)/arch/arm/imx-common \
$(OBJTREE)/u-boot-with-spl.imx
$(obj)u-boot-with-nand-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
- $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+ $(MAKE) $(build) $(SRCTREE)/arch/arm/imx-common \
$(OBJTREE)/u-boot-with-nand-spl.imx
$(obj)u-boot.ubl: $(obj)u-boot-with-spl.bin
$(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
- $(MAKE) -C $(SRCTREE)/$(CPUDIR)/$(SOC)/ $(OBJTREE)/u-boot.sb
+ $(MAKE) $(build) $(SRCTREE)/$(CPUDIR)/$(SOC)/ $(OBJTREE)/u-boot.sb
# On x600 (SPEAr600) U-Boot is appended to U-Boot SPL.
# Both images are created using mkimage (crc etc), so that the ROM
$(GEN_UBOOT) $(obj)common/system_map.o
endif
-$(OBJS): depend
- $(MAKE) -C $(CPUDIR) $(if $(REMOTE_BUILD),$@,$(notdir $@))
+$(OBJS):
+ @:
$(LIBS): depend $(SUBDIR_TOOLS)
- $(MAKE) -C $(dir $(subst $(obj),,$@))
+ $(MAKE) $(build) $(dir $(subst $(obj),,$@))
+ mv $(dir $@)built-in.o $@
$(LIBBOARD): depend $(LIBS)
- $(MAKE) -C $(dir $(subst $(obj),,$@))
+ $(MAKE) $(build) $(dir $(subst $(obj),,$@))
+ mv $(dir $@)built-in.o $@
$(SUBDIRS): depend
$(MAKE) -C $@ all
$(obj)include/autoconf.mk \
$(obj)include/generated/generic-asm-offsets.h \
$(obj)include/generated/asm-offsets.h
- for dir in $(SUBDIRS) $(CPUDIR) $(LDSCRIPT_MAKEFILE_DIR) ; do \
- $(MAKE) -C $$dir _depend ; done
TAG_SUBDIRS = $(SUBDIRS)
TAG_SUBDIRS += $(dir $(__LIBS))
the "silent" environment variable. See
doc/README.silent for more information.
+ CONFIG_SYS_CONSOLE_BG_COL: define the backgroundcolor, default
+ is 0x00.
+ CONFIG_SYS_CONSOLE_FG_COL: define the foregroundcolor, default
+ is 0xa0.
+
- Console Baudrate:
CONFIG_BAUDRATE - in bps
Select one of the baudrates listed in
as a convenience, when switching between booting from
RAM and NFS.
+- Bootcount:
+ CONFIG_BOOTCOUNT_LIMIT
+ Implements a mechanism for detecting a repeating reboot
+ cycle, see:
+ http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
+
+ CONFIG_BOOTCOUNT_ENV
+ If no softreset save registers are found on the hardware
+ "bootcount" is stored in the environment. To prevent a
+ saveenv on all reboots, the environment variable
+ "upgrade_available" is used. If "upgrade_available" is
+ 0, "bootcount" is always 0, if "upgrade_available" is
+ 1 "bootcount" is incremented in the environment.
+ So the Userspace Applikation must set the "upgrade_available"
+ and "bootcount" variable to 0, if a boot was successfully.
+
- Pre-Boot Commands:
CONFIG_PREBOOT
CONFIG_CMD_ELF * bootelf, bootvx
CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
CONFIG_CMD_ENV_FLAGS * display details about env flags
+ CONFIG_CMD_ENV_EXISTS * check existence of env variable
CONFIG_CMD_EXPORTENV * export the environment
CONFIG_CMD_EXT2 * ext2 command support
CONFIG_CMD_EXT4 * ext4 command support
- GPIO Support:
CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
- CONFIG_PCA953X_INFO - enable pca953x info command
The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
chip-ngpio pairs that tell the PCA953X driver the number of
for your device
- CONFIG_USBD_PRODUCTID 0xFFFF
+ Some USB device drivers may need to check USB cable attachment.
+ In this case you can enable following config in BoardName.h:
+ CONFIG_USB_CABLE_CHECK
+ This enables function definition:
+ - usb_cable_connected() in include/usb.h
+ Implementation of this function is board-specific.
+
- ULPI Layer Support:
The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
the generic ULPI layer. The generic layer accesses the ULPI PHY
second bus.
- drivers/i2c/tegra_i2c.c:
- - activate this driver with CONFIG_SYS_I2C_TEGRA
- - This driver adds 4 i2c buses with a fix speed from
- 100000 and the slave addr 0!
+ - activate this driver with CONFIG_SYS_I2C_TEGRA
+ - This driver adds 4 i2c buses with a fix speed from
+ 100000 and the slave addr 0!
- drivers/i2c/ppc4xx_i2c.c
- activate this driver with CONFIG_SYS_I2C_PPC4XX
- CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
- CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
+ - drivers/i2c/i2c_mxc.c
+ - activate this driver with CONFIG_SYS_I2C_MXC
+ - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
+ - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
+ - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
+ - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
+ - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
+ - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
+ If thoses defines are not set, default value is 100000
+ for speed, and 0 for slave.
+
+ - drivers/i2c/rcar_i2c.c:
+ - activate this driver with CONFIG_SYS_I2C_RCAR
+ - This driver adds 4 i2c buses
+
+ - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
+ - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
+ - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
+ - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
+ - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
+ - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
+ - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
+ - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
+ - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
+
additional defines:
CONFIG_SYS_NUM_I2C_BUSES
NOTE : currently only supported on AM335x platforms.
+- CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC:
+ Enables the RTC32K OSC on AM33xx based plattforms
+
Freescale QE/FMAN Firmware Support:
-----------------------------------
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libapi.o
-
-COBJS-$(CONFIG_API) += api.o api_display.o api_net.o api_storage.o \
+obj-$(CONFIG_API) += api.o api_display.o api_net.o api_storage.o \
api_platform-$(ARCH).o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
--- /dev/null
+obj-$(CONFIG_TEGRA) += $(SOC)-common/
+obj-$(CONFIG_TEGRA) += tegra-common/
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = cpu.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS += generic.o
-COBJS += timer.o
-COBJS += devices.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += generic.o
+obj-y += timer.o
+obj-y += devices.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS += generic.o
-COBJS += timer.o
-COBJS += mx35_sdram.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += generic.o
+obj-y += timer.o
+obj-y += mx35_sdram.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = cpu.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o
# GNU General Public License for more details.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-SOBJS := lowlevel_init.o
-COBJS := init.o reset.o timer.o mbox.o
-
-SRCS := $(SOBJS:.o=.c) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := lowlevel_init.o
+obj-y += init.o reset.o timer.o mbox.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS += aemif.o clock.o init.o mux.o timer.o
-SOBJS += lowlevel_init.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += aemif.o clock.o init.o mux.o timer.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-y = start.o
+obj-y = interrupts.o cpu.o
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = interrupts.o cpu.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_TEGRA) += tegra-common/
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libtegra-common.o
-
-COBJS-$(CONFIG_SPL_BUILD) += spl.o
-COBJS-y += cpu.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_SPL_BUILD) += spl.o
+obj-y += cpu.o
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-#COBJS-y += cpu.o t11x.o
-COBJS-y += cpu.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+#obj-y += cpu.o t11x.o
+obj-y += cpu.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y += cpu.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += cpu.o
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y += cpu.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += cpu.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-y = start.o
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-
-COBJS-y += cpu.o
-COBJS-$(CONFIG_USE_IRQ) += interrupts.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += cpu.o
+obj-$(CONFIG_USE_IRQ) += interrupts.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-SOBJS += reset.o
-COBJS += timer.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += reset.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-SOBJS += lowlevel_init.o
-COBJS += reset.o
-COBJS += timer.o
-COBJS += clock.o
-COBJS += cpu.o
-COBJS += at91rm9200_devices.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += lowlevel_init.o
+obj-y += reset.o
+obj-y += timer.o
+obj-y += clock.o
+obj-y += cpu.o
+obj-y += at91rm9200_devices.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-LIB = $(obj)lib$(SOC).o
-
-COBJS = cpu.o led.o speed.o timer.o
-SOBJS = lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpu.o led.o speed.o timer.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS += generic.o
-COBJS += speed.o
-COBJS += timer.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += generic.o
+obj-y += speed.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-SOBJS = lowlevel_init.o
-
-COBJS = timer.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = lowlevel_init.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-$(CONFIG_USE_IRQ) += interrupts.o
-COBJS-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
-COBJS-y += speed.o
-COBJS-y += timer.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_USE_IRQ) += interrupts.o
+obj-$(CONFIG_DISPLAY_CPUINFO) += cpu_info.o
+obj-y += speed.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = cpu.o cache.o
+extra-y = start.o
+obj-y = cpu.o cache.o
ifdef CONFIG_SPL_BUILD
ifdef CONFIG_SPL_NO_CPU_SUPPORT_CODE
-START :=
+extra-y :=
endif
endif
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y = cpu.o timer.o dram.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpu.o timer.o dram.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-$(CONFIG_AT91CAP9) += at91cap9_devices.o
-COBJS-$(CONFIG_AT91SAM9260) += at91sam9260_devices.o
-COBJS-$(CONFIG_AT91SAM9G20) += at91sam9260_devices.o
-COBJS-$(CONFIG_AT91SAM9XE) += at91sam9260_devices.o
-COBJS-$(CONFIG_AT91SAM9261) += at91sam9261_devices.o
-COBJS-$(CONFIG_AT91SAM9G10) += at91sam9261_devices.o
-COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o
-COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o
-COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o
-COBJS-$(CONFIG_AT91SAM9G45) += at91sam9m10g45_devices.o
-COBJS-$(CONFIG_AT91SAM9N12) += at91sam9n12_devices.o
-COBJS-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o
-COBJS-$(CONFIG_AT91_EFLASH) += eflash.o
-COBJS-$(CONFIG_AT91_LED) += led.o
-COBJS-y += clock.o
-COBJS-y += cpu.o
-COBJS-y += reset.o
-COBJS-y += timer.o
+obj-$(CONFIG_AT91CAP9) += at91cap9_devices.o
+obj-$(CONFIG_AT91SAM9260) += at91sam9260_devices.o
+obj-$(CONFIG_AT91SAM9G20) += at91sam9260_devices.o
+obj-$(CONFIG_AT91SAM9XE) += at91sam9260_devices.o
+obj-$(CONFIG_AT91SAM9261) += at91sam9261_devices.o
+obj-$(CONFIG_AT91SAM9G10) += at91sam9261_devices.o
+obj-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o
+obj-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o
+obj-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o
+obj-$(CONFIG_AT91SAM9G45) += at91sam9m10g45_devices.o
+obj-$(CONFIG_AT91SAM9N12) += at91sam9n12_devices.o
+obj-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o
+obj-$(CONFIG_AT91_EFLASH) += eflash.o
+obj-$(CONFIG_AT91_LED) += led.o
+obj-y += clock.o
+obj-y += cpu.o
+obj-y += reset.o
+obj-y += timer.o
ifndef CONFIG_SKIP_LOWLEVEL_INIT
-SOBJS-y := lowlevel_init.o
+obj-y += lowlevel_init.o
endif
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y += cpu.o misc.o timer.o psc.o pinmux.o reset.o
-COBJS-$(CONFIG_DA850_LOWLEVEL) += da850_lowlevel.o
-COBJS-$(CONFIG_SOC_DM355) += dm355.o
-COBJS-$(CONFIG_SOC_DM365) += dm365.o
-COBJS-$(CONFIG_SOC_DM644X) += dm644x.o
-COBJS-$(CONFIG_SOC_DM646X) += dm646x.o
-COBJS-$(CONFIG_SOC_DA830) += da830_pinmux.o
-COBJS-$(CONFIG_SOC_DA850) += da850_pinmux.o
-COBJS-$(CONFIG_DRIVER_TI_EMAC) += lxt972.o dp83848.o et1011c.o ksz8873.o
+obj-y += cpu.o misc.o timer.o psc.o pinmux.o reset.o
+obj-$(CONFIG_DA850_LOWLEVEL) += da850_lowlevel.o
+obj-$(CONFIG_SOC_DM355) += dm355.o
+obj-$(CONFIG_SOC_DM365) += dm365.o
+obj-$(CONFIG_SOC_DM644X) += dm644x.o
+obj-$(CONFIG_SOC_DM646X) += dm646x.o
+obj-$(CONFIG_SOC_DA830) += da830_pinmux.o
+obj-$(CONFIG_SOC_DA850) += da850_pinmux.o
+obj-$(CONFIG_DRIVER_TI_EMAC) += lxt972.o dp83848.o et1011c.o ksz8873.o
ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_SPL_FRAMEWORK) += spl.o
-COBJS-$(CONFIG_SOC_DM365) += dm365_lowlevel.o
-COBJS-$(CONFIG_SOC_DA8XX) += da850_lowlevel.o
+obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
+obj-$(CONFIG_SOC_DM365) += dm365_lowlevel.o
+obj-$(CONFIG_SOC_DA8XX) += da850_lowlevel.o
endif
ifndef CONFIG_SKIP_LOWLEVEL_INIT
-SOBJS += lowlevel_init.o
+obj-y += lowlevel_init.o
endif
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y = cpu.o
-COBJS-y += dram.o
-COBJS-y += mpp.o
-COBJS-y += timer.o
-COBJS-y += cache.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpu.o
+obj-y += dram.o
+obj-y += mpp.o
+obj-y += timer.o
+obj-y += cache.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = cpu.o clk.o devices.o timer.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpu.o clk.o devices.o timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = clock.o reset.o timer.o
-SOBJS =
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = clock.o reset.o timer.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = generic.o timer.o reset.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = generic.o timer.o reset.o
*/
#include <common.h>
-#include <div64.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
-#include <asm/arch/clock.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define timestamp (gd->arch.tbl)
-#define lastinc (gd->arch.lastinc)
-
-/*
- * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
- * "tick" is internal timer period
- */
-#ifdef CONFIG_MX25_TIMER_HIGH_PRECISION
-/* ~0.4% error - measured with stop-watch on 100s boot-delay */
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
- tick *= CONFIG_SYS_HZ;
- do_div(tick, MXC_CLK32);
- return tick;
-}
-
-static inline unsigned long long time_to_tick(unsigned long long time)
-{
- time *= MXC_CLK32;
- do_div(time, CONFIG_SYS_HZ);
- return time;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long us)
-{
- us = us * MXC_CLK32 + 999999;
- do_div(us, 1000000);
- return us;
-}
-#else
-/* ~2% error */
-#define TICK_PER_TIME ((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
-#define US_PER_TICK (1000000 / MXC_CLK32)
-
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
- do_div(tick, TICK_PER_TIME);
- return tick;
-}
-
-static inline unsigned long long time_to_tick(unsigned long long time)
-{
- return time * TICK_PER_TIME;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long us)
-{
- us += US_PER_TICK - 1;
- do_div(us, US_PER_TICK);
- return us;
-}
-#endif
/* nothing really to do with interrupts, just starts up a counter. */
/* The 32KHz 32-bit timer overruns in 134217 seconds */
return 0;
}
-
-unsigned long long get_ticks(void)
-{
- struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
- ulong now = readl(&gpt->counter); /* current tick value */
-
- if (now >= lastinc) {
- /*
- * normal mode (non roll)
- * move stamp forward with absolut diff ticks
- */
- timestamp += (now - lastinc);
- } else {
- /* we have rollover of incrementer */
- timestamp += (0xFFFFFFFF - lastinc) + now;
- }
- lastinc = now;
- return timestamp;
-}
-
-ulong get_timer_masked(void)
-{
- /*
- * get_ticks() returns a long long (64 bit), it wraps in
- * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
- * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
- * 5 * 10^6 days - long enough.
- */
- return tick_to_time(get_ticks());
-}
-
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-/* delay x useconds AND preserve advance timstamp value */
-void __udelay(unsigned long usec)
-{
- unsigned long long tmp;
- ulong tmo;
-
- tmo = us_to_tick(usec);
- tmp = get_ticks() + tmo; /* get current timestamp */
-
- while (get_ticks() < tmp) /* loop till event */
- /*NOP*/;
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
- ulong tbclk;
-
- tbclk = MXC_CLK32;
- return tbclk;
-}
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = generic.o reset.o timer.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = generic.o reset.o timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-$(CONFIG_SPL_BUILD) := start.o
-LIB = $(obj)lib$(SOC).o
-
-COBJS = clock.o mxs.o iomux.o timer.o
+obj-y = clock.o mxs.o iomux.o timer.o
ifdef CONFIG_SPL_BUILD
-COBJS += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
+obj-y += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
endif
-SRCS := $(START:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
# Specify the target for use in elftosb call
-ELFTOSB_TARGET-$(CONFIG_MX23) = imx23
-ELFTOSB_TARGET-$(CONFIG_MX28) = imx28
+MKIMAGE_TARGET-$(CONFIG_MX23) = mx23
+MKIMAGE_TARGET-$(CONFIG_MX28) = mx28
-$(OBJTREE)/u-boot.bd: $(SRCTREE)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd
+$(OBJTREE)/mxsimage.cfg: $(SRCTREE)/$(CPUDIR)/$(SOC)/mxsimage.$(MKIMAGE_TARGET-y).cfg
sed "s@OBJTREE@$(OBJTREE)@g" $^ > $@
-$(OBJTREE)/u-boot.sb: $(OBJTREE)/u-boot.bin $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/u-boot.bd
- elftosb -zf $(ELFTOSB_TARGET-y) -c $(OBJTREE)/u-boot.bd -o $(OBJTREE)/u-boot.sb
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+$(OBJTREE)/u-boot.sb: $(OBJTREE)/u-boot.bin $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/mxsimage.cfg
+ $(OBJTREE)/tools/mkimage -n $(OBJTREE)/mxsimage.cfg -T mxsimage $@
SECTION 0x0 BOOTABLE
TAG LAST
- LOAD 0x0 spl/u-boot-spl.bin
+ LOAD 0x0 OBJTREE/spl/u-boot-spl.bin
CALL 0x14 0x0
- LOAD 0x40000100 u-boot.bin
+ LOAD 0x40000100 OBJTREE/u-boot.bin
CALL 0x40000100 0x0
SECTION 0x0 BOOTABLE
TAG LAST
- LOAD 0x0 spl/u-boot-spl.bin
+ LOAD 0x0 OBJTREE/spl/u-boot-spl.bin
LOAD IVT 0x8000 0x14
CALL HAB 0x8000 0x0
- LOAD 0x40000100 u-boot.bin
+ LOAD 0x40000100 OBJTREE/u-boot.bin
LOAD IVT 0x8000 0x40000100
CALL HAB 0x8000 0x0
clrsetbits_le32(&power_regs->hw_power_5vctrl,
POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK,
0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
+
+ mxs_power_enable_4p2();
}
/**
*/
_reset:
+ /*
+ * If the CPU is configured in "Wait JTAG connection mode", the stack
+ * pointer is not configured and is zero. This will cause crash when
+ * trying to push data onto stack right below here. Load the SP and make
+ * it point to the end of OCRAM if the SP is zero.
+ */
+ cmp sp, #0x00000000
+ ldreq sp, =CONFIG_SYS_INIT_SP_ADDR
+
/*
* Store all registers on old stack pointer, this will allow us later to
* return to the BootROM and let the BootROM load U-Boot into RAM.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = timer.o gpio.o
-SOBJS = reset.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS)) $(addprefix $(obj),$(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = timer.o gpio.o
+obj-y += reset.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = timer.o cpuinfo.o
-SOBJS = reset.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = timer.o cpuinfo.o
+obj-y += reset.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y = cpu.o
-COBJS-y += dram.o
-COBJS-y += timer.o
+obj-y = cpu.o
+obj-y += dram.o
+obj-y += timer.o
ifndef CONFIG_SKIP_LOWLEVEL_INIT
-SOBJS := lowlevel_init.o
+obj-y += lowlevel_init.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y = cpu.o timer.o dram.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpu.o timer.o dram.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y := cpu.o \
+obj-y := cpu.o \
reset.o \
timer.o
ifdef CONFIG_SPL_BUILD
-COBJS-y += spl.o spl_boot.o
-COBJS-$(CONFIG_SPEAR600) += spear600.o
-COBJS-$(CONFIG_DDR_MT47H64M16) += spr600_mt47h64m16_3_333_cl5_psync.o
-COBJS-$(CONFIG_DDR_MT47H32M16) += spr600_mt47h32m16_333_cl5_psync.o
-COBJS-$(CONFIG_DDR_MT47H32M16) += spr600_mt47h32m16_37e_166_cl4_sync.o
-COBJS-$(CONFIG_DDR_MT47H128M8) += spr600_mt47h128m8_3_266_cl5_async.o
+obj-y += spl.o spl_boot.o
+obj-$(CONFIG_SPEAR600) += spear600.o
+obj-$(CONFIG_DDR_MT47H64M16) += spr600_mt47h64m16_3_333_cl5_psync.o
+obj-$(CONFIG_DDR_MT47H32M16) += spr600_mt47h32m16_333_cl5_psync.o
+obj-$(CONFIG_DDR_MT47H32M16) += spr600_mt47h32m16_37e_166_cl4_sync.o
+obj-$(CONFIG_DDR_MT47H128M8) += spr600_mt47h128m8_3_266_cl5_async.o
endif
-SRCS := $(START:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-$(CONFIG_SPL_BUILD) := start.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = timer.o
-SOBJS = reset.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = timer.o
+obj-y += reset.o
#include <common.h>
-#define TIMER_LOAD_VAL 0xffffffff
-
-/* macro to read the 32 bit timer */
-#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define timestamp gd->arch.tbl
-#define lastdec gd->arch.lastinc
-
#define TIMER_ENABLE (1 << 7)
#define TIMER_MODE_MSK (1 << 6)
#define TIMER_MODE_FR (0 << 6)
*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = tmr_ctrl_val;
- /* init the timestamp and lastdec value */
- reset_timer_masked();
-
return 0;
}
-/*
- * timer without interrupts
- */
-ulong get_timer (ulong base)
-{
- return get_timer_masked () - base;
-}
-
-/* delay x useconds AND preserve advance timestamp value */
-void __udelay (unsigned long usec)
-{
- ulong tmo, tmp;
-
- if(usec >= 1000){ /* if "big" number, spread normalization to seconds */
- tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
- tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
- tmo /= 1000; /* finish normalize. */
- }else{ /* else small number, don't kill it prior to HZ multiply */
- tmo = usec * CONFIG_SYS_HZ;
- tmo /= (1000*1000);
- }
-
- tmp = get_timer (0); /* get current timestamp */
- if( (tmo + tmp + 1) < tmp ) /* if setting this fordward will roll time stamp */
- reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */
- else
- tmo += tmp; /* else, set advancing stamp wake up time */
-
- while (get_timer_masked () < tmo)/* loop till event */
- /*NOP*/;
-}
-
-void reset_timer_masked (void)
-{
- /* reset time */
- lastdec = READ_TIMER; /* capure current decrementer value time */
- timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
-ulong get_timer_masked (void)
-{
- ulong now = READ_TIMER; /* current tick value */
-
- if (lastdec >= now) { /* normal mode (non roll) */
- /* normal mode */
- timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
- } else { /* we have overflow of the count down timer */
- /* nts = ts + ld + (TLV - now)
- * ts=old stamp, ld=time that passed before passing through -1
- * (TLV-now) amount of time after passing though -1
- * nts = new "advancing time stamp"...it could also roll and cause problems.
- */
- timestamp += lastdec + TIMER_LOAD_VAL - now;
- }
- lastdec = now;
-
- return timestamp;
-}
-
-/* waits specified delay value and resets timestamp */
-void udelay_masked (unsigned long usec)
-{
- ulong tmo;
- ulong endtime;
- signed long diff;
-
- if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
- tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
- tmo *= CONFIG_SYS_HZ; /* find number of "ticks" to wait to achieve target */
- tmo /= 1000; /* finish normalize. */
- } else { /* else small number, don't kill it prior to HZ multiply */
- tmo = usec * CONFIG_SYS_HZ;
- tmo /= (1000*1000);
- }
-
- endtime = get_timer_masked () + tmo;
-
- do {
- ulong now = get_timer_masked ();
- diff = endtime - now;
- } while (diff >= 0);
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk (void)
-{
- ulong tbclk;
-
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
-}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-y = start.o
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-
-COBJS = cpu.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpu.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = cpu.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-y := start.o
-LIB = $(obj)lib$(CPU).o
+obj-y += cache_v7.o
-START := start.o
-
-COBJS += cache_v7.o
-
-COBJS += cpu.o
-COBJS += syslib.o
+obj-y += cpu.o
+obj-y += syslib.o
ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX),)
-SOBJS += lowlevel_init.o
+ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
+obj-y += lowlevel_init.o
+endif
endif
ifneq ($(CONFIG_ARMV7_NONSEC)$(CONFIG_ARMV7_VIRT),)
-SOBJS += nonsec_virt.o
-COBJS += virt-v7.o
+obj-y += nonsec_virt.o
+obj-y += virt-v7.o
endif
-SRCS := $(START:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
+obj-$(CONFIG_OMAP_COMMON) += omap-common/
+obj-$(CONFIG_TEGRA) += tegra-common/
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+ifneq (,$(filter s5pc1xx exynos,$(SOC)))
+obj-y += s5p-common/
+endif
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-$(CONFIG_AM33XX) += clock_am33xx.o
-COBJS-$(CONFIG_TI814X) += clock_ti814x.o
-COBJS-$(CONFIG_AM43XX) += clock_am43xx.o
+obj-$(CONFIG_AM33XX) += clock_am33xx.o
+obj-$(CONFIG_TI814X) += clock_ti814x.o
+obj-$(CONFIG_AM43XX) += clock_am43xx.o
ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX),)
-COBJS += clock.o
+obj-y += clock.o
endif
-COBJS-$(CONFIG_TI816X) += clock_ti816x.o
-COBJS += sys_info.o
-COBJS += mem.o
-COBJS += ddr.o
-COBJS += emif4.o
-COBJS += board.o
-COBJS += mux.o
-COBJS-$(CONFIG_NAND_OMAP_GPMC) += elm.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(COBJS-y) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_TI816X) += clock_ti816x.o
+obj-y += sys_info.o
+obj-y += mem.o
+obj-y += ddr.o
+obj-y += emif4.o
+obj-y += board.o
+obj-y += mux.o
+obj-$(CONFIG_NAND_OMAP_GPMC) += elm.o
do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
}
+#if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
static void rtc32k_enable(void)
{
struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE;
/* Enable the RTC 32K OSC by setting bits 3 and 6. */
writel((1 << 3) | (1 << 6), &rtc->osc);
}
+#endif
static void uart_soft_reset(void)
{
#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
prcm_init();
set_mux_conf_regs();
+#if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
/* Enable RTC32K clock */
rtc32k_enable();
+#endif
sdram_init();
#endif
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-$(CONFIG_SAMA5D3) += sama5d3_devices.o
-COBJS-y += clock.o
-COBJS-y += cpu.o
-COBJS-y += reset.o
-COBJS-y += timer.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_SAMA5D3) += sama5d3_devices.o
+obj-y += clock.o
+obj-y += cpu.o
+obj-y += reset.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y += clock.o power.o soc.o system.o pinmux.o tzpc.o
+obj-y += clock.o power.o soc.o system.o pinmux.o tzpc.o
ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_EXYNOS5) += clock_init_exynos5.o
-COBJS-$(CONFIG_EXYNOS5) += dmc_common.o dmc_init_ddr3.o
-COBJS-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o
-COBJS-y += spl_boot.o
-COBJS-y += lowlevel_init.o
+obj-$(CONFIG_EXYNOS5) += clock_init_exynos5.o
+obj-$(CONFIG_EXYNOS5) += dmc_common.o dmc_init_ddr3.o
+obj-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o
+obj-y += spl_boot.o
+obj-y += lowlevel_init.o
endif
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
exynos5_set_usbhost_phy_ctrl(enable);
}
+static void exynos5_set_usbdrd_phy_ctrl(unsigned int enable)
+{
+ struct exynos5_power *power =
+ (struct exynos5_power *)samsung_get_base_power();
+
+ if (enable) {
+ /* Enabling USBDRD_PHY */
+ setbits_le32(&power->usbdrd_phy_control,
+ POWER_USB_DRD_PHY_CTRL_EN);
+ } else {
+ /* Disabling USBDRD_PHY */
+ clrbits_le32(&power->usbdrd_phy_control,
+ POWER_USB_DRD_PHY_CTRL_EN);
+ }
+}
+
+void set_usbdrd_phy_ctrl(unsigned int enable)
+{
+ if (cpu_is_exynos5())
+ exynos5_set_usbdrd_phy_ctrl(enable);
+}
+
static void exynos5_dp_phy_control(unsigned int enable)
{
unsigned int cfg;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS := timer.o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := timer.o
*/
#include <common.h>
-#include <div64.h>
-#include <linux/types.h> /* for size_t */
-#include <linux/stddef.h> /* for NULL */
#include <asm/io.h>
#include <asm/arch-armv7/systimer.h>
#undef SYSTIMER_BASE
#define SYSTIMER_BASE 0xFFF34000 /* Timer 0 and 1 base */
-#define SYSTIMER_RATE (150000000 / 256)
-static ulong timestamp;
-static ulong lastinc;
static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;
/*
return 0;
}
-
-#define TICK_PER_TIME ((SYSTIMER_RATE + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
-#define NS_PER_TICK (1000000000 / SYSTIMER_RATE)
-
-static inline unsigned long long tick_to_time(unsigned long long tick)
-{
- do_div(tick, TICK_PER_TIME);
- return tick;
-}
-
-static inline unsigned long long time_to_tick(unsigned long long time)
-{
- return time * TICK_PER_TIME;
-}
-
-static inline unsigned long long us_to_tick(unsigned long long us)
-{
- unsigned long long tick = us * 1000;
- tick += NS_PER_TICK - 1;
- do_div(tick, NS_PER_TICK);
- return tick;
-}
-
-unsigned long long get_ticks(void)
-{
- ulong now = ~readl(&systimer_base->timer0value);
-
- if (now >= lastinc) /* normal mode (non roll) */
- /* move stamp forward with absolut diff ticks */
- timestamp += (now - lastinc);
- else /* we have rollover of incrementer */
- timestamp += (0xFFFFFFFF - lastinc) + now;
- lastinc = now;
- return timestamp;
-}
-
-/*
- * Delay x useconds AND preserve advance timstamp value
- * assumes timer is ticking at 1 msec
- */
-void __udelay(ulong usec)
-{
- unsigned long long tmp;
- ulong tmo;
-
- tmo = us_to_tick(usec);
- tmp = get_ticks() + tmo; /* get current timestamp */
-
- while (get_ticks() < tmp) /* loop till event */
- /*NOP*/;
-}
-
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-void reset_timer_masked(void)
-{
- lastinc = ~readl(&systimer_base->timer0value);
- timestamp = 0;
-}
-
-void reset_timer(void)
-{
- reset_timer_masked();
-}
-
-ulong get_timer_masked(void)
-{
- return tick_to_time(get_ticks());
-}
-
-ulong get_tbclk(void)
-{
- return SYSTIMER_RATE;
-}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = soc.o clock.o
-SOBJS = lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := soc.o clock.o
+obj-y += lowlevel_init.o
MXC_CCM_CCGR2_USBOH3_60M(cg));
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0, to 1 for i.MX51 and 2 for i.MX53 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
#endif
mcr 15, 1, r0, c9, c0, 2
+
+ /* enable L2 cache */
+ mrc 15, 0, r0, c1, c0, 1
+ orr r0, r0, #2
+ mcr 15, 0, r0, c1, c0, 1
+
.endm /* init_l2cc */
/* AIPS setup - Only setup MPROTx registers.
#endif /* CONFIG_MX53 */
.endm
-.macro setup_wdog
- ldr r0, =WDOG1_BASE_ADDR
- mov r1, #0x30
- strh r1, [r0]
-.endm
-
ENTRY(lowlevel_init)
mov r10, lr
mov r4, #0 /* Fix R4 to 0 */
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y = soc.o clock.o
-COBJS-$(CONFIG_SECURE_BOOT) += hab.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := soc.o clock.o
+obj-$(CONFIG_SECURE_BOOT) += hab.o
}
-#ifdef CONFIG_I2C_MXC
+#ifdef CONFIG_SYS_I2C_MXC
/* i2c_num can be from 0 - 2 */
int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
{
}
/* NOTREACHED */
}
+static u32 mxc_get_pll_pfd(enum pll_clocks pll, int pfd_num)
+{
+ u32 div;
+ u64 freq;
+
+ switch (pll) {
+ case PLL_BUS:
+ if (pfd_num == 3) {
+ /* No PFD3 on PPL2 */
+ return 0;
+ }
+ div = __raw_readl(&imx_ccm->analog_pfd_528);
+ freq = (u64)decode_pll(PLL_BUS, MXC_HCLK);
+ break;
+ case PLL_USBOTG:
+ div = __raw_readl(&imx_ccm->analog_pfd_480);
+ freq = (u64)decode_pll(PLL_USBOTG, MXC_HCLK);
+ break;
+ default:
+ /* No PFD on other PLL */
+ return 0;
+ }
+
+ return (freq * 18) / ((div & ANATOP_PFD_FRAC_MASK(pfd_num)) >>
+ ANATOP_PFD_FRAC_SHIFT(pfd_num));
+}
static u32 get_mcu_main_clk(void)
{
freq = decode_pll(PLL_BUS, MXC_HCLK);
break;
case 1:
- freq = PLL2_PFD2_FREQ;
+ freq = mxc_get_pll_pfd(PLL_BUS, 2);
break;
case 2:
- freq = PLL2_PFD0_FREQ;
+ freq = mxc_get_pll_pfd(PLL_BUS, 0);
break;
case 3:
- freq = PLL2_PFD2_DIV_FREQ;
+ /* static / 2 divider */
+ freq = mxc_get_pll_pfd(PLL_BUS, 2) / 2;
break;
default:
break;
static u32 get_uart_clk(void)
{
u32 reg, uart_podf;
- u32 freq = PLL3_80M;
+ u32 freq = decode_pll(PLL_USBOTG, MXC_HCLK) / 6; /* static divider */
reg = __raw_readl(&imx_ccm->cscdr1);
#ifdef CONFIG_MX6SL
if (reg & MXC_CCM_CSCDR1_UART_CLK_SEL)
reg &= MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK;
cspi_podf = reg >> MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET;
- return PLL3_60M / (cspi_podf + 1);
+ return decode_pll(PLL_USBOTG, MXC_HCLK) / (8 * (cspi_podf + 1));
}
static u32 get_axi_clk(void)
if (cbcdr & MXC_CCM_CBCDR_AXI_SEL) {
if (cbcdr & MXC_CCM_CBCDR_AXI_ALT_SEL)
- root_freq = PLL2_PFD2_FREQ;
+ root_freq = mxc_get_pll_pfd(PLL_BUS, 2);
else
- root_freq = PLL3_PFD1_FREQ;
+ root_freq = mxc_get_pll_pfd(PLL_USBOTG, 1);
} else
root_freq = get_periph_clk();
root_freq = decode_pll(PLL_USBOTG, MXC_HCLK);
break;
case 2:
- root_freq = PLL2_PFD2_FREQ;
+ root_freq = mxc_get_pll_pfd(PLL_BUS, 2);
break;
case 3:
- root_freq = PLL2_PFD0_FREQ;
+ root_freq = mxc_get_pll_pfd(PLL_BUS, 0);
break;
}
freq = decode_pll(PLL_BUS, MXC_HCLK);
break;
case 1:
- freq = PLL2_PFD2_FREQ;
+ freq = mxc_get_pll_pfd(PLL_BUS, 2);
break;
case 2:
- freq = PLL2_PFD0_FREQ;
+ freq = mxc_get_pll_pfd(PLL_BUS, 0);
break;
case 3:
- freq = PLL2_PFD2_DIV_FREQ;
+ /* static / 2 divider */
+ freq = mxc_get_pll_pfd(PLL_BUS, 2) / 2;
}
return freq / (podf + 1);
}
if (clk_sel)
- root_freq = PLL2_PFD0_FREQ;
+ root_freq = mxc_get_pll_pfd(PLL_BUS, 0);
else
- root_freq = PLL2_PFD2_FREQ;
+ root_freq = mxc_get_pll_pfd(PLL_BUS, 2);
return root_freq / (usdhc_podf + 1);
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libomap-common.o
-
-COBJS := reset.o
-COBJS += timer.o
-COBJS += utils.o
+obj-y := reset.o
+obj-y += timer.o
+obj-y += utils.o
ifneq ($(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
-COBJS += hwinit-common.o
-COBJS += clocks-common.o
-COBJS += emif-common.o
-COBJS += vc.o
-COBJS += abb.o
+obj-y += hwinit-common.o
+obj-y += clocks-common.o
+obj-y += emif-common.o
+obj-y += vc.o
+obj-y += abb.o
endif
ifeq ($(CONFIG_OMAP34XX),)
-COBJS += boot-common.o
-SOBJS += lowlevel_init.o
+obj-y += boot-common.o
+obj-y += lowlevel_init.o
endif
ifndef CONFIG_SPL_BUILD
ifneq ($(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
-COBJS += mem-common.o
+obj-y += mem-common.o
endif
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
debug("MPU DPLL locked\n");
}
-#ifdef CONFIG_USB_EHCI_OMAP
+#if defined(CONFIG_USB_EHCI_OMAP) || defined(CONFIG_USB_XHCI_OMAP)
static void setup_usb_dpll(void)
{
const struct dpll_params *params;
/* MPU dpll */
configure_mpu_dpll();
-#ifdef CONFIG_USB_EHCI_OMAP
+#if defined(CONFIG_USB_EHCI_OMAP) || defined(CONFIG_USB_XHCI_OMAP)
setup_usb_dpll();
#endif
params = get_ddr_dpll_params(*dplls_data);
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+obj-y := lowlevel_init.o
-LIB = $(obj)lib$(SOC).o
-
-SOBJS := lowlevel_init.o
-
-COBJS += board.o
-COBJS += clock.o
-COBJS += mem.o
-COBJS += sys_info.o
+obj-y += board.o
+obj-y += clock.o
+obj-y += mem.o
+obj-y += sys_info.o
ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_SPL_OMAP3_ID_NAND) += spl_id_nand.o
+obj-$(CONFIG_SPL_OMAP3_ID_NAND) += spl_id_nand.o
endif
-COBJS-$(CONFIG_DRIVER_TI_EMAC) += emac.o
-COBJS-$(CONFIG_EMIF4) += emif4.o
-COBJS-$(CONFIG_SDRC) += sdrc.o
-COBJS-$(CONFIG_USB_MUSB_AM35X) += am35x_musb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(COBJS-y) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_DRIVER_TI_EMAC) += emac.o
+obj-$(CONFIG_EMIF4) += emif4.o
+obj-$(CONFIG_SDRC) += sdrc.o
+obj-$(CONFIG_USB_MUSB_AM35X) += am35x_musb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS += sdram_elpida.o
-COBJS += hwinit.o
-COBJS += emif.o
-COBJS += prcm-regs.o
-COBJS += hw_data.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += sdram_elpida.o
+obj-y += hwinit.o
+obj-y += emif.o
+obj-y += prcm-regs.o
+obj-y += hw_data.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS += hwinit.o
-COBJS += emif.o
-COBJS += sdram.o
-COBJS += prcm-regs.o
-COBJS += hw_data.o
-COBJS += abb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += hwinit.o
+obj-y += emif.o
+obj-y += sdram.o
+obj-y += prcm-regs.o
+obj-y += hw_data.o
+obj-y += abb.o
struct omap_sys_ctrl_regs const omap5_ctrl = {
.control_status = 0x4A002134,
.control_std_fuse_opp_vdd_mpu_2 = 0x4A0021B4,
+ .control_phy_power_usb = 0x4A002370,
.control_padconf_core_base = 0x4A002800,
.control_paconf_global = 0x4A002DA0,
.control_paconf_mode = 0x4A002DA4,
.cm_div_m2_dpll_unipro = 0x4a0081d0,
.cm_ssc_deltamstep_dpll_unipro = 0x4a0081e8,
.cm_ssc_modfreqdiv_dpll_unipro = 0x4a0081ec,
+ .cm_coreaon_usb_phy_core_clkctrl = 0x4A008640,
.cm_coreaon_bandgap_clkctrl = 0x4a008648,
.cm_coreaon_io_srcomp_clkctrl = 0x4a008650,
.cm_l3init_p1500_clkctrl = 0x4a009678,
.cm_l3init_fsusb_clkctrl = 0x4a0096d0,
.cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0,
+ .cm_l3init_ocp2scp3_clkctrl = 0x4a0096e8,
+ .cm_l3init_usb_otg_ss_clkctrl = 0x4a0096f0,
/* prm irqstatus regs */
.prm_irqstatus_mpu_2 = 0x4ae06014,
.cm_clkmode_dpll_dsp = 0x4a005234,
.cm_shadow_freq_config1 = 0x4a005260,
.cm_clkmode_dpll_gmac = 0x4a0052a8,
+ .cm_coreaon_usb_phy2_core_clkctrl = 0x4a008688,
/* cm1.mpu */
.cm_mpu_mpu_clkctrl = 0x4a005320,
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-SOBJS = lowlevel_init.o
-COBJS-y += cpu_info.o
-COBJS-y += emac.o
-
-COBJS-$(CONFIG_DISPLAY_BOARDINFO) += board.o
-COBJS-$(CONFIG_GLOBAL_TIMER) += timer.o
-COBJS-$(CONFIG_R8A7740) += cpu_info-r8a7740.o
-COBJS-$(CONFIG_R8A7740) += pfc-r8a7740.o
-COBJS-$(CONFIG_SH73A0) += cpu_info-sh73a0.o
-COBJS-$(CONFIG_SH73A0) += pfc-sh73a0.o
-COBJS_LN-$(CONFIG_TMU_TIMER) += sh_timer.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix $(obj),$(COBJS_LN-y:.o=.c))
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS_LN-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
+obj-y = lowlevel_init.o
+obj-y += cpu_info.o
+obj-y += emac.o
+
+obj-$(CONFIG_DISPLAY_BOARDINFO) += board.o
+obj-$(CONFIG_GLOBAL_TIMER) += timer.o
+obj-$(CONFIG_R8A7740) += cpu_info-r8a7740.o
+obj-$(CONFIG_R8A7740) += pfc-r8a7740.o
+obj-$(CONFIG_SH73A0) += cpu_info-sh73a0.o
+obj-$(CONFIG_SH73A0) += pfc-sh73a0.o
+obj-$(CONFIG_TMU_TIMER) += sh_timer.o
+
+SRCS += $(obj)sh_timer.c
# from arch/sh/lib/ directory
$(obj)sh_timer.c:
@rm -f $(obj)sh_timer.c
ln -s $(SRCTREE)/arch/sh/lib/time.c $(obj)sh_timer.c
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libs5p-common.o
-
-COBJS-y += cpu_info.o
+obj-y += cpu_info.o
ifndef CONFIG_SPL_BUILD
-COBJS-y += timer.o
-COBJS-y += sromc.o
-COBJS-$(CONFIG_PWM) += pwm.o
+obj-y += timer.o
+obj-y += sromc.o
+obj-$(CONFIG_PWM) += pwm.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+obj-y = cache.o
+obj-y += reset.o
-LIB = $(obj)lib$(SOC).o
-
-SOBJS = cache.o
-SOBJS += reset.o
-
-COBJS += clock.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += clock.o
# SPDX-License-Identifier: GPL-2.0+
#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-SOBJS := lowlevel_init.o
-COBJS-y := misc.o timer.o reset_manager.o system_manager.o
-COBJS-$(CONFIG_SPL_BUILD) += spl.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := lowlevel_init.o
+obj-y += misc.o timer.o reset_manager.o system_manager.o
+obj-$(CONFIG_SPL_BUILD) += spl.o
#include <asm/io.h>
#include <asm/arch/timer.h>
-DECLARE_GLOBAL_DATA_PTR;
-
static const struct socfpga_timer *timer_base = (void *)CONFIG_SYS_TIMERBASE;
/*
writel(readl(&timer_base->ctrl) | 0x3, &timer_base->ctrl);
return 0;
}
-
-static u32 read_timer(void)
-{
- return readl(&timer_base->curr_val);
-}
-
-/*
- * Delay x useconds
- */
-void __udelay(unsigned long usec)
-{
- unsigned long now, last;
- /*
- * get the tmo value based on timer clock speed
- * tmo = delay required / period of timer clock
- */
- long tmo = usec * CONFIG_TIMER_CLOCK_KHZ / 1000;
-
- last = read_timer();
- while (tmo > 0) {
- now = read_timer();
- if (last >= now)
- /* normal mode (non roll) */
- tmo -= last - now;
- else
- /* we have overflow of the count down timer */
- tmo -= TIMER_LOAD_VAL - last + now;
- last = now;
- }
-}
-
-/*
- * Get the timer value
- */
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-/*
- * Timer : get the time difference
- * Unit of tick is based on the CONFIG_SYS_HZ
- */
-ulong get_timer_masked(void)
-{
- /* current tick value */
- ulong now = read_timer() / (CONFIG_TIMER_CLOCK_KHZ/CONFIG_SYS_HZ);
- if (gd->arch.lastinc >= now) {
- /* normal mode (non roll) */
- /* move stamp forward with absolute diff ticks */
- gd->arch.tbl += gd->arch.lastinc - now;
- } else {
- /* we have overflow of the count down timer */
- gd->arch.tbl += TIMER_LOAD_VAL - gd->arch.lastinc + now;
- }
- gd->arch.lastinc = now;
- return gd->arch.tbl;
-}
-
-/*
- * Reset the timer
- */
-void reset_timer(void)
-{
- /* capture current decrementer value time */
- gd->arch.lastinc = read_timer() /
- (CONFIG_TIMER_CLOCK_KHZ / CONFIG_SYS_HZ);
- /* start "advancing" time stamp from 0 */
- gd->arch.tbl = 0;
-}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libtegra-common.o
-
-COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj- :=
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-$(CONFIG_PWM_TEGRA) += pwm.o
-COBJS-$(CONFIG_VIDEO_TEGRA) += display.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_PWM_TEGRA) += pwm.o
+obj-$(CONFIG_VIDEO_TEGRA) += display.o
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj- :=
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = timer.o clock.o prcmu.o cpu.o
-SOBJS = lowlevel.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := timer.o clock.o prcmu.o cpu.o
+obj-y += lowlevel.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS += generic.o
-COBJS += timer.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += generic.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y := timer.o
-COBJS-y += cpu.o
-COBJS-y += ddrc.o
-COBJS-y += slcr.o
-
-COBJS := $(COBJS-y)
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := timer.o
+obj-y += cpu.o
+obj-y += ddrc.o
+obj-y += slcr.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-y = start.o
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-
-COBJS-y += cpu.o
-COBJS-$(CONFIG_USE_IRQ) += interrupts.o
-COBJS-y += timer.o
-
-SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += cpu.o
+obj-$(CONFIG_USE_IRQ) += interrupts.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-y = start.o
-LIB = $(obj)lib$(CPU).o
+obj-$(CONFIG_CPU_PXA25X) += pxa2xx.o
+obj-$(CONFIG_CPU_PXA27X) += pxa2xx.o
-START = start.o
-
-COBJS-$(CONFIG_CPU_PXA25X) = pxa2xx.o
-COBJS-$(CONFIG_CPU_PXA27X) = pxa2xx.o
-
-COBJS-y += cpuinfo.o
-
-COBJS = $(COBJS-y)
-COBJS += timer.o
-COBJS += usb.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += cpuinfo.o
+obj-y += timer.o
+obj-y += usb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-y = start.o
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-
-COBJS += cpu.o
-COBJS += timer.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += cpu.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libcputegra-common.o
-
-SOBJS += lowlevel_init.o
-COBJS-y += ap.o board.o sys_info.o timer.o clock.o cache.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += lowlevel_init.o
+obj-y += ap.o board.o sys_info.o clock.o cache.o
+++ /dev/null
-/*
- * (C) Copyright 2010,2011
- * NVIDIA Corporation <www.nvidia.com>
- *
- * (C) Copyright 2008
- * Texas Instruments
- *
- * Richard Woodruff <r-woodruff2@ti.com>
- * Syed Moahmmed Khasim <khasim@ti.com>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- * Alex Zuepke <azu@sysgo.de>
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/io.h>
-#include <asm/arch/tegra.h>
-#include <asm/arch-tegra/timer.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* counter runs at 1MHz */
-#define TIMER_CLK 1000000
-#define TIMER_LOAD_VAL 0xffffffff
-
-/* timer without interrupts */
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-/* delay x useconds */
-void __udelay(unsigned long usec)
-{
- long tmo = usec * (TIMER_CLK / 1000) / 1000;
- unsigned long now, last = timer_get_us();
-
- while (tmo > 0) {
- now = timer_get_us();
- if (last > now) /* count up timer overflow */
- tmo -= TIMER_LOAD_VAL - last + now;
- else
- tmo -= now - last;
- last = now;
- }
-}
-
-ulong get_timer_masked(void)
-{
- ulong now;
-
- /* current tick value */
- now = timer_get_us() / (TIMER_CLK / CONFIG_SYS_HZ);
-
- if (now >= gd->arch.lastinc) /* normal mode (non roll) */
- /* move stamp forward with absolute diff ticks */
- gd->arch.tbl += (now - gd->arch.lastinc);
- else /* we have rollover of incrementer */
- gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ))
- - gd->arch.lastinc) + now;
- gd->arch.lastinc = now;
- return gd->arch.tbl;
-}
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
- return CONFIG_SYS_HZ;
-}
-
-unsigned long timer_get_us(void)
-{
- struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE;
-
- return readl(&timer_base->cntr_1us);
-}
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC)-common.o
-
-COBJS-y += clock.o funcmux.o pinmux.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += clock.o funcmux.o pinmux.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
# The AVP is ARMv4T architecture so we must use special compiler
# flags for any startup files it might use.
CFLAGS_arch/arm/cpu/tegra20-common/warmboot_avp.o += -march=armv4t
-LIB = $(obj)lib$(SOC)-common.o
-
-COBJS-y += clock.o funcmux.o pinmux.o
-COBJS-$(CONFIG_TEGRA_LP0) += warmboot.o crypto.o warmboot_avp.o
-COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
-COBJS-$(CONFIG_TEGRA_PMU) += pmu.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += clock.o funcmux.o pinmux.o
+obj-$(CONFIG_TEGRA_LP0) += warmboot.o crypto.o warmboot_avp.o
+obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
+obj-$(CONFIG_TEGRA_PMU) += pmu.o
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
-include $(TOPDIR)/config.mk
-
-# The AVP is ARMv4T architecture so we must use special compiler
-# flags for any startup files it might use.
-
-LIB = $(obj)lib$(SOC)-common.o
-
-COBJS-y += clock.o funcmux.o pinmux.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += clock.o funcmux.o pinmux.o
interrupts = <0 130 0>;
};
+ xhci@12000000 {
+ compatible = "samsung,exynos5250-xhci";
+ reg = <0x12000000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ phy {
+ compatible = "samsung,exynos5250-usb3-phy";
+ reg = <0x12100000 0x100>;
+ };
+ };
+
ehci@12110000 {
compatible = "samsung,exynos-ehci";
reg = <0x12110000 0x100>;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libimx-common.o
-
ifeq ($(SOC),$(filter $(SOC),mx25 mx35 mx5 mx6 vf610))
-COBJS-y = iomux-v3.o
+obj-y = iomux-v3.o
endif
ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
-COBJS-y += timer.o cpu.o speed.o
-COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o
+obj-y += timer.o cpu.o speed.o
+obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
endif
ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
-COBJS-y += misc.o
+obj-y += misc.o
endif
-COBJS-$(CONFIG_CMD_BMODE) += cmd_bmode.o
-COBJS-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
-COBJS := $(sort $(COBJS-y))
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
+obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
+obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
$(OBJTREE)/$(patsubst "%",%,$(CONFIG_IMX_CONFIG)).cfgtmp: $(OBJTREE)/%.cfgtmp : $(SRCTREE)/%
mkdir -p $(dir $@)
$(OBJTREE)/u-boot.uim
cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim > $@
rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.uim
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
/* RTC base address */
#define RTC_BASE 0x44E3E000
+/* USB Clock Control */
+#define PRM_PER_USB_OTG_SS0_CLKCTRL (CM_PER + 0x260)
+#define PRM_PER_USB_OTG_SS1_CLKCTRL (CM_PER + 0x268)
+#define USBOTGSSX_CLKCTRL_MODULE_EN (1 << 2)
+#define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 (1 << 8)
+
+#define PRM_PER_USBPHYOCP2SCP0_CLKCTRL (CM_PER + 0x5b8)
+#define PRM_PER_USBPHYOCP2SCP1_CLKCTRL (CM_PER + 0x5c0)
+#define USBPHYOCPSCP_MODULE_EN (1 << 2)
+
#endif /* __AM43XX_HARDWARE_AM43XX_H */
#define EXYNOS4_ACE_SFR_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4_DMC_PHY_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4_AUDIOSS_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4_USB3PHY_BASE DEVICE_NOT_AVAILABLE
/* EXYNOS4X12 */
#define EXYNOS4X12_GPIO_PART3_BASE 0x03860000
#define EXYNOS4X12_ACE_SFR_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4X12_DMC_PHY_BASE DEVICE_NOT_AVAILABLE
#define EXYNOS4X12_AUDIOSS_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE
+#define EXYNOS4X12_USB3PHY_BASE DEVICE_NOT_AVAILABLE
/* EXYNOS5 Common*/
#define EXYNOS5_I2C_SPACING 0x10000
#define EXYNOS5_DMC_CTRL_BASE 0x10DD0000
#define EXYNOS5_GPIO_PART1_BASE 0x11400000
#define EXYNOS5_MIPI_DSIM_BASE 0x11D00000
+#define EXYNOS5_USB_HOST_XHCI_BASE 0x12000000
+#define EXYNOS5_USB3PHY_BASE 0x12100000
#define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000
#define EXYNOS5_USBPHY_BASE 0x12130000
#define EXYNOS5_USBOTG_BASE 0x12140000
SAMSUNG_BASE(timer, PWMTIMER_BASE)
SAMSUNG_BASE(uart, UART_BASE)
SAMSUNG_BASE(usb_phy, USBPHY_BASE)
+SAMSUNG_BASE(usb3_phy, USB3PHY_BASE)
SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE)
+SAMSUNG_BASE(usb_xhci, USB_HOST_XHCI_BASE)
SAMSUNG_BASE(usb_otg, USBOTG_BASE)
SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
SAMSUNG_BASE(power, POWER_BASE)
#define DWMCI_SET_DRV_CLK(x) ((x) << 16)
#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
+#define EMMCP_MPSBEGIN0 0x1200
+#define EMMCP_SEND0 0x1204
+#define EMMCP_CTRL0 0x120C
+
+#define MPSCTRL_SECURE_READ_BIT (0x1<<7)
+#define MPSCTRL_SECURE_WRITE_BIT (0x1<<6)
+#define MPSCTRL_NON_SECURE_READ_BIT (0x1<<5)
+#define MPSCTRL_NON_SECURE_WRITE_BIT (0x1<<4)
+#define MPSCTRL_USE_FUSE_KEY (0x1<<3)
+#define MPSCTRL_ECB_MODE (0x1<<2)
+#define MPSCTRL_ENCRYPTION (0x1<<1)
+#define MPSCTRL_VALID (0x1<<0)
+
#ifdef CONFIG_OF_CONTROL
int exynos_dwmmc_init(const void *blob);
#endif
#define POWER_USB_HOST_PHY_CTRL_EN (1 << 0)
#define POWER_USB_HOST_PHY_CTRL_DISABLE (0 << 0)
+void set_usbdrd_phy_ctrl(unsigned int enable);
+
+#define POWER_USB_DRD_PHY_CTRL_EN (1 << 0)
+#define POWER_USB_DRD_PHY_CTRL_DISABLE (0 << 0)
+
void set_dp_phy_ctrl(unsigned int enable);
#define EXYNOS_DP_PHY_ENABLE (1 << 0)
--- /dev/null
+/* Copyright (c) 2012 Samsung Electronics Co. Ltd
+ *
+ * Exynos Phy register definitions
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_XHCI_EXYNOS_H_
+#define _ASM_ARCH_XHCI_EXYNOS_H_
+
+/* Phy register MACRO definitions */
+
+#define LINKSYSTEM_FLADJ_MASK (0x3f << 1)
+#define LINKSYSTEM_FLADJ(_x) ((_x) << 1)
+#define LINKSYSTEM_XHCI_VERSION_CONTROL (0x1 << 27)
+
+#define PHYUTMI_OTGDISABLE (1 << 6)
+#define PHYUTMI_FORCESUSPEND (1 << 1)
+#define PHYUTMI_FORCESLEEP (1 << 0)
+
+#define PHYCLKRST_SSC_REFCLKSEL_MASK (0xff << 23)
+#define PHYCLKRST_SSC_REFCLKSEL(_x) ((_x) << 23)
+
+#define PHYCLKRST_SSC_RANGE_MASK (0x03 << 21)
+#define PHYCLKRST_SSC_RANGE(_x) ((_x) << 21)
+
+#define PHYCLKRST_SSC_EN (0x1 << 20)
+#define PHYCLKRST_REF_SSP_EN (0x1 << 19)
+#define PHYCLKRST_REF_CLKDIV2 (0x1 << 18)
+
+#define PHYCLKRST_MPLL_MULTIPLIER_MASK (0x7f << 11)
+#define PHYCLKRST_MPLL_MULTIPLIER_100MHZ_REF (0x19 << 11)
+#define PHYCLKRST_MPLL_MULTIPLIER_50M_REF (0x02 << 11)
+#define PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF (0x68 << 11)
+#define PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF (0x7d << 11)
+#define PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF (0x02 << 11)
+
+#define PHYCLKRST_FSEL_MASK (0x3f << 5)
+#define PHYCLKRST_FSEL(_x) ((_x) << 5)
+#define PHYCLKRST_FSEL_PAD_100MHZ (0x27 << 5)
+#define PHYCLKRST_FSEL_PAD_24MHZ (0x2a << 5)
+#define PHYCLKRST_FSEL_PAD_20MHZ (0x31 << 5)
+#define PHYCLKRST_FSEL_PAD_19_2MHZ (0x38 << 5)
+
+#define PHYCLKRST_RETENABLEN (0x1 << 4)
+
+#define PHYCLKRST_REFCLKSEL_MASK (0x03 << 2)
+#define PHYCLKRST_REFCLKSEL_PAD_REFCLK (0x2 << 2)
+#define PHYCLKRST_REFCLKSEL_EXT_REFCLK (0x3 << 2)
+
+#define PHYCLKRST_PORTRESET (0x1 << 1)
+#define PHYCLKRST_COMMONONN (0x1 << 0)
+
+#define PHYPARAM0_REF_USE_PAD (0x1 << 31)
+#define PHYPARAM0_REF_LOSLEVEL_MASK (0x1f << 26)
+#define PHYPARAM0_REF_LOSLEVEL (0x9 << 26)
+
+#define PHYPARAM1_PCS_TXDEEMPH_MASK (0x1f << 0)
+#define PHYPARAM1_PCS_TXDEEMPH (0x1c)
+
+#define PHYTEST_POWERDOWN_SSP (0x1 << 3)
+#define PHYTEST_POWERDOWN_HSP (0x1 << 2)
+
+#define PHYBATCHG_UTMI_CLKSEL (0x1 << 2)
+
+#define FSEL_CLKSEL_24M (0x5)
+
+/* XHCI PHY register structure */
+struct exynos_usb3_phy {
+ unsigned int reserve1;
+ unsigned int link_system;
+ unsigned int phy_utmi;
+ unsigned int phy_pipe;
+ unsigned int phy_clk_rst;
+ unsigned int phy_reg0;
+ unsigned int phy_reg1;
+ unsigned int phy_param0;
+ unsigned int phy_param1;
+ unsigned int phy_term;
+ unsigned int phy_test;
+ unsigned int phy_adp;
+ unsigned int phy_batchg;
+ unsigned int phy_resume;
+ unsigned int reserve2[3];
+ unsigned int link_port;
+};
+
+#endif /* _ASM_ARCH_XHCI_EXYNOS_H_ */
#define CONFIG_NR_DRAM_BANKS_MAX 2
-/* 1KHz clock tick */
-#define CONFIG_SYS_HZ 1000
-
/* UART configuration */
#if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6)
#define CONFIG_SYS_NS16550_SERIAL
#define BF_ANADIG_PFD_528_PFD0_FRAC(v) \
(((v) << 0) & BM_ANADIG_PFD_528_PFD0_FRAC)
-#define PLL2_PFD0_FREQ 352000000
-#define PLL2_PFD1_FREQ 594000000
-#define PLL2_PFD2_FREQ 396000000
-#define PLL2_PFD2_DIV_FREQ 200000000
-#define PLL3_PFD0_FREQ 720000000
-#define PLL3_PFD1_FREQ 540000000
-#define PLL3_PFD2_FREQ 508200000
-#define PLL3_PFD3_FREQ 454700000
-#define PLL3_80M 80000000
-#define PLL3_60M 60000000
-
#endif /*__ARCH_ARM_MACH_MX6_CCM_REGS_H__ */
#define MX6_IOMUXC_GPR6 0x020e0018
#define MX6_IOMUXC_GPR7 0x020e001c
+/*
+ * IOMUXC_GPR1 bit fields
+ */
+#define IOMUXC_GPR1_OTG_ID_ENET_RX_ERR (0<<13)
+#define IOMUXC_GPR1_OTG_ID_GPIO1 (1<<13)
+#define IOMUXC_GPR1_OTG_ID_MASK (1<<13)
/*
* IOMUXC_GPR13 bit fields
*/
MX6_PAD_DI0_PIN3__MMDC_MMDC_DEBUG_3 = IOMUX_PAD(0x03BC, 0x00A8, 6, 0x0000, 0, 0),
MX6_PAD_DI0_PIN3__PL301_SIM_MX6DL_PER1_HADDR_10 = IOMUX_PAD(0x03BC, 0x00A8, 7, 0x0000, 0, 0),
MX6_PAD_DI0_PIN3__LCDIF_CS = IOMUX_PAD(0x03BC, 0x00A8, 8, 0x0000, 0, 0),
- MX6_PAD_DI0_PIN4__IPU1_DI0_PIN4 = IOMUX_PAD(0x03C0, 0x00AC, 0, 0x0000, 0, PAD_CTL_DSE_120ohm),
+ MX6_PAD_DI0_PIN4__IPU1_DI0_PIN4 = IOMUX_PAD(0x03C0, 0x00AC, 0, 0x0000, 0, 0),
MX6_PAD_DI0_PIN4__LCDIF_BUSY = IOMUX_PAD(0x03C0, 0x00AC, 1, 0x08D8, 1, 0),
MX6_PAD_DI0_PIN4__AUDMUX_AUD6_RXD = IOMUX_PAD(0x03C0, 0x00AC, 2, 0x0000, 0, 0),
MX6_PAD_DI0_PIN4__USDHC1_WP = IOMUX_PAD(0x03C0, 0x00AC, 3, 0x092C, 0, 0),
{ 0x02, 0x1f, "SSP SPI #1, master, NOR" },
{ 0x03, 0x1f, "SSP SPI #2, master, NOR" },
{ 0x04, 0x1f, "NAND" },
+ { 0x06, 0x1f, "JTAG" },
{ 0x08, 0x1f, "SSP SPI #3, master, EEPROM" },
{ 0x09, 0x1f, "SSP SD/MMC #0" },
{ 0x0a, 0x1f, "SSP SD/MMC #1" },
{ 0x13, 0x1f, "SSP SPI #3, master, 1V8 NOR" },
{ 0x04, 0x1f, "NAND, 3V3" },
{ 0x14, 0x1f, "NAND, 1V8" },
+ { 0x06, 0x1f, "JTAG" },
{ 0x08, 0x1f, "SSP SPI #3, master, 3V3 EEPROM" },
{ 0x18, 0x1f, "SSP SPI #3, master, 1V8 EEPROM" },
{ 0x09, 0x1f, "SSP SD/MMC #0, 3V3" },
#define OPTFCLKEN_USB_CH1_CLK_ENABLE (1 << 9)
#define OPTFCLKEN_USB_CH2_CLK_ENABLE (1 << 10)
+/* CM_COREAON_USB_PHY_CORE_CLKCTRL */
+#define USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8)
+
+/* CM_L3INIT_USB_OTG_SS_CLKCTRL */
+#define OTG_SS_CLKCTRL_MODULEMODE_HW (1 << 0)
+#define OPTFCLKEN_REFCLK960M (1 << 8)
+
+/* CM_L3INIT_OCP2SCP1_CLKCTRL */
+#define OCP2SCP1_CLKCTRL_MODULEMODE_HW (1 << 0)
+
/* CM_MPU_MPU_CLKCTRL */
#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_SHIFT 24
#define MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK (3 << 24)
/* PRM_VC_VAL_BYPASS */
#define PRM_VC_I2C_CHANNEL_FREQ_KHZ 400
+/* CTRL_CORE_SRCOMP_NORTH_SIDE */
+#define USB2PHY_DISCHGDET (1 << 29)
+#define USB2PHY_AUTORESUME_EN (1 << 30)
+
/* SMPS */
#define SMPS_I2C_SLAVE_ADDR 0x12
#define SMPS_REG_ADDR_12_MPU 0x23
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
-#include <linux/config.h>
#include <asm/mach-types.h>
/*
*/
#define PHYS_OFFSET (0x0c000000UL)
-#include <linux/config.h>
-
-
/* Modified for S3C2400, by chc, 20010509 */
#define RAM_IN_BANK_0 32*1024*1024
#define RAM_IN_BANK_1 0
/* USB3_IF_USB_PHY_VBUS_SENSORS_0 */
#define VBUS_VLD_STS (1 << 26)
-
/* Setup USB on the board */
-int board_usb_init(const void *blob);
+int usb_process_devicetree(const void *blob);
#endif /* _TEGRA_USB_H_ */
#ifndef __ASM_ARM_ATOMIC_H
#define __ASM_ARM_ATOMIC_H
-#include <linux/config.h>
-
#ifdef CONFIG_SMP
#error SMP not supported
#endif
struct ehci_hccr;
struct ehci_hcor;
-int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor);
+int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor);
int omap_ehci_hcd_stop(void);
#endif /* _OMAP_COMMON_EHCI_H_ */
#if 0 /* XXX###XXX */
-#include <linux/config.h>
#include <asm/arch/memory.h>
/*
u32 cm_div_m2_dpll_unipro;
u32 cm_ssc_deltamstep_dpll_unipro;
u32 cm_ssc_modfreqdiv_dpll_unipro;
+ u32 cm_coreaon_usb_phy_core_clkctrl;
+ u32 cm_coreaon_usb_phy2_core_clkctrl;
/* cm2.core */
u32 cm_coreaon_bandgap_clkctrl;
u32 cm_l3init_p1500_clkctrl;
u32 cm_l3init_fsusb_clkctrl;
u32 cm_l3init_ocp2scp1_clkctrl;
+ u32 cm_l3init_ocp2scp3_clkctrl;
+ u32 cm_l3init_usb_otg_ss_clkctrl;
u32 prm_irqstatus_mpu_2;
u32 control_core_mac_id_1_lo;
u32 control_core_mac_id_1_hi;
u32 control_std_fuse_opp_vdd_mpu_2;
+ u32 control_phy_power_usb;
u32 control_core_mmr_lock1;
u32 control_core_mmr_lock2;
u32 control_core_mmr_lock3;
#ifndef __ASM_PROC_PTRACE_H
#define __ASM_PROC_PTRACE_H
-#include <linux/config.h>
-
#define USR26_MODE 0x00
#define FIQ26_MODE 0x01
#define IRQ26_MODE 0x02
#ifndef __ASM_PROC_SYSTEM_H
#define __ASM_PROC_SYSTEM_H
-#include <linux/config.h>
-
/*
* Save the current interrupt enable state & disable IRQs
*/
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-LIBGCC = $(obj)libgcc.o
-
-GLSOBJS += _ashldi3.o
-GLSOBJS += _ashrdi3.o
-GLSOBJS += _divsi3.o
-GLSOBJS += _lshrdi3.o
-GLSOBJS += _modsi3.o
-GLSOBJS += _udivsi3.o
-GLSOBJS += _umodsi3.o
-
-GLCOBJS += div0.o
+# Build private libgcc only when asked for
+ifdef USE_PRIVATE_LIBGCC
+lib-y += _ashldi3.o
+lib-y += _ashrdi3.o
+lib-y += _divsi3.o
+lib-y += _lshrdi3.o
+lib-y += _modsi3.o
+lib-y += _udivsi3.o
+lib-y += _umodsi3.o
+lib-y += div0.o
+endif
-SOBJS-y += crt0.o
+obj-y += crt0.o
ifndef CONFIG_SPL_BUILD
-SOBJS-y += relocate.o
+obj-y += relocate.o
ifndef CONFIG_SYS_GENERIC_BOARD
-COBJS-y += board.o
+obj-y += board.o
endif
-COBJS-y += sections.o
+obj-y += sections.o
-COBJS-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
-SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o
-SOBJS-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
+obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
+obj-$(CONFIG_USE_ARCH_MEMSET) += memset.o
+obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
else
-COBJS-$(CONFIG_SPL_FRAMEWORK) += spl.o
+obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
endif
-COBJS-y += interrupts.o
-COBJS-y += reset.o
-
-COBJS-y += cache.o
-COBJS-y += cache-cp15.o
-
-SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \
- $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-LGOBJS := $(addprefix $(obj),$(GLSOBJS)) \
- $(addprefix $(obj),$(GLCOBJS))
+obj-y += interrupts.o
+obj-y += reset.o
-# Always build libarm.o
-TARGETS := $(LIB)
-
-# Build private libgcc only when asked for
-ifdef USE_PRIVATE_LIBGCC
-TARGETS += $(LIBGCC)
-endif
+obj-y += cache.o
+obj-y += cache-cp15.o
# For EABI conformant tool chains, provide eabi_compat()
ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS)))
-TARGETS += $(obj)eabi_compat.o
+extra-y += eabi_compat.o
endif
-
-all: $(TARGETS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-$(LIBGCC): $(obj).depend $(LGOBJS)
- $(call cmd_link_o_target, $(LGOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
-
.macro ARM_DIV_BODY dividend, divisor, result, curbit
#if __LINUX_ARM_ARCH__ >= 5
-
.macro ARM_MOD_BODY dividend, divisor, order, spare
#if __LINUX_ARM_ARCH__ >= 5
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(CPU).o
-
-START-y += start.o
-
-COBJS-y += cpu.o
-COBJS-$(CONFIG_SYS_HSDRAMC) += hsdramc.o
-COBJS-y += exception.o
-COBJS-y += cache.o
-COBJS-y += interrupts.o
-COBJS-$(CONFIG_PORTMUX_PIO) += portmux-pio.o
-COBJS-$(CONFIG_PORTMUX_GPIO) += portmux-gpio.o
-
-SRCS := $(START-y:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-START := $(addprefix $(obj),$(START-y))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y += start.o
+
+obj-y += cpu.o
+obj-$(CONFIG_SYS_HSDRAMC) += hsdramc.o
+obj-y += exception.o
+obj-y += cache.o
+obj-y += interrupts.o
+obj-$(CONFIG_PORTMUX_PIO) += portmux-pio.o
+obj-$(CONFIG_PORTMUX_GPIO) += portmux-gpio.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(SOC).o
-
-COBJS := portmux.o clk.o mmu.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := portmux.o clk.o mmu.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-
-SOBJS-y += memset.o
-
-COBJS-y += board.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-COBJS-y += interrupts.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += memset.o
+obj-y += board.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-y += interrupts.o
# Licensed under the GPL-2 or later.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-EXTRA := init.elf
-CEXTRA := initcode.o
-SEXTRA := start.o
-SOBJS := interrupt.o cache.o
-COBJS-y += cpu.o
-COBJS-$(CONFIG_ADI_GPIO1) += gpio.o
-COBJS-y += interrupts.o
-COBJS-$(CONFIG_JTAG_CONSOLE) += jtag-console.o
-COBJS-y += os_log.o
-COBJS-y += reset.o
-COBJS-y += traps.o
-
-SRCS := $(SEXTRA:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
-EXTRA := $(addprefix $(obj),$(EXTRA))
-CEXTRA := $(addprefix $(obj),$(CEXTRA))
-SEXTRA := $(addprefix $(obj),$(SEXTRA))
-
-all: $(obj).depend $(LIB) $(obj).depend $(EXTRA) $(CEXTRA) $(SEXTRA) check_initcode
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-$(OBJS): $(obj)bootrom-asm-offsets.h
+extra-y := init.elf
+extra-y += initcode.o
+extra-y += start.o
+obj-y := interrupt.o cache.o
+obj-y += cpu.o
+obj-y += gpio.o
+obj-y += interrupts.o
+obj-$(CONFIG_JTAG_CONSOLE) += jtag-console.o
+obj-y += os_log.o
+obj-y += reset.o
+obj-y += traps.o
+
+extra-y += check_initcode
+
+extra-y += bootrom-asm-offsets.h
$(obj)bootrom-asm-offsets.c: bootrom-asm-offsets.c.in bootrom-asm-offsets.awk
echo '#include <asm/mach-common/bits/bootrom.h>' | $(CPP) $(CPPFLAGS) - | gawk -f ./bootrom-asm-offsets.awk > $@.tmp
mv $@.tmp $@
# have relocs or external references
$(obj)initcode.o: CFLAGS += -fno-function-sections -fno-data-sections
READINIT = env LC_ALL=C $(CROSS_COMPILE)readelf -s $<
-check_initcode: $(obj)initcode.o
+$(obj)check_initcode: $(obj)initcode.o
ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS)
@if $(READINIT) | grep '\<GLOBAL\>.*\<UND\>' ; then \
echo "$< contains external references!" 1>&2 ; \
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P $^ -o $@
$(obj)init.elf: $(obj)init.lds $(obj)init.o $(obj)initcode.o
$(LD) $(LDFLAGS) -T $^ -o $@
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
serial_early_puts("Board init flash\n");
board_init_f(bootflag);
+
+ /* should not be reached */
+ while (1);
}
int exception_init(void)
#include <asm/gpio.h>
#include <asm/portmux.h>
+#ifdef CONFIG_ADI_GPIO1
#if ANOMALY_05000311 || ANOMALY_05000323
enum {
AWA_data = SYSCR,
continue;
}
}
+#else
+struct gpio_port_t * const gpio_array[] = {
+ (struct gpio_port_t *)PORTA_FER,
+ (struct gpio_port_t *)PORTB_FER,
+ (struct gpio_port_t *)PORTC_FER,
+ (struct gpio_port_t *)PORTD_FER,
+ (struct gpio_port_t *)PORTE_FER,
+ (struct gpio_port_t *)PORTF_FER,
+ (struct gpio_port_t *)PORTG_FER,
+#if defined(CONFIG_BF54x)
+ (struct gpio_port_t *)PORTH_FER,
+ (struct gpio_port_t *)PORTI_FER,
+ (struct gpio_port_t *)PORTJ_FER,
+#endif
+};
+#endif
* Copyright 1992, Linus Torvalds.
*/
-#include <linux/config.h>
#include <asm/byteorder.h>
#include <asm/system.h>
-
/*
* Copyright (C) 2012 Analog Devices Inc.
* Licensed under the GPL-2 or later.
#ifndef CONFIG_SYS_MAXARGS
# define CONFIG_SYS_MAXARGS 16
#endif
-#if defined(CONFIG_SYS_HZ)
-# if (CONFIG_SYS_HZ != 1000)
-# warning "CONFIG_SYS_HZ must always be 1000"
-# endif
-# undef CONFIG_SYS_HZ
-#endif
-#define CONFIG_SYS_HZ 1000
/* Blackfin POST tests */
#ifdef CONFIG_POST_BSPEC1_GPIO_LEDS
#define __ARCH_BLACKFIN_GPIO_H__
#include <asm-generic/gpio.h>
+#include <asm/portmux.h>
#define gpio_bank(x) ((x) >> 4)
#define gpio_bit(x) (1<<((x) & 0xF))
unsigned short dummy16;
unsigned short inen;
};
+#else
+extern struct gpio_port_t * const gpio_array[];
#endif
#ifdef ADI_SPECIAL_GPIO_BANKS
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
CFLAGS += -DBFIN_BOARD_NAME='"$(BOARD)"'
-LIB = $(obj)lib$(ARCH).o
-
-SOBJS-y += ins.o
-SOBJS-y += memcmp.o
-SOBJS-y += memcpy.o
-SOBJS-y += memmove.o
-SOBJS-y += memset.o
-SOBJS-y += outs.o
-SOBJS-$(CONFIG_CMD_KGDB) += __kgdb.o
-
-COBJS-y += board.o
-COBJS-y += boot.o
-COBJS-y += cache.o
-COBJS-y += clocks.o
-COBJS-$(CONFIG_CMD_CACHE_DUMP) += cmd_cache_dump.o
-COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
-COBJS-y += muldi3.o
-COBJS-$(CONFIG_HAS_POST) += post.o
-COBJS-y += string.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += ins.o
+obj-y += memcmp.o
+obj-y += memcpy.o
+obj-y += memmove.o
+obj-y += memset.o
+obj-y += outs.o
+obj-$(CONFIG_CMD_KGDB) += __kgdb.o
+obj-y += board.o
+obj-y += boot.o
+obj-y += cache.o
+obj-y += clocks.o
+obj-$(CONFIG_CMD_CACHE_DUMP) += cmd_cache_dump.o
+obj-$(CONFIG_CMD_KGDB) += kgdb.o
+obj-y += muldi3.o
+obj-$(CONFIG_HAS_POST) += post.o
+obj-y += string.o
-
#include <linux/linkage.h>
/* save stack context for non-local goto
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
# CFLAGS += -DET_DEBUG
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = cpu.o speed.o cpu_init.o interrupts.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o speed.o cpu_init.o interrupts.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
# CFLAGS += -DET_DEBUG
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = cpu.o speed.o cpu_init.o interrupts.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o speed.o cpu_init.o interrupts.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
# CFLAGS += -DET_DEBUG
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = interrupts.o cpu.o speed.o cpu_init.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = interrupts.o cpu.o speed.o cpu_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
# CFLAGS += -DET_DEBUG
-LIB = $(obj)lib$(CPU).o
-
-START =
-COBJS = cpu.o speed.o cpu_init.o interrupts.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y := start.o
+obj-y = cpu.o speed.o cpu_init.o interrupts.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
# CFLAGS += -DET_DEBUG
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = cpu.o speed.o cpu_init.o interrupts.o pci.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o speed.o cpu_init.o interrupts.o pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
# CFLAGS += -DET_DEBUG
-LIB = $(obj)lib$(CPU).o
-
-START =
-COBJS = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o
#ifndef _M68K_BITOPS_H
#define _M68K_BITOPS_H
-#include <linux/config.h>
#include <asm/byteorder.h>
extern void set_bit(int nr, volatile void *addr);
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-
-SOBJS-y +=
-
-COBJS-y += board.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-COBJS-y += cache.o
-COBJS-y += interrupts.o
-COBJS-y += time.o
-COBJS-y += traps.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += board.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-y += cache.o
+obj-y += interrupts.o
+obj-y += time.o
+obj-y += traps.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-SOBJS = irq.o
-COBJS = cpu.o interrupts.o cache.o exception.o timer.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = irq.o
+obj-y += cpu.o interrupts.o cache.o exception.o timer.o
* Copyright 1992, Linus Torvalds.
*/
-#include <linux/config.h>
#include <asm/byteorder.h> /* swab32 */
#include <asm/system.h> /* save_flags */
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-
-SOBJS-y +=
-
-COBJS-y += board.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-COBJS-y += muldi3.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += board.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-y += muldi3.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-SOBJS-y = cache.o
-COBJS-y = cpu.o interrupts.o time.o
-
-SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cache.o
+obj-y += cpu.o interrupts.o time.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS = au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o au1x00_ide.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o au1x00_ide.o
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
u32 pin_func;
u32 sys_freqctrl, sys_clksrc;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-SOBJS = incaip_wdt.o
-COBJS = incaip_clock.o asc_serial.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = incaip_wdt.o
+obj-y += incaip_clock.o asc_serial.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS-y = cpu.o interrupts.o time.o cache.o
-
-SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+extra-y = start.o
+obj-y = cpu.o interrupts.o time.o cache.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-SOBJS-y =
-COBJS-y = cpu.o timer.o jz_serial.o
-
-COBJS-$(CONFIG_JZ4740) += jz4740.o
-
-SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o timer.o jz_serial.o
+obj-$(CONFIG_JZ4740) += jz4740.o
#include <asm/sgidefs.h>
#include <asm/system.h>
-#include <linux/config.h>
/*
* clear_bit() doesn't provide any barrier for the compiler.
-
/******************************************************************************
Copyright (c) 2002, Infineon Technologies. All rights reserved.
#ifndef _ASM_IO_H
#define _ASM_IO_H
-#include <linux/config.h>
#if 0
#include <linux/pagemap.h>
#endif
#ifndef _ASM_PROCESSOR_H
#define _ASM_PROCESSOR_H
-#include <linux/config.h>
-
#include <asm/isadep.h>
#include <asm/cachectl.h>
#ifndef _ASM_SYSTEM_H
#define _ASM_SYSTEM_H
-#include <linux/config.h>
#include <asm/sgidefs.h>
#include <asm/ptrace.h>
#if 0
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-
-## Build a couple of necessary functions into a private libgcc
-LIBGCC = $(obj)libgcc.o
-GLSOBJS += ashldi3.o
-GLSOBJS += ashrdi3.o
-GLSOBJS += lshrdi3.o
-LGOBJS := $(addprefix $(obj),$(GLSOBJS))
-
-SOBJS-y +=
-
-COBJS-y += board.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-# Always build libmips.o
-TARGETS := $(LIB)
+obj-y += board.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
# Build private libgcc only when asked for
ifdef USE_PRIVATE_LIBGCC
-TARGETS += $(LIBGCC)
+lib-y += ashldi3.o
+lib-y += ashrdi3.o
+lib-y += lshrdi3.o
endif
-
-all: $(TARGETS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-$(LIBGCC): $(obj).depend $(LGOBJS)
- $(call cmd_link_o_target, $(LGOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-
-SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y := cpu.o timer.o
+obj-y := cpu.o timer.o
ifndef CONFIG_SKIP_LOWLEVEL_INIT
-SOBJS-y := lowlevel_init.o
+obj-y += lowlevel_init.o
endif
ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG
-SOBJS-y += watchdog.o
+obj-y += watchdog.o
endif
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(SOC).o
-
-COBJS-y := cpu.o timer.o
+obj-y := cpu.o timer.o
ifndef CONFIG_SKIP_LOWLEVEL_INIT
-SOBJS-y := lowlevel_init.o
+obj-y += lowlevel_init.o
endif
ifndef CONFIG_SKIP_TRUNOFF_WATCHDOG
-SOBJS-y += watchdog.o
+obj-y += watchdog.o
endif
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-
-COBJS-y += board.o
-COBJS-y += cache.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-COBJS-y += interrupts.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += board.o
+obj-y += cache.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-y += interrupts.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-SOBJS = exceptions.o
-COBJS = cpu.o interrupts.o sysid.o traps.o epcs.o
-COBJS += fdt.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = exceptions.o
+obj-y += cpu.o interrupts.o sysid.o traps.o epcs.o
+obj-y += fdt.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-
-SOBJS-y += cache.o
-
-COBJS-y += board.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-COBJS-y += libgcc.o
-COBJS-y += time.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += cache.o
+obj-y += board.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-y += libgcc.o
+obj-y += time.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS-y = cache.o cpu.o exceptions.o interrupts.o
-
-SRCS := $(START:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cache.o cpu.o exceptions.o interrupts.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-
-SOBJS-y +=
-
-COBJS-y += board.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-COBJS-y += timer.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += board.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-SOBJS = cache.o kgdb.o io.o
-COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cache.o kgdb.o io.o
+obj-y += traps.o cpu.o cpu_init.o speed.o interrupts.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
$(shell mkdir -p $(OBJTREE)/board/freescale/common)
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS-y := cpu.o
-COBJS-y += traps.o
-COBJS-y += cpu_init.o
-COBJS-y += fixed_sdram.o
-COBJS-y += i2c.o
-COBJS-y += interrupts.o
-COBJS-y += iopin.o
-COBJS-y += serial.o
-COBJS-y += speed.o
-COBJS-$(CONFIG_FSL_DIU_FB) += diu.o
-COBJS-$(CONFIG_CMD_IDE) += ide.o
-COBJS-$(CONFIG_PCI) += pci.o
+extra-y = start.o
+obj-y := cpu.o
+obj-y += traps.o
+obj-y += cpu_init.o
+obj-y += fixed_sdram.o
+obj-y += i2c.o
+obj-y += interrupts.o
+obj-y += iopin.o
+obj-y += serial.o
+obj-y += speed.o
+obj-$(CONFIG_FSL_DIU_FB) += diu.o
+obj-$(CONFIG_CMD_IDE) += ide.o
+obj-$(CONFIG_PCI) += pci.o
# Stub implementations of cache management functions for USB
-COBJS-$(CONFIG_USB_EHCI) += cache.o
-
-COBJS := $(COBJS-y)
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_USB_EHCI) += cache.o
# uses the definitions made in arch/powerpc/cpu/mpc5xx/config.mk
#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = serial.o cpu.o cpu_init.o interrupts.o traps.o speed.o spi.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = serial.o cpu.o cpu_init.o interrupts.o traps.o speed.o spi.o
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
-#include <linux/config.h>
#include <asm/processor.h>
#include <asm/u-boot.h>
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-SSTART = start.o
-CSTART = traps.o
-SOBJS += io.o
-SOBJS += firmware_sc_task_bestcomm.impl.o
-COBJS-y += i2c.o
-COBJS-y += cpu.o
-COBJS-y += cpu_init.o
-COBJS-y += ide.o
-COBJS-y += interrupts.o
-COBJS-y += loadtask.o
-COBJS-y += pci_mpc5200.o
-COBJS-y += serial.o
-COBJS-y += speed.o
-COBJS-$(CONFIG_CMD_USB) += usb_ohci.o
-COBJS-$(CONFIG_CMD_USB) += usb.o
+extra-y = start.o
+extra-y += traps.o
+obj-y += io.o
+obj-y += firmware_sc_task_bestcomm.impl.o
+obj-y += i2c.o
+obj-y += cpu.o
+obj-y += cpu_init.o
+obj-y += ide.o
+obj-y += interrupts.o
+obj-y += loadtask.o
+obj-y += pci_mpc5200.o
+obj-y += serial.o
+obj-y += speed.o
+obj-$(CONFIG_CMD_USB) += usb_ohci.o
+obj-$(CONFIG_CMD_USB) += usb.o
ifdef CONFIG_SPL_BUILD
-COBJS-y += spl_boot.o
+obj-y += spl_boot.o
endif
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-START := $(addprefix $(obj),$(SSTART) $(CSTART))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
/* Set the USB Clock */
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)drivers/epic $(obj)drivers/i2c)
endif
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-COBJS = traps.o cpu.o cpu_init.o interrupts.o speed.o \
+extra-y = start.o
+obj-y = traps.o cpu.o cpu_init.o interrupts.o speed.o \
drivers/epic/epic1.o drivers/i2c/i2c.o pci.o
-COBJS_LN = bedbug_603e.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix $(obj),$(COBJS_LN:.o=.c))
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS_LN))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
+obj-y += bedbug_603e.o
+SRCS += $(obj)bedbug_603e.c
$(obj)bedbug_603e.c:
ln -sf $(src)../mpc8260/bedbug_603e.c $(obj)bedbug_603e.c
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o kgdb.o
-COBJS = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \
+extra-y = start.o
+obj-y = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \
interrupts.o ether_fcc.o i2c.o commproc.o \
- bedbug_603e.o pci.o spi.o
-
-COBJS-$(CONFIG_ETHER_ON_SCC) = ether_scc.o
-
-COBJS += $(COBJS-y)
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS) $(obj)kgdb.o)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+ bedbug_603e.o pci.o spi.o kgdb.o
-#########################################################################
+obj-$(CONFIG_ETHER_ON_SCC) += ether_scc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
endif
endif
-START = start.o
+extra-y = start.o
ifdef MINIMAL
-COBJS-y += spl_minimal.o
+obj-y += spl_minimal.o
else
-COBJS-y += traps.o
-COBJS-y += cpu.o
-COBJS-y += cpu_init.o
-COBJS-y += speed.o
-COBJS-y += interrupts.o
-COBJS-y += ecc.o
-COBJS-$(CONFIG_QE) += qe_io.o
-COBJS-$(CONFIG_FSL_SERDES) += serdes.o
-COBJS-$(CONFIG_PCI) += pci.o
-COBJS-$(CONFIG_PCIE) += pcie.o
-COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
+obj-y += traps.o
+obj-y += cpu.o
+obj-y += cpu_init.o
+obj-y += speed.o
+obj-y += interrupts.o
+obj-y += ecc.o
+obj-$(CONFIG_QE) += qe_io.o
+obj-$(CONFIG_FSL_SERDES) += serdes.o
+obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_PCIE) += pcie.o
+obj-$(CONFIG_OF_LIBFDT) += fdt.o
# Stub implementations of cache management functions for USB
-COBJS-y += cache.o
+obj-y += cache.o
ifdef CONFIG_FSL_DDR2
-COBJS_LN-$(CONFIG_MPC8349) += ddr-gen2.o
+obj-$(CONFIG_MPC8349) += ddr-gen2.o
+SRCS += $(obj)ddr-gen2.c
else
-COBJS-y += spd_sdram.o
+obj-y += spd_sdram.o
endif
-COBJS-$(CONFIG_FSL_DDR2) += law.o
+obj-$(CONFIG_FSL_DDR2) += law.o
endif # not minimal
-COBJS := $(COBJS-y)
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix $(obj),$(COBJS_LN-y:.o=.c))
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS_LN-y))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
$(obj)ddr-gen1.c:
ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen1.c $(obj)ddr-gen1.c
$(obj)ddr-gen3.c:
ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/ddr-gen3.c $(obj)ddr-gen3.c
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#endif
#if defined(CONFIG_USB_EHCI_FSL) && defined(CONFIG_MPC831x)
uint32_t temp;
- struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
/* Configure interface. */
setbits_be32(&ehci->control, REFSEL_16MHZ | UTMI_PHY_EN);
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
endif
endif
-START = start.o resetvec.o
+extra-y = start.o resetvec.o
ifdef MINIMAL
-COBJS-y += cpu_init_early.o tlb.o spl_minimal.o
+obj-y += cpu_init_early.o tlb.o spl_minimal.o
else
-SOBJS-$(CONFIG_MP) += release.o
-SOBJS = $(SOBJS-y)
+obj-$(CONFIG_MP) += release.o
-COBJS-$(CONFIG_CMD_ERRATA) += cmd_errata.o
-COBJS-$(CONFIG_CPM2) += commproc.o
+obj-$(CONFIG_CMD_ERRATA) += cmd_errata.o
+obj-$(CONFIG_CPM2) += commproc.o
# supports ddr1
-COBJS-$(CONFIG_MPC8540) += ddr-gen1.o
-COBJS-$(CONFIG_MPC8560) += ddr-gen1.o
-COBJS-$(CONFIG_MPC8541) += ddr-gen1.o
-COBJS-$(CONFIG_MPC8555) += ddr-gen1.o
+obj-$(CONFIG_MPC8540) += ddr-gen1.o
+obj-$(CONFIG_MPC8560) += ddr-gen1.o
+obj-$(CONFIG_MPC8541) += ddr-gen1.o
+obj-$(CONFIG_MPC8555) += ddr-gen1.o
# supports ddr1/2
-COBJS-$(CONFIG_MPC8548) += ddr-gen2.o
-COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
-COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
+obj-$(CONFIG_MPC8548) += ddr-gen2.o
+obj-$(CONFIG_MPC8568) += ddr-gen2.o
+obj-$(CONFIG_MPC8544) += ddr-gen2.o
# supports ddr1/2/3
-COBJS-$(CONFIG_PPC_C29X) += ddr-gen3.o
-COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
-COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
-COBJS-$(CONFIG_MPC8569) += ddr-gen3.o
-COBJS-$(CONFIG_P1010) += ddr-gen3.o
-COBJS-$(CONFIG_P1011) += ddr-gen3.o
-COBJS-$(CONFIG_P1012) += ddr-gen3.o
-COBJS-$(CONFIG_P1013) += ddr-gen3.o
-COBJS-$(CONFIG_P1014) += ddr-gen3.o
-COBJS-$(CONFIG_P1020) += ddr-gen3.o
-COBJS-$(CONFIG_P1021) += ddr-gen3.o
-COBJS-$(CONFIG_P1022) += ddr-gen3.o
-COBJS-$(CONFIG_P1023) += ddr-gen3.o
-COBJS-$(CONFIG_P1024) += ddr-gen3.o
-COBJS-$(CONFIG_P1025) += ddr-gen3.o
-COBJS-$(CONFIG_P2010) += ddr-gen3.o
-COBJS-$(CONFIG_P2020) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_P2041) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_P3041) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_P4080) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_P5020) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_P5040) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_T4240) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_T4160) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_B4420) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_B4860) += ddr-gen3.o
-COBJS-$(CONFIG_BSC9131) += ddr-gen3.o
-COBJS-$(CONFIG_BSC9132) += ddr-gen3.o
-COBJS-$(CONFIG_PPC_T1040) += ddr-gen3.o
-
-COBJS-$(CONFIG_CPM2) += ether_fcc.o
-COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
-COBJS-$(CONFIG_FSL_CORENET) += liodn.o
-COBJS-$(CONFIG_MP) += mp.o
-COBJS-$(CONFIG_PCI) += pci.o
-COBJS-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
+obj-$(CONFIG_PPC_C29X) += ddr-gen3.o
+obj-$(CONFIG_MPC8572) += ddr-gen3.o
+obj-$(CONFIG_MPC8536) += ddr-gen3.o
+obj-$(CONFIG_MPC8569) += ddr-gen3.o
+obj-$(CONFIG_P1010) += ddr-gen3.o
+obj-$(CONFIG_P1011) += ddr-gen3.o
+obj-$(CONFIG_P1012) += ddr-gen3.o
+obj-$(CONFIG_P1013) += ddr-gen3.o
+obj-$(CONFIG_P1014) += ddr-gen3.o
+obj-$(CONFIG_P1020) += ddr-gen3.o
+obj-$(CONFIG_P1021) += ddr-gen3.o
+obj-$(CONFIG_P1022) += ddr-gen3.o
+obj-$(CONFIG_P1023) += ddr-gen3.o
+obj-$(CONFIG_P1024) += ddr-gen3.o
+obj-$(CONFIG_P1025) += ddr-gen3.o
+obj-$(CONFIG_P2010) += ddr-gen3.o
+obj-$(CONFIG_P2020) += ddr-gen3.o
+obj-$(CONFIG_PPC_P2041) += ddr-gen3.o
+obj-$(CONFIG_PPC_P3041) += ddr-gen3.o
+obj-$(CONFIG_PPC_P4080) += ddr-gen3.o
+obj-$(CONFIG_PPC_P5020) += ddr-gen3.o
+obj-$(CONFIG_PPC_P5040) += ddr-gen3.o
+obj-$(CONFIG_PPC_T4240) += ddr-gen3.o
+obj-$(CONFIG_PPC_T4160) += ddr-gen3.o
+obj-$(CONFIG_PPC_B4420) += ddr-gen3.o
+obj-$(CONFIG_PPC_B4860) += ddr-gen3.o
+obj-$(CONFIG_BSC9131) += ddr-gen3.o
+obj-$(CONFIG_BSC9132) += ddr-gen3.o
+obj-$(CONFIG_PPC_T1040) += ddr-gen3.o
+
+obj-$(CONFIG_CPM2) += ether_fcc.o
+obj-$(CONFIG_OF_LIBFDT) += fdt.o
+obj-$(CONFIG_FSL_CORENET) += liodn.o
+obj-$(CONFIG_MP) += mp.o
+obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
# various SoC specific assignments
-COBJS-$(CONFIG_PPC_P2041) += p2041_ids.o
-COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o
-COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
-COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o
-COBJS-$(CONFIG_PPC_P5040) += p5040_ids.o
-COBJS-$(CONFIG_PPC_T4240) += t4240_ids.o
-COBJS-$(CONFIG_PPC_T4160) += t4240_ids.o
-COBJS-$(CONFIG_PPC_B4420) += b4860_ids.o
-COBJS-$(CONFIG_PPC_B4860) += b4860_ids.o
-COBJS-$(CONFIG_PPC_T1040) += t1040_ids.o
-
-COBJS-$(CONFIG_QE) += qe_io.o
-COBJS-$(CONFIG_CPM2) += serial_scc.o
-COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
-COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
+obj-$(CONFIG_PPC_P2041) += p2041_ids.o
+obj-$(CONFIG_PPC_P3041) += p3041_ids.o
+obj-$(CONFIG_PPC_P4080) += p4080_ids.o
+obj-$(CONFIG_PPC_P5020) += p5020_ids.o
+obj-$(CONFIG_PPC_P5040) += p5040_ids.o
+obj-$(CONFIG_PPC_T4240) += t4240_ids.o
+obj-$(CONFIG_PPC_T4160) += t4240_ids.o
+obj-$(CONFIG_PPC_B4420) += b4860_ids.o
+obj-$(CONFIG_PPC_B4860) += b4860_ids.o
+obj-$(CONFIG_PPC_T1040) += t1040_ids.o
+
+obj-$(CONFIG_QE) += qe_io.o
+obj-$(CONFIG_CPM2) += serial_scc.o
+obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
+obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
# SoC specific SERDES support
-COBJS-$(CONFIG_PPC_C29X) += c29x_serdes.o
-COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
-COBJS-$(CONFIG_MPC8544) += mpc8544_serdes.o
-COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
-COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o
-COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o
-COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
-COBJS-$(CONFIG_P1010) += p1010_serdes.o
-COBJS-$(CONFIG_P1011) += p1021_serdes.o
-COBJS-$(CONFIG_P1012) += p1021_serdes.o
-COBJS-$(CONFIG_P1013) += p1022_serdes.o
-COBJS-$(CONFIG_P1014) += p1010_serdes.o
-COBJS-$(CONFIG_P1017) += p1023_serdes.o
-COBJS-$(CONFIG_P1020) += p1021_serdes.o
-COBJS-$(CONFIG_P1021) += p1021_serdes.o
-COBJS-$(CONFIG_P1022) += p1022_serdes.o
-COBJS-$(CONFIG_P1023) += p1023_serdes.o
-COBJS-$(CONFIG_P1024) += p1021_serdes.o
-COBJS-$(CONFIG_P1025) += p1021_serdes.o
-COBJS-$(CONFIG_P2010) += p2020_serdes.o
-COBJS-$(CONFIG_P2020) += p2020_serdes.o
-COBJS-$(CONFIG_PPC_P2041) += p2041_serdes.o
-COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o
-COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
-COBJS-$(CONFIG_PPC_P5020) += p5020_serdes.o
-COBJS-$(CONFIG_PPC_P5040) += p5040_serdes.o
-COBJS-$(CONFIG_PPC_T4240) += t4240_serdes.o
-COBJS-$(CONFIG_PPC_T4160) += t4240_serdes.o
-COBJS-$(CONFIG_PPC_B4420) += b4860_serdes.o
-COBJS-$(CONFIG_PPC_B4860) += b4860_serdes.o
-COBJS-$(CONFIG_BSC9132) += bsc9132_serdes.o
-COBJS-$(CONFIG_PPC_T1040) += t1040_serdes.o
-
-COBJS-y += cpu.o
-COBJS-y += cpu_init.o
-COBJS-y += cpu_init_early.o
-COBJS-y += interrupts.o
-COBJS-y += speed.o
-COBJS-y += tlb.o
-COBJS-y += traps.o
+obj-$(CONFIG_PPC_C29X) += c29x_serdes.o
+obj-$(CONFIG_MPC8536) += mpc8536_serdes.o
+obj-$(CONFIG_MPC8544) += mpc8544_serdes.o
+obj-$(CONFIG_MPC8548) += mpc8548_serdes.o
+obj-$(CONFIG_MPC8568) += mpc8568_serdes.o
+obj-$(CONFIG_MPC8569) += mpc8569_serdes.o
+obj-$(CONFIG_MPC8572) += mpc8572_serdes.o
+obj-$(CONFIG_P1010) += p1010_serdes.o
+obj-$(CONFIG_P1011) += p1021_serdes.o
+obj-$(CONFIG_P1012) += p1021_serdes.o
+obj-$(CONFIG_P1013) += p1022_serdes.o
+obj-$(CONFIG_P1014) += p1010_serdes.o
+obj-$(CONFIG_P1017) += p1023_serdes.o
+obj-$(CONFIG_P1020) += p1021_serdes.o
+obj-$(CONFIG_P1021) += p1021_serdes.o
+obj-$(CONFIG_P1022) += p1022_serdes.o
+obj-$(CONFIG_P1023) += p1023_serdes.o
+obj-$(CONFIG_P1024) += p1021_serdes.o
+obj-$(CONFIG_P1025) += p1021_serdes.o
+obj-$(CONFIG_P2010) += p2020_serdes.o
+obj-$(CONFIG_P2020) += p2020_serdes.o
+obj-$(CONFIG_PPC_P2041) += p2041_serdes.o
+obj-$(CONFIG_PPC_P3041) += p3041_serdes.o
+obj-$(CONFIG_PPC_P4080) += p4080_serdes.o
+obj-$(CONFIG_PPC_P5020) += p5020_serdes.o
+obj-$(CONFIG_PPC_P5040) += p5040_serdes.o
+obj-$(CONFIG_PPC_T4240) += t4240_serdes.o
+obj-$(CONFIG_PPC_T4160) += t4240_serdes.o
+obj-$(CONFIG_PPC_B4420) += b4860_serdes.o
+obj-$(CONFIG_PPC_B4860) += b4860_serdes.o
+obj-$(CONFIG_BSC9132) += bsc9132_serdes.o
+obj-$(CONFIG_PPC_T1040) += t1040_serdes.o
+
+obj-y += cpu.o
+obj-y += cpu_init.o
+obj-y += cpu_init_early.o
+obj-y += interrupts.o
+obj-y += speed.o
+obj-y += tlb.o
+obj-y += traps.o
# Stub implementations of cache management functions for USB
-COBJS-y += cache.o
+obj-y += cache.o
endif # not minimal
-
-COBJS = $(COBJS-y)
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#include <common.h>
#include <command.h>
#include <linux/compiler.h>
+#include <asm/fsl_errata.h>
#include <asm/processor.h>
#include "fsl_corenet_serdes.h"
#ifdef CONFIG_SYS_FSL_ERRATUM_A006593
puts("Work-around for Erratum A006593 enabled\n");
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006379
+ if (has_erratum_a006379())
+ puts("Work-around for Erratum A006379 enabled\n");
+#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571
if (IS_SVR_REV(svr, 1, 0))
puts("Work-around for Erratum A003571 enabled\n");
#include <asm/io.h>
#include <asm/cache.h>
#include <asm/mmu.h>
+#include <asm/fsl_errata.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_srio.h>
#ifdef CONFIG_SYS_FSL_ERRATUM_A006593
setbits_be32(&cpc->cpchdbcr0, 1 << (31 - 21));
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006379
+ if (has_erratum_a006379()) {
+ setbits_be32(&cpc->cpchdbcr0,
+ CPC_HDBCR0_SPLRU_LEVEL_EN);
+ }
+#endif
out_be32(&cpc->cpccsr0, CPC_CSR0_CE | CPC_CSR0_PE);
/* Read back to sync write */
}
__attribute__((weak, alias("__fsl_serdes__init"))) void fsl_serdes_init(void);
-#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
+#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
int enable_cluster_l2(void)
{
int i = 0;
#endif
#ifdef CONFIG_L2_CACHE
ccsr_l2cache_t *l2cache = (void __iomem *)CONFIG_SYS_MPC85xx_L2_ADDR;
-#elif defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
+#elif defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
struct ccsr_cluster_l2 * l2cache = (void __iomem *)CONFIG_SYS_FSL_CLUSTER_1_L2;
#endif
#if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
}
skip_l2:
-#elif defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
+#elif defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
if (l2cache->l2csr0 & L2CSR0_L2E)
print_size((l2cache->l2cfg0 & 0x3fff) * 64 * 1024,
" enabled\n");
if (has_l2) {
#ifdef CONFIG_SYS_CACHE_STASHING
u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
-#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
+#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
/* Only initialize every eighth thread */
if (reg && !((*reg) % 8))
#else
#endif
}
+
+const char *serdes_clock_to_string(u32 clock)
+{
+ switch (clock) {
+ case SRDS_PLLCR0_RFCK_SEL_100:
+ return "100";
+ case SRDS_PLLCR0_RFCK_SEL_125:
+ return "125";
+ case SRDS_PLLCR0_RFCK_SEL_156_25:
+ return "156.25";
+ case SRDS_PLLCR0_RFCK_SEL_161_13:
+ return "161.1328123";
+ default:
+#if defined(CONFIG_T4240QDS)
+ return "???";
+#else
+ return "122.88";
+#endif
+ }
+}
+
}
#endif
}
+
+const char *serdes_clock_to_string(u32 clock)
+{
+ switch (clock) {
+ case SRDS_PLLCR0_RFCK_SEL_100:
+ return "100";
+ case SRDS_PLLCR0_RFCK_SEL_125:
+ return "125";
+ case SRDS_PLLCR0_RFCK_SEL_156_25:
+ return "156.25";
+ case SRDS_PLLCR0_RFCK_SEL_161_13:
+ return "161.1328123";
+ default:
+ return "150";
+ }
+}
+
DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef CONFIG_SYS_FSL_NUM_CC_PLLS
+#define CONFIG_SYS_FSL_NUM_CC_PLLS 6
+#endif
/* --------------------------------------------------------------- */
void get_sys_info(sys_info_t *sys_info)
#ifdef CONFIG_FSL_CORENET
volatile ccsr_clk_t *clk = (void *)(CONFIG_SYS_FSL_CORENET_CLK_ADDR);
unsigned int cpu;
+#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
+ int cc_group[12] = CONFIG_SYS_FSL_CLUSTER_CLOCKS;
+#endif
const u8 core_cplx_PLL[16] = {
[ 0] = 0, /* CC1 PPL / 1 */
[13] = 2, /* CC4 PPL / 2 */
[14] = 4, /* CC4 PPL / 4 */
};
- uint i, freq_cc_pll[6], rcw_tmp;
- uint ratio[6];
+ uint i, freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS];
+#if !defined(CONFIG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV)
+ uint rcw_tmp;
+#endif
+ uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
uint mem_pll_rat;
else
sys_info->freq_ddrbus = sys_info->freq_systembus * mem_pll_rat;
- ratio[0] = (in_be32(&clk->pllc1gsr) >> 1) & 0x3f;
- ratio[1] = (in_be32(&clk->pllc2gsr) >> 1) & 0x3f;
- ratio[2] = (in_be32(&clk->pllc3gsr) >> 1) & 0x3f;
- ratio[3] = (in_be32(&clk->pllc4gsr) >> 1) & 0x3f;
- ratio[4] = (in_be32(&clk->pllc5gsr) >> 1) & 0x3f;
- ratio[5] = (in_be32(&clk->pllc6gsr) >> 1) & 0x3f;
- for (i = 0; i < 6; i++) {
+ for (i = 0; i < CONFIG_SYS_FSL_NUM_CC_PLLS; i++) {
+ ratio[i] = (in_be32(&clk->pllcgsr[i].pllcngsr) >> 1) & 0x3f;
if (ratio[i] > 4)
- freq_cc_pll[i] = sysclk * ratio[i];
+ freq_c_pll[i] = sysclk * ratio[i];
else
- freq_cc_pll[i] = sys_info->freq_systembus * ratio[i];
+ freq_c_pll[i] = sys_info->freq_systembus * ratio[i];
}
#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
/*
+ * As per CHASSIS2 architeture total 12 clusters are posible and
* Each cluster has up to 4 cores, sharing the same PLL selection.
- * The cluster assignment is fixed per SoC. PLL1, PLL2, PLL3 are
- * cluster group A, feeding cores on cluster 1 and cluster 2.
- * PLL4, PLL5, PLL6 are cluster group B, feeding cores on cluster 3
- * and cluster 4 if existing.
+ * The cluster clock assignment is SoC defined.
+ *
+ * Total 4 clock groups are possible with 3 PLLs each.
+ * as per array indices, clock group A has 0, 1, 2 numbered PLLs &
+ * clock group B has 3, 4, 6 and so on.
+ *
+ * Clock group A having PLL1, PLL2, PLL3, feeding cores of any cluster
+ * depends upon the SoC architeture. Same applies to other
+ * clock groups and clusters.
+ *
*/
for_each_cpu(i, cpu, cpu_numcores(), cpu_mask()) {
int cluster = fsl_qoriq_core_to_cluster(cpu);
u32 c_pll_sel = (in_be32(&clk->clkcsr[cluster].clkcncsr) >> 27)
& 0xf;
u32 cplx_pll = core_cplx_PLL[c_pll_sel];
- if (cplx_pll > 3)
- printf("Unsupported architecture configuration"
- " in function %s\n", __func__);
- cplx_pll += (cluster / 2) * 3;
+ cplx_pll += cc_group[cluster] - 1;
sys_info->freq_processor[cpu] =
- freq_cc_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
+ freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
}
#ifdef CONFIG_PPC_B4860
#define FM1_CLK_SEL 0xe0000000
#define FM1_CLK_SEL 0x1c000000
#define FM1_CLK_SHIFT 26
#endif
+#if !defined(CONFIG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV)
rcw_tmp = in_be32(&gur->rcwsr[7]);
+#endif
#ifdef CONFIG_SYS_DPAA_PME
+#ifndef CONFIG_PME_PLAT_CLK_DIV
switch ((rcw_tmp & PME_CLK_SEL) >> PME_CLK_SHIFT) {
case 1:
- sys_info->freq_pme = freq_cc_pll[0];
+ sys_info->freq_pme = freq_c_pll[CONFIG_SYS_PME_CLK];
break;
case 2:
- sys_info->freq_pme = freq_cc_pll[0] / 2;
+ sys_info->freq_pme = freq_c_pll[CONFIG_SYS_PME_CLK] / 2;
break;
case 3:
- sys_info->freq_pme = freq_cc_pll[0] / 3;
+ sys_info->freq_pme = freq_c_pll[CONFIG_SYS_PME_CLK] / 3;
break;
case 4:
- sys_info->freq_pme = freq_cc_pll[0] / 4;
+ sys_info->freq_pme = freq_c_pll[CONFIG_SYS_PME_CLK] / 4;
break;
case 6:
- sys_info->freq_pme = freq_cc_pll[1] / 2;
+ sys_info->freq_pme = freq_c_pll[CONFIG_SYS_PME_CLK + 1] / 2;
break;
case 7:
- sys_info->freq_pme = freq_cc_pll[1] / 3;
+ sys_info->freq_pme = freq_c_pll[CONFIG_SYS_PME_CLK + 1] / 3;
break;
default:
printf("Error: Unknown PME clock select!\n");
break;
}
+#else
+ sys_info->freq_pme = sys_info->freq_systembus / CONFIG_SYS_PME_CLK;
+
+#endif
#endif
#ifdef CONFIG_SYS_DPAA_QBMAN
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_FM_PLAT_CLK_DIV
switch ((rcw_tmp & FM1_CLK_SEL) >> FM1_CLK_SHIFT) {
case 1:
- sys_info->freq_fman[0] = freq_cc_pll[3];
+ sys_info->freq_fman[0] = freq_c_pll[CONFIG_SYS_FM1_CLK];
break;
case 2:
- sys_info->freq_fman[0] = freq_cc_pll[3] / 2;
+ sys_info->freq_fman[0] = freq_c_pll[CONFIG_SYS_FM1_CLK] / 2;
break;
case 3:
- sys_info->freq_fman[0] = freq_cc_pll[3] / 3;
+ sys_info->freq_fman[0] = freq_c_pll[CONFIG_SYS_FM1_CLK] / 3;
break;
case 4:
- sys_info->freq_fman[0] = freq_cc_pll[3] / 4;
+ sys_info->freq_fman[0] = freq_c_pll[CONFIG_SYS_FM1_CLK] / 4;
break;
case 5:
sys_info->freq_fman[0] = sys_info->freq_systembus;
break;
case 6:
- sys_info->freq_fman[0] = freq_cc_pll[4] / 2;
+ sys_info->freq_fman[0] = freq_c_pll[CONFIG_SYS_FM1_CLK + 1] / 2;
break;
case 7:
- sys_info->freq_fman[0] = freq_cc_pll[4] / 3;
+ sys_info->freq_fman[0] = freq_c_pll[CONFIG_SYS_FM1_CLK + 1] / 3;
break;
default:
printf("Error: Unknown FMan1 clock select!\n");
break;
}
#if (CONFIG_SYS_NUM_FMAN) == 2
+#ifdef CONFIG_SYS_FM2_CLK
#define FM2_CLK_SEL 0x00000038
#define FM2_CLK_SHIFT 3
rcw_tmp = in_be32(&gur->rcwsr[15]);
switch ((rcw_tmp & FM2_CLK_SEL) >> FM2_CLK_SHIFT) {
case 1:
- sys_info->freq_fman[1] = freq_cc_pll[4];
+ sys_info->freq_fman[1] = freq_c_pll[CONFIG_SYS_FM2_CLK + 1];
break;
case 2:
- sys_info->freq_fman[1] = freq_cc_pll[4] / 2;
+ sys_info->freq_fman[1] = freq_c_pll[CONFIG_SYS_FM2_CLK + 1] / 2;
break;
case 3:
- sys_info->freq_fman[1] = freq_cc_pll[4] / 3;
+ sys_info->freq_fman[1] = freq_c_pll[CONFIG_SYS_FM2_CLK + 1] / 3;
break;
case 4:
- sys_info->freq_fman[1] = freq_cc_pll[4] / 4;
+ sys_info->freq_fman[1] = freq_c_pll[CONFIG_SYS_FM2_CLK + 1] / 4;
break;
case 6:
- sys_info->freq_fman[1] = freq_cc_pll[3] / 2;
+ sys_info->freq_fman[1] = freq_c_pll[CONFIG_SYS_FM2_CLK] / 2;
break;
case 7:
- sys_info->freq_fman[1] = freq_cc_pll[3] / 3;
+ sys_info->freq_fman[1] = freq_c_pll[CONFIG_SYS_FM2_CLK] / 3;
break;
default:
printf("Error: Unknown FMan2 clock select!\n");
sys_info->freq_fman[1] = sys_info->freq_systembus / 2;
break;
}
+#endif
#endif /* CONFIG_SYS_NUM_FMAN == 2 */
-#endif /* CONFIG_SYS_DPAA_FMAN */
+#else
+ sys_info->freq_fman[0] = sys_info->freq_systembus / CONFIG_SYS_FM1_CLK;
+#endif
+#endif
#else /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
u32 cplx_pll = core_cplx_PLL[c_pll_sel];
sys_info->freq_processor[cpu] =
- freq_cc_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
+ freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
}
#define PME_CLK_SEL 0x80000000
#define FM1_CLK_SEL 0x40000000
#ifdef CONFIG_SYS_DPAA_PME
if (rcw_tmp & PME_CLK_SEL) {
if (rcw_tmp & HWA_ASYNC_DIV)
- sys_info->freq_pme = freq_cc_pll[HWA_CC_PLL] / 4;
+ sys_info->freq_pme = freq_c_pll[HWA_CC_PLL] / 4;
else
- sys_info->freq_pme = freq_cc_pll[HWA_CC_PLL] / 2;
+ sys_info->freq_pme = freq_c_pll[HWA_CC_PLL] / 2;
} else {
sys_info->freq_pme = sys_info->freq_systembus / 2;
}
#ifdef CONFIG_SYS_DPAA_FMAN
if (rcw_tmp & FM1_CLK_SEL) {
if (rcw_tmp & HWA_ASYNC_DIV)
- sys_info->freq_fman[0] = freq_cc_pll[HWA_CC_PLL] / 4;
+ sys_info->freq_fman[0] = freq_c_pll[HWA_CC_PLL] / 4;
else
- sys_info->freq_fman[0] = freq_cc_pll[HWA_CC_PLL] / 2;
+ sys_info->freq_fman[0] = freq_c_pll[HWA_CC_PLL] / 2;
} else {
sys_info->freq_fman[0] = sys_info->freq_systembus / 2;
}
#if (CONFIG_SYS_NUM_FMAN) == 2
if (rcw_tmp & FM2_CLK_SEL) {
if (rcw_tmp & HWA_ASYNC_DIV)
- sys_info->freq_fman[1] = freq_cc_pll[HWA_CC_PLL] / 4;
+ sys_info->freq_fman[1] = freq_c_pll[HWA_CC_PLL] / 4;
else
- sys_info->freq_fman[1] = freq_cc_pll[HWA_CC_PLL] / 2;
+ sys_info->freq_fman[1] = freq_c_pll[HWA_CC_PLL] / 2;
} else {
sys_info->freq_fman[1] = sys_info->freq_systembus / 2;
}
#endif /* #if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR_PHYS) */
-#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
+#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
create_ccsr_l2_tlb:
/*
* Create a TLB for the MMR location of CCSR
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-y = start.o
+extra-y += traps.o
-LIB = $(obj)lib$(CPU).o
+obj-y += cache.o
+obj-$(CONFIG_MP) += release.o
-SSTART = start.o
-CSTART = traps.o
-
-SOBJS-y += cache.o
-SOBJS-$(CONFIG_MP) += release.o
-
-COBJS-y += cpu.o
-COBJS-y += cpu_init.o
+obj-y += cpu.o
+obj-y += cpu_init.o
# 8610 & 8641 are identical w/regards to DDR
-COBJS-$(CONFIG_MPC8610) += ddr-8641.o
-COBJS-$(CONFIG_MPC8641) += ddr-8641.o
-COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
-COBJS-y += interrupts.o
-COBJS-$(CONFIG_MP) += mp.o
-COBJS-$(CONFIG_MPC8610) += mpc8610_serdes.o
-COBJS-$(CONFIG_MPC8641) += mpc8641_serdes.o
-COBJS-y += speed.o
-
-SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-START := $(addprefix $(obj),$(SSTART) $(CSTART))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_MPC8610) += ddr-8641.o
+obj-$(CONFIG_MPC8641) += ddr-8641.o
+obj-$(CONFIG_OF_LIBFDT) += fdt.o
+obj-y += interrupts.o
+obj-$(CONFIG_MP) += mp.o
+obj-$(CONFIG_MPC8610) += mpc8610_serdes.o
+obj-$(CONFIG_MPC8641) += mpc8641_serdes.o
+obj-y += speed.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
# CFLAGS += -DET_DEBUG
-LIB = $(obj)lib$(CPU).o
-
-SSTART-y += start.o
-CSTART-y += traps.o
-COBJS-y += bedbug_860.o
-COBJS-y += commproc.o
-COBJS-y += cpu.o
-COBJS-y += cpu_init.o
-COBJS-y += fec.o
-COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
-COBJS-y += i2c.o
-COBJS-y += interrupts.o
-COBJS-y += scc.o
-COBJS-y += serial.o
-COBJS-y += speed.o
-COBJS-y += spi.o
-COBJS-y += upatch.o
-COBJS-y += video.o
-SOBJS-y += kgdb.o
-SOBJS-y += plprcr_write.o
-
-SRCS := $(SSTART-y:.o=.S) $(CSTART-y:.o=.c) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-START := $(addprefix $(obj),$(SSTART-y) $(CSTART-y))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y += start.o
+extra-y += traps.o
+obj-y += bedbug_860.o
+obj-y += commproc.o
+obj-y += cpu.o
+obj-y += cpu_init.o
+obj-y += fec.o
+obj-$(CONFIG_OF_LIBFDT) += fdt.o
+obj-y += i2c.o
+obj-y += interrupts.o
+obj-y += scc.o
+obj-y += serial.o
+obj-y += speed.o
+obj-y += spi.o
+obj-y += upatch.o
+obj-y += video.o
+obj-y += kgdb.o
+obj-y += plprcr_write.o
# Version 2 as published by the Free Software Foundation.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib8xxx.o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
ifdef MINIMAL
-COBJS-$(CONFIG_FSL_LAW) += law.o
+obj-$(CONFIG_FSL_LAW) += law.o
else
ifneq ($(CPU),mpc83xx)
-COBJS-y += cpu.o
+obj-y += cpu.o
endif
-COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
-COBJS-$(CONFIG_FSL_IFC) += fsl_ifc.o
-COBJS-$(CONFIG_FSL_LBC) += fsl_lbc.o
-COBJS-$(CONFIG_SYS_SRIO) += srio.o
-COBJS-$(CONFIG_FSL_LAW) += law.o
+obj-$(CONFIG_OF_LIBFDT) += fdt.o
+obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
+obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
+obj-$(CONFIG_SYS_SRIO) += srio.o
+obj-$(CONFIG_FSL_LAW) += law.o
endif
-
-SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
# Version 2 as published by the Free Software Foundation.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libddr.o
-
-COBJS-$(CONFIG_FSL_DDR1) += main.o util.o ctrl_regs.o options.o \
+obj-$(CONFIG_FSL_DDR1) += main.o util.o ctrl_regs.o options.o \
lc_common_dimm_params.o
-COBJS-$(CONFIG_FSL_DDR2) += main.o util.o ctrl_regs.o options.o \
+obj-$(CONFIG_FSL_DDR2) += main.o util.o ctrl_regs.o options.o \
lc_common_dimm_params.o
-COBJS-$(CONFIG_FSL_DDR3) += main.o util.o ctrl_regs.o options.o \
+obj-$(CONFIG_FSL_DDR3) += main.o util.o ctrl_regs.o options.o \
lc_common_dimm_params.o
ifdef CONFIG_DDR_SPD
SPD := y
SPD := y
endif
ifdef SPD
-COBJS-$(CONFIG_FSL_DDR1) += ddr1_dimm_params.o
-COBJS-$(CONFIG_FSL_DDR2) += ddr2_dimm_params.o
-COBJS-$(CONFIG_FSL_DDR3) += ddr3_dimm_params.o
+obj-$(CONFIG_FSL_DDR1) += ddr1_dimm_params.o
+obj-$(CONFIG_FSL_DDR2) += ddr2_dimm_params.o
+obj-$(CONFIG_FSL_DDR3) += ddr3_dimm_params.o
endif
-COBJS-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o
-
-SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o
typedef struct {
/* parameters to constrict */
- unsigned int tCKmin_X_ps;
- unsigned int tCKmax_ps;
- unsigned int tCKmax_max_ps;
- unsigned int tRCD_ps;
- unsigned int tRP_ps;
- unsigned int tRAS_ps;
-
- unsigned int tWR_ps; /* maximum = 63750 ps */
- unsigned int tWTR_ps; /* maximum = 63750 ps */
- unsigned int tRFC_ps; /* maximum = 255 ns + 256 ns + .75 ns
+ unsigned int tckmin_x_ps;
+ unsigned int tckmax_ps;
+ unsigned int tckmax_max_ps;
+ unsigned int trcd_ps;
+ unsigned int trp_ps;
+ unsigned int tras_ps;
+
+ unsigned int twr_ps; /* maximum = 63750 ps */
+ unsigned int twtr_ps; /* maximum = 63750 ps */
+ unsigned int trfc_ps; /* maximum = 255 ns + 256 ns + .75 ns
= 511750 ps */
- unsigned int tRRD_ps; /* maximum = 63750 ps */
- unsigned int tRC_ps; /* maximum = 254 ns + .75 ns = 254750 ps */
+ unsigned int trrd_ps; /* maximum = 63750 ps */
+ unsigned int trc_ps; /* maximum = 254 ns + .75 ns = 254750 ps */
unsigned int refresh_rate_ps;
+ unsigned int extended_op_srt;
- unsigned int tIS_ps; /* byte 32, spd->ca_setup */
- unsigned int tIH_ps; /* byte 33, spd->ca_hold */
- unsigned int tDS_ps; /* byte 34, spd->data_setup */
- unsigned int tDH_ps; /* byte 35, spd->data_hold */
- unsigned int tRTP_ps; /* byte 38, spd->trtp */
- unsigned int tDQSQ_max_ps; /* byte 44, spd->tdqsq */
- unsigned int tQHS_ps; /* byte 45, spd->tqhs */
+ unsigned int tis_ps; /* byte 32, spd->ca_setup */
+ unsigned int tih_ps; /* byte 33, spd->ca_hold */
+ unsigned int tds_ps; /* byte 34, spd->data_setup */
+ unsigned int tdh_ps; /* byte 35, spd->data_hold */
+ unsigned int trtp_ps; /* byte 38, spd->trtp */
+ unsigned int tdqsq_max_ps; /* byte 44, spd->tdqsq */
+ unsigned int tqhs_ps; /* byte 45, spd->tqhs */
unsigned int ndimms_present;
unsigned int lowest_common_SPD_caslat;
unsigned int highest_common_derated_caslat;
unsigned int additive_latency;
- unsigned int all_DIMMs_burst_lengths_bitmask;
- unsigned int all_DIMMs_registered;
- unsigned int all_DIMMs_unbuffered;
- unsigned int all_DIMMs_ECC_capable;
+ unsigned int all_dimms_burst_lengths_bitmask;
+ unsigned int all_dimms_registered;
+ unsigned int all_dimms_unbuffered;
+ unsigned int all_dimms_ecc_capable;
unsigned long long total_mem;
unsigned long long base_address;
/* Control Adjust */
unsigned int cntl_adj = 0;
- ext_pretoact = picos_to_mclk(common_dimm->tRP_ps) >> 4;
- ext_acttopre = picos_to_mclk(common_dimm->tRAS_ps) >> 4;
- ext_acttorw = picos_to_mclk(common_dimm->tRCD_ps) >> 4;
+ ext_pretoact = picos_to_mclk(common_dimm->trp_ps) >> 4;
+ ext_acttopre = picos_to_mclk(common_dimm->tras_ps) >> 4;
+ ext_acttorw = picos_to_mclk(common_dimm->trcd_ps) >> 4;
ext_caslat = (2 * cas_latency - 1) >> 4;
- ext_refrec = (picos_to_mclk(common_dimm->tRFC_ps) - 8) >> 4;
+ ext_refrec = (picos_to_mclk(common_dimm->trfc_ps) - 8) >> 4;
/* ext_wrrec only deals with 16 clock and above, or 14 with OTF */
- ext_wrrec = (picos_to_mclk(common_dimm->tWR_ps) +
- (popts->OTF_burst_chop_en ? 2 : 0)) >> 4;
+ ext_wrrec = (picos_to_mclk(common_dimm->twr_ps) +
+ (popts->otf_burst_chop_en ? 2 : 0)) >> 4;
ddr->timing_cfg_3 = (0
| ((ext_pretoact & 0x1) << 28)
static const u8 wrrec_table[] = {
1, 2, 3, 4, 5, 6, 7, 8, 10, 10, 12, 12, 14, 14, 0, 0};
- pretoact_mclk = picos_to_mclk(common_dimm->tRP_ps);
- acttopre_mclk = picos_to_mclk(common_dimm->tRAS_ps);
- acttorw_mclk = picos_to_mclk(common_dimm->tRCD_ps);
+ pretoact_mclk = picos_to_mclk(common_dimm->trp_ps);
+ acttopre_mclk = picos_to_mclk(common_dimm->tras_ps);
+ acttorw_mclk = picos_to_mclk(common_dimm->trcd_ps);
/*
* Translate CAS Latency to a DDR controller field value:
caslat_ctrl = 2 * cas_latency - 1;
#endif
- refrec_ctrl = picos_to_mclk(common_dimm->tRFC_ps) - 8;
- wrrec_mclk = picos_to_mclk(common_dimm->tWR_ps);
+ refrec_ctrl = picos_to_mclk(common_dimm->trfc_ps) - 8;
+ wrrec_mclk = picos_to_mclk(common_dimm->twr_ps);
if (wrrec_mclk > 16)
printf("Error: WRREC doesn't support more than 16 clocks\n");
else
wrrec_mclk = wrrec_table[wrrec_mclk - 1];
- if (popts->OTF_burst_chop_en)
+ if (popts->otf_burst_chop_en)
wrrec_mclk += 2;
- acttoact_mclk = picos_to_mclk(common_dimm->tRRD_ps);
+ acttoact_mclk = picos_to_mclk(common_dimm->trrd_ps);
/*
* JEDEC has min requirement for tRRD
*/
if (acttoact_mclk < 4)
acttoact_mclk = 4;
#endif
- wrtord_mclk = picos_to_mclk(common_dimm->tWTR_ps);
+ wrtord_mclk = picos_to_mclk(common_dimm->twtr_ps);
/*
* JEDEC has some min requirements for tWTR
*/
if (wrtord_mclk < 4)
wrtord_mclk = 4;
#endif
- if (popts->OTF_burst_chop_en)
+ if (popts->otf_burst_chop_en)
wrtord_mclk += 2;
ddr->timing_cfg_1 = (0
wr_lat = compute_cas_write_latency();
#endif
- rd_to_pre = picos_to_mclk(common_dimm->tRTP_ps);
+ rd_to_pre = picos_to_mclk(common_dimm->trtp_ps);
/*
* JEDEC has some min requirements for tRTP
*/
#endif
if (additive_latency)
rd_to_pre += additive_latency;
- if (popts->OTF_burst_chop_en)
+ if (popts->otf_burst_chop_en)
rd_to_pre += 2; /* according to UM */
wr_data_delay = popts->write_data_delay;
- cke_pls = picos_to_mclk(popts->tCKE_clock_pulse_width_ps);
- four_act = picos_to_mclk(popts->tFAW_window_four_activates_ps);
+ cke_pls = picos_to_mclk(popts->tcke_clock_pulse_width_ps);
+ four_act = picos_to_mclk(popts->tfaw_window_four_activates_ps);
ddr->timing_cfg_2 = (0
| ((add_lat_mclk & 0xf) << 28)
const memctl_options_t *popts,
const common_timing_params_t *common_dimm)
{
- if (common_dimm->all_DIMMs_registered
- && !common_dimm->all_DIMMs_unbuffered) {
+ if (common_dimm->all_dimms_registered &&
+ !common_dimm->all_dimms_unbuffered) {
if (popts->rcw_override) {
ddr->ddr_sdram_rcw_1 = popts->rcw_1;
ddr->ddr_sdram_rcw_2 = popts->rcw_2;
unsigned int dbw; /* DRAM dta bus width */
unsigned int eight_be = 0; /* 8-beat burst enable, DDR2 is zero */
unsigned int ncap = 0; /* Non-concurrent auto-precharge */
- unsigned int threeT_en; /* Enable 3T timing */
- unsigned int twoT_en; /* Enable 2T timing */
+ unsigned int threet_en; /* Enable 3T timing */
+ unsigned int twot_en; /* Enable 2T timing */
unsigned int ba_intlv_ctl; /* Bank (CS) interleaving control */
unsigned int x32_en = 0; /* x32 enable */
unsigned int pchb8 = 0; /* precharge bit 8 enable */
mem_en = 1;
sren = popts->self_refresh_in_sleep;
- if (common_dimm->all_DIMMs_ECC_capable) {
+ if (common_dimm->all_dimms_ecc_capable) {
/* Allow setting of ECC only if all DIMMs are ECC. */
- ecc_en = popts->ECC_mode;
+ ecc_en = popts->ecc_mode;
} else {
ecc_en = 0;
}
- if (common_dimm->all_DIMMs_registered
- && !common_dimm->all_DIMMs_unbuffered) {
+ if (common_dimm->all_dimms_registered &&
+ !common_dimm->all_dimms_unbuffered) {
rd_en = 1;
- twoT_en = 0;
+ twot_en = 0;
} else {
rd_en = 0;
- twoT_en = popts->twoT_en;
+ twot_en = popts->twot_en;
}
sdram_type = CONFIG_FSL_SDRAM_TYPE;
eight_be = 1;
}
- threeT_en = popts->threeT_en;
+ threet_en = popts->threet_en;
ba_intlv_ctl = popts->ba_intlv_ctl;
hse = popts->half_strength_driver_enable;
| ((dbw & 0x3) << 19)
| ((eight_be & 0x1) << 18)
| ((ncap & 0x1) << 17)
- | ((threeT_en & 0x1) << 16)
- | ((twoT_en & 0x1) << 15)
+ | ((threet_en & 0x1) << 16)
+ | ((twot_en & 0x1) << 15)
| ((ba_intlv_ctl & 0x7F) << 8)
| ((x32_en & 0x1) << 5)
| ((pchb8 & 0x1) << 4)
int i;
dll_rst_dis = 1; /* Make this configurable */
- dqs_cfg = popts->DQS_config;
+ dqs_cfg = popts->dqs_config;
for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
if (popts->cs_local_opts[i].odt_rd_cfg
|| popts->cs_local_opts[i].odt_wr_cfg) {
* << DDR_SDRAM_INTERVAL[REFINT]
*/
#if defined(CONFIG_FSL_DDR3)
- obc_cfg = popts->OTF_burst_chop_en;
+ obc_cfg = popts->otf_burst_chop_en;
#else
obc_cfg = 0;
#endif
#if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
/* Use the DDR controller to auto initialize memory. */
- d_init = popts->ECC_init_using_memctl;
+ d_init = popts->ecc_init_using_memctl;
ddr->ddr_data_init = CONFIG_MEM_INIT_VALUE;
debug("DDR: ddr_data_init = 0x%08x\n", ddr->ddr_data_init);
#else
/* DDR SDRAM Mode configuration 2 (DDR_SDRAM_MODE_2) */
static void set_ddr_sdram_mode_2(fsl_ddr_cfg_regs_t *ddr,
const memctl_options_t *popts,
+ const common_timing_params_t *common_dimm,
const unsigned int unq_mrs_en)
{
unsigned short esdmode2 = 0; /* Extended SDRAM mode 2 */
rtt_wr = popts->rtt_wr_override_value;
else
rtt_wr = popts->cs_local_opts[0].odt_rtt_wr;
+
+ if (common_dimm->extended_op_srt)
+ srt = common_dimm->extended_op_srt;
+
esdmode2 = (0
| ((rtt_wr & 0x3) << 9)
| ((srt & 0x1) << 7)
*/
dll_on = 1;
- wr_mclk = (common_dimm->tWR_ps + mclk_ps - 1) / mclk_ps;
+ wr_mclk = (common_dimm->twr_ps + mclk_ps - 1) / mclk_ps;
if (wr_mclk <= 16) {
wr = wr_table[wr_mclk - 5];
} else {
#if defined(CONFIG_FSL_DDR2)
const unsigned int mclk_ps = get_memory_clk_period_ps();
#endif
- dqs_en = !popts->DQS_config;
+ dqs_en = !popts->dqs_config;
rtt = fsl_ddr_get_rtt();
al = additive_latency;
#if defined(CONFIG_FSL_DDR1)
wr = 0; /* Historical */
#elif defined(CONFIG_FSL_DDR2)
- wr = (common_dimm->tWR_ps + mclk_ps - 1) / mclk_ps - 1;
+ wr = (common_dimm->twr_ps + mclk_ps - 1) / mclk_ps - 1;
#endif
dll_res = 0;
mode = 0;
set_ddr_sdram_cfg_2(ddr, popts, unq_mrs_en);
set_ddr_sdram_mode(ddr, popts, common_dimm,
cas_latency, additive_latency, unq_mrs_en);
- set_ddr_sdram_mode_2(ddr, popts, unq_mrs_en);
+ set_ddr_sdram_mode_2(ddr, popts, common_dimm, unq_mrs_en);
set_ddr_sdram_interval(ddr, popts, common_dimm);
set_ddr_data_init(ddr);
set_ddr_sdram_clk_cntl(ddr, popts);
const dimm_params_t *dimm_params,
common_timing_params_t *outpdimm,
unsigned int number_of_dimms);
-unsigned int populate_memctl_options(int all_DIMMs_registered,
+unsigned int populate_memctl_options(int all_dimms_registered,
memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num);
* The SPD clk_cycle field (tCKmin) is measured in tenths of
* nanoseconds and represented as BCD.
*/
- pdimm->tCKmin_X_ps
+ pdimm->tckmin_x_ps
= convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle);
- pdimm->tCKmin_X_minus_1_ps
+ pdimm->tckmin_x_minus_1_ps
= convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle2);
- pdimm->tCKmin_X_minus_2_ps
+ pdimm->tckmin_x_minus_2_ps
= convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle3);
- pdimm->tCKmax_ps = compute_tckmax_from_spd_ps(spd->tckmax);
+ pdimm->tckmax_ps = compute_tckmax_from_spd_ps(spd->tckmax);
/*
* Compute CAS latencies defined by SPD
- * The SPD caslat_X should have at least 1 and at most 3 bits set.
+ * The SPD caslat_x should have at least 1 and at most 3 bits set.
*
* If cas_lat after masking is 0, the __ilog2 function returns
* 255 into the variable. This behavior is abused once.
*/
- pdimm->caslat_X = __ilog2(spd->cas_lat);
- pdimm->caslat_X_minus_1 = __ilog2(spd->cas_lat
- & ~(1 << pdimm->caslat_X));
- pdimm->caslat_X_minus_2 = __ilog2(spd->cas_lat
- & ~(1 << pdimm->caslat_X)
- & ~(1 << pdimm->caslat_X_minus_1));
+ pdimm->caslat_x = __ilog2(spd->cas_lat);
+ pdimm->caslat_x_minus_1 = __ilog2(spd->cas_lat
+ & ~(1 << pdimm->caslat_x));
+ pdimm->caslat_x_minus_2 = __ilog2(spd->cas_lat
+ & ~(1 << pdimm->caslat_x)
+ & ~(1 << pdimm->caslat_x_minus_1));
/* Compute CAS latencies below that defined by SPD */
pdimm->caslat_lowest_derated
= compute_derated_DDR1_CAS_latency(get_memory_clk_period_ps());
/* Compute timing parameters */
- pdimm->tRCD_ps = spd->trcd * 250;
- pdimm->tRP_ps = spd->trp * 250;
- pdimm->tRAS_ps = spd->tras * 1000;
+ pdimm->trcd_ps = spd->trcd * 250;
+ pdimm->trp_ps = spd->trp * 250;
+ pdimm->tras_ps = spd->tras * 1000;
- pdimm->tWR_ps = mclk_to_picos(3);
- pdimm->tWTR_ps = mclk_to_picos(1);
- pdimm->tRFC_ps = compute_trfc_ps_from_spd(0, spd->trfc);
+ pdimm->twr_ps = mclk_to_picos(3);
+ pdimm->twtr_ps = mclk_to_picos(1);
+ pdimm->trfc_ps = compute_trfc_ps_from_spd(0, spd->trfc);
- pdimm->tRRD_ps = spd->trrd * 250;
- pdimm->tRC_ps = compute_trc_ps_from_spd(0, spd->trc);
+ pdimm->trrd_ps = spd->trrd * 250;
+ pdimm->trc_ps = compute_trc_ps_from_spd(0, spd->trc);
pdimm->refresh_rate_ps = determine_refresh_rate_ps(spd->refresh);
- pdimm->tIS_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_setup);
- pdimm->tIH_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_hold);
- pdimm->tDS_ps
+ pdimm->tis_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_setup);
+ pdimm->tih_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_hold);
+ pdimm->tds_ps
= convert_bcd_hundredths_to_cycle_time_ps(spd->data_setup);
- pdimm->tDH_ps
+ pdimm->tdh_ps
= convert_bcd_hundredths_to_cycle_time_ps(spd->data_hold);
- pdimm->tRTP_ps = mclk_to_picos(2); /* By the book. */
- pdimm->tDQSQ_max_ps = spd->tdqsq * 10;
- pdimm->tQHS_ps = spd->tqhs * 10;
+ pdimm->trtp_ps = mclk_to_picos(2); /* By the book. */
+ pdimm->tdqsq_max_ps = spd->tdqsq * 10;
+ pdimm->tqhs_ps = spd->tqhs * 10;
return 0;
}
* The SPD clk_cycle field (tCKmin) is measured in tenths of
* nanoseconds and represented as BCD.
*/
- pdimm->tCKmin_X_ps
+ pdimm->tckmin_x_ps
= convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle);
- pdimm->tCKmin_X_minus_1_ps
+ pdimm->tckmin_x_minus_1_ps
= convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle2);
- pdimm->tCKmin_X_minus_2_ps
+ pdimm->tckmin_x_minus_2_ps
= convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle3);
- pdimm->tCKmax_ps = convert_bcd_tenths_to_cycle_time_ps(spd->tckmax);
+ pdimm->tckmax_ps = convert_bcd_tenths_to_cycle_time_ps(spd->tckmax);
/*
* Compute CAS latencies defined by SPD
- * The SPD caslat_X should have at least 1 and at most 3 bits set.
+ * The SPD caslat_x should have at least 1 and at most 3 bits set.
*
* If cas_lat after masking is 0, the __ilog2 function returns
* 255 into the variable. This behavior is abused once.
*/
- pdimm->caslat_X = __ilog2(spd->cas_lat);
- pdimm->caslat_X_minus_1 = __ilog2(spd->cas_lat
- & ~(1 << pdimm->caslat_X));
- pdimm->caslat_X_minus_2 = __ilog2(spd->cas_lat
- & ~(1 << pdimm->caslat_X)
- & ~(1 << pdimm->caslat_X_minus_1));
+ pdimm->caslat_x = __ilog2(spd->cas_lat);
+ pdimm->caslat_x_minus_1 = __ilog2(spd->cas_lat
+ & ~(1 << pdimm->caslat_x));
+ pdimm->caslat_x_minus_2 = __ilog2(spd->cas_lat
+ & ~(1 << pdimm->caslat_x)
+ & ~(1 << pdimm->caslat_x_minus_1));
/* Compute CAS latencies below that defined by SPD */
pdimm->caslat_lowest_derated
= compute_derated_DDR2_CAS_latency(get_memory_clk_period_ps());
/* Compute timing parameters */
- pdimm->tRCD_ps = spd->trcd * 250;
- pdimm->tRP_ps = spd->trp * 250;
- pdimm->tRAS_ps = spd->tras * 1000;
+ pdimm->trcd_ps = spd->trcd * 250;
+ pdimm->trp_ps = spd->trp * 250;
+ pdimm->tras_ps = spd->tras * 1000;
- pdimm->tWR_ps = spd->twr * 250;
- pdimm->tWTR_ps = spd->twtr * 250;
- pdimm->tRFC_ps = compute_trfc_ps_from_spd(spd->trctrfc_ext, spd->trfc);
+ pdimm->twr_ps = spd->twr * 250;
+ pdimm->twtr_ps = spd->twtr * 250;
+ pdimm->trfc_ps = compute_trfc_ps_from_spd(spd->trctrfc_ext, spd->trfc);
- pdimm->tRRD_ps = spd->trrd * 250;
- pdimm->tRC_ps = compute_trc_ps_from_spd(spd->trctrfc_ext, spd->trc);
+ pdimm->trrd_ps = spd->trrd * 250;
+ pdimm->trc_ps = compute_trc_ps_from_spd(spd->trctrfc_ext, spd->trc);
pdimm->refresh_rate_ps = determine_refresh_rate_ps(spd->refresh);
- pdimm->tIS_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_setup);
- pdimm->tIH_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_hold);
- pdimm->tDS_ps
+ pdimm->tis_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_setup);
+ pdimm->tih_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_hold);
+ pdimm->tds_ps
= convert_bcd_hundredths_to_cycle_time_ps(spd->data_setup);
- pdimm->tDH_ps
+ pdimm->tdh_ps
= convert_bcd_hundredths_to_cycle_time_ps(spd->data_hold);
- pdimm->tRTP_ps = spd->trtp * 250;
- pdimm->tDQSQ_max_ps = spd->tdqsq * 10;
- pdimm->tQHS_ps = spd->tqhs * 10;
+ pdimm->trtp_ps = spd->trtp * 250;
+ pdimm->tdqsq_max_ps = spd->tdqsq * 10;
+ pdimm->tqhs_ps = spd->tqhs * 10;
return 0;
}
* sdram minimum cycle time
* we assume the MTB is 0.125ns
* eg:
- * tCK_min=15 MTB (1.875ns) ->DDR3-1066
+ * tck_min=15 MTB (1.875ns) ->DDR3-1066
* =12 MTB (1.5ns) ->DDR3-1333
* =10 MTB (1.25ns) ->DDR3-1600
*/
- pdimm->tCKmin_X_ps = spd->tCK_min * mtb_ps +
- (spd->fine_tCK_min * ftb_10th_ps) / 10;
+ pdimm->tckmin_x_ps = spd->tck_min * mtb_ps +
+ (spd->fine_tck_min * ftb_10th_ps) / 10;
/*
* CAS latency supported
* bit5 - CL5
* bit18 - CL18
*/
- pdimm->caslat_X = ((spd->caslat_msb << 8) | spd->caslat_lsb) << 4;
+ pdimm->caslat_x = ((spd->caslat_msb << 8) | spd->caslat_lsb) << 4;
/*
* min CAS latency time
- * eg: tAA_min =
+ * eg: taa_min =
* DDR3-800D 100 MTB (12.5ns)
* DDR3-1066F 105 MTB (13.125ns)
* DDR3-1333H 108 MTB (13.5ns)
* DDR3-1600H 90 MTB (11.25ns)
*/
- pdimm->tAA_ps = spd->tAA_min * mtb_ps +
- (spd->fine_tAA_min * ftb_10th_ps) / 10;
+ pdimm->taa_ps = spd->taa_min * mtb_ps +
+ (spd->fine_taa_min * ftb_10th_ps) / 10;
/*
* min write recovery time
* eg:
- * tWR_min = 120 MTB (15ns) -> all speed grades.
+ * twr_min = 120 MTB (15ns) -> all speed grades.
*/
- pdimm->tWR_ps = spd->tWR_min * mtb_ps;
+ pdimm->twr_ps = spd->twr_min * mtb_ps;
/*
* min RAS to CAS delay time
- * eg: tRCD_min =
+ * eg: trcd_min =
* DDR3-800 100 MTB (12.5ns)
* DDR3-1066F 105 MTB (13.125ns)
* DDR3-1333H 108 MTB (13.5ns)
* DDR3-1600H 90 MTB (11.25)
*/
- pdimm->tRCD_ps = spd->tRCD_min * mtb_ps +
- (spd->fine_tRCD_min * ftb_10th_ps) / 10;
+ pdimm->trcd_ps = spd->trcd_min * mtb_ps +
+ (spd->fine_trcd_min * ftb_10th_ps) / 10;
/*
* min row active to row active delay time
- * eg: tRRD_min =
+ * eg: trrd_min =
* DDR3-800(1KB page) 80 MTB (10ns)
* DDR3-1333(1KB page) 48 MTB (6ns)
*/
- pdimm->tRRD_ps = spd->tRRD_min * mtb_ps;
+ pdimm->trrd_ps = spd->trrd_min * mtb_ps;
/*
* min row precharge delay time
- * eg: tRP_min =
+ * eg: trp_min =
* DDR3-800D 100 MTB (12.5ns)
* DDR3-1066F 105 MTB (13.125ns)
* DDR3-1333H 108 MTB (13.5ns)
* DDR3-1600H 90 MTB (11.25ns)
*/
- pdimm->tRP_ps = spd->tRP_min * mtb_ps +
- (spd->fine_tRP_min * ftb_10th_ps) / 10;
+ pdimm->trp_ps = spd->trp_min * mtb_ps +
+ (spd->fine_trp_min * ftb_10th_ps) / 10;
/* min active to precharge delay time
* eg: tRAS_min =
* DDR3-1333H 288 MTB (36ns)
* DDR3-1600H 280 MTB (35ns)
*/
- pdimm->tRAS_ps = (((spd->tRAS_tRC_ext & 0xf) << 8) | spd->tRAS_min_lsb)
+ pdimm->tras_ps = (((spd->tras_trc_ext & 0xf) << 8) | spd->tras_min_lsb)
* mtb_ps;
/*
* min active to actice/refresh delay time
* DDR3-1333H 396 MTB (49.5ns)
* DDR3-1600H 370 MTB (46.25ns)
*/
- pdimm->tRC_ps = (((spd->tRAS_tRC_ext & 0xf0) << 4) | spd->tRC_min_lsb)
- * mtb_ps + (spd->fine_tRC_min * ftb_10th_ps) / 10;
+ pdimm->trc_ps = (((spd->tras_trc_ext & 0xf0) << 4) | spd->trc_min_lsb)
+ * mtb_ps + (spd->fine_trc_min * ftb_10th_ps) / 10;
/*
* min refresh recovery delay time
* eg: tRFC_min =
* 1Gb 880 MTB (110ns)
* 2Gb 1280 MTB (160ns)
*/
- pdimm->tRFC_ps = ((spd->tRFC_min_msb << 8) | spd->tRFC_min_lsb)
+ pdimm->trfc_ps = ((spd->trfc_min_msb << 8) | spd->trfc_min_lsb)
* mtb_ps;
/*
* min internal write to read command delay time
- * eg: tWTR_min = 40 MTB (7.5ns) - all speed bins.
+ * eg: twtr_min = 40 MTB (7.5ns) - all speed bins.
* tWRT is at least 4 mclk independent of operating freq.
*/
- pdimm->tWTR_ps = spd->tWTR_min * mtb_ps;
+ pdimm->twtr_ps = spd->twtr_min * mtb_ps;
/*
* min internal read to precharge command delay time
- * eg: tRTP_min = 40 MTB (7.5ns) - all speed bins.
+ * eg: trtp_min = 40 MTB (7.5ns) - all speed bins.
* tRTP is at least 4 mclk independent of operating freq.
*/
- pdimm->tRTP_ps = spd->tRTP_min * mtb_ps;
+ pdimm->trtp_ps = spd->trtp_min * mtb_ps;
/*
* Average periodic refresh interval
* = 3.9 us at ext temperature range
*/
pdimm->refresh_rate_ps = 7800000;
+ if ((spd->therm_ref_opt & 0x1) && !(spd->therm_ref_opt & 0x2)) {
+ pdimm->refresh_rate_ps = 3900000;
+ pdimm->extended_op_srt = 1;
+ }
/*
* min four active window delay time
- * eg: tFAW_min =
+ * eg: tfaw_min =
* DDR3-800(1KB page) 320 MTB (40ns)
* DDR3-1066(1KB page) 300 MTB (37.5ns)
* DDR3-1333(1KB page) 240 MTB (30ns)
* DDR3-1600(1KB page) 240 MTB (30ns)
*/
- pdimm->tFAW_ps = (((spd->tFAW_msb & 0xf) << 8) | spd->tFAW_min)
+ pdimm->tfaw_ps = (((spd->tfaw_msb & 0xf) << 8) | spd->tfaw_min)
* mtb_ps;
return 0;
common_timing_params_t *p = &pinfo->common_timing_params[ctrl_num];
static const struct options_string options[] = {
- COMMON_TIMING(tCKmin_X_ps),
- COMMON_TIMING(tCKmax_ps),
- COMMON_TIMING(tCKmax_max_ps),
- COMMON_TIMING(tRCD_ps),
- COMMON_TIMING(tRP_ps),
- COMMON_TIMING(tRAS_ps),
- COMMON_TIMING(tWR_ps),
- COMMON_TIMING(tWTR_ps),
- COMMON_TIMING(tRFC_ps),
- COMMON_TIMING(tRRD_ps),
- COMMON_TIMING(tRC_ps),
+ COMMON_TIMING(tckmin_x_ps),
+ COMMON_TIMING(tckmax_ps),
+ COMMON_TIMING(tckmax_max_ps),
+ COMMON_TIMING(trcd_ps),
+ COMMON_TIMING(trp_ps),
+ COMMON_TIMING(tras_ps),
+ COMMON_TIMING(twr_ps),
+ COMMON_TIMING(twtr_ps),
+ COMMON_TIMING(trfc_ps),
+ COMMON_TIMING(trrd_ps),
+ COMMON_TIMING(trc_ps),
COMMON_TIMING(refresh_rate_ps),
- COMMON_TIMING(tIS_ps),
- COMMON_TIMING(tIH_ps),
- COMMON_TIMING(tDS_ps),
- COMMON_TIMING(tDH_ps),
- COMMON_TIMING(tRTP_ps),
- COMMON_TIMING(tDQSQ_max_ps),
- COMMON_TIMING(tQHS_ps),
+ COMMON_TIMING(tis_ps),
+ COMMON_TIMING(tih_ps),
+ COMMON_TIMING(tds_ps),
+ COMMON_TIMING(tdh_ps),
+ COMMON_TIMING(trtp_ps),
+ COMMON_TIMING(tdqsq_max_ps),
+ COMMON_TIMING(tqhs_ps),
COMMON_TIMING(ndimms_present),
COMMON_TIMING(lowest_common_SPD_caslat),
COMMON_TIMING(highest_common_derated_caslat),
COMMON_TIMING(additive_latency),
- COMMON_TIMING(all_DIMMs_burst_lengths_bitmask),
- COMMON_TIMING(all_DIMMs_registered),
- COMMON_TIMING(all_DIMMs_unbuffered),
- COMMON_TIMING(all_DIMMs_ECC_capable),
+ COMMON_TIMING(all_dimms_burst_lengths_bitmask),
+ COMMON_TIMING(all_dimms_registered),
+ COMMON_TIMING(all_dimms_unbuffered),
+ COMMON_TIMING(all_dimms_ecc_capable),
COMMON_TIMING(total_mem),
COMMON_TIMING(base_address),
};
DIMM_PARM(burst_lengths_bitmask),
DIMM_PARM(row_density),
- DIMM_PARM(tCKmin_X_ps),
- DIMM_PARM(tCKmin_X_minus_1_ps),
- DIMM_PARM(tCKmin_X_minus_2_ps),
- DIMM_PARM(tCKmax_ps),
+ DIMM_PARM(tckmin_x_ps),
+ DIMM_PARM(tckmin_x_minus_1_ps),
+ DIMM_PARM(tckmin_x_minus_2_ps),
+ DIMM_PARM(tckmax_ps),
- DIMM_PARM(caslat_X),
- DIMM_PARM(caslat_X_minus_1),
- DIMM_PARM(caslat_X_minus_2),
+ DIMM_PARM(caslat_x),
+ DIMM_PARM(caslat_x_minus_1),
+ DIMM_PARM(caslat_x_minus_2),
DIMM_PARM(caslat_lowest_derated),
- DIMM_PARM(tRCD_ps),
- DIMM_PARM(tRP_ps),
- DIMM_PARM(tRAS_ps),
- DIMM_PARM(tWR_ps),
- DIMM_PARM(tWTR_ps),
- DIMM_PARM(tRFC_ps),
- DIMM_PARM(tRRD_ps),
- DIMM_PARM(tRC_ps),
+ DIMM_PARM(trcd_ps),
+ DIMM_PARM(trp_ps),
+ DIMM_PARM(tras_ps),
+ DIMM_PARM(twr_ps),
+ DIMM_PARM(twtr_ps),
+ DIMM_PARM(trfc_ps),
+ DIMM_PARM(trrd_ps),
+ DIMM_PARM(trc_ps),
DIMM_PARM(refresh_rate_ps),
- DIMM_PARM(tIS_ps),
- DIMM_PARM(tIH_ps),
- DIMM_PARM(tDS_ps),
- DIMM_PARM(tDH_ps),
- DIMM_PARM(tRTP_ps),
- DIMM_PARM(tDQSQ_max_ps),
- DIMM_PARM(tQHS_ps),
+ DIMM_PARM(tis_ps),
+ DIMM_PARM(tih_ps),
+ DIMM_PARM(tds_ps),
+ DIMM_PARM(tdh_ps),
+ DIMM_PARM(trtp_ps),
+ DIMM_PARM(tdqsq_max_ps),
+ DIMM_PARM(tqhs_ps),
DIMM_PARM(rank_density),
DIMM_PARM(capacity),
DIMM_PARM(edc_config),
DIMM_PARM(n_banks_per_sdram_device),
- DIMM_PARM(tCKmin_X_ps),
- DIMM_PARM(tCKmin_X_minus_1_ps),
- DIMM_PARM(tCKmin_X_minus_2_ps),
- DIMM_PARM(tCKmax_ps),
+ DIMM_PARM(tckmin_x_ps),
+ DIMM_PARM(tckmin_x_minus_1_ps),
+ DIMM_PARM(tckmin_x_minus_2_ps),
+ DIMM_PARM(tckmax_ps),
- DIMM_PARM(caslat_X),
- DIMM_PARM(tAA_ps),
- DIMM_PARM(caslat_X_minus_1),
- DIMM_PARM(caslat_X_minus_2),
+ DIMM_PARM(caslat_x),
+ DIMM_PARM(taa_ps),
+ DIMM_PARM(caslat_x_minus_1),
+ DIMM_PARM(caslat_x_minus_2),
DIMM_PARM(caslat_lowest_derated),
- DIMM_PARM(tRCD_ps),
- DIMM_PARM(tRP_ps),
- DIMM_PARM(tRAS_ps),
- DIMM_PARM(tWR_ps),
- DIMM_PARM(tWTR_ps),
- DIMM_PARM(tRFC_ps),
- DIMM_PARM(tRRD_ps),
- DIMM_PARM(tRC_ps),
+ DIMM_PARM(trcd_ps),
+ DIMM_PARM(trp_ps),
+ DIMM_PARM(tras_ps),
+ DIMM_PARM(twr_ps),
+ DIMM_PARM(twtr_ps),
+ DIMM_PARM(trfc_ps),
+ DIMM_PARM(trrd_ps),
+ DIMM_PARM(trc_ps),
DIMM_PARM(refresh_rate_ps),
- DIMM_PARM(tIS_ps),
- DIMM_PARM(tIH_ps),
- DIMM_PARM(tDS_ps),
- DIMM_PARM(tDH_ps),
- DIMM_PARM(tRTP_ps),
- DIMM_PARM(tDQSQ_max_ps),
- DIMM_PARM(tQHS_ps),
+ DIMM_PARM(tis_ps),
+ DIMM_PARM(tih_ps),
+ DIMM_PARM(tds_ps),
+ DIMM_PARM(tdh_ps),
+ DIMM_PARM(trtp_ps),
+ DIMM_PARM(tdqsq_max_ps),
+ DIMM_PARM(tqhs_ps),
};
static const unsigned int n_opts = ARRAY_SIZE(options);
const common_timing_params_t *plcd_dimm_params)
{
static const struct options_string options[] = {
- COMMON_TIMING(tCKmax_max_ps),
- COMMON_TIMING(tRCD_ps),
- COMMON_TIMING(tRP_ps),
- COMMON_TIMING(tRAS_ps),
- COMMON_TIMING(tWR_ps),
- COMMON_TIMING(tWTR_ps),
- COMMON_TIMING(tRFC_ps),
- COMMON_TIMING(tRRD_ps),
- COMMON_TIMING(tRC_ps),
+ COMMON_TIMING(tckmax_max_ps),
+ COMMON_TIMING(trcd_ps),
+ COMMON_TIMING(trp_ps),
+ COMMON_TIMING(tras_ps),
+ COMMON_TIMING(twr_ps),
+ COMMON_TIMING(twtr_ps),
+ COMMON_TIMING(trfc_ps),
+ COMMON_TIMING(trrd_ps),
+ COMMON_TIMING(trc_ps),
COMMON_TIMING(refresh_rate_ps),
- COMMON_TIMING(tIS_ps),
- COMMON_TIMING(tDS_ps),
- COMMON_TIMING(tDH_ps),
- COMMON_TIMING(tRTP_ps),
- COMMON_TIMING(tDQSQ_max_ps),
- COMMON_TIMING(tQHS_ps),
+ COMMON_TIMING(tis_ps),
+ COMMON_TIMING(tds_ps),
+ COMMON_TIMING(tdh_ps),
+ COMMON_TIMING(trtp_ps),
+ COMMON_TIMING(tdqsq_max_ps),
+ COMMON_TIMING(tqhs_ps),
COMMON_TIMING(lowest_common_SPD_caslat),
COMMON_TIMING(highest_common_derated_caslat),
COMMON_TIMING(additive_latency),
COMMON_TIMING(ndimms_present),
- COMMON_TIMING(all_DIMMs_registered),
- COMMON_TIMING(all_DIMMs_unbuffered),
- COMMON_TIMING(all_DIMMs_ECC_capable),
+ COMMON_TIMING(all_dimms_registered),
+ COMMON_TIMING(all_dimms_unbuffered),
+ COMMON_TIMING(all_dimms_ecc_capable),
};
static const unsigned int n_opts = ARRAY_SIZE(options);
/* Clock frequencies */
- printf("tCKmin_X_ps = %u (%u MHz)\n",
- plcd_dimm_params->tCKmin_X_ps,
- picos_to_mhz(plcd_dimm_params->tCKmin_X_ps));
- printf("tCKmax_ps = %u (%u MHz)\n",
- plcd_dimm_params->tCKmax_ps,
- picos_to_mhz(plcd_dimm_params->tCKmax_ps));
- printf("all_DIMMs_burst_lengths_bitmask = %02X\n",
- plcd_dimm_params->all_DIMMs_burst_lengths_bitmask);
+ printf("tckmin_x_ps = %u (%u MHz)\n",
+ plcd_dimm_params->tckmin_x_ps,
+ picos_to_mhz(plcd_dimm_params->tckmin_x_ps));
+ printf("tckmax_ps = %u (%u MHz)\n",
+ plcd_dimm_params->tckmax_ps,
+ picos_to_mhz(plcd_dimm_params->tckmax_ps));
+ printf("all_dimms_burst_lengths_bitmask = %02X\n",
+ plcd_dimm_params->all_dimms_burst_lengths_bitmask);
print_option_table(options, n_opts, plcd_dimm_params);
CTRL_OPTIONS(memctl_interleaving),
CTRL_OPTIONS(memctl_interleaving_mode),
CTRL_OPTIONS(ba_intlv_ctl),
- CTRL_OPTIONS(ECC_mode),
- CTRL_OPTIONS(ECC_init_using_memctl),
- CTRL_OPTIONS(DQS_config),
+ CTRL_OPTIONS(ecc_mode),
+ CTRL_OPTIONS(ecc_init_using_memctl),
+ CTRL_OPTIONS(dqs_config),
CTRL_OPTIONS(self_refresh_in_sleep),
CTRL_OPTIONS(dynamic_power),
CTRL_OPTIONS(data_bus_width),
* These can probably be changed to 2T_EN and 3T_EN
* (using a leading numerical character) without problem
*/
- CTRL_OPTIONS(twoT_en),
- CTRL_OPTIONS(threeT_en),
+ CTRL_OPTIONS(twot_en),
+ CTRL_OPTIONS(threet_en),
CTRL_OPTIONS(ap_en),
CTRL_OPTIONS(x4_en),
CTRL_OPTIONS(bstopre),
CTRL_OPTIONS(rcw_2),
CTRL_OPTIONS(ddr_cdr1),
CTRL_OPTIONS(ddr_cdr2),
- CTRL_OPTIONS(tCKE_clock_pulse_width_ps),
- CTRL_OPTIONS(tFAW_window_four_activates_ps),
+ CTRL_OPTIONS(tcke_clock_pulse_width_ps),
+ CTRL_OPTIONS(tfaw_window_four_activates_ps),
CTRL_OPTIONS(trwt_override),
CTRL_OPTIONS(trwt),
};
CTRL_OPTIONS(memctl_interleaving),
CTRL_OPTIONS(memctl_interleaving_mode),
CTRL_OPTIONS_HEX(ba_intlv_ctl),
- CTRL_OPTIONS(ECC_mode),
- CTRL_OPTIONS(ECC_init_using_memctl),
- CTRL_OPTIONS(DQS_config),
+ CTRL_OPTIONS(ecc_mode),
+ CTRL_OPTIONS(ecc_init_using_memctl),
+ CTRL_OPTIONS(dqs_config),
CTRL_OPTIONS(self_refresh_in_sleep),
CTRL_OPTIONS(dynamic_power),
CTRL_OPTIONS(data_bus_width),
* These can probably be changed to 2T_EN and 3T_EN
* (using a leading numerical character) without problem
*/
- CTRL_OPTIONS(twoT_en),
- CTRL_OPTIONS(threeT_en),
+ CTRL_OPTIONS(twot_en),
+ CTRL_OPTIONS(threet_en),
CTRL_OPTIONS(registered_dimm_en),
CTRL_OPTIONS(ap_en),
CTRL_OPTIONS(x4_en),
CTRL_OPTIONS(rcw_2),
CTRL_OPTIONS_HEX(ddr_cdr1),
CTRL_OPTIONS_HEX(ddr_cdr2),
- CTRL_OPTIONS(tCKE_clock_pulse_width_ps),
- CTRL_OPTIONS(tFAW_window_four_activates_ps),
+ CTRL_OPTIONS(tcke_clock_pulse_width_ps),
+ CTRL_OPTIONS(tfaw_window_four_activates_ps),
CTRL_OPTIONS(trwt_override),
CTRL_OPTIONS(trwt),
};
" spd->tqhs, * 45 Max Read DataHold skew tQHS *");
printf("%-3d : %02x %s\n", 46, spd->pll_relock,
" spd->pll_relock, * 46 PLL Relock time *");
- printf("%-3d : %02x %s\n", 47, spd->Tcasemax,
- " spd->Tcasemax, * 47 Tcasemax *");
- printf("%-3d : %02x %s\n", 48, spd->psiTAdram,
- " spd->psiTAdram, * 48 Thermal Resistance of DRAM Package "
+ printf("%-3d : %02x %s\n", 47, spd->t_casemax,
+ " spd->t_casemax, * 47 t_casemax *");
+ printf("%-3d : %02x %s\n", 48, spd->psi_ta_dram,
+ " spd->psi_ta_dram, * 48 Thermal Resistance of DRAM Package "
"from Top (Case) to Ambient (Psi T-A DRAM) *");
printf("%-3d : %02x %s\n", 49, spd->dt0_mode,
" spd->dt0_mode, * 49 DRAM Case Temperature Rise from "
" spd->dt7, * 57 DRAM Case Temperature Rise from "
"Ambient due to Bank Interleave Reads with "
"Auto-Precharge (DT7) *");
- printf("%-3d : %02x %s\n", 58, spd->psiTApll,
- " spd->psiTApll, * 58 Thermal Resistance of PLL Package form"
+ printf("%-3d : %02x %s\n", 58, spd->psi_ta_pll,
+ " spd->psi_ta_pll, * 58 Thermal Resistance of PLL Package form"
" Top (Case) to Ambient (Psi T-A PLL) *");
- printf("%-3d : %02x %s\n", 59, spd->psiTAreg,
- " spd->psiTAreg, * 59 Thermal Reisitance of Register Package"
+ printf("%-3d : %02x %s\n", 59, spd->psi_ta_reg,
+ " spd->psi_ta_reg, * 59 Thermal Reisitance of Register Package"
" from Top (Case) to Ambient (Psi T-A Register) *");
printf("%-3d : %02x %s\n", 60, spd->dtpllactive,
" spd->dtpllactive, * 60 PLL Case Temperature Rise from "
"mtb_dividend Medium Timebase (MTB) Dividend");
PRINT_NXS(11, spd->mtb_divisor,
"mtb_divisor Medium Timebase (MTB) Divisor");
- PRINT_NXS(12, spd->tCK_min,
- "tCK_min SDRAM Minimum Cycle Time");
+ PRINT_NXS(12, spd->tck_min,
+ "tck_min SDRAM Minimum Cycle Time");
PRINT_NXS(13, spd->res_13,
"res_13 Reserved");
PRINT_NXS(14, spd->caslat_lsb,
"caslat_lsb CAS Latencies Supported, LSB");
PRINT_NXS(15, spd->caslat_msb,
"caslat_msb CAS Latencies Supported, MSB");
- PRINT_NXS(16, spd->tAA_min,
- "tAA_min Min CAS Latency Time");
- PRINT_NXS(17, spd->tWR_min,
- "tWR_min Min Write REcovery Time");
- PRINT_NXS(18, spd->tRCD_min,
- "tRCD_min Min RAS# to CAS# Delay Time");
- PRINT_NXS(19, spd->tRRD_min,
- "tRRD_min Min Row Active to Row Active Delay Time");
- PRINT_NXS(20, spd->tRP_min,
- "tRP_min Min Row Precharge Delay Time");
- PRINT_NXS(21, spd->tRAS_tRC_ext,
- "tRAS_tRC_ext Upper Nibbles for tRAS and tRC");
- PRINT_NXS(22, spd->tRAS_min_lsb,
- "tRAS_min_lsb Min Active to Precharge Delay Time, LSB");
- PRINT_NXS(23, spd->tRC_min_lsb,
- "tRC_min_lsb Min Active to Active/Refresh Delay Time, LSB");
- PRINT_NXS(24, spd->tRFC_min_lsb,
- "tRFC_min_lsb Min Refresh Recovery Delay Time LSB");
- PRINT_NXS(25, spd->tRFC_min_msb,
- "tRFC_min_msb Min Refresh Recovery Delay Time MSB");
- PRINT_NXS(26, spd->tWTR_min,
- "tWTR_min Min Internal Write to Read Command Delay Time");
- PRINT_NXS(27, spd->tRTP_min,
- "tRTP_min "
- "Min Internal Read to Precharge Command Delay Time");
- PRINT_NXS(28, spd->tFAW_msb,
- "tFAW_msb Upper Nibble for tFAW");
- PRINT_NXS(29, spd->tFAW_min,
- "tFAW_min Min Four Activate Window Delay Time");
+ PRINT_NXS(16, spd->taa_min,
+ "taa_min Min CAS Latency Time");
+ PRINT_NXS(17, spd->twr_min,
+ "twr_min Min Write REcovery Time");
+ PRINT_NXS(18, spd->trcd_min,
+ "trcd_min Min RAS# to CAS# Delay Time");
+ PRINT_NXS(19, spd->trrd_min,
+ "trrd_min Min Row Active to Row Active Delay Time");
+ PRINT_NXS(20, spd->trp_min,
+ "trp_min Min Row Precharge Delay Time");
+ PRINT_NXS(21, spd->tras_trc_ext,
+ "tras_trc_ext Upper Nibbles for tRAS and tRC");
+ PRINT_NXS(22, spd->tras_min_lsb,
+ "tras_min_lsb Min Active to Precharge Delay Time, LSB");
+ PRINT_NXS(23, spd->trc_min_lsb,
+ "trc_min_lsb Min Active to Active/Refresh Delay Time, LSB");
+ PRINT_NXS(24, spd->trfc_min_lsb,
+ "trfc_min_lsb Min Refresh Recovery Delay Time LSB");
+ PRINT_NXS(25, spd->trfc_min_msb,
+ "trfc_min_msb Min Refresh Recovery Delay Time MSB");
+ PRINT_NXS(26, spd->twtr_min,
+ "twtr_min Min Internal Write to Read Command Delay Time");
+ PRINT_NXS(27, spd->trtp_min,
+ "trtp_min "
+ "Min Internal Read to Precharge Command Delay Time");
+ PRINT_NXS(28, spd->tfaw_msb,
+ "tfaw_msb Upper Nibble for tFAW");
+ PRINT_NXS(29, spd->tfaw_min,
+ "tfaw_min Min Four Activate Window Delay Time");
PRINT_NXS(30, spd->opt_features,
"opt_features SDRAM Optional Features");
PRINT_NXS(31, spd->therm_ref_opt,
"therm_sensor SDRAM Thermal Sensor");
PRINT_NXS(33, spd->device_type,
"device_type SDRAM Device Type");
- PRINT_NXS(34, spd->fine_tCK_min,
- "fine_tCK_min Fine offset for tCKmin");
- PRINT_NXS(35, spd->fine_tAA_min,
- "fine_tAA_min Fine offset for tAAmin");
- PRINT_NXS(36, spd->fine_tRCD_min,
- "fine_tRCD_min Fine offset for tRCDmin");
- PRINT_NXS(37, spd->fine_tRP_min,
- "fine_tRP_min Fine offset for tRPmin");
- PRINT_NXS(38, spd->fine_tRC_min,
- "fine_tRC_min Fine offset for tRCmin");
+ PRINT_NXS(34, spd->fine_tck_min,
+ "fine_tck_min Fine offset for tCKmin");
+ PRINT_NXS(35, spd->fine_taa_min,
+ "fine_taa_min Fine offset for tAAmin");
+ PRINT_NXS(36, spd->fine_trcd_min,
+ "fine_trcd_min Fine offset for tRCDmin");
+ PRINT_NXS(37, spd->fine_trp_min,
+ "fine_trp_min Fine offset for tRPmin");
+ PRINT_NXS(38, spd->fine_trc_min,
+ "fine_trc_min Fine offset for tRCmin");
printf("%-3d-%3d: ", 39, 59); /* Reserved, General Section */
unsigned int number_of_dimms)
{
unsigned int i;
- unsigned int tAAmin_ps = 0;
- unsigned int tCKmin_X_ps = 0;
+ unsigned int taamin_ps = 0;
+ unsigned int tckmin_x_ps = 0;
unsigned int common_caslat;
unsigned int caslat_actual;
unsigned int retry = 16;
const unsigned int mclk_ps = get_memory_clk_period_ps();
/* compute the common CAS latency supported between slots */
- tmp = dimm_params[0].caslat_X;
+ tmp = dimm_params[0].caslat_x;
for (i = 1; i < number_of_dimms; i++) {
if (dimm_params[i].n_ranks)
- tmp &= dimm_params[i].caslat_X;
+ tmp &= dimm_params[i].caslat_x;
}
common_caslat = tmp;
/* compute the max tAAmin tCKmin between slots */
for (i = 0; i < number_of_dimms; i++) {
- tAAmin_ps = max(tAAmin_ps, dimm_params[i].tAA_ps);
- tCKmin_X_ps = max(tCKmin_X_ps, dimm_params[i].tCKmin_X_ps);
+ taamin_ps = max(taamin_ps, dimm_params[i].taa_ps);
+ tckmin_x_ps = max(tckmin_x_ps, dimm_params[i].tckmin_x_ps);
}
/* validate if the memory clk is in the range of dimms */
- if (mclk_ps < tCKmin_X_ps) {
+ if (mclk_ps < tckmin_x_ps) {
printf("DDR clock (MCLK cycle %u ps) is faster than "
"the slowest DIMM(s) (tCKmin %u ps) can support.\n",
- mclk_ps, tCKmin_X_ps);
+ mclk_ps, tckmin_x_ps);
}
/* determine the acutal cas latency */
- caslat_actual = (tAAmin_ps + mclk_ps - 1) / mclk_ps;
+ caslat_actual = (taamin_ps + mclk_ps - 1) / mclk_ps;
/* check if the dimms support the CAS latency */
while (!(common_caslat & (1 << caslat_actual)) && retry > 0) {
caslat_actual++;
{
unsigned int i, j;
- unsigned int tCKmin_X_ps = 0;
- unsigned int tCKmax_ps = 0xFFFFFFFF;
- unsigned int tCKmax_max_ps = 0;
- unsigned int tRCD_ps = 0;
- unsigned int tRP_ps = 0;
- unsigned int tRAS_ps = 0;
- unsigned int tWR_ps = 0;
- unsigned int tWTR_ps = 0;
- unsigned int tRFC_ps = 0;
- unsigned int tRRD_ps = 0;
- unsigned int tRC_ps = 0;
+ unsigned int tckmin_x_ps = 0;
+ unsigned int tckmax_ps = 0xFFFFFFFF;
+ unsigned int tckmax_max_ps = 0;
+ unsigned int trcd_ps = 0;
+ unsigned int trp_ps = 0;
+ unsigned int tras_ps = 0;
+ unsigned int twr_ps = 0;
+ unsigned int twtr_ps = 0;
+ unsigned int trfc_ps = 0;
+ unsigned int trrd_ps = 0;
+ unsigned int trc_ps = 0;
unsigned int refresh_rate_ps = 0;
- unsigned int tIS_ps = 0;
- unsigned int tIH_ps = 0;
- unsigned int tDS_ps = 0;
- unsigned int tDH_ps = 0;
- unsigned int tRTP_ps = 0;
- unsigned int tDQSQ_max_ps = 0;
- unsigned int tQHS_ps = 0;
+ unsigned int extended_op_srt = 1;
+ unsigned int tis_ps = 0;
+ unsigned int tih_ps = 0;
+ unsigned int tds_ps = 0;
+ unsigned int tdh_ps = 0;
+ unsigned int trtp_ps = 0;
+ unsigned int tdqsq_max_ps = 0;
+ unsigned int tqhs_ps = 0;
unsigned int temp1, temp2;
unsigned int additive_latency = 0;
}
#endif
/*
- * Find minimum tCKmax_ps to find fastest slow speed,
+ * Find minimum tckmax_ps to find fastest slow speed,
* i.e., this is the slowest the whole system can go.
*/
- tCKmax_ps = min(tCKmax_ps, dimm_params[i].tCKmax_ps);
+ tckmax_ps = min(tckmax_ps, dimm_params[i].tckmax_ps);
/* Either find maximum value to determine slowest
* speed, delay, time, period, etc */
- tCKmin_X_ps = max(tCKmin_X_ps, dimm_params[i].tCKmin_X_ps);
- tCKmax_max_ps = max(tCKmax_max_ps, dimm_params[i].tCKmax_ps);
- tRCD_ps = max(tRCD_ps, dimm_params[i].tRCD_ps);
- tRP_ps = max(tRP_ps, dimm_params[i].tRP_ps);
- tRAS_ps = max(tRAS_ps, dimm_params[i].tRAS_ps);
- tWR_ps = max(tWR_ps, dimm_params[i].tWR_ps);
- tWTR_ps = max(tWTR_ps, dimm_params[i].tWTR_ps);
- tRFC_ps = max(tRFC_ps, dimm_params[i].tRFC_ps);
- tRRD_ps = max(tRRD_ps, dimm_params[i].tRRD_ps);
- tRC_ps = max(tRC_ps, dimm_params[i].tRC_ps);
- tIS_ps = max(tIS_ps, dimm_params[i].tIS_ps);
- tIH_ps = max(tIH_ps, dimm_params[i].tIH_ps);
- tDS_ps = max(tDS_ps, dimm_params[i].tDS_ps);
- tDH_ps = max(tDH_ps, dimm_params[i].tDH_ps);
- tRTP_ps = max(tRTP_ps, dimm_params[i].tRTP_ps);
- tQHS_ps = max(tQHS_ps, dimm_params[i].tQHS_ps);
+ tckmin_x_ps = max(tckmin_x_ps, dimm_params[i].tckmin_x_ps);
+ tckmax_max_ps = max(tckmax_max_ps, dimm_params[i].tckmax_ps);
+ trcd_ps = max(trcd_ps, dimm_params[i].trcd_ps);
+ trp_ps = max(trp_ps, dimm_params[i].trp_ps);
+ tras_ps = max(tras_ps, dimm_params[i].tras_ps);
+ twr_ps = max(twr_ps, dimm_params[i].twr_ps);
+ twtr_ps = max(twtr_ps, dimm_params[i].twtr_ps);
+ trfc_ps = max(trfc_ps, dimm_params[i].trfc_ps);
+ trrd_ps = max(trrd_ps, dimm_params[i].trrd_ps);
+ trc_ps = max(trc_ps, dimm_params[i].trc_ps);
+ tis_ps = max(tis_ps, dimm_params[i].tis_ps);
+ tih_ps = max(tih_ps, dimm_params[i].tih_ps);
+ tds_ps = max(tds_ps, dimm_params[i].tds_ps);
+ tdh_ps = max(tdh_ps, dimm_params[i].tdh_ps);
+ trtp_ps = max(trtp_ps, dimm_params[i].trtp_ps);
+ tqhs_ps = max(tqhs_ps, dimm_params[i].tqhs_ps);
refresh_rate_ps = max(refresh_rate_ps,
dimm_params[i].refresh_rate_ps);
+ /* extended_op_srt is either 0 or 1, 0 having priority */
+ extended_op_srt = min(extended_op_srt,
+ dimm_params[i].extended_op_srt);
/*
- * Find maximum tDQSQ_max_ps to find slowest.
+ * Find maximum tdqsq_max_ps to find slowest.
*
* FIXME: is finding the slowest value the correct
* strategy for this parameter?
*/
- tDQSQ_max_ps = max(tDQSQ_max_ps, dimm_params[i].tDQSQ_max_ps);
+ tdqsq_max_ps = max(tdqsq_max_ps, dimm_params[i].tdqsq_max_ps);
}
outpdimm->ndimms_present = number_of_dimms - temp1;
return 0;
}
- outpdimm->tCKmin_X_ps = tCKmin_X_ps;
- outpdimm->tCKmax_ps = tCKmax_ps;
- outpdimm->tCKmax_max_ps = tCKmax_max_ps;
- outpdimm->tRCD_ps = tRCD_ps;
- outpdimm->tRP_ps = tRP_ps;
- outpdimm->tRAS_ps = tRAS_ps;
- outpdimm->tWR_ps = tWR_ps;
- outpdimm->tWTR_ps = tWTR_ps;
- outpdimm->tRFC_ps = tRFC_ps;
- outpdimm->tRRD_ps = tRRD_ps;
- outpdimm->tRC_ps = tRC_ps;
+ outpdimm->tckmin_x_ps = tckmin_x_ps;
+ outpdimm->tckmax_ps = tckmax_ps;
+ outpdimm->tckmax_max_ps = tckmax_max_ps;
+ outpdimm->trcd_ps = trcd_ps;
+ outpdimm->trp_ps = trp_ps;
+ outpdimm->tras_ps = tras_ps;
+ outpdimm->twr_ps = twr_ps;
+ outpdimm->twtr_ps = twtr_ps;
+ outpdimm->trfc_ps = trfc_ps;
+ outpdimm->trrd_ps = trrd_ps;
+ outpdimm->trc_ps = trc_ps;
outpdimm->refresh_rate_ps = refresh_rate_ps;
- outpdimm->tIS_ps = tIS_ps;
- outpdimm->tIH_ps = tIH_ps;
- outpdimm->tDS_ps = tDS_ps;
- outpdimm->tDH_ps = tDH_ps;
- outpdimm->tRTP_ps = tRTP_ps;
- outpdimm->tDQSQ_max_ps = tDQSQ_max_ps;
- outpdimm->tQHS_ps = tQHS_ps;
+ outpdimm->extended_op_srt = extended_op_srt;
+ outpdimm->tis_ps = tis_ps;
+ outpdimm->tih_ps = tih_ps;
+ outpdimm->tds_ps = tds_ps;
+ outpdimm->tdh_ps = tdh_ps;
+ outpdimm->trtp_ps = trtp_ps;
+ outpdimm->tdqsq_max_ps = tdqsq_max_ps;
+ outpdimm->tqhs_ps = tqhs_ps;
/* Determine common burst length for all DIMMs. */
temp1 = 0xff;
temp1 &= dimm_params[i].burst_lengths_bitmask;
}
}
- outpdimm->all_DIMMs_burst_lengths_bitmask = temp1;
+ outpdimm->all_dimms_burst_lengths_bitmask = temp1;
/* Determine if all DIMMs registered buffered. */
temp1 = temp2 = 0;
}
}
- outpdimm->all_DIMMs_registered = 0;
- outpdimm->all_DIMMs_unbuffered = 0;
+ outpdimm->all_dimms_registered = 0;
+ outpdimm->all_dimms_unbuffered = 0;
if (temp1 && !temp2) {
- outpdimm->all_DIMMs_registered = 1;
+ outpdimm->all_dimms_registered = 1;
} else if (!temp1 && temp2) {
- outpdimm->all_DIMMs_unbuffered = 1;
+ outpdimm->all_dimms_unbuffered = 1;
} else {
printf("ERROR: Mix of registered buffered and unbuffered "
"DIMMs detected!\n");
}
temp1 = 0;
- if (outpdimm->all_DIMMs_registered)
+ if (outpdimm->all_dimms_registered)
for (j = 0; j < 16; j++) {
outpdimm->rcw[j] = dimm_params[0].rcw[j];
for (i = 1; i < number_of_dimms; i++) {
for (i = 0; i < number_of_dimms; i++) {
if (dimm_params[i].n_ranks) {
temp2 = 0;
- temp2 |= 1 << dimm_params[i].caslat_X;
- temp2 |= 1 << dimm_params[i].caslat_X_minus_1;
- temp2 |= 1 << dimm_params[i].caslat_X_minus_2;
+ temp2 |= 1 << dimm_params[i].caslat_x;
+ temp2 |= 1 << dimm_params[i].caslat_x_minus_1;
+ temp2 |= 1 << dimm_params[i].caslat_x_minus_2;
/*
* FIXME: If there was no entry for X-2 (X-1) in
- * the SPD, then caslat_X_minus_2
- * (caslat_X_minus_1) contains either 255 or
+ * the SPD, then caslat_x_minus_2
+ * (caslat_x_minus_1) contains either 255 or
* 0xFFFFFFFF because that's what the glorious
* __ilog2 function returns for an input of 0.
* On 32-bit PowerPC, left shift counts with bit
if (!dimm_params[i].n_ranks) {
continue;
}
- if (dimm_params[i].caslat_X == temp2) {
- if (mclk_ps >= dimm_params[i].tCKmin_X_ps) {
+ if (dimm_params[i].caslat_x == temp2) {
+ if (mclk_ps >= dimm_params[i].tckmin_x_ps) {
debug("CL = %u ok on DIMM %u at tCK=%u"
" ps with its tCKmin_X_ps of %u\n",
temp2, i, mclk_ps,
- dimm_params[i].tCKmin_X_ps);
+ dimm_params[i].tckmin_x_ps);
continue;
} else {
not_ok++;
}
}
- if (dimm_params[i].caslat_X_minus_1 == temp2) {
- unsigned int tCKmin_X_minus_1_ps
- = dimm_params[i].tCKmin_X_minus_1_ps;
- if (mclk_ps >= tCKmin_X_minus_1_ps) {
+ if (dimm_params[i].caslat_x_minus_1 == temp2) {
+ unsigned int tckmin_x_minus_1_ps
+ = dimm_params[i].tckmin_x_minus_1_ps;
+ if (mclk_ps >= tckmin_x_minus_1_ps) {
debug("CL = %u ok on DIMM %u at "
"tCK=%u ps with its "
- "tCKmin_X_minus_1_ps of %u\n",
+ "tckmin_x_minus_1_ps of %u\n",
temp2, i, mclk_ps,
- tCKmin_X_minus_1_ps);
+ tckmin_x_minus_1_ps);
continue;
} else {
not_ok++;
}
}
- if (dimm_params[i].caslat_X_minus_2 == temp2) {
- unsigned int tCKmin_X_minus_2_ps
- = dimm_params[i].tCKmin_X_minus_2_ps;
- if (mclk_ps >= tCKmin_X_minus_2_ps) {
+ if (dimm_params[i].caslat_x_minus_2 == temp2) {
+ unsigned int tckmin_x_minus_2_ps
+ = dimm_params[i].tckmin_x_minus_2_ps;
+ if (mclk_ps >= tckmin_x_minus_2_ps) {
debug("CL = %u ok on DIMM %u at "
"tCK=%u ps with its "
- "tCKmin_X_minus_2_ps of %u\n",
+ "tckmin_x_minus_2_ps of %u\n",
temp2, i, mclk_ps,
- tCKmin_X_minus_2_ps);
+ tckmin_x_minus_2_ps);
continue;
} else {
not_ok++;
} else {
debug("Warning: not all DIMMs ECC capable, cant enable ECC\n");
}
- outpdimm->all_DIMMs_ECC_capable = temp1;
+ outpdimm->all_dimms_ecc_capable = temp1;
#ifndef CONFIG_FSL_DDR3
/* FIXME: move to somewhere else to validate. */
- if (mclk_ps > tCKmax_max_ps) {
+ if (mclk_ps > tckmax_max_ps) {
printf("Warning: some of the installed DIMMs "
"can not operate this slowly.\n");
return 1;
#if defined(CONFIG_FSL_DDR2)
if (lowest_good_caslat < 4) {
- additive_latency = (picos_to_mclk(tRCD_ps) > lowest_good_caslat)
- ? picos_to_mclk(tRCD_ps) - lowest_good_caslat : 0;
- if (mclk_to_picos(additive_latency) > tRCD_ps) {
- additive_latency = picos_to_mclk(tRCD_ps);
+ additive_latency = (picos_to_mclk(trcd_ps) > lowest_good_caslat)
+ ? picos_to_mclk(trcd_ps) - lowest_good_caslat : 0;
+ if (mclk_to_picos(additive_latency) > trcd_ps) {
+ additive_latency = picos_to_mclk(trcd_ps);
debug("setting additive_latency to %u because it was "
" greater than tRCD_ps\n", additive_latency);
}
*
* AL <= tRCD(min)
*/
- if (mclk_to_picos(additive_latency) > tRCD_ps) {
+ if (mclk_to_picos(additive_latency) > trcd_ps) {
printf("Error: invalid additive latency exceeds tRCD(min).\n");
return 1;
}
*/
outpdimm->additive_latency = additive_latency;
- debug("tCKmin_ps = %u\n", outpdimm->tCKmin_X_ps);
- debug("tRCD_ps = %u\n", outpdimm->tRCD_ps);
- debug("tRP_ps = %u\n", outpdimm->tRP_ps);
- debug("tRAS_ps = %u\n", outpdimm->tRAS_ps);
- debug("tWR_ps = %u\n", outpdimm->tWR_ps);
- debug("tWTR_ps = %u\n", outpdimm->tWTR_ps);
- debug("tRFC_ps = %u\n", outpdimm->tRFC_ps);
- debug("tRRD_ps = %u\n", outpdimm->tRRD_ps);
- debug("tRC_ps = %u\n", outpdimm->tRC_ps);
+ debug("tCKmin_ps = %u\n", outpdimm->tckmin_x_ps);
+ debug("trcd_ps = %u\n", outpdimm->trcd_ps);
+ debug("trp_ps = %u\n", outpdimm->trp_ps);
+ debug("tras_ps = %u\n", outpdimm->tras_ps);
+ debug("twr_ps = %u\n", outpdimm->twr_ps);
+ debug("twtr_ps = %u\n", outpdimm->twtr_ps);
+ debug("trfc_ps = %u\n", outpdimm->trfc_ps);
+ debug("trrd_ps = %u\n", outpdimm->trrd_ps);
+ debug("trc_ps = %u\n", outpdimm->trc_ps);
return 0;
}
static void __get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
{
- int ret = i2c_read(i2c_address, 0, 1, (uchar *)spd,
+ int ret;
+
+ i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
+
+ ret = i2c_read(i2c_address, 0, 1, (uchar *)spd,
sizeof(generic_spd_eeprom_t));
if (ret) {
* which is currently STEP_ASSIGN_ADDRESSES.
*/
populate_memctl_options(
- timing_params[i].all_DIMMs_registered,
+ timing_params[i].all_dimms_registered,
&pinfo->memctl_opts[i],
pinfo->dimm_params[i], i);
/*
* using fixed parameters, this function should be
* be called from board init file.
*/
- if (timing_params[i].all_DIMMs_registered)
+ if (timing_params[i].all_dimms_registered)
assert_reset = 1;
}
if (assert_reset) {
*/
deassert_reset = board_need_mem_reset();
for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
- if (info.common_timing_params[i].all_DIMMs_registered)
+ if (info.common_timing_params[i].all_dimms_registered)
deassert_reset = 1;
}
for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
return 0;
}
-unsigned int populate_memctl_options(int all_DIMMs_registered,
+unsigned int populate_memctl_options(int all_dimms_registered,
memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
popts->ba_intlv_ctl = 0;
/* Memory Organization Parameters */
- popts->registered_dimm_en = all_DIMMs_registered;
+ popts->registered_dimm_en = all_dimms_registered;
/* Operational Mode Paramters */
/* Pick ECC modes */
- popts->ECC_mode = 0; /* 0 = disabled, 1 = enabled */
+ popts->ecc_mode = 0; /* 0 = disabled, 1 = enabled */
#ifdef CONFIG_DDR_ECC
if (hwconfig_sub_f("fsl_ddr", "ecc", buf)) {
if (hwconfig_subarg_cmp_f("fsl_ddr", "ecc", "on", buf))
- popts->ECC_mode = 1;
+ popts->ecc_mode = 1;
} else
- popts->ECC_mode = 1;
+ popts->ecc_mode = 1;
#endif
- popts->ECC_init_using_memctl = 1; /* 0 = use DMA, 1 = use memctl */
+ popts->ecc_init_using_memctl = 1; /* 0 = use DMA, 1 = use memctl */
/*
* Choose DQS config
* 1 for DDR2
*/
#if defined(CONFIG_FSL_DDR1)
- popts->DQS_config = 0;
+ popts->dqs_config = 0;
#elif defined(CONFIG_FSL_DDR2) || defined(CONFIG_FSL_DDR3)
- popts->DQS_config = 1;
+ popts->dqs_config = 1;
#endif
/* Choose self-refresh during sleep. */
/* Choose burst length. */
#if defined(CONFIG_FSL_DDR3)
#if defined(CONFIG_E500MC)
- popts->OTF_burst_chop_en = 0; /* on-the-fly burst chop disable */
+ popts->otf_burst_chop_en = 0; /* on-the-fly burst chop disable */
popts->burst_length = DDR_BL8; /* Fixed 8-beat burst len */
#else
if ((popts->data_bus_width == 1) || (popts->data_bus_width == 2)) {
/* 32-bit or 16-bit bus */
- popts->OTF_burst_chop_en = 0;
+ popts->otf_burst_chop_en = 0;
popts->burst_length = DDR_BL8;
} else {
- popts->OTF_burst_chop_en = 1; /* on-the-fly burst chop */
+ popts->otf_burst_chop_en = 1; /* on-the-fly burst chop */
popts->burst_length = DDR_OTF; /* on-the-fly BC4 and BL8 */
}
#endif
* - number of components, number of active ranks
* - how much time you want to spend playing around
*/
- popts->twoT_en = 0;
- popts->threeT_en = 0;
+ popts->twot_en = 0;
+ popts->threet_en = 0;
/* for RDIMM, address parity enable */
popts->ap_en = 1;
popts->bstopre = 0x100;
/* Minimum CKE pulse width -- tCKE(MIN) */
- popts->tCKE_clock_pulse_width_ps
+ popts->tcke_clock_pulse_width_ps
= mclk_to_picos(FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR);
/*
* FIXME: width, was considering looking at pdimm->primary_sdram_width
*/
#if defined(CONFIG_FSL_DDR1)
- popts->tFAW_window_four_activates_ps = mclk_to_picos(1);
+ popts->tfaw_window_four_activates_ps = mclk_to_picos(1);
#elif defined(CONFIG_FSL_DDR2)
/*
* x4/x8; some datasheets have 35000
* x16 wide columns only? Use 50000?
*/
- popts->tFAW_window_four_activates_ps = 37500;
+ popts->tfaw_window_four_activates_ps = 37500;
#elif defined(CONFIG_FSL_DDR3)
- popts->tFAW_window_four_activates_ps = pdimm[0].tFAW_ps;
+ popts->tfaw_window_four_activates_ps = pdimm[0].tfaw_ps;
#endif
popts->zq_en = 0;
popts->wrlvl_en = 0;
#include <phy.h>
#include <hwconfig.h>
-#define FSL_MAX_NUM_USB_CTRLS 2
+#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#endif
#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
static int ft_del_cpuhandle(void *blob, int cpuhandle)
char str[5];
int i, j;
- for (i = 1; i <= FSL_MAX_NUM_USB_CTRLS; i++) {
+ for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
int mode_idx = -1, phy_idx = -1;
snprintf(str, 5, "%s%d", "usb", i);
if (hwconfig(str)) {
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-y := resetvec.o
+extra-y += start.o
-LIB = $(obj)lib$(CPU).o
+obj-y := cache.o
+obj-y += dcr.o
+obj-y += kgdb.o
-START := resetvec.o
-START += start.o
-
-SOBJS := cache.o
-SOBJS += dcr.o
-SOBJS += kgdb.o
-
-COBJS := 40x_spd_sdram.o
+obj-y += 40x_spd_sdram.o
ifndef CONFIG_NAND_SPL
ifndef CONFIG_NAND_U_BOOT
-COBJS += 44x_spd_ddr.o
+obj-y += 44x_spd_ddr.o
endif
endif
-COBJS-$(CONFIG_SDRAM_PPC4xx_IBM_DDR2) += 44x_spd_ddr2.o
-COBJS-$(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) += 4xx_ibm_ddr2_autocalib.o
-COBJS += 4xx_pci.o
-COBJS += 4xx_pcie.o
-COBJS += bedbug_405.o
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += cmd_chip_config.o
-COBJS += cpu.o
-COBJS += cpu_init.o
-COBJS += denali_data_eye.o
-COBJS += denali_spd_ddr2.o
-COBJS += ecc.o
-COBJS-$(CONFIG_CMD_ECCTEST) += cmd_ecctest.o
-COBJS += fdt.o
-COBJS += interrupts.o
-COBJS-$(CONFIG_CMD_REGINFO) += reginfo.o
-COBJS += sdram.o
-COBJS += speed.o
-COBJS += tlb.o
-COBJS += traps.o
-COBJS += usb.o
-COBJS += usb_ohci.o
-COBJS-$(CONFIG_XILINX_440) += xilinx_irq.o
+obj-$(CONFIG_SDRAM_PPC4xx_IBM_DDR2) += 44x_spd_ddr2.o
+obj-$(CONFIG_PPC4xx_DDR_AUTOCALIBRATION) += 4xx_ibm_ddr2_autocalib.o
+obj-y += 4xx_pci.o
+obj-y += 4xx_pcie.o
+obj-y += bedbug_405.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += cmd_chip_config.o
+obj-y += cpu.o
+obj-y += cpu_init.o
+obj-y += denali_data_eye.o
+obj-y += denali_spd_ddr2.o
+obj-y += ecc.o
+obj-$(CONFIG_CMD_ECCTEST) += cmd_ecctest.o
+obj-y += fdt.o
+obj-y += interrupts.o
+obj-$(CONFIG_CMD_REGINFO) += reginfo.o
+obj-y += sdram.o
+obj-y += speed.o
+obj-y += tlb.o
+obj-y += traps.o
+obj-y += usb.o
+obj-y += usb_ohci.o
+obj-$(CONFIG_XILINX_440) += xilinx_irq.o
ifndef CONFIG_XILINX_440
-COBJS += 4xx_uart.o
-COBJS += gpio.o
-COBJS += miiphy.o
-COBJS += uic.o
+obj-y += 4xx_uart.o
+obj-y += gpio.o
+obj-y += miiphy.o
+obj-y += uic.o
endif
ifdef CONFIG_SPL_BUILD
-COBJS-y += spl_boot.o
+obj-y += spl_boot.o
endif
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
memset (&gohci, 0, sizeof (ohci_t));
memset (&urb_priv, 0, sizeof (urb_priv_t));
-
/*
* MPC8xx Internal Memory Map
* Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
#ifndef _ASM_PPC_ATOMIC_H_
#define _ASM_PPC_ATOMIC_H_
-#include <linux/config.h>
-
#ifdef CONFIG_SMP
typedef struct { volatile int counter; } atomic_t;
#else
#ifndef _PPC_BITOPS_H
#define _PPC_BITOPS_H
-#include <linux/config.h>
#include <asm/byteorder.h>
extern void set_bit(int nr, volatile void *addr);
#ifndef __ARCH_PPC_CACHE_H
#define __ARCH_PPC_CACHE_H
-#include <linux/config.h>
#include <asm/processor.h>
/* bytes per L1 cache line */
#define CONFIG_PPC_SPINTABLE_COMPATIBLE
#define FSL_DDR_VER_4_7 47
+#define FSL_DDR_VER_5_0 50
/* Number of TLB CAM entries we have on FSL Book-E chips */
#if defined(CONFIG_E500MC)
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
#define CONFIG_TSECV2
#define CONFIG_FSL_PCIE_DISABLE_ASPM
#define CONFIG_SYS_FSL_SEC_COMPAT 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#elif defined(CONFIG_P1012)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 12
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_TSECV2
#define CONFIG_FSL_PCIE_DISABLE_ASPM
#elif defined(CONFIG_P1013)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 12
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_TSECV2
#define CONFIG_SYS_FSL_SEC_COMPAT 2
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 2
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_QMAN_NUM_PORTALS 3
#define CONFIG_SYS_BMAN_NUM_PORTALS 3
#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_A005125
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#elif defined(CONFIG_P1021)
#define CONFIG_MAX_CPUS 2
#define MAX_QE_RISC 1
#define QE_NUM_OF_SNUM 28
#define CONFIG_SYS_FSL_ERRATUM_A005125
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#elif defined(CONFIG_P1022)
#define CONFIG_MAX_CPUS 2
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_TSECV2
#define CONFIG_SYS_FSL_SEC_COMPAT 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 2
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_QMAN_NUM_PORTALS 3
#define CONFIG_SYS_BMAN_NUM_PORTALS 3
#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
#define CONFIG_TSECV2
#define CONFIG_FSL_PCIE_DISABLE_ASPM
#define CONFIG_SYS_FSL_SEC_COMPAT 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#elif defined(CONFIG_P1025)
#define CONFIG_MAX_CPUS 2
#define CONFIG_SYS_FSL_NUM_LAWS 12
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_TSECV2
#define CONFIG_FSL_PCIE_DISABLE_ASPM
#define CONFIG_SYS_FSL_NUM_LAWS 12
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_SYS_FSL_SEC_COMPAT 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
#define CONFIG_SYS_FSL_RMU
#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
#define CONFIG_SYS_FSL_ERRATUM_A005125
-
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#elif defined(CONFIG_PPC_P2041) /* also supports P2040 */
#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_NUM_FM1_DTSEC 5
#define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#define CONFIG_SYS_FSL_TBCLK_DIV 32
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
#define CONFIG_SYS_FSL_ERRATUM_USB14
#define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_SYS_NUM_FM2_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#define CONFIG_SYS_FSL_TBCLK_DIV 16
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,p4080-pcie"
#define CONFIG_SYS_NUM_FM1_DTSEC 5
#define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#define CONFIG_SYS_FSL_TBCLK_DIV 32
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
#define CONFIG_SYS_NUM_FM2_DTSEC 5
#define CONFIG_SYS_NUM_FM2_10GEC 1
#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
#define CONFIG_SYS_FSL_TBCLK_DIV 16
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
#define CONFIG_TSECV2
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000
#define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
#define CONFIG_TSECV2
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_DSP_DDR_ADDR 0x40000000
#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000
#define CONFIG_SYS_FSL_DSP_M3_RAM_ADDR 0xc0000000
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
#ifdef CONFIG_PPC_T4240
#define CONFIG_MAX_CPUS 12
+#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4 }
#define CONFIG_SYS_NUM_FM1_DTSEC 8
#define CONFIG_SYS_NUM_FM1_10GEC 2
#define CONFIG_SYS_NUM_FM2_DTSEC 8
#define CONFIG_NUM_DDR_CONTROLLERS 3
#else
#define CONFIG_MAX_CPUS 8
+#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
#define CONFIG_SYS_NUM_FM1_DTSEC 7
#define CONFIG_SYS_NUM_FM1_10GEC 1
#define CONFIG_SYS_NUM_FM2_DTSEC 7
#define CONFIG_SYS_FSL_SRDS_4
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_SYS_NUM_FMAN 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define CONFIG_SYS_PME_CLK 0
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CONFIG_SYS_FMAN_V3
+#define CONFIG_SYS_FM1_CLK 3
+#define CONFIG_SYS_FM2_CLK 3
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
#define CONFIG_SYS_FSL_TBCLK_DIV 16
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v3.0"
#define CONFIG_SYS_FSL_ERRATUM_A004468
#define CONFIG_SYS_FSL_ERRATUM_A_004934
#define CONFIG_SYS_FSL_ERRATUM_A005871
+#define CONFIG_SYS_FSL_ERRATUM_A006379
#define CONFIG_SYS_FSL_ERRATUM_A006593
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
#define CONFIG_SYS_FSL_PCI_VER_3_X
#define CONFIG_SYS_FSL_SRDS_2
#define CONFIG_SYS_FSL_SEC_COMPAT 4
#define CONFIG_SYS_NUM_FMAN 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#define CONFIG_SYS_FM1_CLK 0
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
#define CONFIG_SYS_FMAN_V3
#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
#define CONFIG_SYS_FSL_ERRATUM_A_004934
#define CONFIG_SYS_FSL_ERRATUM_A005871
+#define CONFIG_SYS_FSL_ERRATUM_A006379
#define CONFIG_SYS_FSL_ERRATUM_A006593
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
#define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_FSL_NUM_CC_PLLS 4
+#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 }
#define CONFIG_SYS_NUM_FM1_DTSEC 6
#define CONFIG_SYS_NUM_FM1_10GEC 2
#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
#define CONFIG_MAX_CPUS 2
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2
#define CONFIG_SYS_FSL_NUM_CC_PLLS 4
+#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4 }
#define CONFIG_SYS_NUM_FM1_DTSEC 4
#define CONFIG_SYS_NUM_FM1_10GEC 0
#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
+#if defined(CONFIG_PPC_T1040) || defined(CONFIG_PPC_T1042)
#define CONFIG_MAX_CPUS 4
-#define CONFIG_SYS_FSL_NUM_CC_PLLS 5
+#elif defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
+#define CONFIG_MAX_CPUS 2
+#endif
+#define CONFIG_SYS_FSL_NUM_CC_PLLS 2
+#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 }
+#define CONFIG_SYS_SDHC_CLOCK 0
#define CONFIG_SYS_FSL_NUM_LAWS 16
-#define CONFIG_SYS_FSL_SEC_COMPAT 4
+#define CONFIG_SYS_FSL_SRDS_1
+#define CONFIG_SYS_FSL_SEC_COMPAT 5
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_NUM_FM1_DTSEC 5
#define CONFIG_NUM_DDR_CONTROLLERS 1
-#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7
-#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define CONFIG_PME_PLAT_CLK_DIV 2
+#define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV
+#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
+#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CONFIG_SYS_FMAN_V3
-#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
+#define CONFIG_FM_PLAT_CLK_DIV 1
+#define CONFIG_SYS_FM1_CLK CONFIG_FM_PLAT_CLK_DIV
+#define CONFIG_SYS_FM_MURAM_SIZE 0x30000
#define CONFIG_SYS_FSL_TBCLK_DIV 32
#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
-#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
-#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
-#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
-
/*
* MPC8260 Communication Processor Module.
* Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
-
/*
* MPC85xx Communication Processor Module
* Copyright (c) 2003,Motorola Inc.
unsigned int mtb_ps; /* medium timebase ps, only for ddr3 */
unsigned int ftb_10th_ps; /* fine timebase, in 1/10 ps, only for ddr3 */
- unsigned int tAA_ps; /* minimum CAS latency time, only for ddr3 */
- unsigned int tFAW_ps; /* four active window delay, only for ddr3 */
+ unsigned int taa_ps; /* minimum CAS latency time, only for ddr3 */
+ unsigned int tfaw_ps; /* four active window delay, only for ddr3 */
/*
* SDRAM clock periods
* The range for these are 1000-10000 so a short should be sufficient
*/
- unsigned int tCKmin_X_ps;
- unsigned int tCKmin_X_minus_1_ps;
- unsigned int tCKmin_X_minus_2_ps;
- unsigned int tCKmax_ps;
+ unsigned int tckmin_x_ps;
+ unsigned int tckmin_x_minus_1_ps;
+ unsigned int tckmin_x_minus_2_ps;
+ unsigned int tckmax_ps;
/* SPD-defined CAS latencies */
- unsigned int caslat_X;
- unsigned int caslat_X_minus_1;
- unsigned int caslat_X_minus_2;
+ unsigned int caslat_x;
+ unsigned int caslat_x_minus_1;
+ unsigned int caslat_x_minus_2;
unsigned int caslat_lowest_derated; /* Derated CAS latency */
/* basic timing parameters */
- unsigned int tRCD_ps;
- unsigned int tRP_ps;
- unsigned int tRAS_ps;
+ unsigned int trcd_ps;
+ unsigned int trp_ps;
+ unsigned int tras_ps;
- unsigned int tWR_ps; /* maximum = 63750 ps */
- unsigned int tWTR_ps; /* maximum = 63750 ps */
- unsigned int tRFC_ps; /* max = 255 ns + 256 ns + .75 ns
+ unsigned int twr_ps; /* maximum = 63750 ps */
+ unsigned int twtr_ps; /* maximum = 63750 ps */
+ unsigned int trfc_ps; /* max = 255 ns + 256 ns + .75 ns
= 511750 ps */
- unsigned int tRRD_ps; /* maximum = 63750 ps */
- unsigned int tRC_ps; /* maximum = 254 ns + .75 ns = 254750 ps */
+ unsigned int trrd_ps; /* maximum = 63750 ps */
+ unsigned int trc_ps; /* maximum = 254 ns + .75 ns = 254750 ps */
unsigned int refresh_rate_ps;
+ unsigned int extended_op_srt;
/* DDR3 doesn't need these as below */
- unsigned int tIS_ps; /* byte 32, spd->ca_setup */
- unsigned int tIH_ps; /* byte 33, spd->ca_hold */
- unsigned int tDS_ps; /* byte 34, spd->data_setup */
- unsigned int tDH_ps; /* byte 35, spd->data_hold */
- unsigned int tRTP_ps; /* byte 38, spd->trtp */
- unsigned int tDQSQ_max_ps; /* byte 44, spd->tdqsq */
- unsigned int tQHS_ps; /* byte 45, spd->tqhs */
+ unsigned int tis_ps; /* byte 32, spd->ca_setup */
+ unsigned int tih_ps; /* byte 33, spd->ca_hold */
+ unsigned int tds_ps; /* byte 34, spd->data_setup */
+ unsigned int tdh_ps; /* byte 35, spd->data_hold */
+ unsigned int trtp_ps; /* byte 38, spd->trtp */
+ unsigned int tdqsq_max_ps; /* byte 44, spd->tdqsq */
+ unsigned int tqhs_ps; /* byte 45, spd->tqhs */
/* DDR3 RDIMM */
unsigned char rcw[16]; /* Register Control Word 0-15 */
} fsl_ddr_cfg_regs_t;
typedef struct memctl_options_partial_s {
- unsigned int all_DIMMs_ECC_capable;
- unsigned int all_DIMMs_tCKmax_ps;
- unsigned int all_DIMMs_burst_lengths_bitmask;
- unsigned int all_DIMMs_registered;
- unsigned int all_DIMMs_unbuffered;
+ unsigned int all_dimms_ecc_capable;
+ unsigned int all_dimms_tckmax_ps;
+ unsigned int all_dimms_burst_lengths_bitmask;
+ unsigned int all_dimms_registered;
+ unsigned int all_dimms_unbuffered;
/* unsigned int lowest_common_SPD_caslat; */
- unsigned int all_DIMMs_minimum_tRCD_ps;
+ unsigned int all_dimms_minimum_trcd_ps;
} memctl_options_partial_t;
#define DDR_DATA_BUS_WIDTH_64 0
unsigned int addr_hash;
/* Operational mode parameters */
- unsigned int ECC_mode; /* Use ECC? */
+ unsigned int ecc_mode; /* Use ECC? */
/* Initialize ECC using memory controller? */
- unsigned int ECC_init_using_memctl;
- unsigned int DQS_config; /* Use DQS? maybe only with DDR2? */
+ unsigned int ecc_init_using_memctl;
+ unsigned int dqs_config; /* Use DQS? maybe only with DDR2? */
/* SREN - self-refresh during sleep */
unsigned int self_refresh_in_sleep;
unsigned int dynamic_power; /* DYN_PWR */
unsigned int data_bus_width;
unsigned int burst_length; /* BL4, OTF and BL8 */
/* On-The-Fly Burst Chop enable */
- unsigned int OTF_burst_chop_en;
+ unsigned int otf_burst_chop_en;
/* mirrior DIMMs for DDR3 */
unsigned int mirrored_dimm;
unsigned int quad_rank_present;
unsigned int wrlvl_ctl_3;
unsigned int half_strength_driver_enable;
- unsigned int twoT_en;
- unsigned int threeT_en;
+ unsigned int twot_en;
+ unsigned int threet_en;
unsigned int bstopre;
- unsigned int tCKE_clock_pulse_width_ps; /* tCKE */
- unsigned int tFAW_window_four_activates_ps; /* tFAW -- FOUR_ACT */
+ unsigned int tcke_clock_pulse_width_ps; /* tCKE */
+ unsigned int tfaw_window_four_activates_ps; /* tFAW -- FOUR_ACT */
/* Rtt impedance */
unsigned int rtt_override; /* rtt_override enable */
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_FSL_ERRATA_H
+#define _ASM_FSL_ERRATA_H
+
+#include <common.h>
+#include <asm/processor.h>
+
+#ifdef CONFIG_SYS_FSL_ERRATUM_A006379
+static inline bool has_erratum_a006379(void)
+{
+ u32 svr = get_svr();
+ if (((SVR_SOC_VER(svr) == SVR_T4240) && SVR_MAJ(svr) <= 1) ||
+ ((SVR_SOC_VER(svr) == SVR_B4860) && SVR_MAJ(svr) <= 2))
+ return true;
+
+ return false;
+}
+#endif
+
+#endif
/* Freescale-specific PCI config registers */
#define FSL_PCI_PBFR 0x44
-#ifdef CONFIG_SYS_FSL_PCI_VER_3_X
-/* Currently only the PCIe capability is used, so hardcode the offset.
- * if more capabilities need to be justified, the capability link method
- * should be applied here
- */
-#define FSL_PCIE_CAP_ID 0x70
-#define PCI_DCR 0x78 /* PCIe Device Control Register */
-#define PCI_DSR 0x7a /* PCIe Device Status Register */
-#define PCI_LSR 0x82 /* PCIe Link Status Register */
-#define PCI_LCR 0x80 /* PCIe Link Control Register */
-#else
-#define FSL_PCIE_CAP_ID 0x4c
-#define PCI_DCR 0x54 /* PCIe Device Control Register */
-#define PCI_DSR 0x56 /* PCIe Device Status Register */
-#define PCI_LSR 0x5e /* PCIe Link Status Register */
-#define PCI_LCR 0x5c /* PCIe Link Control Register */
-#endif
-
#define FSL_PCIE_CFG_RDY 0x4b0
#define FSL_PROG_IF_AGENT 0x1
#ifndef __FSL_SECURE_BOOT_H
#define __FSL_SECURE_BOOT_H
+#ifdef CONFIG_SECURE_BOOT
#if defined(CONFIG_FSL_CORENET)
#define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000
#else
#define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000
#endif
+#endif
int is_serdes_configured(enum srds_prtcl device);
void fsl_serdes_init(void);
+const char *serdes_clock_to_string(u32 clock);
#ifdef CONFIG_FSL_CORENET
#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
u32 self_refresh_cmd_5; /* Enter/Exit Self Refresh Registers */
u32 self_refresh_cmd_6; /* Enter/Exit Self Refresh Registers */
u32 self_refresh_cmd_7; /* Enter/Exit Self Refresh Registers */
- u32 DQS_config_offset_count; /* DQS Config Offset Count */
- u32 DQS_config_offset_time; /* DQS Config Offset Time */
+ u32 dqs_config_offset_count; /* DQS Config Offset Count */
+ u32 dqs_config_offset_time; /* DQS Config Offset Time */
u32 DQS_delay_status; /* DQS Delay Status */
u32 res0[0xF];
u32 prioman_config1; /* Priority Manager Configuration */
}
#endif /* __ASSEMBLY__ */
-#define CONFIG_SYS_MPC512x_USB_OFFSET 0x4000
-#define CONFIG_SYS_MPC512x_USB_ADDR \
- (CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB_OFFSET)
+#define CONFIG_SYS_MPC512x_USB1_OFFSET 0x4000
+#define CONFIG_SYS_MPC512x_USB1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC512x_USB1_OFFSET)
#define IIM_BASE_ADDR (CONFIG_SYS_IMMR + offsetof(immap_t, iim))
} immap_t;
#ifdef CONFIG_HAS_FSL_MPH_USB
-#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x22000 /* use the MPH controller */
+#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x22000 /* use the MPH controller */
+#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0
#else
-#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000 /* use the DR controller */
+#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0
+#define CONFIG_SYS_MPC83xx_USB2_OFFSET 0x23000 /* use the DR controller */
#endif
#elif defined(CONFIG_MPC8313)
#define CONFIG_SYS_MPC83xx_ESDHC_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_ESDHC_OFFSET)
-#ifndef CONFIG_SYS_MPC83xx_USB_OFFSET
-#define CONFIG_SYS_MPC83xx_USB_OFFSET 0x23000
+#ifndef CONFIG_SYS_MPC83xx_USB1_OFFSET
+#define CONFIG_SYS_MPC83xx_USB1_OFFSET 0x23000
+#endif
+#define CONFIG_SYS_MPC83xx_USB1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB1_OFFSET)
+#if defined(CONFIG_MPC834x)
+#define CONFIG_SYS_MPC83xx_USB2_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB2_OFFSET)
#endif
-#define CONFIG_SYS_MPC83xx_USB_ADDR \
- (CONFIG_SYS_IMMR + CONFIG_SYS_MPC83xx_USB_OFFSET)
#define CONFIG_SYS_LBC_ADDR (&((immap_t *)CONFIG_SYS_IMMR)->im_lbc)
#define CONFIG_SYS_TSEC1_OFFSET 0x24000
#define CPC_HDBCR0_CDQ_SPEC_DIS 0x08000000
#define CPC_HDBCR0_TAG_ECC_SCRUB_DIS 0x01000000
#define CPC_HDBCR0_DATA_ECC_SCRUB_DIS 0x00400000
+#define CPC_HDBCR0_SPLRU_LEVEL_EN 0x003c0000
#endif /* CONFIG_SYS_FSL_CPC */
/* Global Utilities Block */
u8 res_004[0x0c];
u32 clkcgnhwacsr;/* clock generator n hardware accelerator */
u8 res_014[0x0c];
- } clkcsr[8];
- u8 res_100[0x700]; /* 0x100 */
- u32 pllc1gsr; /* 0x800 Cluster PLL 1 General Status */
- u8 res10[0x1c];
- u32 pllc2gsr; /* 0x820 Cluster PLL 2 General Status */
- u8 res11[0x1c];
- u32 pllc3gsr; /* 0x840 Cluster PLL 3 General Status */
- u8 res12[0x1c];
- u32 pllc4gsr; /* 0x860 Cluster PLL 4 General Status */
- u8 res13[0x1c];
- u32 pllc5gsr; /* 0x880 Cluster PLL 5 General Status */
- u8 res14[0x1c];
- u32 pllc6gsr; /* 0x8a0 Cluster PLL 6 General Status */
- u8 res15[0x35c];
+ } clkcsr[12];
+ u8 res_100[0x680]; /* 0x100 */
+ struct {
+ u32 pllcngsr;
+ u8 res10[0x1c];
+ } pllcgsr[12];
+ u8 res21[0x280];
u32 pllpgsr; /* 0xc00 Platform PLL General Status */
u8 res16[0x1c];
u32 plldgsr; /* 0xc20 DDR PLL General Status */
#endif
#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x210000
#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x211000
-#define CONFIG_SYS_MPC85xx_USB_OFFSET CONFIG_SYS_MPC85xx_USB1_OFFSET
#define CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET 0x214000
#define CONFIG_SYS_MPC85xx_USB2_PHY_OFFSET 0x214100
#define CONFIG_SYS_MPC85xx_SATA1_OFFSET 0x220000
#define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x1e000
#define CONFIG_SYS_MPC85xx_L2_OFFSET 0x20000
#define CONFIG_SYS_MPC85xx_DMA_OFFSET 0x21000
-#define CONFIG_SYS_MPC85xx_USB_OFFSET 0x22000
+#define CONFIG_SYS_MPC85xx_USB1_OFFSET 0x22000
#define CONFIG_SYS_MPC85xx_USB2_OFFSET 0x23000
#ifdef CONFIG_TSECV2
#define CONFIG_SYS_TSEC1_OFFSET 0xB0000
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET)
-#define CONFIG_SYS_MPC85xx_USB_ADDR \
- (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB_OFFSET)
+#define CONFIG_SYS_MPC85xx_USB1_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_OFFSET)
+#define CONFIG_SYS_MPC85xx_USB2_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB2_OFFSET)
#define CONFIG_SYS_MPC85xx_USB1_PHY_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_PHY_OFFSET)
#define CONFIG_SYS_MPC85xx_USB2_PHY_ADDR \
#ifndef _PPC_IO_H
#define _PPC_IO_H
-#include <linux/config.h>
#include <asm/byteorder.h>
#ifdef CONFIG_ADDR_MAP
-
#ifndef _PPC_KERNEL_M8260_PCI_H
#define _PPC_KERNEL_M8260_PCI_H
#ifndef _PPC_MMU_H_
#define _PPC_MMU_H_
-#include <linux/config.h>
-
#ifndef __ASSEMBLY__
/* Hardware Page Table Entry */
typedef struct _PTE {
-
/*
* SPDX-License-Identifier: GPL-2.0+
*/
*/
#define current_text_addr() ({ __label__ _l; _l: &&_l;})
-#include <linux/config.h>
-
#include <asm/ptrace.h>
#include <asm/types.h>
* the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c.
*/
-#include <linux/config.h>
-
#ifndef __ASSEMBLY__
#ifdef CONFIG_PPC64BRIDGE
#define PPC_REG unsigned long /*long*/
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
## Build a couple of necessary functions into a private libgcc
-LIBGCC = $(obj)libgcc.o
-GLSOBJS += _ashldi3.o
-GLSOBJS += _ashrdi3.o
-GLSOBJS += _lshrdi3.o
-LGOBJS := $(addprefix $(obj),$(GLSOBJS)) \
- $(addprefix $(obj),$(GLCOBJS))
-
-## But only build it if the user asked for it
+## if the user asked for it
ifdef USE_PRIVATE_LIBGCC
-TARGETS += $(LIBGCC)
+lib-y += _ashldi3.o
+lib-y += _ashrdi3.o
+lib-y += _lshrdi3.o
endif
-LIB = $(obj)lib$(ARCH).o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
endif
ifdef MINIMAL
-COBJS-y += cache.o time.o
-SOBJS-y += ticks.o
+obj-y += cache.o time.o
+obj-y += ticks.o
else
-SOBJS-y += ppcstring.o
+obj-y += ppcstring.o
-SOBJS-y += ppccache.o
-SOBJS-y += ticks.o
-SOBJS-y += reloc.o
+obj-y += ppccache.o
+obj-y += ticks.o
+obj-y += reloc.o
-COBJS-$(CONFIG_BAT_RW) += bat_rw.o
+obj-$(CONFIG_BAT_RW) += bat_rw.o
ifndef CONFIG_SPL_BUILD
ifndef CONFIG_SYS_GENERIC_BOARD
-COBJS-y += board.o
+obj-y += board.o
endif
endif
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-COBJS-y += cache.o
-COBJS-y += extable.o
-COBJS-y += interrupts.o
-COBJS-$(CONFIG_CMD_KGDB) += kgdb.o
-COBJS-${CONFIG_CMD_IDE} += ide.o
-COBJS-y += time.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-y += cache.o
+obj-y += extable.o
+obj-y += interrupts.o
+obj-$(CONFIG_CMD_KGDB) += kgdb.o
+obj-$(CONFIG_CMD_IDE) += ide.o
+obj-y += time.o
# Don't include the MPC5xxx special memcpy into the
# SPL U-Boot image. memcpy is used in the SPL NOR
# on MPC512x and MPC5200
ifdef CONFIG_MPC512X
$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
-COBJS-y += memcpy_mpc5200.o
+obj-y += memcpy_mpc5200.o
endif
ifdef CONFIG_MPC5200
$(obj)ppcstring.o: AFLAGS += -Dmemcpy=__memcpy
-COBJS-y += memcpy_mpc5200.o
+obj-y += memcpy_mpc5200.o
endif
endif
endif # not minimal
ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_SPL_FRAMEWORK) += spl.o
+obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
endif
-
-COBJS += $(sort $(COBJS-y))
-
-SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \
- $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-TARGETS += $(LIB)
-
-all: $(TARGETS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-$(LIBGCC): $(obj).depend $(LGOBJS)
- $(call cmd_link_o_target, $(LGOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
#endif
#endif
- sprintf(memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
+ sprintf(memsz, "%ldk", (ulong) (bd->bi_memsize / 1024) - pram);
setenv("mem", memsz);
}
#endif
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-COBJS := cpu.o os.o start.o state.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
+obj-y := cpu.o os.o start.o state.o
# os.c is build in the system environment, so needs standard includes
$(obj)os.o: ALL_CFLAGS := $(filter-out -nostdinc,$(ALL_CFLAGS))
$(obj).depend.os: CPPFLAGS := $(filter-out -nostdinc,$(CPPFLAGS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-LIB = $(obj)lib$(ARCH).o
-
-COBJS-y += interrupts.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-# Always build libsandbox.o
-TARGETS := $(LIB)
-
-all: $(TARGETS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += interrupts.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-SOBJS = start.o
-COBJS = cpu.o interrupts.o watchdog.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o interrupts.o watchdog.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-SOBJS = start.o
-COBJS = cpu.o interrupts.o watchdog.o cache.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o interrupts.o watchdog.o cache.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-SOBJS = start.o
-COBJS = cpu.o interrupts.o watchdog.o cache.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu.o interrupts.o watchdog.o cache.o
return 0;
}
-void dcache_wback_range(u32 start, u32 end)
+void flush_dcache_range(unsigned long start, unsigned long end)
{
u32 v;
}
}
-void dcache_invalid_range(u32 start, u32 end)
+void invalidate_dcache_range(unsigned long start, unsigned long end)
{
u32 v;
void flush_cache (unsigned long addr, unsigned long size)
{
- dcache_invalid_range( addr , addr + size );
+ invalidate_dcache_range(addr , addr + size);
}
void icache_enable (void)
struct __large_struct { unsigned long buf[100]; };
#define __m(x) (*(struct __large_struct *)(x))
-void dcache_wback_range(u32 start, u32 end);
-void dcache_invalid_range(u32 start, u32 end);
-
#else
/*
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-LIB = $(obj)lib$(ARCH).o
-LIBGCC = $(obj)libgcc.o
-
-SOBJS-y +=
-GLSOBJS += ashiftrt.o
-GLSOBJS += ashiftlt.o
-GLSOBJS += lshiftrt.o
-GLSOBJS += ashldi3.o
-GLSOBJS += ashrsi3.o
-GLSOBJS += lshrdi3.o
-GLSOBJS += movmem.o
-
-COBJS-y += board.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-y += board.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
ifeq ($(CONFIG_SH2),y)
-COBJS-y += time_sh2.o
+obj-y += time_sh2.o
else
-COBJS-y += time.o
-endif
-ifeq ($(CONFIG_CMD_SH_ZIMAGEBOOT),y)
-COBJS-y += zimageboot.o
+obj-y += time.o
endif
+obj-$(CONFIG_CMD_SH_ZIMAGEBOOT) += zimageboot.o
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-LGOBJS := $(addprefix $(obj),$(GLSOBJS)) \
- $(addprefix $(obj),$(GLCOBJS))
-# Always build libsh.o
-TARGETS := $(LIB)
# Build private libgcc only when asked for
ifdef USE_PRIVATE_LIBGCC
-TARGETS += $(LIBGCC)
+lib-y += ashiftrt.o
+lib-y += ashiftlt.o
+lib-y += lshiftrt.o
+lib-y += ashldi3.o
+lib-y += ashrsi3.o
+lib-y += lshrdi3.o
+lib-y += movmem.o
endif
-
-all: $(TARGETS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-$(LIBGCC): $(obj).depend $(LGOBJS)
- $(call cmd_link_o_target, $(LGOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
*/
#include <common.h>
-#include <div64.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <sh_tmu.h>
-static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
+#define TCR_TPSC 0x07
-static u16 bit;
-static unsigned long last_tcnt;
-static unsigned long long overflow_ticks;
+static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
unsigned long get_tbclk(void)
{
- return get_tmu0_clk_rate() >> ((bit + 1) * 2);
+ u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1;
+ return get_tmu0_clk_rate() >> ((tmu_bit + 1) * 2);
}
-static inline unsigned long long tick_to_time(unsigned long long tick)
+unsigned long timer_read_counter(void)
{
- tick *= CONFIG_SYS_HZ;
- do_div(tick, get_tbclk());
-
- return tick;
-}
-
-static inline unsigned long long usec_to_tick(unsigned long long usec)
-{
- usec *= get_tbclk();
- do_div(usec, 1000000);
-
- return usec;
+ return ~readl(&tmu->tcnt0);
}
static void tmu_timer_start(unsigned int timer)
int timer_init(void)
{
- bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1;
- writew(readw(&tmu->tcr0) | bit, &tmu->tcr0);
+ u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1;
+ writew((readw(&tmu->tcr0) & ~TCR_TPSC) | tmu_bit, &tmu->tcr0);
tmu_timer_stop(0);
tmu_timer_start(0);
- last_tcnt = 0;
- overflow_ticks = 0;
-
return 0;
}
-unsigned long long get_ticks(void)
-{
- unsigned long tcnt = 0 - readl(&tmu->tcnt0);
-
- if (last_tcnt > tcnt) /* overflow */
- overflow_ticks++;
- last_tcnt = tcnt;
-
- return (overflow_ticks << 32) | tcnt;
-}
-
-void __udelay(unsigned long usec)
-{
- unsigned long long tmp;
- ulong tmo;
-
- tmo = usec_to_tick(usec);
- tmp = get_ticks() + tmo; /* get current timestamp */
-
- while (get_ticks() < tmp) /* loop till event */
- /*NOP*/;
-}
-
-unsigned long get_timer(unsigned long base)
-{
- /* return msec */
- return tick_to_time(get_ticks()) - base;
-}
-
-void set_timer(unsigned long t)
-{
- writel((0 - t), &tmu->tcnt0);
-}
-
-void reset_timer(void)
-{
- tmu_timer_stop(0);
- set_timer(0);
- tmu_timer_start(0);
-}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-SOBJS =
-COBJS = cpu_init.o serial.o cpu.o interrupts.o prom.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu_init.o serial.o cpu.o interrupts.o prom.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START = start.o
-SOBJS =
-COBJS = cpu_init.o serial.o cpu.o ambapp.o interrupts.o prom.o usb_uhci.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+obj-y = cpu_init.o serial.o cpu.o ambapp.o interrupts.o prom.o usb_uhci.o
+#include <config.h>
+
TRAP ta 0; nop; nop; nop;
/* Software trap. Treat as BAD_TRAP for the time being... */
/* init uhci
*/
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
unsigned char temp;
ambapp_ahbdev ahbdev;
#ifndef __SPARC_CACHE_H__
#define __SPARC_CACHE_H__
-#include <linux/config.h>
#include <asm/processor.h>
/*
#ifndef _SPARC_PAGE_H
#define _SPARC_PAGE_H
-#include <linux/config.h>
#ifdef CONFIG_SUN4
#define PAGE_SHIFT 13
#else
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-
-SOBJS =
-
-COBJS = board.o cache.o interrupts.o time.o
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = board.o cache.o interrupts.o time.o
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
LDFLAGS_FINAL += --wrap=__divdi3 --wrap=__udivdi3
LDFLAGS_FINAL += --wrap=__moddi3 --wrap=__umoddi3
-NORMAL_LIBGCC = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
+export NORMAL_LIBGCC = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
PREFIXED_LIBGCC = $(OBJTREE)/arch/$(ARCH)/lib/$(shell basename $(NORMAL_LIBGCC))
export USE_PRIVATE_LIBGCC=$(shell dirname $(PREFIXED_LIBGCC))
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(CPU).o
-
-START-y = start.o
-START-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o
-COBJS = interrupts.o cpu.o
-
-SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-START := $(addprefix $(obj),$(START-y))
-
-all: $(obj).depend $(START) $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y = start.o
+extra-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o
+obj-y = interrupts.o cpu.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(SOC).o
-
-SOBJS-$(CONFIG_SYS_COREBOOT) += car.o
-COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o
-COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
-COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
-COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
-COBJS-$(CONFIG_SYS_COREBOOT) += timestamp.o
-COBJS-$(CONFIG_PCI) += pci.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_SYS_COREBOOT) += car.o
+obj-$(CONFIG_SYS_COREBOOT) += coreboot.o
+obj-$(CONFIG_SYS_COREBOOT) += tables.o
+obj-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
+obj-$(CONFIG_SYS_COREBOOT) += sdram.o
+obj-$(CONFIG_SYS_COREBOOT) += timestamp.o
+obj-$(CONFIG_PCI) += pci.o
-
/*
* (C) Copyright 2002
* Daniel Engström, Omicron Ceti AB, daniel@omicron.se
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(ARCH).o
-
-COBJS-$(CONFIG_CMD_BOOTM) += bootm.o
-COBJS-y += cmd_boot.o
-COBJS-y += gcc.o
-COBJS-y += init_helpers.o
-COBJS-y += interrupts.o
-COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
-COBJS-$(CONFIG_SYS_PCAT_TIMER) += pcat_timer.o
-COBJS-$(CONFIG_PCI) += pci_type1.o
-COBJS-y += relocate.o
-COBJS-y += physmem.o
-COBJS-y += string.o
-COBJS-$(CONFIG_SYS_X86_TSC_TIMER) += tsc_timer.o
-COBJS-$(CONFIG_VIDEO_VGA) += video.o
-COBJS-$(CONFIG_CMD_ZBOOT) += zimage.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-$(PREFIXED_LIBGCC): $(NORMAL_LIBGCC)
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-y += cmd_boot.o
+obj-y += gcc.o
+obj-y += init_helpers.o
+obj-y += interrupts.o
+obj-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
+obj-$(CONFIG_SYS_PCAT_TIMER) += pcat_timer.o
+obj-$(CONFIG_PCI) += pci_type1.o
+obj-y += relocate.o
+obj-y += physmem.o
+obj-y += string.o
+obj-$(CONFIG_SYS_X86_TSC_TIMER) += tsc_timer.o
+obj-$(CONFIG_VIDEO_VGA) += video.o
+obj-$(CONFIG_CMD_ZBOOT) += zimage.o
+
+LIBGCC := $(notdir $(NORMAL_LIBGCC))
+extra-y := $(LIBGCC)
+
+$(obj)$(LIBGCC): $(NORMAL_LIBGCC)
$(OBJCOPY) $< $@ --prefix-symbols=__normal_
-
-$(LIB): $(PREFIXED_LIBGCC)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := eco5pk.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := eco5pk.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := adp-ag101.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := adp-ag101.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := adp-ag101p.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := adp-ag101p.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := adp-ag102.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := adp-ag102.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS += ipam390.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += ipam390.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = eb_cpu5282.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := cpux9k2.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cpux9k2.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS += vl_ma2sc.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += vl_ma2sc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := flea3.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := flea3.o
+obj-y += lowlevel_init.o
-
#######################################################################
#
# Copyright (C) 2000, 2001, 2002, 2003
#
#######################################################################
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = elpt860.o flash.o
arch/powerpc/cpu/mpc8xx/libmpc8xx.o (.text*)
board/LEOX/elpt860/libelpt860.o (.text*)
arch/powerpc/lib/libpowerpc.o (.text*)
-/* drivers/rtc/librtc.o (.text*) */
. = env_offset;
common/env_embedded.o (.text*)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := edminiv2.o ../common/common.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := edminiv2.o ../common/common.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o ../common/common.o
+obj-y := net2big_v2.o ../common/common.o
ifneq ($(and $(CONFIG_KIRKWOOD_GPIO),$(CONFIG_NET2BIG_V2)),)
-COBJS += ../common/cpld-gpio-bus.o
+obj-y += ../common/cpld-gpio-bus.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o ../common/common.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := netspace_v2.o ../common/common.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o ../common/common.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := wireless_space.o ../common/common.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := aspenite.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := aspenite.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-SOBJS = ../common/misc.o
-
-COBJS = $(BOARD).o ../common/flash.o ../common/serial.o ../common/memory.o pci.o \
+obj-y = db64360.o ../common/flash.o ../common/serial.o ../common/memory.o pci.o \
mv_eth.o ../common/ns16550.o mpsc.o ../common/i2c.o \
- sdram_init.o ../common/intel_flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+ sdram_init.o ../common/intel_flash.o ../common/misc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-SOBJS = ../common/misc.o
-
-COBJS = $(BOARD).o ../common/flash.o ../common/serial.o ../common/memory.o pci.o \
+obj-y += db64460.o ../common/flash.o ../common/serial.o ../common/memory.o pci.o \
mv_eth.o ../common/ns16550.o mpsc.o ../common/i2c.o \
- sdram_init.o ../common/intel_flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+ sdram_init.o ../common/intel_flash.o ../common/misc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := dkb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dkb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := dreamplug.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dreamplug.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := gplugd.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := gplugd.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := guruplug.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := guruplug.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mv88f6281gtw_ge.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mv88f6281gtw_ge.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := openrd.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := openrd.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := rd6281a.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := rd6281a.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := sheevaplug.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sheevaplug.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o eccx.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = RPXClassic.o flash.o eccx.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = RPXlite.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = RPXlite_dw.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = RRvision.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := dockstar.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dockstar.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := goflexhome.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := goflexhome.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = a3000.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := a3m071.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := a4m072.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := actux1.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := actux1.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := actux2.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := actux2.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := actux3.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := actux3.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := actux4.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := actux4.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := adder.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += afeb9260.o
-COBJS-y += partition.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += afeb9260.o
+obj-y += partition.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cam_enc_4xx.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ap_sh4a_4a.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ap_sh4a_4a.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_CMD_IDE) += ../common/cfide.o
-COBJS-$(CONFIG_EPLED) += ../common/epled.o
-COBJS-$(CONFIG_SEVENSEG) += ../common/sevenseg.o
-
-SOBJS-y := text_base.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := nios2-generic.o
+obj-$(CONFIG_CMD_IDE) += ../common/cfide.o
+obj-$(CONFIG_EPLED) += ../common/epled.o
+obj-$(CONFIG_SEVENSEG) += ../common/sevenseg.o
+obj-y += text_base.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := socfpga_cyclone5.o
-COBJS-$(CONFIG_SPL_BUILD) += pinmux_config.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := socfpga_cyclone5.o
+obj-$(CONFIG_SPL_BUILD) += pinmux_config.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o cmd_acadia.o memory.o pll.o
-SOBJS =
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = acadia.o cmd_acadia.o memory.o pll.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = bamboo.o flash.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-SOBJS := init.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bluestone.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = bubinga.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
-SOBJS := init.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := canyonlands.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
+extra-y += init.o
#include <asm/4xx_pcie.h>
#include <asm/ppc4xx-gpio.h>
#include <asm/errno.h>
+#include <usb.h>
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
}
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int usb_board_init(void)
+int board_usb_init(int index, enum usb_init_type init)
{
struct board_bcsr *bcsr_data =
(struct board_bcsr *)CONFIG_SYS_BCSR_BASE;
return 0;
}
-int usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum usb_init_type init)
{
return usb_board_stop();
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ebony.o flash.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
-SOBJS = init.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := katmai.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := kilauea.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = luan.o flash.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o cmd_pll.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = makalu.o cmd_pll.o
+obj-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ocotea.o flash.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = redwood.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y = $(BOARD).o sdram.o
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
-SOBJS = init.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = sequoia.o sdram.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o lcd.o update.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = taihu.o flash.o lcd.o update.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o lcd.o update.o showinfo.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = taishan.o lcd.o update.o showinfo.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = walnut.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = yosemite.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o cmd_yucca.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = yucca.o flash.o cmd_yucca.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := apf27.o
-SOBJS := lowlevel_init.o
-ifdef CONFIG_FPGA
-COBJS += fpga.o
-endif
-
-SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := apf27.o
+obj-y += lowlevel_init.o
+obj-$(CONFIG_FPGA) += fpga.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+obj-y := lowlevel_init.o
-LIB = $(obj)lib$(BOARD).o
-
-SOBJS-y := lowlevel_init.o
-
-COBJS-y := integrator.o
-COBJS-$(CONFIG_PCI) += pci.o
-COBJS-y += timer.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-COBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(COBJS) $(SOBJS)
- $(call cmd_link_o_target, $(COBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += integrator.o
+obj-$(CONFIG_PCI) += pci.o
+obj-y += timer.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := versatile.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := versatile.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := vexpress_common.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := vexpress_common.o
#include <asm/arch/wdt.h>
#include "../drivers/mmc/arm_pl180_mmci.h"
-static ulong timestamp;
-static ulong lastdec;
-
static struct systimer *systimer_base = (struct systimer *)V2M_TIMER01;
static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
writel(SYSTIMER_EN | SYSTIMER_32BIT |
readl(&systimer_base->timer0control),
&systimer_base->timer0control);
-
- reset_timer_masked();
}
int v2m_cfg_write(u32 devfn, u32 data)
printf("Unable to reboot\n");
}
-/*
- * Delay x useconds AND perserve advance timstamp value
- * assumes timer is ticking at 1 msec
- */
-void __udelay(ulong usec)
-{
- ulong tmo, tmp;
-
- tmo = usec / 1000;
- tmp = get_timer(0); /* get current timestamp */
-
- /*
- * If setting this forward will roll time stamp then
- * reset "advancing" timestamp to 0 and set lastdec value
- * otherwise set the advancing stamp to the wake up time
- */
- if ((tmo + tmp + 1) < tmp)
- reset_timer_masked();
- else
- tmo += tmp;
-
- while (get_timer_masked() < tmo)
- ; /* loop till wakeup event */
-}
-
-ulong get_timer(ulong base)
-{
- return get_timer_masked() - base;
-}
-
-void reset_timer_masked(void)
-{
- lastdec = readl(&systimer_base->timer0value) / 1000;
- timestamp = 0;
-}
-
-ulong get_timer_masked(void)
-{
- ulong now = readl(&systimer_base->timer0value) / 1000;
-
- if (lastdec >= now) { /* normal mode (non roll) */
- timestamp += lastdec - now;
- } else { /* count down timer overflowed */
- /*
- * nts = ts + ld - now
- * ts = old stamp, ld = time before passing through - 1
- * now = amount of time after passing though - 1
- * nts = new "advancing time stamp"
- */
- timestamp += lastdec + SYSTIMER_RELOAD - now;
- }
- lastdec = now;
-
- return timestamp;
-}
-
void lowlevel_init(void)
{
}
return readl((u32 *)SYS_ID);
}
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-ulong get_tbclk(void)
-{
- return (ulong)CONFIG_SYS_HZ;
-}
-
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
/* Setting the address at which secondary cores start from.
* Versatile Express uses one address for all cores, so ignore corenr
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o fpga.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = mcf5373l.o fpga.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ti113x.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = atc.o flash.o ti113x.o
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
-include $(TOPDIR)/config.mk
+obj-y += armadillo-800eva.o
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += armadillo-800eva.o
-COBJS := $(COBJS-y)
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += led.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += at91rm9200ek.o
+obj-y += led.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += at91sam9260ek.o
-COBJS-y += led.o
-COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += at91sam9260ek.o
+obj-y += led.o
+obj-$(CONFIG_HAS_DATAFLASH) += partition.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += at91sam9261ek.o
-COBJS-y += led.o
-COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += at91sam9261ek.o
+obj-y += led.o
+obj-$(CONFIG_HAS_DATAFLASH) += partition.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += at91sam9263ek.o
-COBJS-y += led.o
-COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += at91sam9263ek.o
+obj-y += led.o
+obj-$(CONFIG_HAS_DATAFLASH) += partition.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += at91sam9m10g45ek.o
-COBJS-y += led.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += at91sam9m10g45ek.o
+obj-y += led.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += at91sam9n12ek.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += at91sam9n12ek.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += at91sam9rlek.o
-COBJS-y += led.o
-COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += at91sam9rlek.o
+obj-y += led.o
+obj-$(CONFIG_HAS_DATAFLASH) += partition.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += at91sam9x5ek.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += at91sam9x5ek.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := atngw100.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := atngw100mkii.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += atstk1000.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += sama5d3xek.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += sama5d3xek.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
$(shell mkdir -p $(obj)../common $(obj)../../nvidia/common)
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := ../common/tamonten.o
+obj-y := ../common/tamonten.o
include ../../nvidia/common/common.mk
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
$(shell mkdir -p $(obj)../common $(obj)../../nvidia/common)
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := ../common/tamonten.o
+obj-y := ../common/tamonten.o
include ../../nvidia/common/common.mk
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
$(shell mkdir -p $(obj)../common $(obj)../../nvidia/common)
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := ../common/tamonten.o
+obj-y := ../common/tamonten.o
include ../../nvidia/common/common.mk
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-COBJS += $(BOARD).o
+obj-y += fx12mm.o
include $(SRCTREE)/board/xilinx/ppc405-generic/Makefile
# SPDX-License-Identifier: GPL-2.0+
#
-COBJS += $(BOARD).o
+obj-y += v5fx30teval.o
include $(SRCTREE)/board/xilinx/ppc440-generic/Makefile
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := balloon3.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := balloon3.o
#include <asm/io.h>
#include <spartan3.h>
#include <command.h>
+#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
}
#ifdef CONFIG_CMD_USB
-int usb_board_init(void)
+int board_usb_init(int index, enum usb_init_type init)
{
writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
return 0;
}
-void usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum usb_init_type init)
{
- return;
+ return 0;
}
void usb_board_stop(void)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o cmd_bc3450.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bc3450.o cmd_bc3450.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o gpio_cfi_flash.o cled.o
-COBJS-$(CONFIG_BFIN_MAC) += smsc9303.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := bct-brettl2.o gpio_cfi_flash.o cled.o
+obj-$(CONFIG_BFIN_MAC) += smsc9303.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf506f-ezkit.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf518f-ezbrd.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf525-ucr2.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf526-ezbrd.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf527-ad7160-eval.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_VIDEO) += video.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf527-ezkit.o
+obj-$(CONFIG_VIDEO) += video.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf527-sdp.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o flash.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf533-ezkit.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_STAMP_CF) += ide-cf.o
-COBJS-$(CONFIG_VIDEO) += video.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf533-stamp.o
+obj-$(CONFIG_STAMP_CF) += ide-cf.o
+obj-$(CONFIG_VIDEO) += video.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf537-minotaur.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf537-pnav.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf537-srv1.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_BFIN_IDE) += ide-cf.o
-COBJS-$(CONFIG_HAS_POST) += post-memory.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf537-stamp.o
+obj-$(CONFIG_BFIN_IDE) += ide-cf.o
+obj-$(CONFIG_HAS_POST) += post-memory.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf538f-ezkit.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_VIDEO) += video.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf548-ezkit.o
+obj-$(CONFIG_VIDEO) += video.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf561-acvilon.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf561-ezkit.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_BFIN_SOFT_SWITCH) += soft_switch.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := bf609-ezkit.o
+obj-$(CONFIG_BFIN_SOFT_SWITCH) += soft_switch.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := blackstamp.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := blackvme.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := apx4devkit.o
+obj-y := apx4devkit.o
else
-COBJS := spl_boot.o
+obj-y := spl_boot.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += snapper9260.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += snapper9260.o
sleep 1 ;
done
echo "erasing" ;
- sf erase 0 0x50000 ;
+ sf erase 0 0xC0000 ;
# two steps to prevent bricking
echo "programming" ;
sf write 0x12000000 $offset $filesize ;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := nitrogen6x.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := nitrogen6x.o
#include <i2c.h>
DECLARE_GLOBAL_DATA_PTR;
+#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
};
+static iomux_v3_cfg_t const misc_pads[] = {
+ MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP),
+ MX6_PAD_KEY_COL4__USBOH3_USBOTG_OC | MUX_PAD_CTRL(WEAK_PULLUP),
+ MX6_PAD_EIM_D30__USBOH3_USBH1_OC | MUX_PAD_CTRL(WEAK_PULLUP),
+ /* OTG Power enable */
+ MX6_PAD_EIM_D22__GPIO_3_22 | MUX_PAD_CTRL(OUTPUT_40OHM),
+};
+
/* wl1271 pads on nitrogen6x */
iomux_v3_cfg_t const wl12xx_pads[] = {
(MX6_PAD_NANDF_CS1__GPIO_6_14 & ~MUX_PAD_CTRL_MASK)
return 0;
}
+
+int board_ehci_power(int port, int on)
+{
+ if (port)
+ return 0;
+ gpio_set_value(GP_USB_OTG_PWR, on);
+ return 0;
+}
+
#endif
#ifdef CONFIG_FSL_ESDHC
free(bus);
}
#endif
+
+#ifdef CONFIG_MV_UDC
+ /* For otg ethernet*/
+ usb_eth_initialize(bis);
+#endif
return 0;
}
gpio_direction_input(WL12XX_WL_IRQ_GP);
gpio_direction_output(WL12XX_WL_ENABLE_GP, 0);
gpio_direction_output(WL12XX_BT_ENABLE_GP, 0);
+ gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */
imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads));
setup_buttons();
int board_init(void)
{
+ struct iomuxc_base_regs *const iomuxc_regs
+ = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+
+ clrsetbits_le32(&iomuxc_regs->gpr[1],
+ IOMUXC_GPR1_OTG_ID_MASK,
+ IOMUXC_GPR1_OTG_ID_GPIO1);
+
+ imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads));
+
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := br4.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := lsxl.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := lsxl.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += sbc35_a9g20.o
-COBJS-$(CONFIG_ATMEL_SPI) += spi.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += sbc35_a9g20.o
+obj-$(CONFIG_ATMEL_SPI) += spi.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += tny_a9260.o
-COBJS-$(CONFIG_ATMEL_SPI) += spi.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += tny_a9260.o
+obj-$(CONFIG_ATMEL_SPI) += spi.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-#ifneq ($(OBJTREE),$(SRCTREE))
-#$(shell mkdir -p $(obj)../common)
-#endif
+obj-y := canmb.o
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-#../common/flash.o ../common/vpd.o ../common/am79c874.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-SOBJS-y += coreboot_start.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += coreboot_start.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := pogo_e02.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := pogo_e02.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o gpio_cfi_flash.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cm-bf527.o gpio_cfi_flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cm-bf533.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o gpio_cfi_flash.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cm-bf537e.o gpio_cfi_flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o gpio_cfi_flash.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cm-bf537u.o gpio_cfi_flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_VIDEO) += video.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cm-bf548.o
+obj-$(CONFIG_VIDEO) += video.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cm-bf561.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := cm4008.o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cm4008.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := cm41xx.o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cm41xx.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o cmd_cm5200.o fwupdate.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cm5200.o cmd_cm5200.o fwupdate.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := flash.o cmi.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := flash.o cmi.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cobra5272.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mb.o flash.o dipsw.o lcd.o serial.o # pci.o rtc.o par.o kbm.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mb.o flash.o dipsw.o lcd.o serial.o # pci.o rtc.o par.o kbm.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := dig297.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dig297.o
# more details.
#
-include $(TOPDIR)/config.mk
-
$(shell mkdir -p $(obj)../../nvidia/common)
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
+obj-y := paz00.o
include ../../nvidia/common/common.mk
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := cm_t35.o leds.o $(COBJS-y)
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += cm_t35.o
};
#define SB_T35_USB_HUB_RESET_GPIO 167
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
u8 val;
int offset;
twl4030_i2c_write_u8(TWL4030_CHIP_GPIO, offset, 0xC0);
udelay(1);
- return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
}
int ehci_hcd_stop(void)
+++ /dev/null
-/*
- * (C) Copyright 2011 - 2013 CompuLab, Ltd. <www.compulab.co.il>
- *
- * Author: Igor Grinberg <grinberg@compulab.co.il>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <status_led.h>
-#include <asm/gpio.h>
-
-static unsigned int leds[] = { GREEN_LED_GPIO };
-
-void __led_init(led_id_t mask, int state)
-{
- if (gpio_request(leds[mask], "") != 0) {
- printf("%s: failed requesting GPIO%u\n", __func__, leds[mask]);
- return;
- }
-
- gpio_direction_output(leds[mask], 0);
-}
-
-void __led_set(led_id_t mask, int state)
-{
- gpio_set_value(leds[mask], state == STATUS_LED_ON);
-}
-
-void __led_toggle(led_id_t mask)
-{
- gpio_set_value(leds[mask], !gpio_get_value(leds[mask]));
-}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)board/$(VENDOR)/common)
-endif
-
-LIB = $(obj)lib$(VENDOR).o
-
-COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += eeprom.o
-COBJS-$(CONFIG_LCD) += omap3_display.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_DRIVER_OMAP34XX_I2C) += eeprom.o
+obj-$(CONFIG_LCD) += omap3_display.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
$(shell mkdir -p $(obj)../../nvidia/common)
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
+obj-y := trimslice.o
include ../../nvidia/common/common.mk
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := cgtqmx6eval.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cgtqmx6eval.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := tricorder.o tricorder-eeprom.o led.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := tricorder.o tricorder-eeprom.o led.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o plx9030.o pd67290.o ide.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpc45.o flash.o plx9030.o pd67290.o ide.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpu86.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpu87.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-# HACK: depend needs bootscript.c, which needs tools/mkimage, which is not
-# built in the depend stage. So... put bootscript.o here, not in OBJS
-$(LIB): $(OBJS) $(SOBJS) $(obj)bootscript.o
- $(call cmd_link_o_target, $^)
-
-$(obj)$(BOARD).o : $(src)$(BOARD).c $(obj)bootscript.o
+obj-y = L1.o flash.o
+obj-y += init.o
+obj-y += bootscript.o
$(obj)bootscript.c: $(obj)bootscript.image
od -t x1 -v -A x $^ | awk -f x2c.awk > $@
$(obj)bootscript.image: $(src)bootscript.hush $(src)Makefile
-$(OBJTREE)/tools/mkimage -A ppc -O linux -T script -C none -a 0 -e 0 -n bootscript -d $(src)bootscript.hush $@
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := xfi3.o
+obj-y := xfi3.o
else
-COBJS := spl_boot.o
+obj-y := spl_boot.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-#COBJS = $(BOARD).o flash.o
-#COBJS = $(BOARD).o strataflash.o
-COBJS = $(BOARD).o
-
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = csb272.o
+obj-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-#COBJS = $(BOARD).o flash.o
-#COBJS = $(BOARD).o strataflash.o
-COBJS = $(BOARD).o
-
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = csb472.o
+obj-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cu824.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := dns325.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dns325.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o nand.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = PPChameleonEVB.o flash.o nand.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := aria.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := qong.o fpga.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := qong.o fpga.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o
-COBJS-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o
-COBJS-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o
-
-COBJS := $(COBJS-y)
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += da830evm.o
+obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += da850evm.o
+obj-$(CONFIG_MACH_DAVINCI_HAWK) += hawkboard.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dm355evm.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dm355leopard.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dm365evm.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dm6467evm.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-SOBJS := board_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dvevm.o
+obj-y += board_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += ea20.o
-
-COBJS := $(COBJS-y)
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += ea20.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-SOBJS := board_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := schmoogie.o
+obj-y += board_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-SOBJS := board_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sffsdr.o
+obj-y += board_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-SOBJS := board_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sonata.o
+obj-y += board_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = dbau1x00.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := m28evk.o
+obj-y := m28evk.o
else
-COBJS := spl_boot.o
+obj-y := spl_boot.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := m53evk.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := m53evk.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dnp5370.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := dvlhost.o watchdog.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dvlhost.o watchdog.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = eXalion.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := favr-32-ezkit.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += $(BOARD)_pwrman.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += ethernut5.o
+obj-y += ethernut5_pwrman.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o pci.o misc.o mpc107_i2c.o eepro100_srom.o
-
-SOBJS = asm_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = elppc.o flash.o pci.o misc.o mpc107_i2c.o eepro100_srom.o
+obj-y += asm_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = mhpc.o flash.o
-
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o ../common/flash.o ../common/vpd.o ../common/am79c874.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := top5200.o ../common/flash.o ../common/vpd.o ../common/am79c874.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o ../common/flash.o ../common/vpd.o ../common/am79c874.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = top860.o ../common/flash.o ../common/vpd.o ../common/am79c874.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_ATMEL_SPI) += spi.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += top9000.o
+obj-$(CONFIG_ATMEL_SPI) += spi.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := enbw_cmc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ep8248.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o mii_phy.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ep8260.o flash.o mii_phy.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ep82xxm.o
+++ /dev/null
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# Copyright (C) 2004 Arabella Software Ltd.
-# Yuli Barcohen <yuli@arabellasw.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-/*
- * Copyright (C) 2005 Arabella Software Ltd.
- * Yuli Barcohen <yuli@arabellasw.com>
- *
- * Support for Embedded Planet EP88x boards.
- * Tested on EP88xC with MPC885 CPU, 64MB SDRAM and 16MB flash.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/*
- * SDRAM uses two Micron chips.
- * Minimal CPU frequency is 40MHz.
- */
-static uint sdram_table[] = {
- /* Single read (offset 0x00 in UPM RAM) */
- 0xEFCBCC04, 0x0F37C804, 0x0EEEC004, 0x01B98404,
- 0x1FF74C00, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05,
-
- /* Burst read (offset 0x08 in UPM RAM) */
- 0xEFCBCC04, 0x0F37C804, 0x0EEEC004, 0x00BDC404,
- 0x00FFCC00, 0x00FFCC00, 0x01FB8C00, 0x1FF74C00,
- 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05,
- 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05,
-
- /* Single write (offset 0x18 in UPM RAM) */
- 0xEFCBCC04, 0x0F37C804, 0x0EEE8002, 0x01B90404,
- 0x1FF74C05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05,
-
- /* Burst write (offset 0x20 in UPM RAM) */
- 0xEFCBCC04, 0x0F37C804, 0x0EEE8000, 0x00BD4400,
- 0x00FFCC00, 0x00FFCC02, 0x01FB8C04, 0x1FF74C05,
- 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05,
- 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05,
-
- /* Refresh (offset 0x30 in UPM RAM) */
- 0xEFFACC04, 0x0FF5CC04, 0x0FFFCC04, 0x1FFFCC04,
- 0xFFFFCC05, 0xFFFFCC05, 0xEFFB8C34, 0x0FF74C34,
- 0x0FFACCB4, 0x0FF5CC34, 0x0FFFC034, 0x0FFFC0B4,
-
- /* Exception (offset 0x3C in UPM RAM) */
- 0x0FEA8034, 0x1FB54034, 0xFFFFCC34, 0xFFFFCC05
-};
-
-int board_early_init_f (void)
-{
- vu_char *bcsr = (vu_char *)CONFIG_SYS_BCSR;
-
- bcsr[0] |= 0x0C; /* Turn the LEDs off */
- bcsr[2] |= 0x08; /* Enable flash WE# line - necessary for
- flash detection by CFI driver
- */
-
-#if defined(CONFIG_8xx_CONS_SMC1)
- bcsr[6] |= 0x10; /* Enables RS-232 transceiver */
-#endif
-#if defined(CONFIG_8xx_CONS_SCC2)
- bcsr[7] |= 0x10; /* Enables RS-232 transceiver */
-#endif
-#ifdef CONFIG_ETHER_ON_FEC1
- bcsr[8] |= 0xC0; /* Enable Ethernet 1 PHY */
-#endif
-#ifdef CONFIG_ETHER_ON_FEC2
- bcsr[8] |= 0x30; /* Enable Ethernet 2 PHY */
-#endif
-
- return 0;
-}
-
-phys_size_t initdram (int board_type)
-{
- long int msize;
- volatile immap_t *immap = (volatile immap_t *)CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
-
- upmconfig(UPMA, sdram_table, sizeof(sdram_table) / sizeof(uint));
-
- /* Configure SDRAM refresh */
- memctl->memc_mptpr = MPTPR_PTP_DIV2; /* BRGCLK/2 */
-
- memctl->memc_mamr = (65 << 24) | CONFIG_SYS_MAMR; /* No refresh */
- udelay(100);
-
- /* Run MRS pattern from location 0x36 */
- memctl->memc_mar = 0x88;
- memctl->memc_mcr = 0x80002236;
- udelay(100);
-
- memctl->memc_mamr |= MAMR_PTAE; /* Enable refresh */
- memctl->memc_or1 = ~(CONFIG_SYS_SDRAM_MAX_SIZE - 1) | OR_CSNT_SAM;
- memctl->memc_br1 = CONFIG_SYS_SDRAM_BASE | BR_PS_32 | BR_MS_UPMA | BR_V;
-
- msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_MAX_SIZE);
- memctl->memc_or1 |= ~(msize - 1);
-
- return msize;
-}
-
-int checkboard( void )
-{
- vu_char *bcsr = (vu_char *)CONFIG_SYS_BCSR;
-
- puts("Board: ");
- switch (bcsr[15]) {
- case 0xE7:
- puts("EP88xC 1.0");
- break;
- default:
- printf("unknown ID=%02X", bcsr[15]);
- }
- printf(" CPLD revision %d\n", bcsr[14]);
-
- return 0;
-}
+++ /dev/null
-/*
- * (C) Copyright 2001-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .text :
- {
- arch/powerpc/cpu/mpc8xx/start.o (.text*)
- arch/powerpc/cpu/mpc8xx/traps.o (.text*)
- *(.text*)
- . = ALIGN(16);
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- _GOT2_TABLE_ = .;
- KEEP(*(.got2))
- KEEP(*(.got))
- PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
- _FIXUP_TABLE_ = .;
- KEEP(*(.fixup))
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data*)
- *(.sdata*)
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
-
- . = ALIGN(4);
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss (NOLOAD) :
- {
- *(.bss*)
- *(.sbss*)
- *(COMMON)
- . = ALIGN(4);
- }
- __bss_end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
-
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ../common/misc.o ../common/pci.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = adciop.o flash.o ../common/misc.o ../common/pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o \
+obj-y = apc405.o \
../common/misc.o \
../common/auto_update.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#include <mtd/cfi_flash.h>
#include <asm/4xx_pci.h>
#include <pci.h>
+#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
}
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int usb_board_init(void)
+int board_usb_init(int index, enum usb_init_type init)
{
return 0;
}
return 0;
}
-int usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum usb_init_type init)
{
- usb_board_stop();
- return 0;
+ return usb_board_stop();
}
#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT) */
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ../common/misc.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ar405.o flash.o ../common/misc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o \
+obj-y = ash405.o flash.o \
../common/misc.o \
../common/esd405ep_nand.o \
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common/xilinx_jtag)
endif
-LIB = $(obj)lib$(BOARD).o
-
# Objects for Xilinx JTAG programming (CPLD)
CPLD = ../common/xilinx_jtag/lenval.o \
../common/xilinx_jtag/micro.o \
../common/xilinx_jtag/ports.o
-COBJS = $(BOARD).o flash.o \
+obj-y = cms700.o flash.o \
../common/misc.o \
$(CPLD) \
../common/esd405ep_nand.o \
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ../common/misc.o ../common/cmd_loadpci.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpci2dp.o flash.o ../common/misc.o ../common/cmd_loadpci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ../common/misc.o ../common/auto_update.o
-COBJS += ../common/cmd_loadpci.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpci405.o flash.o ../common/misc.o ../common/auto_update.o
+obj-y += ../common/cmd_loadpci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
# ifneq ($(OBJTREE),$(SRCTREE))
# $(shell mkdir -p $(obj)../common/xilinx_jtag)
# endif
-LIB = $(obj)lib$(BOARD).o
-
# Objects for Xilinx JTAG programming (CPLD)
# CPLD = ../common/xilinx_jtag/lenval.o \
# ../common/xilinx_jtag/micro.o \
# ../common/xilinx_jtag/ports.o
-# COBJS = $(BOARD).o flash.o $(CPLD)
-COBJS = $(BOARD).o strataflash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+# obj-y = cpci5200.o flash.o $(CPLD)
+obj-y = cpci5200.o strataflash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../../Marvell/common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-SOBJS = misc.o
-
-COBJS = $(BOARD).o serial.o ../../Marvell/common/memory.o pci.o \
+obj-y = misc.o
+obj-y += cpci750.o serial.o ../../Marvell/common/memory.o pci.o \
mv_eth.o mpsc.o i2c.o \
sdram_init.o ide.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ../common/misc.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = cpciiser4.o flash.o ../common/misc.o
-
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o cmd_dasa_sim.o eeprom.o ../common/pci.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = dasa_sim.o flash.o cmd_dasa_sim.o eeprom.o ../common/pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common/xilinx_jtag)
endif
-LIB = $(obj)lib$(BOARD).o
-
# Objects for Xilinx JTAG programming (CPLD)
CPLD = ../common/xilinx_jtag/lenval.o \
../common/xilinx_jtag/micro.o \
../common/xilinx_jtag/ports.o
-COBJS = $(BOARD).o flash.o ../common/misc.o $(CPLD)
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = dp405.o flash.o ../common/misc.o $(CPLD)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ../common/misc.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = du405.o flash.o ../common/misc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = du440.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o \
+obj-y = hh405.o flash.o \
../common/misc.o \
../common/esd405ep_nand.o \
../common/auto_update.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o \
+obj-y = hub405.o flash.o \
../common/misc.o \
../common/esd405ep_nand.o \
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mecp5123.o
-
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = mecp5200.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += meesc.o
+obj-$(CONFIG_HAS_DATAFLASH) += partition.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ../common/misc.o cmd_ocrtc.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ocrtc.o flash.o ../common/misc.o cmd_ocrtc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += otc570.o
+obj-$(CONFIG_HAS_DATAFLASH) += partition.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o ../common/misc.o cmd_pci405.o
-SOBJS = writeibm.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
-# $(call cmd_link_o_target, $(OBJS))
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = pci405.o flash.o ../common/misc.o cmd_pci405.o
+obj-y += writeibm.o
-
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
# ifneq ($(OBJTREE),$(SRCTREE))
# $(shell mkdir -p $(obj)../common/xilinx_jtag)
# endif
-LIB = $(obj)lib$(BOARD).o
-
# Objects for Xilinx JTAG programming (CPLD)
# CPLD = ../common/xilinx_jtag/lenval.o \
# ../common/xilinx_jtag/micro.o \
# ../common/xilinx_jtag/ports.o
-# COBJS = $(BOARD).o flash.o $(CPLD)
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+# obj-y = pf5200.o flash.o $(CPLD)
+obj-y = pf5200.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o \
+obj-y = plu405.o flash.o \
../common/misc.o \
../common/esd405ep_nand.o \
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common/xilinx_jtag)
endif
-LIB = $(obj)lib$(BOARD).o
-
# Objects for Xilinx JTAG programming (CPLD)
CPLD = ../common/xilinx_jtag/lenval.o \
../common/xilinx_jtag/micro.o \
../common/xilinx_jtag/ports.o
-COBJS = $(BOARD).o ../common/misc.o ../common/cmd_loadpci.o $(CPLD)
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = pmc405.o ../common/misc.o ../common/cmd_loadpci.o $(CPLD)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y = $(BOARD).o
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
-COBJS-y += ../common/cmd_loadpci.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = pmc405de.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
+obj-y += ../common/cmd_loadpci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o cmd_pmc440.o sdram.o fpga.o \
+obj-y = pmc440.o cmd_pmc440.o sdram.o fpga.o \
../common/cmd_loadpci.o
-
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+extra-y += init.o
#endif
#include <serial.h>
#include <asm/4xx_pci.h>
+#include <usb.h>
#include "fpga.h"
#include "pmc440.h"
}
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT)
-int usb_board_init(void)
+int board_usb_init(int index, enum usb_init_type init)
{
char *act = getenv("usbact");
int i;
return 0;
}
-int usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum usb_init_type init)
{
- usb_board_stop();
- return 0;
+ return usb_board_stop();
}
#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_BOARD_INIT) */
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = tasreg.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o caddy.o
-COBJS-$(CONFIG_PCI) += pci.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += vme8349.o caddy.o
+obj-$(CONFIG_PCI) += pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o \
+obj-y = voh405.o flash.o \
../common/misc.o \
../common/esd405ep_nand.o \
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common/xilinx_jtag)
endif
-LIB = $(obj)lib$(BOARD).o
-
# Objects for Xilinx JTAG programming (CPLD)
CPLD = ../common/xilinx_jtag/lenval.o \
../common/xilinx_jtag/micro.o \
../common/xilinx_jtag/ports.o
-COBJS = $(BOARD).o flash.o ../common/misc.o $(CPLD)
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = vom405.o flash.o ../common/misc.o $(CPLD)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o \
+obj-y = wuh405.o flash.o \
../common/misc.o \
../common/esd405ep_nand.o \
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ima3-mx53.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ima3-mx53.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := espt.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := espt.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = esteem192e.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o phantom.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = debris.o flash.o phantom.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o multiverse.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = kvme080.o multiverse.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += led.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += cpu9260.o
+obj-y += led.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cpuat91.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-SOBJS = misc.o
-COBJS = $(BOARD).o flash.o serial.o memory.o pci.o \
+obj-y = misc.o
+obj-y += evb64260.o flash.o serial.o memory.o pci.o \
eth.o eth_addrtbl.o mpsc.o i2c.o \
sdram_init.o zuma_pbb.o intel_flash.o zuma_pbb_mbox.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += law.o
-COBJS-y += tlb.o
-COBJS-$(CONFIG_DDR_SPD) += ddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += hww1u1a.o
+obj-y += law.o
+obj-y += tlb.o
+obj-$(CONFIG_DDR_SPD) += ddr.o
popts->clk_adjust = 4;
popts->cpo_override = 4;
popts->write_data_delay = 2;
- popts->twoT_en = 0;
+ popts->twot_en = 0;
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o lamp.o pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = fads.o flash.o lamp.o pcmcia.o
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_PROMPT "=>" /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* #undef to save memory */
#if defined(CONFIG_CMD_KGDB)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := a320evb.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := a320evb.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = flagadm.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-$(CONFIG_B4860QDS)+= eth_b4860qds.o
-COBJS-$(CONFIG_PCI) += pci.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += b4860qds.o
+obj-y += ddr.o
+obj-$(CONFIG_B4860QDS)+= eth_b4860qds.o
+obj-$(CONFIG_PCI) += pci.o
+obj-y += law.o
+obj-y += tlb.o
return ret;
}
-static const char *serdes_clock_to_string(u32 clock)
-{
- switch (clock) {
- case SRDS_PLLCR0_RFCK_SEL_100:
- return "100";
- case SRDS_PLLCR0_RFCK_SEL_125:
- return "125";
- case SRDS_PLLCR0_RFCK_SEL_156_25:
- return "156.25";
- case SRDS_PLLCR0_RFCK_SEL_161_13:
- return "161.13";
- default:
- return "122.88";
- }
-}
-
#define NUM_SRDS_BANKS 2
int misc_init_r(void)
#define QIXIS_SRDS1CLK_122 0x5a
#define QIXIS_SRDS1CLK_125 0x5e
+
+/* SGMII */
+#define PHY_BASE_ADDR 0x18
+#define PORT_NUM 0x04
+#define REGNUM 0x00
#endif
--- /dev/null
+#PBI commands
+#Initialize CPC1
+09010000 00200400
+09138000 00000000
+091380c0 00000100
+#Configure CPC1 as 512KB SRAM
+09010100 00000000
+09010104 fff80009
+09010f00 08000000
+09010000 80000000
+#Configure LAW for CPC1
+09000d00 00000000
+09000d04 fff80000
+09000d08 81000012
+#Configure alternate space
+09000010 00000000
+09000014 ff000000
+09000018 81000000
+#Configure SPI controller
+09110000 80000403
+09110020 2d170008
+09110024 00100008
+09110028 00100008
+0911002c 00100008
+#Flush PBL data
+09138000 00000000
+091380c0 00000000
--- /dev/null
+#PBL preamble and RCW header
+aa55aa55 010e0100
+# serdes protocol 0x2A_0x98
+140e0018 0f001218 00000000 00000000
+54980000 9000a000 f8025000 a9000000
+01000000 00000000 00000000 0001b1f8
+00000000 14000020 00000000 00000011
.edc_config = 2, /* ECC */
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1071,
- .caslat_X = 0x2fe << 4, /* 5,6,7,8,9,10,11,13 */
- .tAA_ps = 13910,
- .tWR_ps = 15000,
- .tRCD_ps = 13910,
- .tRRD_ps = 6000,
- .tRP_ps = 13910,
- .tRAS_ps = 34000,
- .tRC_ps = 48910,
- .tRFC_ps = 260000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1071,
+ .caslat_x = 0x2fe << 4, /* 5,6,7,8,9,10,11,13 */
+ .taa_ps = 13910,
+ .twr_ps = 15000,
+ .trcd_ps = 13910,
+ .trrd_ps = 6000,
+ .trp_ps = 13910,
+ .tras_ps = 34000,
+ .trc_ps = 48910,
+ .trfc_ps = 260000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 35000,
+ .tfaw_ps = 35000,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
u32 wrlvl_ctl_3;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
popts->wrlvl_start = pbsp->wrlvl_start;
popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
popts->write_data_delay = pbsp_highest->write_data_delay;
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->wrlvl_start = pbsp_highest->wrlvl_start;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
struct memac_mdio_info tg_memac_mdio_info;
unsigned int i;
unsigned int serdes1_prtcl, serdes2_prtcl;
+ int qsgmii;
+ struct mii_dev *bus;
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
serdes1_prtcl = in_be32(&gur->rcwsr[4]) &
FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
break;
}
+ /*set PHY address for QSGMII Riser Card on slot2*/
+ bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
+ qsgmii = is_qsgmii_riser_card(bus, PHY_BASE_ADDR, PORT_NUM, REGNUM);
+
+ if (qsgmii) {
+ switch (serdes2_prtcl) {
+ case 0xb2:
+ case 0x8d:
+ fm_info_set_phy_address(FM1_DTSEC3, PHY_BASE_ADDR);
+ fm_info_set_phy_address(FM1_DTSEC4, PHY_BASE_ADDR + 1);
+ break;
+ default:
+ break;
+ }
+ }
+
for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
int idx = i - FM1_DTSEC1;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
ifdef MINIMAL
-COBJS-y += spl_minimal.o tlb.o law.o
+obj-y += spl_minimal.o tlb.o law.o
else
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-#COBJS-y += bsc9131rdb_mux.o
+obj-y += bsc9131rdb.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
+#obj-y += bsc9131rdb_mux.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1870,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1870,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
ifdef MINIMAL
-COBJS-y += spl_minimal.o tlb.o law.o
+obj-y += spl_minimal.o tlb.o law.o
else
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
+obj-y += bsc9132qds.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1870,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1870,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += cpld.o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += c29xpcie.o
+obj-y += cpld.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
+#include "cpld.h"
+
+#define C29XPCIE_HARDWARE_REVA 0x40
/*
* Micron MT41J128M16HA-15E
* */
.edc_config = 2,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1650,
- .caslat_X = 0x7e << 4, /* 5,6,7,8,9,10 */
- .tAA_ps = 14050,
- .tWR_ps = 15000,
- .tRCD_ps = 13500,
- .tRRD_ps = 75000,
- .tRP_ps = 13500,
- .tRAS_ps = 40000,
- .tRC_ps = 49500,
- .tRFC_ps = 160000,
- .tWTR_ps = 75000,
- .tRTP_ps = 75000,
+ .tckmin_x_ps = 1650,
+ .caslat_x = 0x7e << 4, /* 5,6,7,8,9,10 */
+ .taa_ps = 14050,
+ .twr_ps = 15000,
+ .trcd_ps = 13500,
+ .trrd_ps = 75000,
+ .trp_ps = 13500,
+ .tras_ps = 40000,
+ .trc_ps = 49500,
+ .trfc_ps = 160000,
+ .twtr_ps = 75000,
+ .trtp_ps = 75000,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 30000,
+ .tfaw_ps = 30000,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
dimm_params_t *pdimm,
unsigned int ctrl_num)
{
+ struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
int i;
- popts->clk_adjust = 2;
+
+ popts->clk_adjust = 4;
popts->cpo_override = 0x1f;
popts->write_data_delay = 4;
popts->half_strength_driver_enable = 1;
popts->trwt_override = 1;
popts->trwt = 0;
+ if (in_8(&cpld_data->hwver) == C29XPCIE_HARDWARE_REVA)
+ popts->ecc_mode = 0;
+
for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
popts->cs_local_opts[i].odt_rd_cfg = FSL_DDR_ODT_NEVER;
popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS;
struct law_entry law_table[] = {
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_IFC),
- SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
- SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_16K, LAW_TRGT_IF_IFC),
+ SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
+ SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS, LAW_SIZE_512K,
LAW_TRGT_IF_PLATFORM_SRAM),
};
SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 4, BOOKE_PAGESZ_4K, 1),
+ 0, 4, BOOKE_PAGESZ_64K, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 5, BOOKE_PAGESZ_16K, 1),
+ 0, 5, BOOKE_PAGESZ_64K, 1),
SET_TLB_ENTRY(1, CONFIG_SYS_PLATFORM_SRAM_BASE,
CONFIG_SYS_PLATFORM_SRAM_BASE_PHYS,
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)board/freescale/common)
-endif
-
-LIB = $(obj)libfreescale.o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
endif
ifndef MINIMAL
-COBJS-$(CONFIG_FSL_CADMUS) += cadmus.o
-COBJS-$(CONFIG_FSL_VIA) += cds_via.o
-COBJS-$(CONFIG_FMAN_ENET) += fman.o
-COBJS-$(CONFIG_FSL_PIXIS) += pixis.o
+obj-$(CONFIG_FSL_CADMUS) += cadmus.o
+obj-$(CONFIG_FSL_VIA) += cds_via.o
+obj-$(CONFIG_FMAN_ENET) += fman.o
+obj-$(CONFIG_FSL_PIXIS) += pixis.o
ifndef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_FSL_NGPIXIS) += ngpixis.o
+obj-$(CONFIG_FSL_NGPIXIS) += ngpixis.o
endif
-COBJS-$(CONFIG_FSL_QIXIS) += qixis.o
-COBJS-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o
+obj-$(CONFIG_FSL_QIXIS) += qixis.o
+obj-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o
ifndef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_ID_EEPROM) += sys_eeprom.o
+obj-$(CONFIG_ID_EEPROM) += sys_eeprom.o
endif
-COBJS-$(CONFIG_FSL_SGMII_RISER) += sgmii_riser.o
+obj-$(CONFIG_FSL_SGMII_RISER) += sgmii_riser.o
ifndef CONFIG_RAMBOOT_PBL
-COBJS-$(CONFIG_FSL_FIXED_MMC_LOCATION) += sdhc_boot.o
+obj-$(CONFIG_FSL_FIXED_MMC_LOCATION) += sdhc_boot.o
endif
-COBJS-$(CONFIG_MPC8541CDS) += cds_pci_ft.o
-COBJS-$(CONFIG_MPC8548CDS) += cds_pci_ft.o
-COBJS-$(CONFIG_MPC8555CDS) += cds_pci_ft.o
-
-COBJS-$(CONFIG_MPC8536DS) += ics307_clk.o
-COBJS-$(CONFIG_MPC8572DS) += ics307_clk.o
-COBJS-$(CONFIG_P1022DS) += ics307_clk.o
-COBJS-$(CONFIG_P2020DS) += ics307_clk.o
-COBJS-$(CONFIG_P3041DS) += ics307_clk.o
-COBJS-$(CONFIG_P4080DS) += ics307_clk.o
-COBJS-$(CONFIG_P5020DS) += ics307_clk.o
-COBJS-$(CONFIG_P5040DS) += ics307_clk.o
-COBJS-$(CONFIG_VSC_CROSSBAR) += vsc3316_3308.o
-COBJS-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o
+obj-$(CONFIG_MPC8541CDS) += cds_pci_ft.o
+obj-$(CONFIG_MPC8548CDS) += cds_pci_ft.o
+obj-$(CONFIG_MPC8555CDS) += cds_pci_ft.o
+
+obj-$(CONFIG_MPC8536DS) += ics307_clk.o
+obj-$(CONFIG_MPC8572DS) += ics307_clk.o
+obj-$(CONFIG_P1022DS) += ics307_clk.o
+obj-$(CONFIG_P2020DS) += ics307_clk.o
+obj-$(CONFIG_P3041DS) += ics307_clk.o
+obj-$(CONFIG_P4080DS) += ics307_clk.o
+obj-$(CONFIG_P5020DS) += ics307_clk.o
+obj-$(CONFIG_P5040DS) += ics307_clk.o
+obj-$(CONFIG_VSC_CROSSBAR) += vsc3316_3308.o
+obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o
# deal with common files for P-series corenet based devices
-SUBLIB-$(CONFIG_P2041RDB) += p_corenet/libp_corenet.o
-SUBLIB-$(CONFIG_P3041DS) += p_corenet/libp_corenet.o
-SUBLIB-$(CONFIG_P4080DS) += p_corenet/libp_corenet.o
-SUBLIB-$(CONFIG_P5020DS) += p_corenet/libp_corenet.o
-SUBLIB-$(CONFIG_P5040DS) += p_corenet/libp_corenet.o
+obj-$(CONFIG_P2041RDB) += p_corenet/
+obj-$(CONFIG_P3041DS) += p_corenet/
+obj-$(CONFIG_P4080DS) += p_corenet/
+obj-$(CONFIG_P5020DS) += p_corenet/
+obj-$(CONFIG_P5040DS) += p_corenet/
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-SUBLIB := $(addprefix $(obj),$(SUBLIB-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SUBLIB)
- $(call cmd_link_o_target, $(OBJS) $(SUBLIB))
-
-$(SUBLIB): $(obj).depend
- $(MAKE) -C $(dir $(subst $(obj),,$@))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-LIB = libp_corenet.o
+CPPFLAGS += -I$(TOPDIR)
-COBJS-y += law.o
-COBJS-$(CONFIG_PCI) += pci.o
-COBJS-y += tlb.o
-
-include $(TOPDIR)/post/rules.mk
+obj-y += law.o
+obj-$(CONFIG_PCI) += pci.o
+obj-y += tlb.o
u8 clk_freq[6]; /* Clock Measurement Registers */
u8 res_c6[8];
u8 clk_base[2]; /* Clock Frequency Base Reg */
- u8 res_d0[16];
+ u8 res_d0[8];
+ u8 cms[2]; /* Core Management Space Address Register, 0xD8 */
+ u8 res_c0[6];
u8 aux2[4]; /* Auxiliary Registers,0xE0 */
u8 res14[10];
u8 aux_ad;
#endif
#ifdef CONFIG_SYS_I2C_EEPROM_NXID
+/* some boards with non-256-bytes EEPROM have special define */
+/* for MAX_NUM_PORTS in board-specific file */
+#ifndef MAX_NUM_PORTS
#define MAX_NUM_PORTS 23
+#endif
#define NXID_VERSION 1
#endif
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-$(CONFIG_P3041DS) += eth_hydra.o
-COBJS-$(CONFIG_P4080DS) += eth_p4080.o
-COBJS-$(CONFIG_P5020DS) += eth_hydra.o
-COBJS-$(CONFIG_P5040DS) += eth_superhydra.o
-COBJS-$(CONFIG_P3041DS) += p3041ds_ddr.o
-COBJS-$(CONFIG_P4080DS) += p4080ds_ddr.o
-COBJS-$(CONFIG_P5020DS) += p5020ds_ddr.o
-COBJS-$(CONFIG_P5040DS) += p5040ds_ddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += corenet_ds.o
+obj-y += ddr.o
+obj-$(CONFIG_P3041DS) += eth_hydra.o
+obj-$(CONFIG_P4080DS) += eth_p4080.o
+obj-$(CONFIG_P5020DS) += eth_hydra.o
+obj-$(CONFIG_P5040DS) += eth_superhydra.o
+obj-$(CONFIG_P3041DS) += p3041ds_ddr.o
+obj-$(CONFIG_P4080DS) += p4080ds_ddr.o
+obj-$(CONFIG_P5020DS) += p5020ds_ddr.o
+obj-$(CONFIG_P5040DS) += p5040ds_ddr.o
return 0;
}
-static const char *serdes_clock_to_string(u32 clock)
-{
- switch(clock) {
- case SRDS_PLLCR0_RFCK_SEL_100:
- return "100";
- case SRDS_PLLCR0_RFCK_SEL_125:
- return "125";
- case SRDS_PLLCR0_RFCK_SEL_156_25:
- return "156.25";
- default:
- return "150";
- }
-}
-
#define NUM_SRDS_BANKS 3
int misc_init_r(void)
u32 wrlvl_start;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
pbsp->write_data_delay;
popts->clk_adjust = pbsp->clk_adjust;
popts->wrlvl_start = pbsp->wrlvl_start;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
popts->write_data_delay = pbsp_highest->write_data_delay;
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->wrlvl_start = pbsp_highest->wrlvl_start;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
#define BRDCFG2_REG_GPIO_SEL 0x20
+#define PHY_BASE_ADDR 0x00
+
/*
* BRDCFG1 mask and value for each MAC
*
struct tgec_mdio_info tgec_mdio_info;
unsigned int i, slot;
int lane;
+ struct mii_dev *bus;
printf("Initializing Fman\n");
}
}
+ bus = miiphy_get_dev_by_name("HYDRA_SGMII_MDIO");
+ set_sgmii_phy(bus, FM1_DTSEC1, CONFIG_SYS_NUM_FM1_DTSEC, PHY_BASE_ADDR);
+
/*
* For 10G, we only support one XAUI card per Fman. If present, then we
* force its routing and never touch those bits again, which removes the
#define EMI1_MASK 0xc0000000
#define EMI2_MASK 0x30000000
+#define PHY_BASE_ADDR 0x00
+#define PHY_BASE_ADDR_SLOT5 0x10
+
static int mdio_mux[NUM_FM_PORTS];
static char *mdio_names[16] = {
int i;
struct fsl_pq_mdio_info dtsec_mdio_info;
struct tgec_mdio_info tgec_mdio_info;
+ struct mii_dev *bus;
/* Initialize the mdio_mux array so we can recognize empty elements */
for (i = 0; i < NUM_FM_PORTS; i++)
break;
}
}
+ bus = mii_dev_for_muxval(EMI1_SLOT5);
+ set_sgmii_phy(bus, FM1_DTSEC1,
+ CONFIG_SYS_NUM_FM1_DTSEC, PHY_BASE_ADDR_SLOT5);
for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) {
int idx = i - FM1_10GEC1, lane, slot;
}
}
+ bus = mii_dev_for_muxval(EMI1_SLOT3);
+ set_sgmii_phy(bus, FM2_DTSEC1, CONFIG_SYS_NUM_FM2_DTSEC, PHY_BASE_ADDR);
+ bus = mii_dev_for_muxval(EMI1_SLOT4);
+ set_sgmii_phy(bus, FM2_DTSEC1, CONFIG_SYS_NUM_FM2_DTSEC, PHY_BASE_ADDR);
+
for (i = FM2_10GEC1; i < FM2_10GEC1 + CONFIG_SYS_NUM_FM2_10GEC; i++) {
int idx = i - FM2_10GEC1, lane, slot;
switch (fm_info_get_enet_if(i)) {
#define BRDCFG2_REG_GPIO_SEL 0x20
+/* SGMII */
+#define PHY_BASE_ADDR 0x00
+#define REGNUM 0x00
+#define PORT_NUM_FM1 0x04
+#define PORT_NUM_FM2 0x02
+
/*
* BRDCFG1 mask and value for each MAC
*
struct tgec_mdio_info tgec_mdio_info;
unsigned int i, slot;
int lane;
+ struct mii_dev *bus;
+ int qsgmii;
+ int phy_real_addr;
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
int srds_prtcl = (in_be32(&gur->rcwsr[4]) &
FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26;
"SUPER_HYDRA_FM1_SGMII_MDIO");
super_hydra_mdio_init(DEFAULT_FM_MDIO_NAME,
"SUPER_HYDRA_FM2_SGMII_MDIO");
+ super_hydra_mdio_init(DEFAULT_FM_MDIO_NAME,
+ "SUPER_HYDRA_FM3_SGMII_MDIO");
super_hydra_mdio_init(DEFAULT_FM_TGEC_MDIO_NAME,
"SUPER_HYDRA_FM1_TGEC_MDIO");
super_hydra_mdio_init(DEFAULT_FM_TGEC_MDIO_NAME,
}
}
+ bus = miiphy_get_dev_by_name("SUPER_HYDRA_FM1_SGMII_MDIO");
+ qsgmii = is_qsgmii_riser_card(bus, PHY_BASE_ADDR, PORT_NUM_FM1, REGNUM);
+
+ if (qsgmii) {
+ for (i = FM1_DTSEC1; i < FM1_DTSEC1 + PORT_NUM_FM1; i++) {
+ if (fm_info_get_enet_if(i) ==
+ PHY_INTERFACE_MODE_SGMII) {
+ phy_real_addr = PHY_BASE_ADDR + i - FM1_DTSEC1;
+ fm_info_set_phy_address(i, phy_real_addr);
+ }
+ }
+ switch (srds_prtcl) {
+ case 0x00:
+ case 0x03:
+ case 0x04:
+ case 0x06:
+ case 0x11:
+ case 0x2a:
+ case 0x34:
+ case 0x36:
+ fm_info_set_phy_address(FM1_DTSEC3, PHY_BASE_ADDR + 2);
+ fm_info_set_phy_address(FM1_DTSEC4, PHY_BASE_ADDR + 3);
+ break;
+ case 0x01:
+ case 0x02:
+ case 0x05:
+ case 0x07:
+ case 0x35:
+ fm_info_set_phy_address(FM1_DTSEC3, PHY_BASE_ADDR + 0);
+ fm_info_set_phy_address(FM1_DTSEC4, PHY_BASE_ADDR + 1);
+ break;
+ default:
+ break;
+ }
+ }
+
/*
* For 10G, we only support one XAUI card per Fman. If present, then we
* force its routing and never touch those bits again, which removes the
break;
};
- super_hydra_mdio_set_mux("SUPER_HYDRA_FM2_SGMII_MDIO",
- mdio_mux[i].mask, mdio_mux[i].val);
- fm_info_set_mdio(i,
- miiphy_get_dev_by_name("SUPER_HYDRA_FM2_SGMII_MDIO"));
+ if (i == FM2_DTSEC1 || i == FM2_DTSEC2) {
+ super_hydra_mdio_set_mux(
+ "SUPER_HYDRA_FM3_SGMII_MDIO",
+ mdio_mux[i].mask,
+ mdio_mux[i].val);
+ fm_info_set_mdio(i, miiphy_get_dev_by_name(
+ "SUPER_HYDRA_FM3_SGMII_MDIO"));
+ } else {
+ super_hydra_mdio_set_mux(
+ "SUPER_HYDRA_FM2_SGMII_MDIO",
+ mdio_mux[i].mask,
+ mdio_mux[i].val);
+ fm_info_set_mdio(i, miiphy_get_dev_by_name(
+ "SUPER_HYDRA_FM2_SGMII_MDIO"));
+ }
+
break;
case PHY_INTERFACE_MODE_RGMII:
/*
}
}
+ bus = miiphy_get_dev_by_name("SUPER_HYDRA_FM2_SGMII_MDIO");
+ set_sgmii_phy(bus, FM2_DTSEC3, PORT_NUM_FM2, PHY_BASE_ADDR);
+ bus = miiphy_get_dev_by_name("SUPER_HYDRA_FM3_SGMII_MDIO");
+ set_sgmii_phy(bus, FM2_DTSEC1, PORT_NUM_FM2, PHY_BASE_ADDR);
+
/*
* For 10G, we only support one XAUI card per Fman. If present, then we
* force its routing and never touch those bits again, which removes the
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5208evbe.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m52277evb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5235evb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5249evb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5253demo.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5253evbe.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5271evb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5272c3.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5275evb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5282evb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m53017evb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o nand.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5329evb.o nand.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o nand.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m5373evb.o nand.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m54418twr.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m54451evb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m54455evb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m547xevb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = m548xevb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-$(shell mkdir -p $(OBJTREE)/board/freescale/common)
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mpc5121ads.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o tsi108_init.o
-SOBJS := asm_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude ($obj).depend
-
-#########################################################################
+obj-y := mpc7448hpc2.o tsi108_init.o
+obj-y += asm_init.o
-
#
# (C) Copyright 2001-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mpc8260ads.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mpc8266ads.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o sdram.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mpc8308rdb.o sdram.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o sdram.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mpc8313erdb.o sdram.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o sdram.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mpc8315erdb.o sdram.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mpc8323erdb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_PCI) += pci.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc832xemds.o
+obj-$(CONFIG_PCI) += pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_PCI) += pci.o
-COBJS-$(CONFIG_FSL_DDR2) += ddr.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8349emds.o
+obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_FSL_DDR2) += ddr.o
u32 clk_adjust;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
popts->cpo_override = pbsp->cpo;
popts->write_data_delay =
pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->cpo_override = pbsp_highest->cpo;
popts->write_data_delay = pbsp_highest->write_data_delay;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
* - number of DIMMs installed
*/
popts->half_strength_driver_enable = 0;
- popts->DQS_config = 0; /* only true DQS signal is used on board */
+ popts->dqs_config = 0; /* only true DQS signal is used on board */
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_PCI) += pci.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8349itx.o
+obj-$(CONFIG_PCI) += pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_PCI) += pci.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8360emds.o
+obj-$(CONFIG_PCI) += pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_CMD_NAND) += nand.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8360erdk.o
+obj-$(CONFIG_CMD_NAND) += nand.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_PCI) += pci.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc837xemds.o
+obj-$(CONFIG_PCI) += pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_PCI) += pci.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc837xerdb.o
+obj-$(CONFIG_PCI) += pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8536ds.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8540ads.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8541cds.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8544ds.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8548cds.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8555cds.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8560ads.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += bcsr.o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8568mds.o
+obj-y += bcsr.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += bcsr.o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8569mds.o
+obj-y += bcsr.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8572ds.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
u32 clk_adjust;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
popts->cpo_override = pbsp->cpo;
popts->write_data_delay =
pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
popts->clk_adjust = pbsp->clk_adjust;
popts->cpo_override = pbsp->cpo;
popts->write_data_delay = pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
} else {
panic("DIMM is not supported by this board");
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_FSL_DDR2) += ddr.o
-COBJS-y += law.o
-
-COBJS-$(CONFIG_FSL_DIU_FB) += mpc8610hpcd_diu.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mpc8610hpcd.o
+obj-$(CONFIG_FSL_DDR2) += ddr.o
+obj-y += law.o
+obj-$(CONFIG_FSL_DIU_FB) += mpc8610hpcd_diu.o
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += law.o
-COBJS-$(CONFIG_FSL_DDR2) += ddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude ($obj).depend
-
-#########################################################################
+obj-y += mpc8641hpcn.o
+obj-y += law.o
+obj-$(CONFIG_FSL_DDR2) += ddr.o
found:
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := mx23evk.o
+obj-y := mx23evk.o
else
-COBJS := spl_boot.o
+obj-y := spl_boot.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx25pdk.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx25pdk.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := mx28evk.o
+obj-y := mx28evk.o
else
-COBJS := iomux.o
+obj-y := iomux.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx31ads.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx31ads.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifdef CONFIG_SPL_BUILD
-SOBJS := lowlevel_init.o
+obj-y += lowlevel_init.o
endif
-COBJS := mx31pdk.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mx31pdk.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx35pdk.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx35pdk.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += mx51evk.o
-COBJS-$(CONFIG_VIDEO) += mx51evk_video.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mx51evk.o
+obj-$(CONFIG_VIDEO) += mx51evk_video.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx53ard.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx53ard.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx53evk.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx53evk.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += mx53loco.o
-COBJS-$(CONFIG_VIDEO) += mx53loco_video.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mx53loco.o
+obj-$(CONFIG_VIDEO) += mx53loco_video.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx53smd.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx53smd.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx6qarm2.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx6qarm2.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx6qsabreauto.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx6qsabreauto.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx6sabresd.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx6sabresd.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx6slevk.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx6slevk.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
ifdef MINIMAL
-COBJS-y += spl_minimal.o tlb.o law.o
+obj-y += spl_minimal.o tlb.o law.o
else
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
+obj-y += p1010rdb.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1875,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1875,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
#include <asm/mmu.h>
struct law_entry law_table[] = {
-#ifndef CONFIG_SDCARD
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
-#endif
};
int num_law_entries = ARRAY_SIZE(law_table);
#include <asm/fsl_serdes.h>
#include <asm/fsl_ifc.h>
#include <asm/fsl_pci.h>
-
-#ifndef CONFIG_SDCARD
#include <hwconfig.h>
-#endif
+#include <i2c.h>
DECLARE_GLOBAL_DATA_PTR;
#define MUX_CPLD_TDM 0x01
#define MUX_CPLD_SPICS0_FLASH 0x00
#define MUX_CPLD_SPICS0_SLIC 0x02
+#define PMUXCR1_IFC_MASK 0x00ffff00
+#define PMUXCR1_SDHC_MASK 0x00fff000
+#define PMUXCR1_SDHC_ENABLE 0x00555000
+
+enum {
+ MUX_TYPE_IFC,
+ MUX_TYPE_SDHC,
+ MUX_TYPE_SPIFLASH,
+ MUX_TYPE_TDM,
+ MUX_TYPE_CAN,
+ MUX_TYPE_CS0_NOR,
+ MUX_TYPE_CS0_NAND,
+};
+
+enum {
+ I2C_READ_BANK,
+ I2C_READ_PCB_VER,
+};
+
+static uint sd_ifc_mux;
-#ifndef CONFIG_SDCARD
struct cpld_data {
u8 cpld_ver; /* cpld revision */
+#if defined(CONFIG_P1010RDB_PA)
u8 pcba_ver; /* pcb revision number */
u8 twindie_ddr3;
u8 res1[6];
u8 por1; /* POR Options */
u8 por2; /* POR Options */
u8 por3; /* POR Options */
-};
-
-void cpld_show(void)
-{
- struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
-
- printf("CPLD: V%x.%x PCBA: V%x.0\n",
- in_8(&cpld_data->cpld_ver) & 0xF0,
- in_8(&cpld_data->cpld_ver) & 0x0F,
- in_8(&cpld_data->pcba_ver) & 0x0F);
-
-#ifdef CONFIG_DEBUG
- printf("twindie_ddr =%x\n",
- in_8(&cpld_data->twindie_ddr3));
- printf("bank_sel =%x\n",
- in_8(&cpld_data->bank_sel));
- printf("usb2_sel =%x\n",
- in_8(&cpld_data->usb2_sel));
- printf("porsw_sel =%x\n",
- in_8(&cpld_data->porsw_sel));
- printf("tdm_can_sel =%x\n",
- in_8(&cpld_data->tdm_can_sel));
- printf("tdm_can_sel =%x\n",
- in_8(&cpld_data->tdm_can_sel));
- printf("spi_cs0_sel =%x\n",
- in_8(&cpld_data->spi_cs0_sel));
- printf("bcsr0 =%x\n",
- in_8(&cpld_data->bcsr0));
- printf("bcsr1 =%x\n",
- in_8(&cpld_data->bcsr1));
- printf("bcsr2 =%x\n",
- in_8(&cpld_data->bcsr2));
- printf("bcsr3 =%x\n",
- in_8(&cpld_data->bcsr3));
-#endif
-}
+#elif defined(CONFIG_P1010RDB_PB)
+ u8 rom_loc;
#endif
+};
int board_early_init_f(void)
{
ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
-#ifndef CONFIG_SDCARD
struct fsl_ifc *ifc = (void *)CONFIG_SYS_IFC_ADDR;
/* Clock configuration to access CPLD using IFC(GPCM) */
setbits_be32(&ifc->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
-#endif
/*
* Reset PCIe slots via GPIO4
*/
int board_early_init_r(void)
{
-#ifndef CONFIG_SDCARD
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
CONFIG_SYS_FLASH_BASE_PHYS + 0x1000000,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel+1, BOOKE_PAGESZ_16M, 1);
-#endif
return 0;
}
}
#endif /* ifdef CONFIG_PCI */
+int config_board_mux(int ctrl_type)
+{
+ ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u8 tmp;
+
+#if defined(CONFIG_P1010RDB_PA)
+ struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
+
+ switch (ctrl_type) {
+ case MUX_TYPE_IFC:
+ i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
+ tmp = 0xf0;
+ i2c_write(I2C_PCA9557_ADDR1, 3, 1, &tmp, 1);
+ tmp = 0x01;
+ i2c_write(I2C_PCA9557_ADDR1, 1, 1, &tmp, 1);
+ sd_ifc_mux = MUX_TYPE_IFC;
+ clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK);
+ break;
+ case MUX_TYPE_SDHC:
+ i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
+ tmp = 0xf0;
+ i2c_write(I2C_PCA9557_ADDR1, 3, 1, &tmp, 1);
+ tmp = 0x05;
+ i2c_write(I2C_PCA9557_ADDR1, 1, 1, &tmp, 1);
+ sd_ifc_mux = MUX_TYPE_SDHC;
+ clrsetbits_be32(&gur->pmuxcr, PMUXCR1_SDHC_MASK,
+ PMUXCR1_SDHC_ENABLE);
+ break;
+ case MUX_TYPE_SPIFLASH:
+ out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_FLASH);
+ break;
+ case MUX_TYPE_TDM:
+ out_8(&cpld_data->tdm_can_sel, MUX_CPLD_TDM);
+ out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_SLIC);
+ break;
+ case MUX_TYPE_CAN:
+ out_8(&cpld_data->tdm_can_sel, MUX_CPLD_CAN_UART);
+ break;
+ default:
+ break;
+ }
+#elif defined(CONFIG_P1010RDB_PB)
+ uint orig_bus = i2c_get_bus_num();
+ i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
+
+ switch (ctrl_type) {
+ case MUX_TYPE_IFC:
+ i2c_read(I2C_PCA9557_ADDR2, 0, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x04);
+ i2c_write(I2C_PCA9557_ADDR2, 1, 1, &tmp, 1);
+ i2c_read(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x04);
+ i2c_write(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ sd_ifc_mux = MUX_TYPE_IFC;
+ clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK);
+ break;
+ case MUX_TYPE_SDHC:
+ i2c_read(I2C_PCA9557_ADDR2, 0, 1, &tmp, 1);
+ setbits_8(&tmp, 0x04);
+ i2c_write(I2C_PCA9557_ADDR2, 1, 1, &tmp, 1);
+ i2c_read(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x04);
+ i2c_write(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ sd_ifc_mux = MUX_TYPE_SDHC;
+ clrsetbits_be32(&gur->pmuxcr, PMUXCR1_SDHC_MASK,
+ PMUXCR1_SDHC_ENABLE);
+ break;
+ case MUX_TYPE_SPIFLASH:
+ i2c_read(I2C_PCA9557_ADDR2, 0, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x80);
+ i2c_write(I2C_PCA9557_ADDR2, 1, 1, &tmp, 1);
+ i2c_read(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x80);
+ i2c_write(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ break;
+ case MUX_TYPE_TDM:
+ i2c_read(I2C_PCA9557_ADDR2, 0, 1, &tmp, 1);
+ setbits_8(&tmp, 0x82);
+ i2c_write(I2C_PCA9557_ADDR2, 1, 1, &tmp, 1);
+ i2c_read(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x82);
+ i2c_write(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ break;
+ case MUX_TYPE_CAN:
+ i2c_read(I2C_PCA9557_ADDR2, 0, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x02);
+ i2c_write(I2C_PCA9557_ADDR2, 1, 1, &tmp, 1);
+ i2c_read(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x02);
+ i2c_write(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ break;
+ case MUX_TYPE_CS0_NOR:
+ i2c_read(I2C_PCA9557_ADDR2, 0, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x08);
+ i2c_write(I2C_PCA9557_ADDR2, 1, 1, &tmp, 1);
+ i2c_read(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x08);
+ i2c_write(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ break;
+ case MUX_TYPE_CS0_NAND:
+ i2c_read(I2C_PCA9557_ADDR2, 0, 1, &tmp, 1);
+ setbits_8(&tmp, 0x08);
+ i2c_write(I2C_PCA9557_ADDR2, 1, 1, &tmp, 1);
+ i2c_read(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ clrbits_8(&tmp, 0x08);
+ i2c_write(I2C_PCA9557_ADDR2, 3, 1, &tmp, 1);
+ break;
+ default:
+ break;
+ }
+ i2c_set_bus_num(orig_bus);
+#endif
+ return 0;
+}
+
+#ifdef CONFIG_P1010RDB_PB
+int i2c_pca9557_read(int type)
+{
+ u8 val;
+
+ i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
+ i2c_read(I2C_PCA9557_ADDR2, 0, 1, &val, 1);
+
+ switch (type) {
+ case I2C_READ_BANK:
+ val = (val & 0x10) >> 4;
+ break;
+ case I2C_READ_PCB_VER:
+ val = ((val & 0x60) >> 5) + 1;
+ break;
+ default:
+ break;
+ }
+
+ return val;
+}
+#endif
+
int checkboard(void)
{
struct cpu_type *cpu;
+ struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
+ u8 val;
cpu = gd->arch.cpu;
- printf("Board: %sRDB\n", cpu->name);
+#if defined(CONFIG_P1010RDB_PA)
+ printf("Board: %sRDB-PA, ", cpu->name);
+#elif defined(CONFIG_P1010RDB_PB)
+ printf("Board: %sRDB-PB, ", cpu->name);
+ i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
+ i2c_init(CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_FSL_I2C_SLAVE);
+ val = 0x0; /* no polarity inversion */
+ i2c_write(I2C_PCA9557_ADDR2, 2, 1, &val, 1);
+#endif
+#ifdef CONFIG_SDCARD
+ /* switch to IFC to read info from CPLD */
+ config_board_mux(MUX_TYPE_IFC);
+#endif
+
+#if defined(CONFIG_P1010RDB_PA)
+ val = (in_8(&cpld_data->pcba_ver) & 0xf);
+ printf("PCB: v%x.0\n", val);
+#elif defined(CONFIG_P1010RDB_PB)
+ val = in_8(&cpld_data->cpld_ver);
+ printf("CPLD: v%x.%x, ", val >> 4, val & 0xf);
+ printf("PCB: v%x.0, ", i2c_pca9557_read(I2C_READ_PCB_VER));
+ val = in_8(&cpld_data->rom_loc) & 0xf;
+ puts("Boot from: ");
+ switch (val) {
+ case 0xf:
+ config_board_mux(MUX_TYPE_CS0_NOR);
+ printf("NOR vBank%d\n", i2c_pca9557_read(I2C_READ_BANK));
+ break;
+ case 0xe:
+ puts("SDHC\n");
+ val = 0x60; /* set pca9557 pin input/output */
+ i2c_write(I2C_PCA9557_ADDR2, 3, 1, &val, 1);
+ break;
+ case 0x5:
+ config_board_mux(MUX_TYPE_IFC);
+ config_board_mux(MUX_TYPE_CS0_NAND);
+ puts("NAND\n");
+ break;
+ case 0x6:
+ config_board_mux(MUX_TYPE_IFC);
+ puts("SPI\n");
+ break;
+ default:
+ puts("unknown\n");
+ break;
+ }
+#endif
return 0;
}
}
}
+void fdt_del_ifc(void *blob)
+{
+ int nodeoff = 0;
+
+ while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
+ "fsl,ifc")) >= 0) {
+ fdt_del_node(blob, nodeoff);
+ }
+}
+
void fdt_disable_uart1(void *blob)
{
int nodeoff;
fdt_del_flexcan(blob);
fdt_del_node_and_alias(blob, "ethernet2");
}
-#ifndef CONFIG_SDCARD
- /* disable sdhc due to sdhc bug */
- fdt_del_sdhc(blob);
+
+ /* Delete IFC node as IFC pins are multiplexing with SDHC */
+ if (sd_ifc_mux != MUX_TYPE_IFC)
+ fdt_del_ifc(blob);
+ else
+ fdt_del_sdhc(blob);
+
if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "can")) {
fdt_del_tdm(blob);
fdt_del_spi_slic(blob);
fdt_del_flexcan(blob);
fdt_disable_uart1(blob);
}
+}
#endif
+
+#ifdef CONFIG_SDCARD
+int board_mmc_init(bd_t *bis)
+{
+ config_board_mux(MUX_TYPE_SDHC);
+ return -1;
+}
+#else
+void board_reset(void)
+{
+ /* mux to IFC to enable CPLD for reset */
+ if (sd_ifc_mux != MUX_TYPE_IFC)
+ config_board_mux(MUX_TYPE_IFC);
}
#endif
-#ifndef CONFIG_SDCARD
+
int misc_init_r(void)
{
- struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "can")) {
MPC85xx_PMUXCR_CAN1_UART |
MPC85xx_PMUXCR_CAN2_TDM |
MPC85xx_PMUXCR_CAN2_UART);
- out_8(&cpld_data->tdm_can_sel, MUX_CPLD_CAN_UART);
+ config_board_mux(MUX_TYPE_CAN);
} else if (hwconfig_subarg_cmp("fsl_p1010mux", "tdm_can", "tdm")) {
clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN2_UART |
MPC85xx_PMUXCR_CAN1_UART);
MPC85xx_PMUXCR_CAN1_TDM);
clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_GPIO);
setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_TDM);
- out_8(&cpld_data->tdm_can_sel, MUX_CPLD_TDM);
- out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_SLIC);
+ config_board_mux(MUX_TYPE_TDM);
} else {
/* defaultly spi_cs_sel to flash */
- out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_FLASH);
+ config_board_mux(MUX_TYPE_SPIFLASH);
}
+ if (hwconfig("esdhc"))
+ config_board_mux(MUX_TYPE_SDHC);
+ else if (hwconfig("ifc"))
+ config_board_mux(MUX_TYPE_IFC);
+
+#ifdef CONFIG_P1010RDB_PB
+ setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_GPIO01_DRVVBUS);
+#endif
return 0;
}
-#endif
+
+static int pin_mux_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ if (argc < 2)
+ return CMD_RET_USAGE;
+ if (strcmp(argv[1], "ifc") == 0)
+ config_board_mux(MUX_TYPE_IFC);
+ else if (strcmp(argv[1], "sdhc") == 0)
+ config_board_mux(MUX_TYPE_SDHC);
+ else
+ return CMD_RET_USAGE;
+ return 0;
+}
+
+U_BOOT_CMD(
+ mux, 2, 0, pin_mux_cmd,
+ "configure multiplexing pin for IFC/SDHC bus in runtime",
+ "bus_type (e.g. mux sdhc)"
+);
0, 1, BOOKE_PAGESZ_1M, 1),
#ifndef CONFIG_SPL_BUILD
-#ifndef CONFIG_SDCARD
SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
0, 2, BOOKE_PAGESZ_16M, 1),
CONFIG_SYS_FLASH_BASE_PHYS + 0x1000000,
MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
0, 3, BOOKE_PAGESZ_16M, 1),
-#endif
#ifdef CONFIG_PCI
/* *I*G* - PCI */
#endif
#endif
-#ifndef CONFIG_SDCARD
/* *I*G - Board CPLD */
SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 7, BOOKE_PAGESZ_1M, 1),
-#endif
#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
ifdef MINIMAL
-COBJS-y += spl_minimal.o tlb.o law.o
+obj-y += spl_minimal.o tlb.o law.o
else
ifdef CONFIG_SPL_BUILD
-COBJS-y += spl.o
+obj-y += spl.o
endif
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
+obj-y += p1022ds.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
-COBJS-$(CONFIG_FSL_DIU_FB) += diu.o
+obj-$(CONFIG_FSL_DIU_FB) += diu.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
u32 clk_adjust; /* Range: 0-8 */
u32 cpo; /* Range: 2-31 */
u32 write_data_delay; /* Range: 0-6 */
- u32 force_2T;
+ u32 force_2t;
};
/*
popts->cpo_override = pbsp->cpo;
popts->write_data_delay =
pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
popts->clk_adjust = pbsp->clk_adjust;
popts->cpo_override = pbsp->cpo;
popts->write_data_delay = pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
} else {
panic("DIMM is not supported by this board");
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += p1023rdb.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1875,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 18000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1875,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 18000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += p1023rds.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-$(CONFIG_PCI) += pci.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += p1_p2_rdb.o
+obj-y += ddr.o
+obj-y += law.o
+obj-$(CONFIG_PCI) += pci.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
MINIMAL=
ifdef CONFIG_SPL_BUILD
ifdef MINIMAL
-COBJS-y += spl_minimal.o tlb.o law.o
+obj-y += spl_minimal.o tlb.o law.o
else
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
endif
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
+obj-y += p1_p2_rdb_pc.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+endif
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1870,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1870,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
#elif defined(CONFIG_P2020RDB)
/* Micron MT41J128M16_15E */
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1500,
- .caslat_X = 0x7e << 4, /* 5,6,7,8,9,10 */
- .tAA_ps = 13500,
- .tWR_ps = 15000,
- .tRCD_ps = 13500,
- .tRRD_ps = 6000,
- .tRP_ps = 13500,
- .tRAS_ps = 36000,
- .tRC_ps = 49500,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1500,
+ .caslat_x = 0x7e << 4, /* 5,6,7,8,9,10 */
+ .taa_ps = 13500,
+ .twr_ps = 15000,
+ .trcd_ps = 13500,
+ .trrd_ps = 6000,
+ .trp_ps = 13500,
+ .tras_ps = 36000,
+ .trc_ps = 49500,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 30000,
+ .tfaw_ps = 30000,
};
#elif (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
/* Micron MT41J512M8_187E */
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1870,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1870,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
#elif defined(CONFIG_P1020RDB_PC)
/*
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1875,
- .caslat_X = 0x1e << 4, /* 5,6,7,8 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 7500,
- .tRP_ps = 13125,
- .tRAS_ps = 37500,
- .tRC_ps = 50625,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1875,
+ .caslat_x = 0x1e << 4, /* 5,6,7,8 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 7500,
+ .trp_ps = 13125,
+ .tras_ps = 37500,
+ .trc_ps = 50625,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 37500,
+ .tfaw_ps = 37500,
};
#elif defined(CONFIG_P1024RDB) || \
defined(CONFIG_P1025RDB)
.edc_config = 0,
.burst_lengths_bitmask = 0x0c,
- .tCKmin_X_ps = 1500,
- .caslat_X = 0x3e << 4, /* 5,6,7,8,9 */
- .tAA_ps = 13125,
- .tWR_ps = 15000,
- .tRCD_ps = 13125,
- .tRRD_ps = 6000,
- .tRP_ps = 13125,
- .tRAS_ps = 36000,
- .tRC_ps = 49125,
- .tRFC_ps = 160000,
- .tWTR_ps = 7500,
- .tRTP_ps = 7500,
+ .tckmin_x_ps = 1500,
+ .caslat_x = 0x3e << 4, /* 5,6,7,8,9 */
+ .taa_ps = 13125,
+ .twr_ps = 15000,
+ .trcd_ps = 13125,
+ .trrd_ps = 6000,
+ .trp_ps = 13125,
+ .tras_ps = 36000,
+ .trc_ps = 49125,
+ .trfc_ps = 160000,
+ .twtr_ps = 7500,
+ .trtp_ps = 7500,
.refresh_rate_ps = 7800000,
- .tFAW_ps = 30000,
+ .tfaw_ps = 30000,
};
#else
#error Missing raw timing data for this board
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <ns16550.h>
+#include <malloc.h>
+#include <mmc.h>
+#include <nand.h>
+#include <i2c.h>
+#include <fsl_esdhc.h>
+#include <spi_flash.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const u32 sysclk_tbl[] = {
+ 66666000, 7499900, 83332500, 8999900,
+ 99999000, 11111000, 12499800, 13333200
+};
+
+ulong get_effective_memsize(void)
+{
+ return CONFIG_SYS_L2_SIZE;
+}
+
+void board_init_f(ulong bootflag)
+{
+ u32 plat_ratio, bus_clk;
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+ console_init_f();
+
+ /* Set pmuxcr to allow both i2c1 and i2c2 */
+ setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
+ setbits_be32(&gur->pmuxcr,
+ in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
+
+ /* Read back the register to synchronize the write. */
+ in_be32(&gur->pmuxcr);
+
+#ifdef CONFIG_SPL_SPI_BOOT
+ clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA);
+#endif
+
+ /* initialize selected port with appropriate baud rate */
+ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
+ plat_ratio >>= 1;
+ bus_clk = CONFIG_SYS_CLK_FREQ * plat_ratio;
+ gd->bus_clk = bus_clk;
+
+ NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
+ bus_clk / 16 / CONFIG_BAUDRATE);
+#ifdef CONFIG_SPL_MMC_BOOT
+ puts("\nSD boot...\n");
+#elif defined(CONFIG_SPL_SPI_BOOT)
+ puts("\nSPI Flash boot...\n");
+#endif
+
+ /* copy code to RAM and jump to it - this should not return */
+ /* NOTE - code has to be copied out of NAND buffer before
+ * other blocks can be read.
+ */
+ relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
+}
+
+void board_init_r(gd_t *gd, ulong dest_addr)
+{
+ /* Pointer is writable since we allocated a register for it */
+ gd = (gd_t *)CONFIG_SPL_GD_ADDR;
+ bd_t *bd;
+
+ memset(gd, 0, sizeof(gd_t));
+ bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
+ memset(bd, 0, sizeof(bd_t));
+ gd->bd = bd;
+ bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
+ bd->bi_memsize = CONFIG_SYS_L2_SIZE;
+
+ probecpu();
+ get_clocks();
+ mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
+ CONFIG_SPL_RELOC_MALLOC_SIZE);
+
+#ifndef CONFIG_SPL_NAND_BOOT
+ env_init();
+#endif
+#ifdef CONFIG_SPL_MMC_BOOT
+ mmc_initialize(bd);
+#endif
+ /* relocate environment function pointers etc. */
+#ifdef CONFIG_SPL_NAND_BOOT
+ nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_ENV_ADDR);
+ gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
+ gd->env_valid = 1;
+#else
+ env_relocate();
+#endif
+
+#ifdef CONFIG_SYS_I2C
+ i2c_init_all();
+#else
+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
+
+ gd->ram_size = initdram(0);
+#ifdef CONFIG_SPL_NAND_BOOT
+ puts("Tertiary program loader running in sram...");
+#else
+ puts("Second program loader running in sram...\n");
+#endif
+
+#ifdef CONFIG_SPL_MMC_BOOT
+ mmc_boot();
+#elif defined(CONFIG_SPL_SPI_BOOT)
+ spi_boot();
+#elif defined(CONFIG_SPL_NAND_BOOT)
+ nand_boot();
+#endif
+}
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_SYS_INIT_L2_ADDR
-/*
- * Fixed sdram init -- doesn't use serial presence detect.
- */
-static void sdram_init(void)
-{
- ccsr_ddr_t *ddr = (ccsr_ddr_t *)CONFIG_SYS_MPC8xxx_DDR_ADDR;
-
- __raw_writel(CONFIG_SYS_DDR_CS0_BNDS, &ddr->cs0_bnds);
- __raw_writel(CONFIG_SYS_DDR_CS0_CONFIG, &ddr->cs0_config);
-#if CONFIG_CHIP_SELECTS_PER_CTRL > 1
- __raw_writel(CONFIG_SYS_DDR_CS1_BNDS, &ddr->cs1_bnds);
- __raw_writel(CONFIG_SYS_DDR_CS1_CONFIG, &ddr->cs1_config);
-#endif
- __raw_writel(CONFIG_SYS_DDR_TIMING_3, &ddr->timing_cfg_3);
- __raw_writel(CONFIG_SYS_DDR_TIMING_0, &ddr->timing_cfg_0);
- __raw_writel(CONFIG_SYS_DDR_TIMING_1, &ddr->timing_cfg_1);
- __raw_writel(CONFIG_SYS_DDR_TIMING_2, &ddr->timing_cfg_2);
-
- __raw_writel(CONFIG_SYS_DDR_CONTROL_2, &ddr->sdram_cfg_2);
- __raw_writel(CONFIG_SYS_DDR_MODE_1, &ddr->sdram_mode);
- __raw_writel(CONFIG_SYS_DDR_MODE_2, &ddr->sdram_mode_2);
-
- __raw_writel(CONFIG_SYS_DDR_INTERVAL, &ddr->sdram_interval);
- __raw_writel(CONFIG_SYS_DDR_DATA_INIT, &ddr->sdram_data_init);
- __raw_writel(CONFIG_SYS_DDR_CLK_CTRL, &ddr->sdram_clk_cntl);
-
- __raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4);
- __raw_writel(CONFIG_SYS_DDR_TIMING_5, &ddr->timing_cfg_5);
- __raw_writel(CONFIG_SYS_DDR_ZQ_CONTROL, &ddr->ddr_zq_cntl);
- __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL, &ddr->ddr_wrlvl_cntl);
-
- /* Set, but do not enable the memory */
- __raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN, &ddr->sdram_cfg);
-
- asm volatile("sync;isync");
- udelay(500);
-
- /* Let the controller go */
- out_be32(&ddr->sdram_cfg, in_be32(&ddr->sdram_cfg) | SDRAM_CFG_MEM_EN);
-
- set_next_law(0, CONFIG_SYS_SDRAM_SIZE_LAW, LAW_TRGT_IF_DDR_1);
-}
-#endif
-
void board_init_f(ulong bootflag)
{
u32 plat_ratio;
ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
-#ifndef CONFIG_QE
- ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
-#elif defined(CONFIG_P1021RDB)
- par_io_t *par_io = (par_io_t *)&(gur->qe_par_io);
+
+#if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM)
+ set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM);
+ set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM);
#endif
/* initialize selected port with appropriate baud rate */
puts("\nNAND boot... ");
-#ifndef CONFIG_QE
- /* init DDR3 reset signal */
- __raw_writel(0x02000000, &pgpio->gpdir);
- __raw_writel(0x00200000, &pgpio->gpodr);
- __raw_writel(0x00000000, &pgpio->gpdat);
- udelay(1000);
- __raw_writel(0x00200000, &pgpio->gpdat);
- udelay(1000);
- __raw_writel(0x00000000, &pgpio->gpdir);
-#elif defined(CONFIG_P1021RDB)
- /* init DDR3 reset signal CE_PB8 */
- out_be32(&par_io[1].cpdir1, 0x00004000);
- out_be32(&par_io[1].cpodr, 0x00800000);
- out_be32(&par_io[1].cppar1, 0x00000000);
- /* reset DDR3 */
- out_be32(&par_io[1].cpdat, 0x00800000);
- udelay(1000);
- out_be32(&par_io[1].cpdat, 0x00000000);
- udelay(1000);
- out_be32(&par_io[1].cpdat, 0x00800000);
- /* disable the CE_PB8 */
- out_be32(&par_io[1].cpdir1, 0x00000000);
-#endif
-
-#ifndef CONFIG_SYS_INIT_L2_ADDR
- /* Initialize the DDR3 */
- sdram_init();
-#endif
-
/* copy code to RAM and jump to it - this should not return */
/* NOTE - code has to be copied out of NAND buffer before
* other blocks can be read.
void board_init_r(gd_t *gd, ulong dest_addr)
{
+ puts("\nSecond program loader running in sram...");
nand_boot();
}
0, 7, BOOKE_PAGESZ_1M, 1),
#endif
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)
-#ifdef CONFIG_SYS_INIT_L2_ADDR
- /* L2SRAM */
- SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 8, BOOKE_PAGESZ_256K, 1),
- SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
- CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 12, BOOKE_PAGESZ_256K, 1),
-#else
+#if defined(CONFIG_SYS_RAMBOOT) || \
+ (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
/* *I*G - eSDHC/eSPI/NAND boot */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 9, BOOKE_PAGESZ_1G, 1),
#endif /* P1020MBG */
-#endif /* not L2 SRAM */
#endif /* RAMBOOT/SPL */
+
+#ifdef CONFIG_SYS_INIT_L2_ADDR
+ /* *I*G - L2SRAM */
+ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G,
+ 0, 11, BOOKE_PAGESZ_256K, 1),
+#if CONFIG_SYS_L2_SIZE >= (256 << 10)
+ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000,
+ CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 12, BOOKE_PAGESZ_256K, 1)
+#endif
+#endif
};
int num_tlb_entries = ARRAY_SIZE(tlb_table);
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += p1_twr.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += p2020come.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += p2020ds.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
u32 clk_adjust;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
popts->cpo_override = pbsp->cpo;
popts->write_data_delay =
pbsp->write_data_delay;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->cpo_override = pbsp_highest->cpo;
popts->write_data_delay = pbsp_highest->write_data_delay;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += cpld.o
-COBJS-y += ddr.o
-COBJS-y += eth.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += p2041rdb.o
+obj-y += cpld.o
+obj-y += ddr.o
+obj-y += eth.o
u32 wrlvl_start;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
pbsp->write_data_delay;
popts->clk_adjust = pbsp->clk_adjust;
popts->wrlvl_start = pbsp->wrlvl_start;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
popts->write_data_delay = pbsp_highest->write_data_delay;
popts->clk_adjust = pbsp_highest->clk_adjust;
popts->wrlvl_start = pbsp_highest->wrlvl_start;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
}
}
-static const char *serdes_clock_to_string(u32 clock)
-{
- switch (clock) {
- case SRDS_PLLCR0_RFCK_SEL_100:
- return "100";
- case SRDS_PLLCR0_RFCK_SEL_125:
- return "125";
- case SRDS_PLLCR0_RFCK_SEL_156_25:
- return "156.25";
- default:
- return "150";
- }
-}
-
#define NUM_SRDS_BANKS 2
int misc_init_r(void)
--- /dev/null
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += $(BOARD).o
+obj-y += ddr.o
+obj-$(CONFIG_PCI) += pci.o
+obj-y += law.o
+obj-y += tlb.o
--- /dev/null
+Overview
+--------
+The T1040QDS is a Freescale reference board that hosts the T1040 SoC
+(and variants).
+
+T1040 SoC Overview
+------------------
+The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
+processor cores with high-performance data path acceleration architecture
+and network peripheral interfaces required for networking & telecommunications.
+
+The T1040/T1042 SoC includes the following function and features:
+
+ - Four e5500 cores, each with a private 256 KB L2 cache
+ - 256 KB shared L3 CoreNet platform cache (CPC)
+ - Interconnect CoreNet platform
+ - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
+ support
+ - Data Path Acceleration Architecture (DPAA) incorporating acceleration
+ for the following functions:
+ - Packet parsing, classification, and distribution
+ - Queue management for scheduling, packet sequencing, and congestion
+ management
+ - Cryptography Acceleration (SEC 5.0)
+ - RegEx Pattern Matching Acceleration (PME 2.2)
+ - IEEE Std 1588 support
+ - Hardware buffer management for buffer allocation and deallocation
+ - Ethernet interfaces
+ - Integrated 8-port Gigabit Ethernet switch (T1040 only)
+ - Four 1 Gbps Ethernet controllers
+ - Two RGMII interfaces or one RGMII and one MII interfaces
+ - High speed peripheral interfaces
+ - Four PCI Express 2.0 controllers running at up to 5 GHz
+ - Two SATA controllers supporting 1.5 and 3.0 Gb/s operation
+ - Upto two QSGMII interface
+ - Upto six SGMII interface supporting 1000 Mbps
+ - One SGMII interface supporting upto 2500 Mbps
+ - Additional peripheral interfaces
+ - Two USB 2.0 controllers with integrated PHY
+ - SD/eSDHC/eMMC
+ - eSPI controller
+ - Four I2C controllers
+ - Four UARTs
+ - Four GPIO controllers
+ - Integrated flash controller (IFC)
+ - LCD and HDMI interface (DIU) with 12 bit dual data rate
+ - TDM interface
+ - Multicore programmable interrupt controller (PIC)
+ - Two 8-channel DMA engines
+ - Single source clocking implementation
+ - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
+
+ T1040QDS board Overview
+ -----------------------
+ - SERDES Connections, 8 lanes supporting:
+ — PCI Express: supporting Gen 1 and Gen 2;
+ — SGMII
+ — QSGMII
+ — SATA 2.0
+ — Aurora debug with dedicated connectors (T1040 only)
+ - DDR Controller
+ - Supports rates of up to 1600 MHz data-rate
+ - Supports one DDR3LP UDIMM/RDIMMs, of single-, dual- or quad-rank types.
+ -IFC/Local Bus
+ - NAND flash: 8-bit, async, up to 2GB.
+ - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
+ - GASIC: Simple (minimal) target within Qixis FPGA
+ - PromJET rapid memory download support
+ - Ethernet
+ - Two on-board RGMII 10/100/1G ethernet ports.
+ - PHY #0 remains powered up during deep-sleep (T1040 only)
+ - QIXIS System Logic FPGA
+ - Clocks
+ - System and DDR clock (SYSCLK, “DDRCLK”)
+ - SERDES clocks
+ - Power Supplies
+ - Video
+ - DIU supports video at up to 1280x1024x32bpp
+ - USB
+ - Supports two USB 2.0 ports with integrated PHYs
+ — Two type A ports with 5V@1.5A per port.
+ — Second port can be converted to OTG mini-AB
+ - SDHC
+ - SDHC port connects directly to an adapter card slot, featuring:
+ - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
+ — Supporting eMMC memory devices
+ - SPI
+ - On-board support of 3 different devices and sizes
+ - Other IO
+ - Two Serial ports
+ - ProfiBus port
+ - Four I2C ports
+
+Memory map on T1040QDS
+----------------------
+The addresses in brackets are physical addresses.
+
+Start Address End Address Description Size
+0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
+0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
+0xF_FE00_0000 0xF_FEFF_FFFF CCSRBAR 16MB
+0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
+0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
+0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
+0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
+0xF_F600_0000 0xF_F7FF_FFFF Queue manager software portal 32MB
+0xF_F400_0000 0xF_F5FF_FFFF Buffer manager software portal 32MB
+0xF_E800_0000 0xF_EFFF_FFFF IFC - NOR Flash 128MB
+0xF_E000_0000 0xF_E7FF_FFFF Promjet 128MB
+0xF_0000_0000 0xF_003F_FFFF DCSR 4MB
+0xC_3000_0000 0xC_3FFF_FFFF PCI Express 4 Mem Space 256MB
+0xC_2000_0000 0xC_2FFF_FFFF PCI Express 3 Mem Space 256MB
+0xC_1000_0000 0xC_1FFF_FFFF PCI Express 2 Mem Space 256MB
+0xC_0000_0000 0xC_0FFF_FFFF PCI Express 1 Mem Space 256MB
+0x0_0000_0000 0x0_ffff_ffff DDR 2GB
+
+
+NOR Flash memory Map on T1040QDS
+--------------------------------
+ Start End Definition Size
+0xEFF80000 0xEFFFFFFF u-boot (current bank) 512KB
+0xEFF60000 0xEFF7FFFF u-boot env (current bank) 128KB
+0xEFF40000 0xEFF5FFFF FMAN Ucode (current bank) 128KB
+0xED300000 0xEFF3FFFF rootfs (alt bank) 44MB + 256KB
+0xEC800000 0xEC8FFFF Hardware device tree (alt bank) 1MB
+0xEC020000 0xEC7FFFFF Linux.uImage (alt bank) 7MB + 875KB
+0xEC000000 0xEC01FFFF RCW (alt bank) 128KB
+0xEBF80000 0xEBFFFFFF u-boot (alt bank) 512KB
+0xEBF60000 0xEBF7FFFF u-boot env (alt bank) 128KB
+0xEBF40000 0xEBF5FFFF FMAN ucode (alt bank) 128KB
+0xE9300000 0xEBF3FFFF rootfs (current bank) 44MB + 256KB
+0xE8800000 0xE88FFFFF Hardware device tree (cur bank) 11MB + 512KB
+0xE8020000 0xE86FFFFF Linux.uImage (current bank) 7MB + 875KB
+0xE8000000 0xE801FFFF RCW (current bank) 128KB
+
+
+Various Software configurations/environment variables/commands
+--------------------------------------------------------------
+The below commands apply to T1040QDS
+
+1. U-boot environment variable hwconfig
+ The default hwconfig is:
+ hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;usb1:
+ dr_mode=host,phy_type=utmi
+ Note: For USB gadget set "dr_mode=peripheral"
+
+2. FMAN Ucode versions
+ fsl_fman_ucode_t1040.bin
+
+3. Switching to alternate bank
+ Commands for switching to alternate bank.
+
+ 1. To change from vbank0 to vbank4
+ => qixis_reset altbank (it will boot using vbank4)
+
+ 2.To change from vbank4 to vbank0
+ => qixis reset (it will boot using vbank0)
+
+T1040 Personality
+--------------------
+
+T1022 Personality
+--------------------
+T1022 is a reduced personality of T1040 with less core/clusters.
+
+T1042 Personality
+--------------------
+T1042 is a reduced personality of T1040 without Integrated 8-port Gigabit
+Ethernet switch. Rest of the blocks are same as T1040
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <hwconfig.h>
+#include <asm/mmu.h>
+#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
+#include <asm/fsl_law.h>
+#include "ddr.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void fsl_ddr_board_options(memctl_options_t *popts,
+ dimm_params_t *pdimm,
+ unsigned int ctrl_num)
+{
+ const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
+ ulong ddr_freq;
+
+ if (ctrl_num > 2) {
+ printf("Not supported controller number %d\n", ctrl_num);
+ return;
+ }
+ if (!pdimm->n_ranks)
+ return;
+
+ pbsp = udimms[0];
+
+ /* Get clk_adjust, cpo, write_data_delay,2t, according to the board ddr
+ * freqency and n_banks specified in board_specific_parameters table.
+ */
+ ddr_freq = get_ddr_freq(0) / 1000000;
+ while (pbsp->datarate_mhz_high) {
+ if (pbsp->n_ranks == pdimm->n_ranks &&
+ (pdimm->rank_density >> 30) >= pbsp->rank_gb) {
+ if (ddr_freq <= pbsp->datarate_mhz_high) {
+ popts->cpo_override = pbsp->cpo;
+ popts->write_data_delay =
+ pbsp->write_data_delay;
+ popts->clk_adjust = pbsp->clk_adjust;
+ popts->wrlvl_start = pbsp->wrlvl_start;
+ popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
+ popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
+ popts->twot_en = pbsp->force_2t;
+ goto found;
+ }
+ pbsp_highest = pbsp;
+ }
+ pbsp++;
+ }
+
+ if (pbsp_highest) {
+ printf("Error: board specific timing not found\n");
+ printf("for data rate %lu MT/s\n", ddr_freq);
+ printf("Trying to use the highest speed (%u) parameters\n",
+ pbsp_highest->datarate_mhz_high);
+ popts->cpo_override = pbsp_highest->cpo;
+ popts->write_data_delay = pbsp_highest->write_data_delay;
+ popts->clk_adjust = pbsp_highest->clk_adjust;
+ popts->wrlvl_start = pbsp_highest->wrlvl_start;
+ popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
+ popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
+ popts->twot_en = pbsp_highest->force_2t;
+ } else {
+ panic("DIMM is not supported by this board");
+ }
+found:
+ debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n"
+ "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, "
+ "wrlvl_ctrl_3 0x%x\n",
+ pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb,
+ pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2,
+ pbsp->wrlvl_ctl_3);
+
+ /*
+ * Factors to consider for half-strength driver enable:
+ * - number of DIMMs installed
+ */
+ popts->half_strength_driver_enable = 0;
+ /*
+ * Write leveling override
+ */
+ popts->wrlvl_override = 1;
+ popts->wrlvl_sample = 0xf;
+
+ /*
+ * rtt and rtt_wr override
+ */
+ popts->rtt_override = 0;
+
+ /* Enable ZQ calibration */
+ popts->zq_en = 1;
+
+ /* DHC_EN =1, ODT = 75 Ohm */
+ popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
+ popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+}
+
+phys_size_t initdram(int board_type)
+{
+ phys_size_t dram_size;
+
+ puts("Initializing....using SPD\n");
+
+ dram_size = fsl_ddr_sdram();
+
+ dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+ dram_size *= 0x100000;
+
+ puts(" DDR: ");
+ return dram_size;
+}
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DDR_H__
+#define __DDR_H__
+struct board_specific_parameters {
+ u32 n_ranks;
+ u32 datarate_mhz_high;
+ u32 rank_gb;
+ u32 clk_adjust;
+ u32 wrlvl_start;
+ u32 wrlvl_ctl_2;
+ u32 wrlvl_ctl_3;
+ u32 cpo;
+ u32 write_data_delay;
+ u32 force_2t;
+};
+
+/*
+ * These tables contain all valid speeds we want to override with board
+ * specific parameters. datarate_mhz_high values need to be in ascending order
+ * for each n_ranks group.
+ */
+
+static const struct board_specific_parameters udimm0[] = {
+ /*
+ * memory controller 0
+ * num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T
+ * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay |
+ */
+ {2, 1350, 4, 4, 8, 0x0809090b, 0x0c0c0d0a, 0xff, 2, 0},
+ {2, 1350, 0, 5, 7, 0x0709090b, 0x0c0c0d09, 0xff, 2, 0},
+ {2, 1666, 4, 4, 8, 0x080a0a0d, 0x0d10100b, 0xff, 2, 0},
+ {2, 1666, 0, 5, 7, 0x080a0a0c, 0x0d0d0e0a, 0xff, 2, 0},
+ {2, 1900, 0, 4, 8, 0x090a0b0e, 0x0f11120c, 0xff, 2, 0},
+ {2, 2140, 0, 4, 8, 0x090a0b0e, 0x0f11120c, 0xff, 2, 0},
+ {1, 1350, 0, 5, 8, 0x0809090b, 0x0c0c0d0a, 0xff, 2, 0},
+ {1, 1700, 0, 5, 8, 0x080a0a0c, 0x0c0d0e0a, 0xff, 2, 0},
+ {1, 1900, 0, 4, 8, 0x080a0a0c, 0x0e0e0f0a, 0xff, 2, 0},
+ {1, 2140, 0, 4, 8, 0x090a0b0c, 0x0e0f100b, 0xff, 2, 0},
+ {}
+};
+
+static const struct board_specific_parameters *udimms[] = {
+ udimm0,
+};
+#endif
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/fsl_law.h>
+#include <asm/mmu.h>
+
+struct law_entry law_table[] = {
+#ifndef CONFIG_SYS_NO_FLASH
+ SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
+#endif
+#ifdef CONFIG_SYS_BMAN_MEM_PHYS
+ SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN),
+#endif
+#ifdef CONFIG_SYS_QMAN_MEM_PHYS
+ SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
+#endif
+#ifdef QIXIS_BASE_PHYS
+ SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
+#endif
+#ifdef CONFIG_SYS_DCSRBAR_PHYS
+ SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
+#endif
+#ifdef CONFIG_SYS_NAND_BASE_PHYS
+ SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
+#endif
+};
+
+int num_law_entries = ARRAY_SIZE(law_table);
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <pci.h>
+#include <asm/fsl_pci.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+#include <asm/fsl_serdes.h>
+
+void pci_init_board(void)
+{
+ fsl_pcie_init_board(0);
+}
+
+void pci_of_setup(void *blob, bd_t *bd)
+{
+ FT_FSL_PCI_SETUP;
+}
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <i2c.h>
+#include <netdev.h>
+#include <linux/compiler.h>
+#include <asm/mmu.h>
+#include <asm/processor.h>
+#include <asm/cache.h>
+#include <asm/immap_85xx.h>
+#include <asm/fsl_law.h>
+#include <asm/fsl_serdes.h>
+#include <asm/fsl_portals.h>
+#include <asm/fsl_liodn.h>
+#include <fm_eth.h>
+
+#include "../common/qixis.h"
+#include "t1040qds.h"
+#include "t1040qds_qixis.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ char buf[64];
+ u8 sw;
+ struct cpu_type *cpu = gd->arch.cpu;
+ static const char *const freq[] = {"100", "125", "156.25", "161.13",
+ "122.88", "122.88", "122.88"};
+ int clock;
+
+ printf("Board: %sQDS, ", cpu->name);
+ printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, ",
+ QIXIS_READ(id), QIXIS_READ(arch));
+
+ sw = QIXIS_READ(brdcfg[0]);
+ sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT;
+
+ if (sw < 0x8)
+ printf("vBank: %d\n", sw);
+ else if (sw == 0x8)
+ puts("PromJet\n");
+ else if (sw == 0x9)
+ puts("NAND\n");
+ else if (sw == 0x15)
+ printf("IFCCard\n");
+ else
+ printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH);
+
+ printf("FPGA: v%d (%s), build %d",
+ (int)QIXIS_READ(scver), qixis_read_tag(buf),
+ (int)qixis_read_minor());
+ /* the timestamp string contains "\n" at the end */
+ printf(" on %s", qixis_read_time(buf));
+
+ /*
+ * Display the actual SERDES reference clocks as configured by the
+ * dip switches on the board. Note that the SWx registers could
+ * technically be set to force the reference clocks to match the
+ * values that the SERDES expects (or vice versa). For now, however,
+ * we just display both values and hope the user notices when they
+ * don't match.
+ */
+ puts("SERDES Reference: ");
+ sw = QIXIS_READ(brdcfg[2]);
+ clock = (sw >> 6) & 3;
+ printf("Clock1=%sMHz ", freq[clock]);
+ clock = (sw >> 4) & 3;
+ printf("Clock2=%sMHz\n", freq[clock]);
+
+ return 0;
+}
+
+int select_i2c_ch_pca9547(u8 ch)
+{
+ int ret;
+
+ ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+ if (ret) {
+ puts("PCA: failed to select proper channel\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+int board_early_init_r(void)
+{
+#ifdef CONFIG_SYS_FLASH_BASE
+ const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
+ const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+
+ /*
+ * Remap Boot flash + PROMJET region to caching-inhibited
+ * so that flash can be erased properly.
+ */
+
+ /* Flush d-cache and invalidate i-cache of any FLASH data */
+ flush_dcache();
+ invalidate_icache();
+
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+
+ set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, flash_esel, BOOKE_PAGESZ_256M, 1);
+#endif
+ set_liodns();
+#ifdef CONFIG_SYS_DPAA_QBMAN
+ setup_portals();
+#endif
+ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+
+ return 0;
+}
+
+unsigned long get_board_sys_clk(void)
+{
+ u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
+
+ switch (sysclk_conf & 0x0F) {
+ case QIXIS_SYSCLK_64:
+ return 64000000;
+ case QIXIS_SYSCLK_83:
+ return 83333333;
+ case QIXIS_SYSCLK_100:
+ return 100000000;
+ case QIXIS_SYSCLK_125:
+ return 125000000;
+ case QIXIS_SYSCLK_133:
+ return 133333333;
+ case QIXIS_SYSCLK_150:
+ return 150000000;
+ case QIXIS_SYSCLK_160:
+ return 160000000;
+ case QIXIS_SYSCLK_166:
+ return 166666666;
+ }
+ return 66666666;
+}
+
+unsigned long get_board_ddr_clk(void)
+{
+ u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
+
+ switch ((ddrclk_conf & 0x30) >> 4) {
+ case QIXIS_DDRCLK_100:
+ return 100000000;
+ case QIXIS_DDRCLK_125:
+ return 125000000;
+ case QIXIS_DDRCLK_133:
+ return 133333333;
+ }
+ return 66666666;
+}
+
+#define NUM_SRDS_BANKS 2
+int misc_init_r(void)
+{
+ u8 sw;
+ serdes_corenet_t *srds_regs =
+ (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+ u32 actual[NUM_SRDS_BANKS] = { 0 };
+ int i;
+
+ sw = QIXIS_READ(brdcfg[2]);
+ for (i = 0; i < NUM_SRDS_BANKS; i++) {
+ unsigned int clock = (sw >> (6 - 2 * i)) & 3;
+ switch (clock) {
+ case 0:
+ actual[i] = SRDS_PLLCR0_RFCK_SEL_100;
+ break;
+ case 1:
+ actual[i] = SRDS_PLLCR0_RFCK_SEL_125;
+ break;
+ case 2:
+ actual[i] = SRDS_PLLCR0_RFCK_SEL_156_25;
+ break;
+ }
+ }
+
+ puts("SerDes1");
+ for (i = 0; i < NUM_SRDS_BANKS; i++) {
+ u32 pllcr0 = srds_regs->bank[i].pllcr0;
+ u32 expected = pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK;
+ if (expected != actual[i]) {
+ printf("expects ref clk%d %sMHz, but actual is %sMHz\n",
+ i + 1, serdes_clock_to_string(expected),
+ serdes_clock_to_string(actual[i]));
+ }
+ }
+
+ return 0;
+}
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ phys_addr_t base;
+ phys_size_t size;
+
+ ft_cpu_setup(blob, bd);
+
+ base = getenv_bootm_low();
+ size = getenv_bootm_size();
+
+ fdt_fixup_memory(blob, (u64)base, (u64)size);
+
+#ifdef CONFIG_PCI
+ pci_of_setup(blob, bd);
+#endif
+
+ fdt_fixup_liodn(blob);
+
+#ifdef CONFIG_HAS_FSL_DR_USB
+ fdt_fixup_dr_usb(blob, bd);
+#endif
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+ fdt_fixup_fman_ethernet(blob);
+#endif
+}
+
+void qixis_dump_switch(void)
+{
+ int i, nr_of_cfgsw;
+
+ QIXIS_WRITE(cms[0], 0x00);
+ nr_of_cfgsw = QIXIS_READ(cms[1]);
+
+ puts("DIP switch settings dump:\n");
+ for (i = 1; i <= nr_of_cfgsw; i++) {
+ QIXIS_WRITE(cms[0], i);
+ printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1]));
+ }
+}
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __T1040_QDS_H__
+#define __T1040_QDS_H__
+
+void fdt_fixup_board_enet(void *blob);
+void pci_of_setup(void *blob, bd_t *bd);
+
+#endif
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __T1040QDS_QIXIS_H__
+#define __T1040QDS_QIXIS_H__
+
+/* Definitions of QIXIS Registers for T1040QDS */
+
+/* BRDCFG4[4:7]] select EC1 and EC2 as a pair */
+#define BRDCFG4_EMISEL_MASK 0xE0
+#define BRDCFG4_EMISEL_SHIFT 5
+
+/* SYSCLK */
+#define QIXIS_SYSCLK_66 0x0
+#define QIXIS_SYSCLK_83 0x1
+#define QIXIS_SYSCLK_100 0x2
+#define QIXIS_SYSCLK_125 0x3
+#define QIXIS_SYSCLK_133 0x4
+#define QIXIS_SYSCLK_150 0x5
+#define QIXIS_SYSCLK_160 0x6
+#define QIXIS_SYSCLK_166 0x7
+#define QIXIS_SYSCLK_64 0x8
+
+/* DDRCLK */
+#define QIXIS_DDRCLK_66 0x0
+#define QIXIS_DDRCLK_100 0x1
+#define QIXIS_DDRCLK_125 0x2
+#define QIXIS_DDRCLK_133 0x3
+
+
+#define QIXIS_SRDS1CLK_122 0x5a
+#define QIXIS_SRDS1CLK_125 0x5e
+#endif
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/mmu.h>
+
+struct fsl_e_tlb_entry tlb_table[] = {
+ /* TLB 0 - for temp stack in cache */
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 4 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 8 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 12 * 1024,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+
+ /* TLB 1 */
+ /* *I*** - Covers boot page */
+#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR)
+ /*
+ * *I*G - L3SRAM. When L3 is used as 256K SRAM, the address of the
+ * SRAM is at 0xfffc0000, it covered the 0xfffff000.
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L3_ADDR, CONFIG_SYS_INIT_L3_ADDR,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 0, BOOKE_PAGESZ_256K, 1),
+#else
+ SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 0, BOOKE_PAGESZ_4K, 1),
+#endif
+
+ /* *I*G* - CCSRBAR */
+ SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 1, BOOKE_PAGESZ_16M, 1),
+
+ /* *I*G* - Flash, localbus */
+ /* This will be changed to *I*G* after relocation to RAM. */
+ SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_PHYS,
+ MAS3_SX|MAS3_SR, MAS2_W|MAS2_G,
+ 0, 2, BOOKE_PAGESZ_256M, 1),
+
+ /* *I*G* - PCI */
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 3, BOOKE_PAGESZ_1G, 1),
+
+ /* *I*G* - PCI I/O */
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 4, BOOKE_PAGESZ_256K, 1),
+
+ /* Bman/Qman */
+#ifdef CONFIG_SYS_BMAN_MEM_PHYS
+ SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE, CONFIG_SYS_BMAN_MEM_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 5, BOOKE_PAGESZ_16M, 1),
+ SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE + 0x01000000,
+ CONFIG_SYS_BMAN_MEM_PHYS + 0x01000000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 6, BOOKE_PAGESZ_16M, 1),
+#endif
+#ifdef CONFIG_SYS_QMAN_MEM_PHYS
+ SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE, CONFIG_SYS_QMAN_MEM_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ 0, 7, BOOKE_PAGESZ_16M, 1),
+ SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE + 0x01000000,
+ CONFIG_SYS_QMAN_MEM_PHYS + 0x01000000,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 8, BOOKE_PAGESZ_16M, 1),
+#endif
+#ifdef CONFIG_SYS_DCSRBAR_PHYS
+ SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 9, BOOKE_PAGESZ_4M, 1),
+#endif
+#ifdef CONFIG_SYS_NAND_BASE
+ /*
+ * *I*G - NAND
+ * entry 14 and 15 has been used hard coded, they will be disabled
+ * in cpu_init_f, so we use entry 16 for nand.
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 10, BOOKE_PAGESZ_64K, 1),
+#endif
+#ifdef QIXIS_BASE
+ SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 11, BOOKE_PAGESZ_4K, 1),
+#endif
+
+};
+
+int num_tlb_entries = ARRAY_SIZE(tlb_table);
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-$(CONFIG_T4240QDS) += t4240qds.o
-COBJS-$(CONFIG_T4240EMU) += t4240emu.o
-COBJS-y += ddr.o
-COBJS-$(CONFIG_T4240QDS)+= eth.o
-COBJS-$(CONFIG_PCI) += pci.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_T4240QDS) += t4240qds.o
+obj-$(CONFIG_T4240EMU) += t4240emu.o
+obj-y += ddr.o
+obj-$(CONFIG_T4240QDS)+= eth.o
+obj-$(CONFIG_PCI) += pci.o
+obj-y += law.o
+obj-y += tlb.o
popts->wrlvl_start = pbsp->wrlvl_start;
popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
- popts->twoT_en = pbsp->force_2T;
+ popts->twot_en = pbsp->force_2t;
goto found;
}
pbsp_highest = pbsp;
popts->wrlvl_start = pbsp_highest->wrlvl_start;
popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
- popts->twoT_en = pbsp_highest->force_2T;
+ popts->twot_en = pbsp_highest->force_2t;
} else {
panic("DIMM is not supported by this board");
}
u32 wrlvl_ctl_3;
u32 cpo;
u32 write_data_delay;
- u32 force_2T;
+ u32 force_2t;
};
/*
return 66666666;
}
-static const char *serdes_clock_to_string(u32 clock)
-{
- switch (clock) {
- case SRDS_PLLCR0_RFCK_SEL_100:
- return "100";
- case SRDS_PLLCR0_RFCK_SEL_125:
- return "125";
- case SRDS_PLLCR0_RFCK_SEL_156_25:
- return "156.25";
- case SRDS_PLLCR0_RFCK_SEL_161_13:
- return "161.1328125";
- default:
- return "???";
- }
-}
-
int misc_init_r(void)
{
u8 sw;
#PBL preamble and RCW header
aa55aa55 010e0100
#serdes protocol 1_28_6_12
-14180019 0c101916 00000000 00000000
-04383060 30548c00 6c020000 19000000
-00000000 ee0000ee 00000000 000187fc
-00000000 00000000 00000000 00000018
+120c0019 0c101915 00000000 00000000
+04383063 30548c00 6c020000 1d000000
+00000000 ee0000ee 00000000 000307fc
+00000000 00000000 00000000 00000020
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := titanium.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := titanium.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := vf610twr.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mini2440.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mini2440.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o flash.o m88e6060.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := vovpn-gw.o flash.o m88e6060.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o strataflash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = g2000.o strataflash.o
-
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-#flash.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := gr_cpci_ax2000.o
-
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-#flash.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := gr_ep2s60.o
-
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-#flash.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := gr_xc3s_1500.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := grsim.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := grsim_leon2.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := galaxy5200.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-$(CONFIG_NEO) += neo.o
-COBJS-$(CONFIG_IO) += io.o
-COBJS-$(CONFIG_IOCON) += iocon.o
-COBJS-$(CONFIG_DLVISION_10G) += dlvision-10g.o
-
-COBJS := $(BOARD).o $(COBJS-y)
-SOBJS =
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := 405ep.o
+obj-$(CONFIG_NEO) += neo.o
+obj-$(CONFIG_IO) += io.o
+obj-$(CONFIG_IOCON) += iocon.o
+obj-$(CONFIG_DLVISION_10G) += dlvision-10g.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-$(CONFIG_IO64) += io64.o
-
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
-
-COBJS := $(BOARD).o $(COBJS-y)
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := 405ex.o
+obj-$(CONFIG_IO64) += io64.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)board/$(VENDOR)/common)
-endif
-
-LIB = $(obj)lib$(VENDOR).o
-
-COBJS-$(CONFIG_SYS_FPGA_COMMON) += fpga.o
-
-COBJS-$(CONFIG_IO) += miiphybb.o
-COBJS-$(CONFIG_IO64) += miiphybb.o
-COBJS-$(CONFIG_IOCON) += osd.o mclink.o
-COBJS-$(CONFIG_DLVISION_10G) += osd.o
-COBJS-$(CONFIG_CONTROLCENTERD) += dp501.o
-
-COBJS := $(COBJS-y)
-SOBJS =
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_SYS_FPGA_COMMON) += fpga.o
+obj-$(CONFIG_IO) += miiphybb.o
+obj-$(CONFIG_IO64) += miiphybb.o
+obj-$(CONFIG_IOCON) += osd.o mclink.o
+obj-$(CONFIG_DLVISION_10G) += osd.o
+obj-$(CONFIG_CONTROLCENTERD) += dp501.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS =
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = dlvision.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = gdppc440etx.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
-SOBJS := init.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := intip.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
+extra-y += init.o
# any later version.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-# COBJS-y += $(BOARD).o
-COBJS-y += law.o
-COBJS-y += ddr.o
-COBJS-y += tlb.o
-COBJS-y += sdhc_boot.o
-COBJS-$(CONFIG_CONTROLCENTERD) += controlcenterd.o controlcenterd-id.o
-
-COBJS-$(CONFIG_FSL_DIU_FB) += diu.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += law.o
+obj-y += ddr.o
+obj-y += tlb.o
+obj-y += sdhc_boot.o
+obj-$(CONFIG_CONTROLCENTERD) += controlcenterd.o controlcenterd-id.o
+obj-$(CONFIG_FSL_DIU_FB) += diu.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o beeper.o fpga.o ioport.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = gen860t.o flash.o beeper.o fpga.o ioport.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := efikamx.o efikamx-usb.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := efikamx.o efikamx-usb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = genietv.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := gw8260.o flash.o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := gw8260.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+obj-y := h2200.o
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := h2200.o
-
-SRCS := $(COBJS:.o=.c) h2200-header.S
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB) $(obj)h2200-header.bin
+extra-y := h2200-header.bin
$(obj)h2200-header.o: h2200-header.S
$(CC) $(CFLAGS) -c -o $@ $<
$(obj)h2200-header.bin: $(obj)h2200-header.o
$(OBJCOPY) -O binary $< $@
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-COBJS := tt01.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := tt01.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = hermes.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = hidden_dragon.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := highbank.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := highbank.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := mcx.o
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
};
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
}
int ehci_hcd_stop(int index)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o bsp.o eeprom.o fetch.o input.o env.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = hymod.o flash.o bsp.o eeprom.o fetch.o input.o env.o
#ifndef _HYMOD_H_
#define _HYMOD_H_
-#include <linux/config.h>
#ifdef CONFIG_8260
#include <asm/iopin_8260.h>
#endif
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ibf-dsp561.o
-
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := icecube.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := lp8x4x.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := lp8x4x.o
#include <netdev.h>
#include <serial.h>
#include <asm/io.h>
+#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
#endif
#ifdef CONFIG_CMD_USB
-int usb_board_init(void)
+int board_usb_init(int index, enum usb_init_type init)
{
writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
return 0;
}
-void usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum usb_init_type init)
{
- return;
+ return 0;
}
void usb_board_stop(void)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = icu862.o flash.o pcmcia.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = idmr.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ids8247.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ac14xx.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := o2dnt2.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := imx31_phycore.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := imx31_phycore.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += grasshopper.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-SOBJS = lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = incaip.o flash.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o inkadiag.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := inka4x0.o inkadiag.o
-
#
# Author: Grzegorz Bernacki, Semihalf, gjb@semihalf.com
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o cmd_mtc.o
-COBJS-$(CONFIG_VIDEO) += cmd_disp.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := digsy_mtc.o cmd_mtc.o
+obj-$(CONFIG_VIDEO) += cmd_disp.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := iconnect.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := iconnect.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ip04.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ip860.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ipek01.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := iphase4539.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifdef CONFIG_SPL_BUILD
-COBJS := mux.o
+obj-y += mux.o
endif
-COBJS += board.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += board.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := igep00x0.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := igep00x0.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ispan.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ivm.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := jornada.o
-SOBJS := setup.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := jornada.o
+obj-y += setup.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o sdram.o flash.o host_bridge.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = jse.o sdram.o flash.o host_bridge.o
+obj-y += init.o
-
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := jupiter.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := tk71.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := tk71.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifdef CONFIG_SPL_BUILD
-SOBJS := lowlevel_init.o
+obj-y += lowlevel_init.o
endif
-COBJS := tx25.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += tx25.o
#include "common.h"
#include <i2c.h>
-#if !defined(CONFIG_MPC83xx)
-static void i2c_write_start_seq(void);
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
/*
}
#if defined(CONFIG_SYS_I2C_INIT_BOARD)
-#if !defined(CONFIG_MPC83xx)
static void i2c_write_start_seq(void)
{
set_sda(1);
*/
int i2c_make_abort(void)
{
-
-#if defined(CONFIG_HARD_I2C) && !defined(MACH_TYPE_KM_KIRKWOOD)
- immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
- i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
-
- /*
- * disable I2C controller first, otherwhise it thinks we want to
- * talk to the slave port...
- */
- clrbits_8(&i2c->i2c_i2mod, 0x01);
-
- /* Set the PortPins to GPIO */
- setports(1);
-#endif
-
int scl_state = 0;
int sda_state = 0;
int i = 0;
set_sda(1);
get_sda();
-#if defined(CONFIG_HARD_I2C)
- /* Set the PortPins back to use for I2C */
- setports(0);
-#endif
return ret;
}
-#endif
/**
* i2c_init_board - reset i2c bus. When the board is powercycled during a
}
#endif
+#if defined(CONFIG_KM_COMMON_ETH_INIT)
int board_eth_init(bd_t *bis)
{
if (ethernet_present())
return -1;
}
+#endif
/*
* do_setboardid command
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o ../common/common.o ../common/ivm.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := km82xx.o ../common/common.o ../common/ivm.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS += $(BOARD).o ../common/common.o ../common/ivm.o $(BOARD)_i2c.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += km83xx.o ../common/common.o ../common/ivm.o km83xx_i2c.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o ../common/common.o ../common/ivm.o
+obj-y := km_arm.o ../common/common.o ../common/ivm.o
ifdef CONFIG_KM_FPGA_CONFIG
-COBJS += fpga_config.o
+obj-y += fpga_config.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
--- /dev/null
+#
+# (C) Copyright 2001-2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../common)
+endif
+
+obj-y := $(BOARD).o ddr.o eth.o tlb.o pci.o law.o \
+ ../common/common.o ../common/ivm.o
--- /dev/null
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp@keymile.com>
+ *
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <hwconfig.h>
+#include <asm/mmu.h>
+#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
+
+void fsl_ddr_board_options(memctl_options_t *popts,
+ dimm_params_t *pdimm,
+ unsigned int ctrl_num)
+{
+ if (ctrl_num) {
+ printf("Wrong parameter for controller number %d", ctrl_num);
+ return;
+ }
+
+ /* automatic calibration for nb of cycles between read and DQS pre */
+ popts->cpo_override = 0xFF;
+
+ /* 1/2 clk delay between wr command and data strobe */
+ popts->write_data_delay = 4;
+ /* clk lauched 1/2 applied cylcle after address command */
+ popts->clk_adjust = 4;
+ /* 1T timing: command/address held for only 1 cycle */
+ popts->twot_en = 0;
+
+ /* we have only one module, half str should be OK */
+ popts->half_strength_driver_enable = 1;
+
+ /* wrlvl values overriden as recommended by ddr init func */
+ popts->wrlvl_override = 1;
+ popts->wrlvl_sample = 0xf;
+ popts->wrlvl_start = 0x6;
+
+ /* Enable ZQ calibration */
+ popts->zq_en = 1;
+
+ /* DHC_EN =1, ODT = 75 Ohm */
+ popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR_ODT_75ohm;
+}
+
+phys_size_t initdram(int board_type)
+{
+ phys_size_t dram_size = 0;
+
+ puts("Initializing with SPD\n");
+
+ dram_size = fsl_ddr_sdram();
+
+ dram_size = setup_ddr_tlbs(dram_size / 0x100000);
+ dram_size *= 0x100000;
+
+ debug(" DDR: ");
+ return dram_size;
+}
--- /dev/null
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp@keymile.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include <fm_eth.h>
+#include <fsl_mdio.h>
+#include <phy.h>
+
+int board_eth_init(bd_t *bis)
+{
+ int ret = 0;
+#ifdef CONFIG_FMAN_ENET
+ struct fsl_pq_mdio_info dtsec_mdio_info;
+
+ printf("Initializing Fman\n");
+
+ dtsec_mdio_info.regs =
+ (struct tsec_mii_mng *)CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR;
+ dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
+
+ /* Register the real 1G MDIO bus */
+ fsl_pq_mdio_init(bis, &dtsec_mdio_info);
+
+ /* DTESC1/2 don't have a PHY, they are temporarily disabled
+ * so that u-boot doesn't try to unsuccessfuly enable them */
+ fm_disable_port(FM1_DTSEC1);
+ fm_disable_port(FM1_DTSEC2);
+
+ /*
+ * Program RGMII DTSEC5 (FM1 MAC5) on the EC2 physical itf
+ * This is the debug interface, the only one used in u-boot
+ */
+ fm_info_set_phy_address(FM1_DTSEC5, CONFIG_SYS_FM1_DTSEC5_PHY_ADDR);
+ fm_info_set_mdio(FM1_DTSEC5,
+ miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
+
+ ret = cpu_eth_init(bis);
+
+ /* reenable DTSEC1/2 for later (kernel) */
+ fm_enable_port(FM1_DTSEC1);
+ fm_enable_port(FM1_DTSEC2);
+#endif
+
+ return ret;
+}
+
+#if defined(CONFIG_PHYLIB) && defined(CONFIG_PHY_MARVELL)
+
+#define mv88E1118_PAGE_REG 22
+
+int board_phy_config(struct phy_device *phydev)
+{
+ if (phydev->addr == CONFIG_SYS_FM1_DTSEC5_PHY_ADDR) {
+ /* driver config is good */
+ if (phydev->drv->config)
+ phydev->drv->config(phydev);
+
+ /* but we still need to fix the LEDs */
+ phy_write(phydev, MDIO_DEVAD_NONE, mv88E1118_PAGE_REG, 0x0003);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x10, 0x0840);
+ phy_write(phydev, MDIO_DEVAD_NONE, mv88E1118_PAGE_REG, 0x0000);
+ }
+
+ return 0;
+}
+#endif
--- /dev/null
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp@keymile.com>
+ *
+ * Copyright 2011,2012 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <netdev.h>
+#include <linux/compiler.h>
+#include <asm/mmu.h>
+#include <asm/processor.h>
+#include <asm/cache.h>
+#include <asm/immap_85xx.h>
+#include <asm/fsl_law.h>
+#include <asm/fsl_serdes.h>
+#include <asm/fsl_portals.h>
+#include <asm/fsl_liodn.h>
+#include <fm_eth.h>
+
+#include "../common/common.h"
+#include "kmp204x.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ printf("Board: Keymile %s\n", CONFIG_KM_BOARD_NAME);
+
+ return 0;
+}
+
+/* TODO: implement the I2C deblocking function */
+int i2c_make_abort(void)
+{
+ return 1;
+}
+
+#define ZL30158_RST 8
+#define ZL30343_RST 9
+
+int board_early_init_f(void)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ /* board only uses the DDR_MCK0, so disable the DDR_MCK1/2/3 */
+ setbits_be32(&gur->ddrclkdr, 0x001f000f);
+
+ /* take the Zarlinks out of reset as soon as possible */
+ qrio_prst(ZL30158_RST, false, false);
+ qrio_prst(ZL30343_RST, false, false);
+
+ /* and set their reset to power-up only */
+ qrio_prstcfg(ZL30158_RST, PRSTCFG_POWUP_RST);
+ qrio_prstcfg(ZL30343_RST, PRSTCFG_POWUP_RST);
+
+ return 0;
+}
+
+int board_early_init_r(void)
+{
+ /* Flush d-cache and invalidate i-cache of any FLASH data */
+ flush_dcache();
+ invalidate_icache();
+
+ set_liodns();
+ setup_portals();
+
+ return 0;
+}
+
+unsigned long get_board_sys_clk(unsigned long dummy)
+{
+ return 66666666;
+}
+
+#define WDMASK_OFF 0x16
+
+static void qrio_wdmask(u8 bit, bool wden)
+{
+ u16 wdmask;
+ void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
+
+ wdmask = in_be16(qrio_base + WDMASK_OFF);
+
+ if (wden)
+ wdmask |= (1 << bit);
+ else
+ wdmask &= ~(1 << bit);
+
+ out_be16(qrio_base + WDMASK_OFF, wdmask);
+}
+
+#define PRST_OFF 0x1a
+
+void qrio_prst(u8 bit, bool en, bool wden)
+{
+ u16 prst;
+ void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
+
+ qrio_wdmask(bit, wden);
+
+ prst = in_be16(qrio_base + PRST_OFF);
+
+ if (en)
+ prst &= ~(1 << bit);
+ else
+ prst |= (1 << bit);
+
+ out_be16(qrio_base + PRST_OFF, prst);
+}
+
+#define PRSTCFG_OFF 0x1c
+
+void qrio_prstcfg(u8 bit, u8 mode)
+{
+ u32 prstcfg;
+ u8 i;
+ void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
+
+ prstcfg = in_be32(qrio_base + PRSTCFG_OFF);
+
+ for (i = 0; i < 2; i++) {
+ if (mode & (1<<i))
+ set_bit(2*bit+i, &prstcfg);
+ else
+ clear_bit(2*bit+i, &prstcfg);
+ }
+
+ out_be32(qrio_base + PRSTCFG_OFF, prstcfg);
+}
+
+
+#define BOOTCOUNT_OFF 0x12
+
+void bootcount_store(ulong counter)
+{
+ u8 val;
+ void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
+
+ val = (counter <= 255) ? (u8)counter : 255;
+ out_8(qrio_base + BOOTCOUNT_OFF, val);
+}
+
+ulong bootcount_load(void)
+{
+ u8 val;
+ void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
+ val = in_8(qrio_base + BOOTCOUNT_OFF);
+ return val;
+}
+
+#define NUM_SRDS_BANKS 2
+#define PHY_RST 15
+
+int misc_init_r(void)
+{
+ serdes_corenet_t *regs = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+ u32 expected[NUM_SRDS_BANKS] = {SRDS_PLLCR0_RFCK_SEL_100,
+ SRDS_PLLCR0_RFCK_SEL_125};
+ unsigned int i;
+
+ /* check SERDES reference clocks */
+ for (i = 0; i < NUM_SRDS_BANKS; i++) {
+ u32 actual = in_be32(®s->bank[i].pllcr0);
+ actual &= SRDS_PLLCR0_RFCK_SEL_MASK;
+ if (actual != expected[i]) {
+ printf("Warning: SERDES bank %u expects reference \
+ clock %sMHz, but actual is %sMHz\n", i + 1,
+ serdes_clock_to_string(expected[i]),
+ serdes_clock_to_string(actual));
+ }
+ }
+
+ /* take the mgmt eth phy out of reset */
+ qrio_prst(PHY_RST, false, false);
+
+ return 0;
+}
+
+#if defined(CONFIG_HUSH_INIT_VAR)
+int hush_init_var(void)
+{
+ ivm_read_eeprom();
+ return 0;
+}
+#endif
+
+#if defined(CONFIG_LAST_STAGE_INIT)
+int last_stage_init(void)
+{
+ set_km_env();
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+void fdt_fixup_fman_mac_addresses(void *blob)
+{
+ int node, i, ret;
+ char *tmp, *end;
+ unsigned char mac_addr[6];
+
+ /* get the mac addr from env */
+ tmp = getenv("ethaddr");
+ if (!tmp) {
+ printf("ethaddr env variable not defined\n");
+ return;
+ }
+ for (i = 0; i < 6; i++) {
+ mac_addr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
+ if (tmp)
+ tmp = (*end) ? end+1 : end;
+ }
+
+ /* find the correct fdt ethernet path and correct it */
+ node = fdt_path_offset(blob, "/soc/fman/ethernet@e8000");
+ if (node < 0) {
+ printf("no /soc/fman/ethernet path offset\n");
+ return;
+ }
+ ret = fdt_setprop(blob, node, "local-mac-address", &mac_addr, 6);
+ if (ret) {
+ printf("error setting local-mac-address property\n");
+ return;
+ }
+}
+#endif
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ phys_addr_t base;
+ phys_size_t size;
+
+ ft_cpu_setup(blob, bd);
+
+ base = getenv_bootm_low();
+ size = getenv_bootm_size();
+
+ fdt_fixup_memory(blob, (u64)base, (u64)size);
+
+#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
+ fdt_fixup_dr_usb(blob, bd);
+#endif
+
+#ifdef CONFIG_PCI
+ pci_of_setup(blob, bd);
+#endif
+
+ fdt_fixup_liodn(blob);
+#ifdef CONFIG_SYS_DPAA_FMAN
+ fdt_fixup_fman_ethernet(blob);
+ fdt_fixup_fman_mac_addresses(blob);
+#endif
+}
--- /dev/null
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp@keymile.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#define PRSTCFG_POWUP_UNIT_CORE_RST 0x0
+#define PRSTCFG_POWUP_UNIT_RST 0x1
+#define PRSTCFG_POWUP_RST 0x3
+
+void qrio_prst(u8 bit, bool en, bool wden);
+void qrio_prstcfg(u8 bit, u8 mode);
+
+void pci_of_setup(void *blob, bd_t *bd);
--- /dev/null
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp@keymile.com>
+ *
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/fsl_law.h>
+#include <asm/mmu.h>
+
+struct law_entry law_table[] = {
+#ifdef CONFIG_SYS_BMAN_MEM_PHYS
+ SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_BMAN),
+#endif
+#ifdef CONFIG_SYS_QMAN_MEM_PHYS
+ SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_2M, LAW_TRGT_IF_QMAN),
+#endif
+#ifdef CONFIG_SYS_DCSRBAR_PHYS
+ /* Limit DCSR to 32M to access NPC Trace Buffer */
+ SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
+#endif
+#ifdef CONFIG_SYS_NAND_BASE_PHYS
+ SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_32K, LAW_TRGT_IF_LBC),
+#endif
+ SET_LAW(CONFIG_SYS_QRIO_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
+#ifdef CONFIG_SYS_LBAPP1_BASE_PHYS
+ SET_LAW(CONFIG_SYS_LBAPP1_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
+#endif
+#ifdef CONFIG_SYS_LBAPP2_BASE_PHYS
+ SET_LAW(CONFIG_SYS_LBAPP2_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
+#endif
+};
+
+int num_law_entries = ARRAY_SIZE(law_table);
--- /dev/null
+#
+# Copyright 2012 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Refer docs/README.pblimage for more details about how-to configure
+# and create PBL boot image
+#
+
+#PBI commands
+#Initialize CPC1 as 1MB SRAM
+09010000 00200400
+09138000 00000000
+091380c0 00000100
+09010100 00000000
+09010104 fff0000b
+09010f00 08000000
+09010000 80000000
+#Configure LAW for CPC1
+09000d00 00000000
+09000d04 fff00000
+09000d08 81000013
+09000010 00000000
+09000014 ff000000
+09000018 81000000
+#Initialize eSPI controller, default configuration is slow for eSPI to
+#load data, this configuration comes from u-boot eSPI driver.
+09110000 80000403
+09110020 27170008
+09110024 00100008
+09110028 00100008
+0911002c 00100008
+#Flush PBL data
+09138000 00000000
+091380c0 00000000
--- /dev/null
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp@keymile.com>
+ *
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <pci.h>
+#include <asm/fsl_pci.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+#include <asm/fsl_serdes.h>
+
+#include "kmp204x.h"
+
+#define PCIE_SW_RST 14
+#define HOOPER_SW_RST 12
+
+void pci_init_board(void)
+{
+ qrio_prst(PCIE_SW_RST, false, false);
+ qrio_prst(HOOPER_SW_RST, false, false);
+ /* Hooper is not direcly PCIe capable */
+ mdelay(50);
+ fsl_pcie_init_board(0);
+}
+
+void pci_of_setup(void *blob, bd_t *bd)
+{
+ FT_FSL_PCI_SETUP;
+}
--- /dev/null
+#
+# Default RCW for kmp204x boards
+#
+
+#PBL preamble and RCW header
+aa55aa55 010e0100
+#64 bytes RCW data
+14600000 00000000 28200000 00000000
+148E70CF CFC02000 58000000 41000000
+00000000 00000000 00000000 F4428002
+00000000 00000000 00000000 00000000
--- /dev/null
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp@keymile.com>
+ *
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/mmu.h>
+
+struct fsl_e_tlb_entry tlb_table[] = {
+ /* TLB 0 - for temp stack in cache */
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS,
+ MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 4 * 1024,
+ MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 8 * 1024,
+ MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS + 12 * 1024,
+ MAS3_SW|MAS3_SR, 0,
+ 0, 0, BOOKE_PAGESZ_4K, 0),
+ /* TLB 1 */
+ /* *I*G - L3SRAM. When L3 is used as 1M SRAM, the address of the
+ * SRAM is at 0xfff00000, it covered the 0xfffff000.
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L3_ADDR, CONFIG_SYS_INIT_L3_ADDR,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 0, BOOKE_PAGESZ_1M, 1),
+
+ /* *I*G* - CCSRBAR */
+ SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 1, BOOKE_PAGESZ_16M, 1),
+ /* QRIO */
+ SET_TLB_ENTRY(1, CONFIG_SYS_QRIO_BASE, CONFIG_SYS_QRIO_BASE_PHYS,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 2, BOOKE_PAGESZ_64K, 1),
+ /* *I*G* - PCI1 */
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 3, BOOKE_PAGESZ_512M, 1),
+ /* *I*G* - PCI3 */
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT, CONFIG_SYS_PCIE3_MEM_PHYS,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 4, BOOKE_PAGESZ_512M, 1),
+ /* *I*G* - PCI1&3 I/O */
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 6, BOOKE_PAGESZ_128K, 1),
+#ifdef CONFIG_SYS_LBAPP1_BASE_PHYS
+ /* LBAPP1 */
+ SET_TLB_ENTRY(1, CONFIG_SYS_LBAPP1_BASE, CONFIG_SYS_LBAPP1_BASE_PHYS,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 7, BOOKE_PAGESZ_256M, 1),
+#endif
+#ifdef CONFIG_SYS_LBAPP2_BASE_PHYS
+ /* LBAPP2 */
+ SET_TLB_ENTRY(1, CONFIG_SYS_LBAPP2_BASE, CONFIG_SYS_LBAPP2_BASE_PHYS,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 8, BOOKE_PAGESZ_256M, 1),
+#endif
+ /* Bman/Qman */
+#ifdef CONFIG_SYS_BMAN_MEM_PHYS
+ SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE, CONFIG_SYS_BMAN_MEM_PHYS,
+ MAS3_SW|MAS3_SR, 0,
+ 0, 9, BOOKE_PAGESZ_1M, 1),
+ SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE + 0x00100000,
+ CONFIG_SYS_BMAN_MEM_PHYS + 0x00100000,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 10, BOOKE_PAGESZ_1M, 1),
+#endif
+#ifdef CONFIG_SYS_QMAN_MEM_PHYS
+ SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE, CONFIG_SYS_QMAN_MEM_PHYS,
+ MAS3_SW|MAS3_SR, 0,
+ 0, 11, BOOKE_PAGESZ_1M, 1),
+ SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE + 0x00100000,
+ CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 12, BOOKE_PAGESZ_1M, 1),
+#endif
+#ifdef CONFIG_SYS_DCSRBAR_PHYS
+ SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 13, BOOKE_PAGESZ_4M, 1),
+#endif
+#ifdef CONFIG_SYS_NAND_BASE
+ /*
+ * *I*G - NAND
+ * entry 14 and 15 has been used hard coded, they will be disabled
+ * in cpu_init_f, so we use entry 16 for nand.
+ */
+ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
+ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 16, BOOKE_PAGESZ_32K, 1),
+#endif
+};
+
+int num_tlb_entries = ARRAY_SIZE(tlb_table);
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := kzm9g.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj) .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := kzm9g.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = korat.o
+extra-y += init.o
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o kup.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o ../common/pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = kup4k.o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o ../common/pcmcia.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o ../common/pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = kup4x.o ../common/flash.o ../common/kup.o ../common/load_sernum_ethaddr.o ../common/pcmcia.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-OBJS = $(BOARD).o ide.o hwctl.o avr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(OBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = linkstation.o ide.o hwctl.o avr.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := am3517evm.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := am3517evm.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := imx27lite.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := imx27lite.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := imx31_litekit.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := imx31_litekit.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := omap3logic.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := omap3logic.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := zoom1.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := zoom1.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-y += debug_board.o
-COBJS-y += zoom2_serial.o
-COBJS-$(CONFIG_STATUS_LED) += led.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := zoom2.o
+obj-y += debug_board.o
+obj-y += zoom2_serial.o
+obj-$(CONFIG_STATUS_LED) += led.o
-
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := lubbock.o flash.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := lubbock.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = lwmon.o flash.o pcmcia.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o kbd.o sdram.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = lwmon5.o kbd.o sdram.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := hmi1001.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mucmc52.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-#COBJS = $(BOARD).o flash.o pcmcia.o
-COBJS = $(BOARD).o pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = uc100.o pcmcia.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := uc101.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)board/$(VENDOR)/common)
-endif
-
-LIB = $(obj)lib$(VENDOR).o
-
-COBJS-y = mv_common.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = mv_common.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o pci.o fpga.o sm107.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += mergerbox.o pci.o fpga.o sm107.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o fpga.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := mvbc_p.o fpga.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+obj-y := mvblm7.o pci.o fpga.o
-LIB = $(obj)lib$(BOARD).o
+extra-y := bootscript.img
-COBJS := $(BOARD).o pci.o fpga.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
- @mkimage -T script -C none -n M7_script -d bootscript $(obj)bootscript.img
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+$(obj)bootscript.img:
+ @mkimage -T script -C none -n M7_script -d bootscript $@
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += mvblx.o fpga.o
-COBJS-$(CONFIG_ID_EEPROM) += sys_eeprom.o
-COBJS := $(COBJS-y)
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
+obj-y += mvblx.o fpga.o
+obj-$(CONFIG_ID_EEPROM) += sys_eeprom.o
CFLAGS += -Werror
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+obj-y := mvsmr.o fpga.o
-LIB = $(obj)lib$(BOARD).o
+extra-y := bootscript.img
-COBJS := $(BOARD).o fpga.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
- @mkimage -T script -C none -n mvSMR_Script -d bootscript $(obj)bootscript.img
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+$(obj)bootscript.img: bootscript
+ @mkimage -T script -C none -n mvSMR_Script -d $< $@
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o vpd.o pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = mbx8xx.o flash.o vpd.o pcmcia.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o lcd.o auto_update.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mcc200.o lcd.o auto_update.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-y += ebi.o
-COBJS-$(CONFIG_VCT_NOR) += ebi_nor_flash.o
-COBJS-$(CONFIG_VCT_ONENAND) += ebi_onenand.o
-COBJS-$(CONFIG_DRIVER_SMC911X) += ebi_smc911x.o smc_eeprom.o
-COBJS-y += gpio.o
-COBJS-y += top.o
-COBJS-$(CONFIG_USB_EHCI_VCT) += dcgu.o ehci.o scc.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := vct.o
+obj-y += ebi.o
+obj-$(CONFIG_VCT_NOR) += ebi_nor_flash.o
+obj-$(CONFIG_VCT_ONENAND) += ebi_onenand.o
+obj-$(CONFIG_DRIVER_SMC911X) += ebi_smc911x.o smc_eeprom.o
+obj-y += gpio.o
+obj-y += top.o
+obj-$(CONFIG_USB_EHCI_VCT) += dcgu.o ehci.o scc.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mimc200.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := hammerhead.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
-SOBJS = init.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := icon.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := motionpro.o
-
#
# (C) Copyright 2001-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o m48t59y.o pci.o flash.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = mousse.o m48t59y.o pci.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o sdram.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mpc8308_p1m.o sdram.o
/* init uhci
*/
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
unsigned char temp;
int busdevfunc;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o cmd_mip405.o \
+obj-y = mip405.o cmd_mip405.o \
../common/pci.o \
../common/usb_uhci.o \
../common/common_util.o
-
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o cmd_pati.o \
+obj-y := pati.o cmd_pati.o \
../common/common_util.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
-
#ifndef __PCI_EEPROM_H_
#define __PCI_EEPROM_H_ 1
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o cmd_pip405.o \
+obj-y = pip405.o cmd_pip405.o \
../common/pci.o \
../common/isa.o \
../common/kbd.o \
../common/usb_uhci.o \
../common/common_util.o
-
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
+obj-y := ../common/common_util.o
+obj-y += vcma9.o cmd_vcma9.o
-COBJS := ../common/common_util.o
-COBJS += $(BOARD).o cmd_$(BOARD).o
-
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mpr2.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mpr2.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ms7720se.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ms7720se.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ms7722se.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ms7722se.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ms7750se.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ms7750se.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := muas3001.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := munices.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = musenki.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = mvblue.o flash.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := mx1ads.o syncflash.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := mx1ads.o syncflash.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o phone_console.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = netphone.o flash.o phone_console.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o dsp.o codec.o pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = netta.o flash.o dsp.o codec.o pcmcia.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = netta2.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = netvia.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-SOBJS-y := lowlevel_init.o
-
-COBJS := $(sort $(COBJS-y))
-SOBJS := $(sort $(SOBJS-y))
-SRCS := $(COBJS:.o=.c) $(SOBJS:.o=.S)
-OBJS := $(addprefix $(obj),$(COBJS)) $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := rx51.o
+obj-y += lowlevel_init.o
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
-include $(TOPDIR)/config.mk
-
$(shell mkdir -p $(obj)../cardhu)
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = ../cardhu/cardhu.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ../cardhu/cardhu.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := cardhu.o
# Copyright (c) 2011 The Chromium OS Authors.
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)board/$(VENDOR)/common)
-endif
-
-LIB = $(obj)lib$(VENDOR).o
-
include common.mk
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#ifdef CONFIG_USB_EHCI_TEGRA
#include <asm/arch-tegra/usb.h>
#include <asm/arch/usb.h>
+#include <usb.h>
#endif
#ifdef CONFIG_TEGRA_MMC
#include <asm/arch-tegra/tegra_mmc.h>
#ifdef CONFIG_USB_EHCI_TEGRA
pin_mux_usb();
- board_usb_init(gd->fdt_blob);
+ usb_process_devicetree(gd->fdt_blob);
#endif
+
#ifdef CONFIG_LCD
tegra_lcd_check_next_stage(gd->fdt_blob, 0);
#endif
# common options for all tegra boards
-COBJS-y += ../../nvidia/common/board.o
-COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += ../../nvidia/common/emc.o
+obj-y += ../../nvidia/common/board.o
+obj-$(CONFIG_TEGRA_CLOCK_SCALING) += ../../nvidia/common/emc.o
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := dalmore.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := harmony.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := seaboard.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
$(shell mkdir -p $(obj)../seaboard)
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = ../seaboard/seaboard.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = ../seaboard/seaboard.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := whistler.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = nx823.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := mx23_olinuxino.o
+obj-y := mx23_olinuxino.o
else
-COBJS := spl_boot.o
+obj-y := spl_boot.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := calimain.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := openrisc-generic.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := overo.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-#########################################################################
-sinclude $(obj).depend
+obj-y := overo.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := palmld.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := palmld.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := palmtc.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := palmtc.o
# This file is released under the terms of GPL v2 and any later version.
# See the file COPYING in the root directory of the source tree for details.
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := palmtreo680.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := palmtreo680.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := pandora.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := pandora.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-SOBJS = lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = pb1x00.o flash.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = pcs440ep.o flash.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := pdm360ng.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := pcm030.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifdef CONFIG_SPL_BUILD
-COBJS := mux.o
+obj-y += mux.o
endif
-COBJS += board.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += board.o
-
#
# (C) Copyright 2003-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := pm520.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = pm826.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = pm828.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o cmd_pn62.o misc.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = pn62.o cmd_pn62.o misc.o
--- /dev/null
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+ifndef CONFIG_SPL_BUILD
+obj-y := bg0900.o
+else
+obj-y := spl_boot.o
+endif
--- /dev/null
+/*
+ * PPC-AG BG0900 board
+ *
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux-mx28.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <linux/mii.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Functions
+ */
+int board_early_init_f(void)
+{
+ /* IO0 clock at 480MHz */
+ mxs_set_ioclk(MXC_IOCLK0, 480000);
+ /* IO1 clock at 480MHz */
+ mxs_set_ioclk(MXC_IOCLK1, 480000);
+
+ /* SSP2 clock at 160MHz */
+ mxs_set_sspclk(MXC_SSPCLK2, 160000, 0);
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ return mxs_dram_init();
+}
+
+int board_init(void)
+{
+ /* Adress of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+ return 0;
+}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ struct mxs_clkctrl_regs *clkctrl_regs =
+ (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
+ struct eth_device *dev;
+ int ret;
+
+ ret = cpu_eth_init(bis);
+
+ /* BG0900 uses ENET_CLK PAD to drive FEC clock */
+ writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN,
+ &clkctrl_regs->hw_clkctrl_enet);
+
+ /* Reset FEC PHYs */
+ gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
+ udelay(200);
+ gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
+
+ ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
+ if (ret) {
+ puts("FEC MXS: Unable to init FEC0\n");
+ return ret;
+ }
+
+ dev = eth_get_dev_by_name("FEC0");
+ if (!dev) {
+ puts("FEC MXS: Unable to get FEC0 device entry\n");
+ return -EINVAL;
+ }
+
+ return ret;
+}
+
+#endif
--- /dev/null
+/*
+ * PPC-AG BG0900 Boot setup
+ *
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <asm/arch/iomux-mx28.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#define MUX_CONFIG_GPMI (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
+#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
+#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+
+const iomux_cfg_t iomux_setup[] = {
+ /* DUART */
+ MX28_PAD_PWM0__DUART_RX,
+ MX28_PAD_PWM1__DUART_TX,
+
+ /* GPMI NAND */
+ MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_RDN__GPMI_RDN |
+ (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
+ MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_GPMI,
+ MX28_PAD_GPMI_RESETN__GPMI_RESETN | MUX_CONFIG_GPMI,
+
+ /* FEC0 */
+ MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
+ MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
+ MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
+
+ /* FEC0 Reset */
+ MX28_PAD_ENET0_RX_CLK__GPIO_4_13 |
+ (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
+
+ /* EMI */
+ MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
+
+ MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
+ MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+
+ /* SPI2 (for SPI flash) */
+ MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
+ MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
+ MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
+ MX28_PAD_SSP2_SS0__SSP2_D3 |
+ (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
+};
+
+void mxs_adjust_memory_params(uint32_t *dram_vals)
+{
+ /*
+ * DDR Controller Registers
+ * Manufacturer: Winbond
+ * Device Part Number: W972GG6JB-25I
+ * Clock Freq.: 200MHz
+ * Density: 2Gb
+ * Chip Selects: 1
+ * Number of Banks: 8
+ * Row address: 14
+ * Column address: 10
+ */
+
+ dram_vals[0x74 / 4] = 0x0102010A;
+ dram_vals[0x98 / 4] = 0x04005003;
+ dram_vals[0x9c / 4] = 0x090000c8;
+
+ dram_vals[0xa8 / 4] = 0x0036b009;
+ dram_vals[0xac / 4] = 0x03270612;
+
+ dram_vals[0xb0 / 4] = 0x02020202;
+ dram_vals[0xb4 / 4] = 0x00c80029;
+
+ dram_vals[0xc0 / 4] = 0x00011900;
+
+ dram_vals[0x12c / 4] = 0x07400300;
+ dram_vals[0x130 / 4] = 0x07400300;
+ dram_vals[0x2c4 / 4] = 0x02030303;
+}
+
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
+{
+ mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
+}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-SOBJS := init.o
-
-COBJS := ppmc7xx.o pci.o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := init.o
+obj-y += ppmc7xx.o pci.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ppmc8260.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ppmc8260.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := pr1.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o fpga.o nand.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = alpr.o fpga.o nand.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../../Marvell/common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-SOBJS = misc.o
-COBJS = $(BOARD).o mpsc.o mv_eth.o pci.o sdram_init.o serial.o \
+obj-y = misc.o
+obj-y += p3mx.o mpsc.o mv_eth.o pci.o sdram_init.o serial.o \
../../Marvell/common/i2c.o ../../Marvell/common/memory.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = p3p440.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COMOBJS := ../common/AMDLV065D.o
-
-COBJS := $(BOARD).o $(COMOBJS)
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := pci5441.o ../common/AMDLV065D.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COMOBJS := ../common/AMDLV065D.o
-
-COBJS := $(BOARD).o led.o $(COMOBJS)
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := pk1c20.o led.o ../common/AMDLV065D.o
-
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := pxa_idp.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := pxa_idp.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = qemu-malta.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = qemu-mips.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o nand.o
-SOBJS =
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = quad100hd.o nand.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o fpga.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = quantum.o fpga.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o pcmcia.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = r360mpi.o flash.o pcmcia.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ib62x0.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ib62x0.o
# GNU General Public License for more details.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := rpi_b.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := rattler.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o kbd.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = rbc823.o flash.o kbd.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := migo_r.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := migo_r.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ap325rxa.o cpld-ap325rxa.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ap325rxa.o cpld-ap325rxa.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ecovec.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ecovec.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := r0p7734.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := r0p7734.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := r2dplus.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := r2dplus.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := r7780mp.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := r7780mp.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).o
-
-OBJS := rsk7203.o
-SOBJS := lowlevel_init.o
-
-LIB := $(addprefix $(obj),$(LIB))
-OBJS := $(addprefix $(obj),$(OBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := rsk7203.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).o
-
-OBJS := rsk7264.o
-SOBJS := lowlevel_init.o
-
-LIB := $(addprefix $(obj),$(LIB))
-OBJS := $(addprefix $(obj),$(OBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := rsk7264.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).o
-
-OBJS := rsk7269.o
-SOBJS := lowlevel_init.o
-
-LIB := $(addprefix $(obj),$(LIB))
-OBJS := $(addprefix $(obj),$(OBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := rsk7269.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := sh7752evb.o spi-boot.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(obj).depend $(COBJS) $(SOBJS)
- $(call cmd_link_o_target, $(COBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sh7752evb.o spi-boot.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := sh7757lcr.o spi-boot.o
-SOBJS := lowlevel_init.o
-
-$(LIB): $(obj).depend $(COBJS) $(SOBJS)
- $(call cmd_link_o_target, $(COBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sh7757lcr.o spi-boot.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := sh7763rdp.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sh7763rdp.o
+obj-y += lowlevel_init.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := sh7785lcr.o selfcheck.o rtl8169_mac.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sh7785lcr.o selfcheck.o rtl8169_mac.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += led.o
-COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += pm9261.o
+obj-y += led.o
+obj-$(CONFIG_HAS_DATAFLASH) += partition.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += pm9263.o
-COBJS-y += led.o
-COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += pm9263.o
+obj-y += led.o
+obj-$(CONFIG_HAS_DATAFLASH) += partition.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += pm9g45.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += pm9g45.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := rpxsuper.o flash.o mii_phy.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := rpxsuper.o flash.o mii_phy.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := rsdproto.o flash.o
-SOBJS := flash_asm.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := rsdproto.o flash.o
+obj-y += flash_asm.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := sacsng.o flash.o clkinit.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sacsng.o flash.o clkinit.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS += arndale_spl.o
+obj-y += arndale_spl.o
ifndef CONFIG_SPL_BUILD
-COBJS += arndale.o
+obj-y += arndale.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
-
-ALL := $(obj).depend $(LIB)
-
-all: $(ALL)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libsamsung.o
-
-COBJS-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_SOFT_I2C_MULTI_BUS) += multi_i2c.o
+obj-$(CONFIG_THOR_FUNCTION) += thor.o
+obj-$(CONFIG_CMD_USB_MASS_STORAGE) += ums.o
--- /dev/null
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <linux/usb/ch9.h>
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+ if (!strcmp(name, "usb_dnl_thor")) {
+ put_unaligned(CONFIG_G_DNL_THOR_VENDOR_NUM, &dev->idVendor);
+ put_unaligned(CONFIG_G_DNL_THOR_PRODUCT_NUM, &dev->idProduct);
+ } else {
+ put_unaligned(CONFIG_G_DNL_VENDOR_NUM, &dev->idVendor);
+ put_unaligned(CONFIG_G_DNL_PRODUCT_NUM, &dev->idProduct);
+ }
+ return 0;
+}
--- /dev/null
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <usb_mass_storage.h>
+#include <part.h>
+
+static int ums_read_sector(struct ums *ums_dev,
+ ulong start, lbaint_t blkcnt, void *buf)
+{
+ block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
+ lbaint_t blkstart = start + ums_dev->start_sector;
+ int dev_num = block_dev->dev;
+
+ return block_dev->block_read(dev_num, blkstart, blkcnt, buf);
+}
+
+static int ums_write_sector(struct ums *ums_dev,
+ ulong start, lbaint_t blkcnt, const void *buf)
+{
+ block_dev_desc_t *block_dev = &ums_dev->mmc->block_dev;
+ lbaint_t blkstart = start + ums_dev->start_sector;
+ int dev_num = block_dev->dev;
+
+ return block_dev->block_write(dev_num, blkstart, blkcnt, buf);
+}
+
+static struct ums ums_dev = {
+ .read_sector = ums_read_sector,
+ .write_sector = ums_write_sector,
+ .name = "UMS disk",
+};
+
+static struct ums *ums_disk_init(struct mmc *mmc)
+{
+ uint64_t mmc_end_sector = mmc->capacity / SECTOR_SIZE;
+ uint64_t ums_end_sector = UMS_NUM_SECTORS + UMS_START_SECTOR;
+
+ if (!mmc_end_sector) {
+ error("MMC capacity is not valid");
+ return NULL;
+ }
+
+ ums_dev.mmc = mmc;
+
+ if (ums_end_sector <= mmc_end_sector) {
+ ums_dev.start_sector = UMS_START_SECTOR;
+ if (UMS_NUM_SECTORS)
+ ums_dev.num_sectors = UMS_NUM_SECTORS;
+ else
+ ums_dev.num_sectors = mmc_end_sector - UMS_START_SECTOR;
+ } else {
+ ums_dev.num_sectors = mmc_end_sector;
+ puts("UMS: defined bad disk parameters. Using default.\n");
+ }
+
+ printf("UMS: disk start sector: %#x, count: %#x\n",
+ ums_dev.start_sector, ums_dev.num_sectors);
+
+ return &ums_dev;
+}
+
+struct ums *ums_init(unsigned int dev_num)
+{
+ struct mmc *mmc = NULL;
+
+ mmc = find_mmc_device(dev_num);
+ if (!mmc)
+ return NULL;
+
+ return ums_disk_init(mmc);
+}
mmc@12230000 {
status = "disabled";
};
+
+ ehci@12110000 {
+ samsung,vbus-gpio = <&gpio 0xbe 0>; /* X26 */
+ };
};
status = "disabled";
};
+ ehci@12110000 {
+ samsung,vbus-gpio = <&gpio 0xb1 0>; /* X11 */
+ };
+
+ xhci@12000000 {
+ samsung,vbus-gpio = <&gpio 0xbf 0>; /* X27 */
+ };
+
tmu@10060000 {
samsung,min-temp = <25>;
samsung,max-temp = <125>;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := goni.o onenand.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(SOBJS) $(OBJS)
- $(call cmd_link_o_target, $(SOBJS) $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := goni.o onenand.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS += origen.o
+obj-y += origen.o
endif
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-ALL +=$(obj).depend $(LIB)
-
ifdef CONFIG_SPL_BUILD
-ALL += $(OBJTREE)/tools/mk$(BOARD)spl
+all: $(OBJTREE)/tools/mk$(BOARD)spl
endif
-all: $(ALL)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
+# Fix ME after we implement hostprogs-y.
ifdef CONFIG_SPL_BUILD
$(OBJTREE)/tools/mk$(BOARD)spl: tools/mkv310_image.c
$(HOSTCC) tools/mkv310_image.c -o $(OBJTREE)/tools/mk$(BOARD)spl
endif
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := smdk2410.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := smdk2410.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS += smdk5250_spl.o
+obj-y += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
ifdef CONFIG_OF_CONTROL
-COBJS += exynos5-dt.o
+obj-y += exynos5-dt.o
else
-COBJS += smdk5250.o
+obj-y += smdk5250.o
endif
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-ALL := $(obj).depend $(LIB)
-
-all: $(ALL)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
static struct local_info local;
-#ifdef CONFIG_USB_EHCI_EXYNOS
-int board_usb_vbus_init(void)
-{
- struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
- samsung_get_base_gpio_part1();
-
- /* Enable VBUS power switch */
- s5p_gpio_direction_output(&gpio1->x2, 6, 1);
-
- /* VBUS turn ON time */
- mdelay(3);
-
- return 0;
-}
-#endif
-
#ifdef CONFIG_SOUND_MAX98095
static void board_enable_audio_codec(void)
{
if (board_init_cros_ec_devices(gd->fdt_blob))
return -1;
-#ifdef CONFIG_USB_EHCI_EXYNOS
- board_usb_vbus_init();
-#endif
#ifdef CONFIG_SOUND_MAX98095
board_enable_audio_codec();
#endif
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := smdkc100.o
-COBJS-$(CONFIG_SAMSUNG_ONENAND) += onenand.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(SOBJS) $(OBJS)
- $(call cmd_link_o_target, $(SOBJS) $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := smdkc100.o
+obj-$(CONFIG_SAMSUNG_ONENAND) += onenand.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS += smdkv310.o
+obj-y += smdkv310.o
endif
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-ALL := $(obj).depend $(LIB)
-
ifdef CONFIG_SPL_BUILD
-ALL += $(OBJTREE)/tools/mk$(BOARD)spl
+all: $(OBJTREE)/tools/mk$(BOARD)spl
endif
-all: $(ALL)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
+# Fix ME after we implement hostprogs-y.
ifdef CONFIG_SPL_BUILD
$(OBJTREE)/tools/mk$(BOARD)spl: tools/mkv310_image.c
$(HOSTCC) tools/mkv310_image.c -o $(OBJTREE)/tools/mk$(BOARD)spl
endif
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += trats.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += trats.o
#include <power/max8997_muic.h>
#include <power/battery.h>
#include <power/max17042_fg.h>
+#include <usb.h>
#include <usb_mass_storage.h>
#include "setup.h"
.usb_flags = PHY0_SLEEP,
};
-void board_usb_init(void)
+int board_usb_init(int index, enum usb_init_type init)
{
debug("USB_udc_probe\n");
- s3c_udc_probe(&s5pc210_otg_data);
+ return s3c_udc_probe(&s5pc210_otg_data);
}
#endif
setenv("lcdinfo", "lcd=s6e8ax0");
}
-
-#ifdef CONFIG_USB_GADGET_MASS_STORAGE
-static int ums_read_sector(struct ums_device *ums_dev,
- ulong start, lbaint_t blkcnt, void *buf)
-{
- if (ums_dev->mmc->block_dev.block_read(ums_dev->dev_num,
- start + ums_dev->offset, blkcnt, buf) != blkcnt)
- return -1;
-
- return 0;
-}
-
-static int ums_write_sector(struct ums_device *ums_dev,
- ulong start, lbaint_t blkcnt, const void *buf)
-{
- if (ums_dev->mmc->block_dev.block_write(ums_dev->dev_num,
- start + ums_dev->offset, blkcnt, buf) != blkcnt)
- return -1;
-
- return 0;
-}
-
-static void ums_get_capacity(struct ums_device *ums_dev,
- long long int *capacity)
-{
- long long int tmp_capacity;
-
- tmp_capacity = (long long int) ((ums_dev->offset + ums_dev->part_size)
- * SECTOR_SIZE);
- *capacity = ums_dev->mmc->capacity - tmp_capacity;
-}
-
-static struct ums_board_info ums_board = {
- .read_sector = ums_read_sector,
- .write_sector = ums_write_sector,
- .get_capacity = ums_get_capacity,
- .name = "TRATS UMS disk",
- .ums_dev = {
- .mmc = NULL,
- .dev_num = 0,
- .offset = 0,
- .part_size = 0.
- },
-};
-
-struct ums_board_info *board_ums_init(unsigned int dev_num, unsigned int offset,
- unsigned int part_size)
-{
- struct mmc *mmc;
-
- mmc = find_mmc_device(dev_num);
- if (!mmc)
- return NULL;
-
- ums_board.ums_dev.mmc = mmc;
- ums_board.ums_dev.dev_num = dev_num;
- ums_board.ums_dev.offset = offset;
- ums_board.ums_dev.part_size = part_size;
-
- return &ums_board;
-}
-#endif
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := trats2.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := trats2.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := universal.o onenand.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(SOBJS) $(OBJS)
- $(call cmd_link_o_target, $(SOBJS) $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := universal.o onenand.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sandbox.o
{
}
-ulong get_tbclk(void)
+unsigned long timer_read_counter(void)
{
- return CONFIG_SYS_HZ;
-}
-
-unsigned long long get_ticks(void)
-{
- return get_timer(0);
-}
-
-ulong get_timer(ulong base)
-{
- return (os_get_nsec() / 1000000) - base;
+ return os_get_nsec() / 1000;
}
int timer_init(void)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
# TBS: add for debugging purposes
BUILDUSER := $(shell whoami)
-FORCEBUILD := $(shell rm -f $(LIB) $(BOARD).o)
+FORCEBUILD := $(shell rm -f karef.o)
CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
# TBS: end debugging
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o
-
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = karef.o ../common/flash.o ../common/sb_common.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
# TBS: add for debugging purposes
BUILDUSER := $(shell whoami)
-FORCEBUILD := $(shell rm -f $(LIB) $(BOARD).o)
+FORCEBUILD := $(shell rm -f metrobox.o)
CFLAGS += -DBUILDUSER='"$(BUILDUSER)"'
# TBS: end debugging
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o ../common/flash.o ../common/sb_common.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = metrobox.o ../common/flash.o ../common/sb_common.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := sfp.o
+obj-y := sfp.o
else
-COBJS := spl_boot.o
+obj-y := spl_boot.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = sandpoint.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o strataflash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = sbc405.o strataflash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_PCI) += pci.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += sbc8349.o
+obj-$(CONFIG_PCI) += pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += law.o
-COBJS-y += tlb.o
-COBJS-$(CONFIG_FSL_DDR2) += ddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += sbc8548.o
+obj-y += law.o
+obj-y += tlb.o
+obj-$(CONFIG_FSL_DDR2) += ddr.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += law.o
-COBJS-$(CONFIG_FSL_DDR2) += ddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude ($obj).depend
-
-#########################################################################
+obj-y += sbc8641d.o
+obj-y += law.o
+obj-$(CONFIG_FSL_DDR2) += ddr.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o sc3nand.o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = sc3.o sc3nand.o
+obj-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := scb9328.o flash.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := scb9328.o flash.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := sc_sps_1.o
+obj-y := sc_sps_1.o
else
-COBJS := spl_boot.o
+obj-y := spl_boot.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o sdram.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := simpc8313.o sdram.o
#
# SPDX-License-Identifier: GPL-2.0+
-include $(TOPDIR)/config.mk
-
-LIB = lib$(BOARD).o
-
-OBJS := shmin.o
-SOBJS := lowlevel_init.o
-
-LIB := $(addprefix $(obj),$(LIB))
-OBJS := $(addprefix $(obj),$(OBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := shmin.o
+obj-y += lowlevel_init.o
#include <asm/arch/sys_proto.h>
#include <asm/unaligned.h>
#include <net.h>
-#include <usbdescriptors.h>
+#include <errno.h>
+#include <g_dnl.h>
#include "factoryset.h"
#define EEPR_PG_SZ 0x80
MAX_STRING_LENGTH)) {
debug("display name: %s\n", factory_dat.disp_name);
}
-
#endif
+ if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV",
+ (uchar *)"num", factory_dat.serial,
+ MAX_STRING_LENGTH)) {
+ debug("serial number: %s\n", factory_dat.serial);
+ }
+ if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV",
+ (uchar *)"ver", buf,
+ MAX_STRING_LENGTH)) {
+ factory_dat.version = simple_strtoul((char *)buf,
+ NULL, 16);
+ debug("version number: %d\n", factory_dat.version);
+ }
+
return 0;
err:
return ret;
}
-int g_dnl_bind_fixup(struct usb_device_descriptor *dev)
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
{
put_unaligned(factory_dat.usb_vendor_id, &dev->idVendor);
put_unaligned(factory_dat.usb_product_id, &dev->idProduct);
+ g_dnl_set_serialnumber((char *)factory_dat.serial);
+
return 0;
}
+
+int g_dnl_get_board_bcd_device_number(int gcnum)
+{
+ return factory_dat.version;
+}
#endif /* defined(CONFIG_SPL_BUILD) */
#if defined(CONFIG_VIDEO)
unsigned char disp_name[MAX_STRING_LENGTH];
#endif
+ unsigned char serial[MAX_STRING_LENGTH];
+ int version;
};
int factoryset_read_eeprom(int i2c_addr);
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
ifdef CONFIG_SPL_BUILD
-COBJS := mux.o
+obj-y := mux.o
endif
-COBJS += board.o
+obj-y += board.o
ifndef CONFIG_SPL_BUILD
-COBJS += ../common/factoryset.o
+obj-y += ../common/factoryset.o
endif
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#ifdef CONFIG_SPL_BUILD
static struct dxr2_baseboard_id __attribute__((section(".data"))) settings;
-
+/* @303MHz-i0 */
const struct ddr3_data ddr3_default = {
- 0x33524444, 0x56312e33, 0x0100, 0x0001, 0x003A, 0x008A, 0x010B,
- 0x00C4, 0x0888A39B, 0x26247FDA, 0x501F821F, 0x0006, 0x61C04AB2,
- 0x00000618,
+ 0x33524444, 0x56312e34, 0x0080, 0x0000, 0x0038, 0x003E, 0x00A4,
+ 0x0075, 0x0888A39B, 0x26247FDA, 0x501F821F, 0x00100206, 0x61A44A32,
+ 0x00000618, 0x0000014A,
};
static void set_default_ddr3_timings(void)
PRINTARGS(sdram_config);
PRINTARGS(ref_ctrl);
+ PRINTARGS(ioctr_val);
}
static void print_chip_data(void)
dxr2_ddr3_cmd_ctrl_data.cmd2csratio = settings.ddr3.ddr3_sratio;
dxr2_ddr3_cmd_ctrl_data.cmd2iclkout = settings.ddr3.iclkout;
- config_ddr(DDR_PLL_FREQ, DXR2_IOCTRL_VAL, &dxr2_ddr3_data,
+ config_ddr(DDR_PLL_FREQ, settings.ddr3.ioctr_val, &dxr2_ddr3_data,
&dxr2_ddr3_cmd_ctrl_data, &dxr2_ddr3_emif_reg_data, 0);
}
#define MAGIC_CHIP 0x50494843
/* Automatic generated definition */
-/* Wed, 19 Jun 2013 10:57:48 +0200 */
-/* From file: draco/ddr3-data-micron.txt */
+/* Wed, 18 Sep 2013 18:58:27 +0200 */
+/* From file: draco/ddr3-data-micron-v2.txt */
struct ddr3_data {
unsigned int magic; /* 0x33524444 */
- unsigned int version; /* 0x56312e33 */
+ unsigned int version; /* 0x56312e34 */
unsigned short int ddr3_sratio; /* 0x0100 */
unsigned short int iclkout; /* 0x0001 */
unsigned short int dt0rdsratio0; /* 0x003A */
unsigned int sdram_tim1; /* 0x0888A39B */
unsigned int sdram_tim2; /* 0x26247FDA */
unsigned int sdram_tim3; /* 0x501F821F */
- unsigned short int emif_ddr_phy_ctlr_1; /* 0x0006 */
+ unsigned int emif_ddr_phy_ctlr_1; /* 0x00100206 */
unsigned int sdram_config; /* 0x61C04AB2 */
unsigned int ref_ctrl; /* 0x00000618 */
+ unsigned int ioctr_val; /* 0x0000018B */
};
struct chip_data {
{OFFSET(gpmc_ad11), (MODE(7) | PULLUDEN | RXACTIVE)},
{OFFSET(gpmc_csn3), MODE(7) }, /* LED0 GPIO2_0 */
{OFFSET(emu0), MODE(7)}, /* LED1 GPIO3_7 */
+ /* Triacs in HW Rev 2 */
+ {OFFSET(uart1_ctsn), MODE(7) | PULLUDDIS | RXACTIVE}, /* Y5 GPIO0_12*/
+ {OFFSET(mmc0_dat1), MODE(7) | PULLUDDIS | RXACTIVE}, /* Y3 GPIO2_28*/
+ {OFFSET(mmc0_dat2), MODE(7) | PULLUDDIS | RXACTIVE}, /* Y7 GPIO2_27*/
+ /* Triacs initial HW Rev */
+ {OFFSET(gpmc_csn1), MODE(7) | RXACTIVE | PULLUDDIS}, /* 1_30 Y0 */
+ {OFFSET(gpmc_be1n), MODE(7) | RXACTIVE | PULLUDDIS}, /* 1_28 Y1 */
+ {OFFSET(gpmc_csn2), MODE(7) | RXACTIVE | PULLUDDIS}, /* 1_31 Y2 */
+ {OFFSET(lcd_data15), MODE(7) | RXACTIVE | PULLUDDIS}, /* 0_11 Y3 */
+ {OFFSET(lcd_data14), MODE(7) | RXACTIVE | PULLUDDIS}, /* 0_10 Y4 */
+ {OFFSET(gpmc_clk), MODE(7) | RXACTIVE | PULLUDDIS}, /* 2_1 Y5 */
+ {OFFSET(emu1), MODE(7) | RXACTIVE | PULLUDDIS}, /* 3_8 Y6 */
+ {OFFSET(gpmc_ad15), MODE(7) | RXACTIVE | PULLUDDIS}, /* 1_15 Y7 */
+ /* Remaining pins that were not used in this file */
+ {OFFSET(gpmc_ad8), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_ad9), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a2), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a3), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a4), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a5), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a6), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a7), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a8), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a9), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a10), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(gpmc_a11), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_data0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_data2), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_data3), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_data4), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_data5), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_data6), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_data7), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_data8), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_data9), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_vsync), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_hsync), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_pclk), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(lcd_ac_bias_en), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mmc0_dat3), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mmc0_dat0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mmc0_clk), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mmc0_cmd), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(spi0_sclk), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(spi0_d0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(spi0_d1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(spi0_cs0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(uart0_ctsn), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(uart0_rtsn), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(uart1_rtsn), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(uart1_rxd), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(uart1_txd), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mcasp0_aclkx), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mcasp0_fsx), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mcasp0_axr0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mcasp0_ahclkr), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mcasp0_aclkr), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mcasp0_fsr), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mcasp0_axr1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(mcasp0_ahclkx), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(xdma_event_intr0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(xdma_event_intr1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(nresetin_out), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(porz), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(nnmi), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(osc0_in), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(osc0_out), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(rsvd1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(tms), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(tdi), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(tdo), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(tck), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ntrst), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(osc1_in), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(osc1_out), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(pmic_power_en), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(rtc_porz), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(rsvd2), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ext_wakeup), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(enz_kaldo_1p8v), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb0_dm), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb0_dp), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb0_ce), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb0_id), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb0_vbus), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb0_drvvbus), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb1_dm), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb1_dp), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb1_ce), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb1_id), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb1_vbus), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(usb1_drvvbus), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_resetn), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_csn0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_cke), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_ck), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_nck), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_casn), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_rasn), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_wen), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_ba0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_ba1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_ba2), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a2), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a3), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a4), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a5), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a6), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a7), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a8), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a9), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a10), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a11), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a12), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a13), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a14), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_a15), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_odt), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d2), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d3), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d4), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d5), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d6), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d7), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d8), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d9), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d10), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d11), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d12), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d13), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d14), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_d15), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_dqm0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_dqm1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_dqs0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_dqsn0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_dqs1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_dqsn1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_vref), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_vtp), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_strben0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ddr_strben1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ain7), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ain6), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ain5), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ain4), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ain3), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ain2), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ain1), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(ain0), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(vrefp), MODE(7) | RXACTIVE | PULLUDDIS},
+ {OFFSET(vrefn), MODE(7) | RXACTIVE | PULLUDDIS},
{-1},
};
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
ifdef CONFIG_SPL_BUILD
-COBJS := mux.o
+obj-y := mux.o
endif
-COBJS += board.o
+obj-y += board.o
ifndef CONFIG_SPL_BUILD
-COBJS += ../common/factoryset.o
+obj-y += ../common/factoryset.o
endif
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
static int board_video_init(void)
{
- /* set 300 MHz */
- conf_disp_pll(25, 2);
+ conf_disp_pll(24, 1);
if (factory_dat.pxm50)
da8xx_video_init(&lcd_panels[0], &lcd_cfg, lcd_cfg.bpp);
else
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../common)
endif
-LIB = $(obj)lib$(BOARD).o
-
ifdef CONFIG_SPL_BUILD
-COBJS := mux.o
+obj-y := mux.o
endif
-COBJS += board.o
+obj-y += board.o
ifndef CONFIG_SPL_BUILD
-COBJS += ../common/factoryset.o
+obj-y += ../common/factoryset.o
endif
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
&rut_ddr3_cmd_ctrl_data, &rut_ddr3_emif_reg_data, 0);
}
+static int request_and_pulse_reset(int gpio, const char *name)
+{
+ int ret;
+ const int delay_us = 2000; /* 2ms */
+
+ ret = gpio_request(gpio, name);
+ if (ret < 0) {
+ printf("%s: Unable to request %s\n", __func__, name);
+ goto err;
+ }
+
+ ret = gpio_direction_output(gpio, 0);
+ if (ret < 0) {
+ printf("%s: Unable to set %s as output\n", __func__, name);
+ goto err_free_gpio;
+ }
+
+ udelay(delay_us);
+
+ gpio_set_value(gpio, 1);
+
+ return 0;
+
+err_free_gpio:
+ gpio_free(gpio);
+err:
+ return ret;
+}
+
+#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
+#define ETH_PHY_RESET_GPIO GPIO_TO_PIN(2, 18)
+#define MAXTOUCH_RESET_GPIO GPIO_TO_PIN(3, 18)
+#define DISPLAY_RESET_GPIO GPIO_TO_PIN(3, 19)
+
+#define REQUEST_AND_PULSE_RESET(N) \
+ request_and_pulse_reset(N, #N);
+
static void spl_siemens_board_init(void)
{
- return;
+ REQUEST_AND_PULSE_RESET(ETH_PHY_RESET_GPIO);
+ REQUEST_AND_PULSE_RESET(MAXTOUCH_RESET_GPIO);
+ REQUEST_AND_PULSE_RESET(DISPLAY_RESET_GPIO);
}
#endif /* if def CONFIG_SPL_BUILD */
static int conf_disp_pll(int m, int n)
{
struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
- struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL;
struct dpll_params dpll_lcd = {m, n, -1, -1, -1, -1, -1};
#if defined(DISPL_PLL_SPREAD_SPECTRUM)
struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
0
};
do_enable_clocks(clk_domains, clk_modules_explicit_en, 1);
- /* 0x44e0_0500 write lcdc pixel clock mux Linux hat hier 0 */
- writel(0x0, &cmdpll->clklcdcpixelclk);
do_setup_dpll(&dpll_lcd_regs, &dpll_lcd);
{
unsigned char buf[1];
+ set_gpio(BOARD_LCD_RESET, 0);
+ mdelay(1);
set_gpio(BOARD_LCD_RESET, 1);
+ mdelay(1);
/* spi lcd init */
- kwh043st20_f01_spi_startup(1, 0, 5000000, SPI_MODE_3);
+ kwh043st20_f01_spi_startup(1, 0, 5000000, SPI_MODE_0);
/* backlight on */
buf[0] = 0xf;
printf("%s: %s not found, using default %s\n", __func__,
factory_dat.disp_name, lcd_panels[i].name);
}
- conf_disp_pll(25, 2);
+ conf_disp_pll(24, 1);
da8xx_video_init(&lcd_panels[display], &lcd_cfgs[display],
lcd_cfgs[display].bpp);
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = sixnet.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = qs850.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = qs860t.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-#
-
-COBJS-y += $(BOARD).o
-COBJS-y += law.o
-COBJS-y += tlb.o
-COBJS-y += nand.o
-COBJS-y += sdram.o
-COBJS-$(CONFIG_FSL_DDR2) += ddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += socrates.o
+obj-y += law.o
+obj-y += tlb.o
+obj-y += nand.o
+obj-y += sdram.o
+obj-$(CONFIG_FSL_DDR2) += ddr.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o hpi.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = spc1920.o hpi.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = spd8xx.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)board/$(VENDOR)/common)
-endif
-
-LIB = $(obj)lib$(VENDOR).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := spr_misc.o
-SOBJS := spr_lowlevel_init.o
+obj-y := spr_misc.o
+obj-y += spr_lowlevel_init.o
endif
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := spear300.o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := spear300.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := spear310.o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := spear310.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := spear320.o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := spear320.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := spear600.o
+obj-y := spear600.o
endif
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := fpga.o $(BOARD).o
+obj-y := fpga.o x600.o
endif
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
CFLAGS += -D__RELEASE -D__STN_8500
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := snowball.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-#########################################################################
+obj-y := snowball.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
CFLAGS += -D__RELEASE -D__STN_8500
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := u8500_href.o gpio.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-#########################################################################
+obj-y := u8500_href.o gpio.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := nhk8815.o
-SOBJS :=
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := nhk8815.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += law.o
-COBJS-y += tlb.o
-COBJS-y += flash.o
-COBJS-$(CONFIG_FSL_DDR1) += ddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += stxgp3.o
+obj-y += law.o
+obj-y += tlb.o
+obj-y += flash.o
+obj-$(CONFIG_FSL_DDR1) += ddr.o
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += law.o
-COBJS-y += tlb.o
-COBJS-$(CONFIG_FSL_DDR1) += ddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += stxssa.o
+obj-y += law.o
+obj-y += tlb.o
+obj-$(CONFIG_FSL_DDR1) += ddr.o
popts->write_data_delay = 3;
/* 2T timing enable */
- popts->twoT_en = 1;
+ popts->twot_en = 1;
/*
* Factors to consider for half-strength driver enable:
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = stxxtc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = svm_sc8xx.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += jadecpu.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += jadecpu.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += zmx25.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += zmx25.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
-SOBJS := init.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB) $(SOBJS)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := t3corp.o
+obj-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += stamp9g20.o
-COBJS-y += led.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += stamp9g20.o
+obj-y += led.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := tcm-bf518.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o gpio_cfi_flash.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := tcm-bf537.o gpio_cfi_flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := twister.o
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
};
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
}
int ehci_hcd_stop(int index)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := mt_ventoux.o
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
};
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
}
int ehci_hcd_stop(int index)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
-COBJS := mux.o
+obj-y := mux.o
endif
-COBJS += board.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += board.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := am3517crane.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := am3517crane.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifdef CONFIG_SPL_BUILD
-COBJS := mux.o
+obj-y := mux.o
endif
-COBJS += board.o
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += board.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := $(BOARD).o
-COBJS-$(CONFIG_STATUS_LED) += led.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := $(BOARD).o
+obj-$(CONFIG_STATUS_LED) += led.o
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
};
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+ return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
}
int ehci_hcd_stop(int index)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := evm.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := evm.o
#include "mux_data.h"
-#ifdef CONFIG_USB_EHCI
-#include <usb.h>
-#include <asm/arch/ehci.h>
-#include <asm/ehci-omap.h>
-#endif
-
#ifdef CONFIG_DRIVER_TI_CPSW
#include <cpsw.h>
#endif
{GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */
{GPMC_CS2, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS0 */
{GPMC_CS3, (IEN | PTU | PDIS | M1)}, /* QSPI1_CS1*/
+ {USB2_DRVVBUS, (M0 | IEN | FSC) },
};
#endif /* _MUX_DATA_DRA7XX_H_ */
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := evm.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
+obj-y := evm.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := omap5912osk.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := omap5912osk.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := evm.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := evm.o
#include "mux_data.h"
-#ifdef CONFIG_USB_EHCI
+#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
#include <usb.h>
#include <asm/gpio.h>
#include <asm/arch/clock.h>
return 0;
}
+#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
+static void enable_host_clocks(void)
+{
+ int auxclk;
+ int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
+ OPTFCLKEN_HSIC480M_P3_CLK |
+ OPTFCLKEN_HSIC60M_P2_CLK |
+ OPTFCLKEN_HSIC480M_P2_CLK |
+ OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
+
+ /* Enable port 2 and 3 clocks*/
+ setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
+
+ /* Enable port 2 and 3 usb host ports tll clocks*/
+ setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
+ (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
+#ifdef CONFIG_USB_XHCI_OMAP
+ /* Enable the USB OTG Super speed clocks */
+ setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
+ (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
+#endif
+
+ auxclk = readl((*prcm)->scrm_auxclk1);
+ /* Request auxilary clock */
+ auxclk |= AUXCLK_ENABLE_MASK;
+ writel(auxclk, (*prcm)->scrm_auxclk1);
+}
+#endif
+
/**
* @brief misc_init_r - Configure EVM board specific configurations
* such as power configurations, ethernet initialization as phase2 of
*/
int misc_init_r(void)
{
+ int reg;
+ uint8_t device_mac[6];
+
#ifdef CONFIG_PALMAS_POWER
palmas_init_settings();
#endif
+
+ if (!getenv("usbethaddr")) {
+ reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
+
+ /*
+ * create a fake MAC address from the processor ID code.
+ * first byte is 0x02 to signify locally administered.
+ */
+ device_mac[0] = 0x02;
+ device_mac[1] = readl(reg + 0x10) & 0xff;
+ device_mac[2] = readl(reg + 0xC) & 0xff;
+ device_mac[3] = readl(reg + 0x8) & 0xff;
+ device_mac[4] = readl(reg) & 0xff;
+ device_mac[5] = (readl(reg) >> 8) & 0xff;
+
+ eth_setenv_enetaddr("usbethaddr", device_mac);
+ }
+
return 0;
}
.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
};
-static void enable_host_clocks(void)
-{
- int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
- OPTFCLKEN_HSIC480M_P3_CLK |
- OPTFCLKEN_HSIC60M_P2_CLK |
- OPTFCLKEN_HSIC480M_P2_CLK |
- OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
-
- /* Enable port 2 and 3 clocks*/
- setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
-
- /* Enable port 2 and 3 usb host ports tll clocks*/
- setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
- (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
-}
-
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
int ret;
- int auxclk;
- int reg;
- uint8_t device_mac[6];
enable_host_clocks();
- if (!getenv("usbethaddr")) {
- reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
-
- /*
- * create a fake MAC address from the processor ID code.
- * first byte is 0x02 to signify locally administered.
- */
- device_mac[0] = 0x02;
- device_mac[1] = readl(reg + 0x10) & 0xff;
- device_mac[2] = readl(reg + 0xC) & 0xff;
- device_mac[3] = readl(reg + 0x8) & 0xff;
- device_mac[4] = readl(reg) & 0xff;
- device_mac[5] = (readl(reg) >> 8) & 0xff;
-
- eth_setenv_enetaddr("usbethaddr", device_mac);
- }
-
- auxclk = readl((*prcm)->scrm_auxclk1);
- /* Request auxilary clock */
- auxclk |= AUXCLK_ENABLE_MASK;
- writel(auxclk, (*prcm)->scrm_auxclk1);
-
- ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+ ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
if (ret < 0) {
puts("Failed to initialize ehci\n");
return ret;
}
}
#endif
+
+#ifdef CONFIG_USB_XHCI_OMAP
+/**
+ * @brief board_usb_init - Configure EVM board specific configurations
+ * for the LDO's and clocks for the USB blocks.
+ *
+ * @return 0
+ */
+int board_usb_init(int index, enum usb_init_type init)
+{
+ int ret;
+#ifdef CONFIG_PALMAS_USB_SS_PWR
+ ret = palmas_enable_ss_ldo();
+#endif
+
+ enable_host_clocks();
+
+ return 0;
+}
+#endif
+++ /dev/null
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := omap730p2.o flash.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+++ /dev/null
-
- u-boot for the TI OMAP730 Perseus2
-
- Dave Peverley, MPC-Data Limited
- http://www.mpc-data.co.uk
-
-
-Overview :
-
- As the OMAP730 is similar to the OMAP1610 in many ways, this port was based
-on the u-boot port to the OMAP1610 Innovator. Supported features are :
-
- - Serial terminal support
- - Onboard NOR Flash
- - Ethernet via the seperate debug board
- - Tested on Rev4 and Rev5 boards
-
- It has also been tested to work correctly when built with a 'standard' GCC
-3.2.1 cross-compiler as well as Montavista Linux CEE 3.1's toolchain.
-
-
-Hardware Configuration :
-
- The main dips on the P2 board should be set to 2,3,7 and 9 on with all
-others off. On the debug board, dips 1 and 7 should be on with the rest off.
-The serial console has been set up to run from the DB9 connector on the
-P2 board at 115200 baud, 8 data bits, no stop bits, 1 parity bit.
-
- It should be noted that the P2 board has NOR flash that is addressable via
-either CS0 or CS3. This mode can be changed via DIP9 on the P2 board.
-
-
-Installing u-boot for the P2 :
-
- You can simply build u-boot for the Perseus by following the instructions
-in the main readme file. The target configuration is "omap730p2_config".
-Once u-boot has been built, you should strip the executable so it can be
-loaded via CCS (which cant cope with the symbols in the ELF binary) :
- $ cp u-boot u-boot.out
- $ arm-linux-strip u-boot.out
-
- The method we've used for installing u-boot the first time on a P2 is
-as follows :
-
-1) Configure TI Code Composer Studio to connect to the P2 board via JTAG
- as described in the Users Guide.
-
-2) Set up the P2 to boot from CS3, and connect with CCS. Reset the CPU
- and run the "init_mmu" GEL script.
-
-3) Use the "Load Program" option to send the u-boot.out file to the P2 and
- run.
-
- At this point, u-boot should run and you will see the boot menu on your
-serial terminal. You can then load the u-boot image to memory :
-
- # loadb 0x10000000
-
- Send the "u-boot.bin" binary via the serial using Kermit. Once loaded
-you can self-flash u-boot :
-
- # protect off 1:0
- # erase 1:0
- # cp.b 0x10000000 0x0 0x20000
-
- You should now be able to reset the board and run u-boot from flash.
-
-
-Alternative flash option :
-
- Sometimes, if you've been silly, you can get the board into a state where
-whats in flash has upset the board so much that you can no longer connect
-to the P2 via JTAG. However, you can set DIP9 to off to swap the boot mode
-of the P2 so that you boot from RAM instead of NOR flash. This moves NOR
-flash up to 0x0C000000. You can build a special version of u-boot to
-utilise this by the following config :
-
- $ make omap730p2_cs0boot_config
-
- If you load this up via CCS it will detect flash at its alternate location
-and allow you to programme your u-boot image (which, remember must be built
-for CS3 boot!) Once you do this, you can revert to CS3 boot and it will work
-fine again.
-
-
-Errata :
-
-1) It's been observed that sometimes the tftp transfer of kernels to the
- board can have checksum errors or stall. This appears to be an issue
- with the lan91c96.c driver, and can normally be worked around by
- resetting the board and trying again.
+++ /dev/null
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
-#
-# (C) Copyright 2003
-# Texas Instruments, <www.ti.com>
-# Kshitij Gupta <Kshitij@ti.com>
-#
-# TI Perseus 2 board with OMAP720 (ARM925EJS) cpu
-# see http://www.ti.com/ for more information on Texas Instruments
-#
-# Innovator has 1 bank of 256 MB SDRAM
-# Physical Address:
-# 1000'0000 to 2000'0000
-#
-#
-# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000
-# (mem base + reserved)
-#
-# we load ourself to 1108'0000
-#
-#
-
-CONFIG_SYS_TEXT_BASE = 0x11080000
+++ /dev/null
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <linux/byteorder/swab.h>
-
-#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-#define FLASH_PORT_WIDTH ushort
-#define FLASH_PORT_WIDTHV vu_short
-#define SWAP(x) __swab16(x)
-#else
-#define FLASH_PORT_WIDTH ulong
-#define FLASH_PORT_WIDTHV vu_long
-#define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-
-/* Flash Organization Structure */
-typedef struct OrgDef {
- unsigned int sector_number;
- unsigned int sector_size;
-} OrgDef;
-
-
-/* Flash Organizations */
-OrgDef OrgIntel_28F256L18T[] = {
- {4, 32 * 1024}, /* 4 * 32kBytes sectors */
- {255, 128 * 1024}, /* 255 * 128kBytes sectors */
-};
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-unsigned long flash_init (void);
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-void flash_print_info (flash_info_t * info);
-void flash_unprotect_sectors (FPWV * addr);
-int flash_erase (flash_info_t * info, int s_first, int s_last);
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- break;
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- if (i > 255) {
- info->start[i] = base + (i * 0x8000);
- info->protect[i] = 0;
- } else {
- info->start[i] = base +
- (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F256L18T:
- printf ("FLASH 28F256L18T\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- volatile FPW value;
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0];
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return (0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
- switch (value) {
-
- case (FPW) (INTEL_ID_28F256L18T):
- info->flash_id += FLASH_28F256L18T;
- info->sector_count = 259;
- info->size = 0x02000000;
- break; /* => 32 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
- info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return (info->size);
-}
-
-
-/* unprotects a sector for write and erase
- * on some intel parts, this unprotects the entire chip, but it
- * wont hurt to call this additional times per sector...
- */
-void flash_unprotect_sectors (FPWV * addr)
-{
-#define PD_FINTEL_WSMS_READY_MASK 0x0080
-
- *addr = (FPW) 0x00500050; /* clear status register */
-
- /* this sends the clear lock bit command */
- *addr = (FPW) 0x00600060;
- *addr = (FPW) 0x00D000D0;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int flag, prot, sect;
- ulong type, start;
- int rcode = 0;
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- flash_unprotect_sectors (addr);
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- *addr = (FPW) 0x00500050;/* clear status register */
- *addr = (FPW) 0x00200020;/* erase setup */
- *addr = (FPW) 0x00D000D0;/* erase confirm */
-
- while (((status =
- *addr) & (FPW) 0x00800080) !=
- (FPW) 0x00800080) {
- if (get_timer(start) >
- CONFIG_SYS_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- /* suspend erase */
- *addr = (FPW) 0x00B000B0;
- /* reset to read mode */
- *addr = (FPW) 0x00FF00FF;
- rcode = 1;
- break;
- }
- }
-
- /* clear status register cmd. */
- *addr = (FPW) 0x00500050;
- *addr = (FPW) 0x00FF00FF;/* resest to read mode */
- printf (" done\n");
- }
- }
-
- if (flag)
- enable_interrupts();
-
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return (rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return (0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return (write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
- int flag, rc = 0;
- ulong start;
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
- return (2);
- }
- flash_unprotect_sectors (addr);
- /* Disable interrupts which might cause a timeout here */
- flag = disable_interrupts ();
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- start = get_timer(0);
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
- rc = 1;
- goto done;
- }
- }
-done:
- *addr = (FPW)0x00FF00FF; /* restore read mode */
- if (flag)
- enable_interrupts();
- return rc;
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
+++ /dev/null
-/*
- * Board specific setup info
- *
- * (C) Copyright 2003-2004
- *
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004
- *
- * Modified for OMAP730 P2 Board by Dave Peverley, MPC-Data Limited
- * (http://www.mpc-data.co.uk)
- *
- * TODO : Tidy up and change to use system register defines
- * from omap730.h where possible.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <config.h>
-#include <version.h>
-
-#if defined(CONFIG_OMAP730)
-#include <./configs/omap730.h>
-#endif
-
-_TEXT_BASE:
- .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
-
-.globl lowlevel_init
-lowlevel_init:
- /* Save callers address in r11 - r11 must never be modified */
- mov r11, lr
-
- /*------------------------------------------------------*
- *mask all IRQs by setting all bits in the INTMR default*
- *------------------------------------------------------*/
- mov r1, #0xffffffff
- ldr r0, =REG_IHL1_MIR
- str r1, [r0]
- ldr r0, =REG_IHL2_MIR
- str r1, [r0]
-
- /*------------------------------------------------------*
- * Set up ARM CLM registers (IDLECT1) *
- *------------------------------------------------------*/
- ldr r0, REG_ARM_IDLECT1
- ldr r1, VAL_ARM_IDLECT1
- str r1, [r0]
-
- /*------------------------------------------------------*
- * Set up ARM CLM registers (IDLECT2) *
- *------------------------------------------------------*/
- ldr r0, REG_ARM_IDLECT2
- ldr r1, VAL_ARM_IDLECT2
- str r1, [r0]
-
- /*------------------------------------------------------*
- * Set up ARM CLM registers (IDLECT3) *
- *------------------------------------------------------*/
- ldr r0, REG_ARM_IDLECT3
- ldr r1, VAL_ARM_IDLECT3
- str r1, [r0]
-
-
- mov r1, #0x01 /* PER_EN bit */
- ldr r0, REG_ARM_RSTCT2
- strh r1, [r0] /* CLKM; Peripheral reset. */
-
- /* Set CLKM to Sync-Scalable */
- /* I supposedly need to enable the dsp clock before switching */
- mov r1, #0x1000
- ldr r0, REG_ARM_SYSST
- strh r1, [r0]
- mov r0, #0x400
-1:
- subs r0, r0, #0x1 /* wait for any bubbles to finish */
- bne 1b
- ldr r1, VAL_ARM_CKCTL
- ldr r0, REG_ARM_CKCTL
- strh r1, [r0]
-
- /* a few nops to let settle */
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
- nop
-
- /* setup DPLL 1 */
- /* Ramp up the clock to 96Mhz */
- ldr r1, VAL_DPLL1_CTL
- ldr r0, REG_DPLL1_CTL
- strh r1, [r0]
- ands r1, r1, #0x10 /* Check if PLL is enabled. */
- beq lock_end /* Do not look for lock if BYPASS selected */
-2:
- ldrh r1, [r0]
- ands r1, r1, #0x01 /* Check the LOCK bit.*/
- beq 2b /* loop until bit goes hi. */
-lock_end:
-
- /*------------------------------------------------------*
- * Turn off the watchdog during init... *
- *------------------------------------------------------*/
- ldr r0, REG_WATCHDOG
- ldr r1, WATCHDOG_VAL1
- str r1, [r0]
- ldr r1, WATCHDOG_VAL2
- str r1, [r0]
- ldr r0, REG_WSPRDOG
- ldr r1, WSPRDOG_VAL1
- str r1, [r0]
- ldr r0, REG_WWPSDOG
-
-watch1Wait:
- ldr r1, [r0]
- tst r1, #0x10
- bne watch1Wait
-
- ldr r0, REG_WSPRDOG
- ldr r1, WSPRDOG_VAL2
- str r1, [r0]
- ldr r0, REG_WWPSDOG
-watch2Wait:
- ldr r1, [r0]
- tst r1, #0x10
- bne watch2Wait
-
- /* Set memory timings corresponding to the new clock speed */
-
- /* Check execution location to determine current execution location
- * and branch to appropriate initialization code.
- */
- /* Compare physical SDRAM base & current execution location. */
- and r0, pc, #0xF0000000
- /* Compare. */
- cmp r0, #0
- /* Skip over EMIF-fast initialization if running from SDRAM. */
- bne skip_sdram
-
- /*
- * Delay for SDRAM initialization.
- */
- mov r3, #0x1800 /* value should be checked */
-3:
- subs r3, r3, #0x1 /* Decrement count */
- bne 3b
-
- ldr r0, REG_SDRAM_CONFIG
- ldr r1, SDRAM_CONFIG_VAL
- str r1, [r0]
-
- ldr r0, REG_SDRAM_MRS_LEGACY
- ldr r1, SDRAM_MRS_VAL
- str r1, [r0]
-
-skip_sdram:
-
-common_tc:
- /* slow interface */
- ldr r1, VAL_TC_EMIFS_CS0_CONFIG
- ldr r0, REG_TC_EMIFS_CS0_CONFIG
- str r1, [r0] /* Chip Select 0 */
-
- ldr r1, VAL_TC_EMIFS_CS1_CONFIG
- ldr r0, REG_TC_EMIFS_CS1_CONFIG
- str r1, [r0] /* Chip Select 1 */
- ldr r1, VAL_TC_EMIFS_CS2_CONFIG
- ldr r0, REG_TC_EMIFS_CS2_CONFIG
- str r1, [r0] /* Chip Select 2 */
- ldr r1, VAL_TC_EMIFS_CS3_CONFIG
- ldr r0, REG_TC_EMIFS_CS3_CONFIG
- str r1, [r0] /* Chip Select 3 */
-
- /* 48MHz clock request for UART1 */
- ldr r1, PERSEUS2_CONFIG_BASE
- ldrh r0, [r1, #CONFIG_PCC_CONF]
- orr r0, r0, #CONF_MOD_UART1_CLK_MODE_R
- strh r0, [r1, #CONFIG_PCC_CONF]
-
- /* Initialize public and private rheas
- * - set access factor 2 on both rhea / strobe
- * - disable write buffer on strb0, enable write buffer on strb1
- */
-
- ldr R0, REG_RHEA_PUB_CTL
- ldr R1, REG_RHEA_PRIV_CTL
- ldr R2, VAL_RHEA_CTL
- strh R2, [R0]
- strh R2, [R1]
- mov R3, #2 /* disable write buffer on strb0, enable write buffer on strb1 */
- strh R3, [R0, #0x08] /* arm rhea control reg */
- strh R3, [R1, #0x08]
-
- /* enable IRQ and FIQ */
-
- mrs r4, CPSR
- bic r4, r4, #IRQ_MASK
- bic r4, r4, #FIQ_MASK
- msr CPSR, r4
-
- /* set TAP CONF to TRI EMULATION */
-
- ldr r1, [r0, #CONFIG_MODE2]
- bic r1, r1, #0x18
- orr r1, r1, #0x10
- str r1, [r0, #CONFIG_MODE2]
-
- /* set tdbgen to 1 */
-
- ldr r0, PERSEUS2_CONFIG_BASE
- ldr r1, [r0, #CONFIG_MODE1]
- mov r2, #0x10000
- orr r1, r1, r2
- str r1, [r0, #CONFIG_MODE1]
-
-#ifdef CONFIG_P2_OMAP1610
- /* inserting additional 2 clock cycle hold time for LAN */
- ldr r0, REG_TC_EMIFS_CS1_ADVANCED
- ldr r1, VAL_TC_EMIFS_CS1_ADVANCED
- str r1, [r0]
-#endif
- /* Start MPU Timer 1 */
- ldr r0, REG_MPU_LOAD_TIMER
- ldr r1, VAL_MPU_LOAD_TIMER
- str r1, [r0]
-
- ldr r0, REG_MPU_CNTL_TIMER
- ldr r1, VAL_MPU_CNTL_TIMER
- str r1, [r0]
-
- /* back to arch calling code */
- mov pc, r11
-
- /* the literal pools origin */
- .ltorg
-
-REG_TC_EMIFS_CONFIG: /* 32 bits */
- .word 0xfffecc0c
-REG_TC_EMIFS_CS0_CONFIG: /* 32 bits */
- .word 0xfffecc10
-REG_TC_EMIFS_CS1_CONFIG: /* 32 bits */
- .word 0xfffecc14
-REG_TC_EMIFS_CS2_CONFIG: /* 32 bits */
- .word 0xfffecc18
-REG_TC_EMIFS_CS3_CONFIG: /* 32 bits */
- .word 0xfffecc1c
-
-#ifdef CONFIG_P2_OMAP730
-REG_TC_EMIFS_CS1_ADVANCED: /* 32 bits */
- .word 0xfffecc54
-#endif
-
-/* MPU clock/reset/power mode control registers */
-REG_ARM_CKCTL: /* 16 bits */
- .word 0xfffece00
-
-REG_ARM_IDLECT3: /* 16 bits */
- .word 0xfffece24
-REG_ARM_IDLECT2: /* 16 bits */
- .word 0xfffece08
-REG_ARM_IDLECT1: /* 16 bits */
- .word 0xfffece04
-
-REG_ARM_RSTCT2: /* 16 bits */
- .word 0xfffece14
-REG_ARM_SYSST: /* 16 bits */
- .word 0xfffece18
-/* DPLL control registers */
-REG_DPLL1_CTL: /* 16 bits */
- .word 0xfffecf00
-
-/* Watch Dog register */
-/* secure watchdog stop */
-REG_WSPRDOG:
- .word 0xfffeb048
-/* watchdog write pending */
-REG_WWPSDOG:
- .word 0xfffeb034
-
-WSPRDOG_VAL1:
- .word 0x0000aaaa
-WSPRDOG_VAL2:
- .word 0x00005555
-
-/* SDRAM config is: auto refresh enabled, 16 bit 4 bank,
- counter @8192 rows, 10 ns, 8 burst */
-REG_SDRAM_CONFIG:
- .word 0xfffecc20
-
-REG_SDRAM_MRS_LEGACY:
- .word 0xfffecc24
-
-REG_WATCHDOG:
- .word 0xfffec808
-
-REG_MPU_LOAD_TIMER:
- .word 0xfffec504
-REG_MPU_CNTL_TIMER:
- .word 0xfffec500
-
-/* Public and private rhea bridge registers definition */
-
-REG_RHEA_PUB_CTL:
- .word 0xFFFECA00
-
-REG_RHEA_PRIV_CTL:
- .word 0xFFFED300
-
-/* EMIFF SDRAM Configuration register
- - self refresh disable
- - auto refresh enabled
- - SDRAM type 64 Mb, 16 bits bus 4 banks
- - power down enabled
- - SDRAM clock disabled
- */
-SDRAM_CONFIG_VAL:
- .word 0x0C017DF4
-
-/* Burst full page length ; cas latency = 3 */
-SDRAM_MRS_VAL:
- .word 0x00000037
-
-VAL_ARM_CKCTL:
- .word 0x6505
-VAL_DPLL1_CTL:
- .word 0x3412
-
-#ifdef CONFIG_P2_OMAP730
-VAL_TC_EMIFS_CS0_CONFIG:
- .word 0x0000FFF3
-VAL_TC_EMIFS_CS1_CONFIG:
- .word 0x00004278
-VAL_TC_EMIFS_CS2_CONFIG:
- .word 0x00004278
-VAL_TC_EMIFS_CS3_CONFIG:
- .word 0x00004278
-VAL_TC_EMIFS_CS1_ADVANCED:
- .word 0x00000022
-#endif
-
-VAL_ARM_IDLECT1:
- .word 0x00000400
-VAL_ARM_IDLECT2:
- .word 0x00000886
-VAL_ARM_IDLECT3:
- .word 0x00000015
-
-WATCHDOG_VAL1:
- .word 0x000000f5
-WATCHDOG_VAL2:
- .word 0x000000a0
-
-VAL_MPU_LOAD_TIMER:
- .word 0xffffffff
-VAL_MPU_CNTL_TIMER:
- .word 0xffffffa1
-
-VAL_RHEA_CTL:
- .word 0xFF22
-
-/* Config Register vals */
-PERSEUS2_CONFIG_BASE:
- .word 0xFFFE1000
-
-.equ CONFIG_PCC_CONF, 0xB4
-.equ CONFIG_MODE1, 0x10
-.equ CONFIG_MODE2, 0x14
-.equ CONF_MOD_UART1_CLK_MODE_R, 0x0A
-
-/* misc values */
-.equ IRQ_MASK, 0x80 /* IRQ mask value */
-.equ FIQ_MASK, 0x40 /* FIQ mask value */
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <netdev.h>
-#if defined(CONFIG_OMAP730)
-#include <./configs/omap730.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int test_boot_mode(void);
-void spin_up_leds(void);
-void flash__init (void);
-void ether__init (void);
-void set_muxconf_regs (void);
-void peripheral_power_enable (void);
-
-#define FLASH_ON_CS0 1
-#define FLASH_ON_CS3 0
-
-static inline void delay (unsigned long loops)
-{
- __asm__ volatile ("1:\n"
- "subs %0, %1, #1\n"
- "bne 1b":"=r" (loops):"0" (loops));
-}
-
-int test_boot_mode(void)
-{
- /* Check for CS0 and CS3 address decode swapping */
- if (*((volatile int *)EMIFS_CONFIG) & 0x00000002)
- return(FLASH_ON_CS3);
- else
- return(FLASH_ON_CS0);
-}
-
-/* Toggle backup LED indication */
-void toggle_backup_led(void)
-{
- static int backupLEDState = 0; /* Init variable so that the LED will be ON the first time */
- volatile unsigned int *IOConfReg;
-
-
- IOConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DATA_OUTPUT);
-
- if (backupLEDState != 0) {
- *IOConfReg &= (0xFFFFEFFF);
- backupLEDState = 0;
- } else {
- *IOConfReg |= (0x00001000);
- backupLEDState = 1;
- }
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-int board_init (void)
-{
- /* arch number of OMAP 730 P2 Board - Same as the Innovator! */
- gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2;
-
- /* adress of boot parameters */
- gd->bd->bi_boot_params = 0x10000100;
-
- /* Configure MUX settings */
- set_muxconf_regs ();
-
- peripheral_power_enable ();
-
- /* Backup LED indication via GPIO_140 -> Red led if MUX correctly setup */
- toggle_backup_led();
-
- /* Hold GSM in reset until needed */
- *((volatile unsigned short *)M_CTL) &= ~1;
-
- /*
- * CSx timings, GPIO Mux ... setup
- */
-
- /* Flash: CS0 timings setup */
- *((volatile unsigned int *) FLASH_CFG_0) = 0x0000fff3;
- *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000088;
-
- /* Ethernet support trough the debug board */
- /* CS1 timings setup */
- *((volatile unsigned int *) FLASH_CFG_1) = 0x0000fff3;
- *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000000;
-
- /* this speeds up your boot a quite a bit. However to make it
- * work, you need make sure your kernel startup flush bug is fixed.
- * ... rkw ...
- */
- icache_enable ();
-
- flash__init ();
- ether__init ();
-
- return 0;
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-void flash__init (void)
-{
- unsigned int regval;
-
- regval = *((volatile unsigned int *) EMIFS_CONFIG);
- /* Turn off write protection for flash devices. */
- regval = regval | 0x0001;
- *((volatile unsigned int *) EMIFS_CONFIG) = regval;
-}
-
-/*************************************************************
- Routine:ether__init
- Description: take the Ethernet controller out of reset and wait
- for the EEPROM load to complete.
-*************************************************************/
-void ether__init (void)
-{
-#define LAN_RESET_REGISTER 0x0400001c
-
- *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
- do {
- *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
- udelay (100);
- } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
-
- do {
- *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
- udelay (100);
- } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
-
-#define ETH_CONTROL_REG 0x0400030b
-
- *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
- udelay (100);
-}
-
-/******************************
- Routine:
- Description:
-******************************/
-int dram_init (void)
-{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
- return 0;
-}
-
-/******************************************************
- Routine: set_muxconf_regs
- Description: Setting up the configuration Mux registers
- specific to the hardware
-*******************************************************/
-void set_muxconf_regs (void)
-{
- volatile unsigned int *MuxConfReg;
- /* set each registers to its reset value; */
-
- /*
- * Backup LED Indication
- */
-
- /* Configure MUXed pin. Mode 6: GPIO_140 */
- MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF10);
- *MuxConfReg &= (0xFFFFFF1F); /* Clear D_MPU_LPG1 */
- *MuxConfReg |= 0x000000C0; /* Set D_MPU_LPG1 to 0x6 */
-
- /* Configure GPIO_140 as output */
- MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DIRECTION_CONTROL);
- *MuxConfReg &= (0xFFFFEFFF); /* Clear direction (output) for GPIO 140 */
-
- /*
- * Configure GPIOs for battery charge & feedback
- */
-
- /* Configure MUXed pin. Mode 6: GPIO_35 */
- MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
- *MuxConfReg &= 0xFFFFFFF1; /* Clear M_CLK_OUT */
- *MuxConfReg |= 0x0000000C; /* Set M_CLK_OUT = 0x6 (GPIOs) */
-
- /* Configure MUXed pin. Mode 6: GPIO_72,73,74 */
- MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF5);
- *MuxConfReg &= 0xFFFF1FFF; /* Clear D_DDR */
- *MuxConfReg |= 0x0000C000; /* Set D_DDR = 0x6 (GPIOs) */
-
- MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DIRECTION_CONTROL);
- *MuxConfReg |= 0x00000100; /* Configure GPIO_72 as input */
- *MuxConfReg &= 0xFFFFFDFF; /* Configure GPIO_73 as output */
-
- /*
- * Allow battery charge
- */
-
- MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DATA_OUTPUT);
- *MuxConfReg &= (0xFFFFFDFF); /* Clear GPIO_73 pin */
-
- /*
- * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
- * It is used as the Ethernet controller interrupt
- */
- MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF9);
- *MuxConfReg &= 0x1FFFFFFF;
-}
-
-/******************************************************
- Routine: peripheral_power_enable
- Description: Enable the power for UART1
-*******************************************************/
-void peripheral_power_enable (void)
-{
- volatile unsigned int *MuxConfReg;
-
-
- /* Set up pins used by UART */
-
- /* Start UART clock (48MHz) */
- MuxConfReg = (volatile unsigned int *) (PERSEUS_PCC_CONF_REG);
- *MuxConfReg &= (0xFFFFFFF7);
- *MuxConfReg |= (0x00000008);
-
- /* Get the UART pin in mode0 */
- MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
- *MuxConfReg &= (0xFF1FFFFF);
- *MuxConfReg &= (0xF1FFFFFF);
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
- int rc = 0;
-#ifdef CONFIG_LAN91C96
- rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
-#endif
- return rc;
-}
-#endif
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := panda.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := panda.o
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
};
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
int ret;
unsigned int utmi_clk;
utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK;
sr32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, 0, 32, utmi_clk);
- ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+ ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
if (ret < 0)
return ret;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := sdp.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := sdp.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := sdp.o
+obj-y := sdp.o
ifndef CONFIG_SPL_BUILD
-COBJS += cmd_bat.o
+obj-y += cmd_bat.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifdef CONFIG_SPL_BUILD
-COBJS := mux.o
+obj-y := mux.o
endif
-COBJS += evm.o
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-clean:
- rm -f $(SOBJS) $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += evm.o
# SPDX-License-Identifier: GPL-2.0
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := evm.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := evm.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS += sdb_board.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-.PHONY: all
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += sdb_board.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := devkit3250.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := devkit3250.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := devkit8000.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := devkit8000.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := colibri_pxa270.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := colibri_pxa270.o
#include <netdev.h>
#include <asm/io.h>
#include <serial.h>
+#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
}
#ifdef CONFIG_CMD_USB
-int usb_board_init(void)
+int board_usb_init(int index, enum usb_init_type init)
{
writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
return 0;
}
-void usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum usb_init_type init)
{
- return;
+ return 0;
}
void usb_board_stop(void)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
$(shell mkdir -p $(obj)../../nvidia/common)
$(shell mkdir -p $(obj)../colibri_t20-common)
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := ../../nvidia/common/board.o
-COBJS += ../colibri_t20-common/colibri_t20-common.o
-COBJS += $(BOARD).o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ../../nvidia/common/board.o
+obj-y += ../colibri_t20-common/colibri_t20-common.o
+obj-y += colibri_t20_iris.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o sdram.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := total5200.o sdram.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+obj-y := tqm5200.o cmd_stk52xx.o cmd_tb5200.o cam5200_flash.o
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o cmd_stk52xx.o cmd_tb5200.o cam5200_flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-cam5200_flash.o: cam5200_flash.c
+$(obj)cam5200_flash.o: cam5200_flash.c
$(CC) $(CFLAGS) -c -o $@ $<
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../tqm8xx/)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o ../tqm8xx/load_sernum_ethaddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = tqm8260.o ../tqm8xx/load_sernum_ethaddr.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../tqm8xx/)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o ../tqm8xx/load_sernum_ethaddr.o nand.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = tqm8272.o ../tqm8xx/load_sernum_ethaddr.o nand.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-$(CONFIG_PCI) += pci.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += tqm834x.o
+obj-$(CONFIG_PCI) += pci.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o load_sernum_ethaddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = tqm8xx.o load_sernum_ethaddr.o
board/tqc/tqm8xx/libtqm8xx.o (.text*)
disk/libdisk.o (.text*)
drivers/net/libnet.o (.text*)
- drivers/pcmcia/libpcmcia.o (.text.pcmcia_on)
- drivers/pcmcia/libpcmcia.o (.text.pcmcia_hardware_enable)
+ drivers/libdrivers.o (.text.pcmcia_on)
+ drivers/libdrivers.o (.text.pcmcia_hardware_enable)
. = DEFINED(env_offset) ? env_offset : .;
common/env_embedded.o (.ppcenv*)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := conxs.o eeprom.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := conxs.o eeprom.o
#include <asm/arch/regs-mmc.h>
#include <netdev.h>
#include <asm/io.h>
+#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
* Miscelaneous platform dependent initialisations
*/
-int usb_board_init(void)
+int board_usb_init(int index, enum usb_init_type init)
{
writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
return 0;
}
-void usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum usb_init_type init)
{
- return;
+ return 0;
}
void usb_board_stop(void)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := vision2.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := vision2.o
--- /dev/null
+#
+# (C) Copyright 2013 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := udoo.o
--- /dev/null
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * Author: Fabio Estevam <fabio.estevam@freescale.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/mx6-pins.h>
+#include <asm/errno.h>
+#include <asm/gpio.h>
+#include <asm/imx-common/iomux-v3.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define WDT_EN IMX_GPIO_NR(5, 4)
+#define WDT_TRG IMX_GPIO_NR(3, 19)
+
+int dram_init(void)
+{
+ gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
+
+ return 0;
+}
+
+static iomux_v3_cfg_t const uart2_pads[] = {
+ MX6_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const usdhc3_pads[] = {
+ MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+ MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const wdog_pads[] = {
+ MX6_PAD_EIM_A24__GPIO_5_4 | MUX_PAD_CTRL(NO_PAD_CTRL),
+ MX6_PAD_EIM_D19__GPIO_3_19,
+};
+
+static void setup_iomux_uart(void)
+{
+ imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
+}
+
+static void setup_iomux_wdog(void)
+{
+ imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
+ gpio_direction_output(WDT_TRG, 0);
+ gpio_direction_output(WDT_EN, 1);
+}
+
+static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+ return 1; /* Always present */
+}
+
+int board_mmc_init(bd_t *bis)
+{
+ imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
+ usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+ usdhc_cfg.max_bus_width = 4;
+
+ return fsl_esdhc_initialize(bis, &usdhc_cfg);
+}
+
+int board_early_init_f(void)
+{
+ setup_iomux_wdog();
+ setup_iomux_uart();
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts("Board: Udoo\n");
+
+ return 0;
+}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = utx8245.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = v37.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o ethaddr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := v38b.o ethaddr.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := ve8313.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
ifndef CONFIG_SPL_BUILD
-COBJS := vpac270.o
+obj-y := vpac270.o
else
-COBJS := onenand.o
+obj-y := onenand.o
endif
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#include <netdev.h>
#include <serial.h>
#include <asm/io.h>
+#include <usb.h>
DECLARE_GLOBAL_DATA_PTR;
#endif
#ifdef CONFIG_CMD_USB
-int usb_board_init(void)
+int board_usb_init(int index, enum usb_init_type init)
{
writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
return 0;
}
-void usb_board_init_fail(void)
+int board_usb_cleanup(int index, enum usb_init_type init)
{
- return;
+ return 0;
}
void usb_board_stop(void)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o flash.o fpga.o fsboot.o post2.o vpd.o cmd_vpd.o \
+obj-y = w7o.o flash.o fpga.o fsboot.o post2.o vpd.o cmd_vpd.o \
watchdog.o
-SOBJS = init.o post1.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += init.o post1.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := wandboard.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := wandboard.o
This file contains information for the port of U-Boot to the Wandboard.
-Wandboard is a development board that has two variants: one version based
-on mx6 dual lite and another one based on mx6 solo.
+Wandboard is a development board that has three variants based on the following
+SoCs: mx6 quad, mx6 dual lite and mx6 solo.
For more details about Wandboard, please refer to:
http://www.wandboard.org/
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := woodburn.o
-SOBJS := lowlevel_init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := woodburn.o
+obj-y += lowlevel_init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := xaeniax.o flash.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := xaeniax.o flash.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)board/$(VENDOR)/common)
-endif
-
-LIB = $(obj)lib$(VENDOR).o
-
-COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o
-COBJS-$(CONFIG_MPC8572) += fsl_8xxx_clk.o
-COBJS-$(CONFIG_MPC86xx) += fsl_8xxx_clk.o
-COBJS-$(CONFIG_P2020) += fsl_8xxx_clk.o
-COBJS-$(CONFIG_MPC85xx) += fsl_8xxx_misc.o board.o
-COBJS-$(CONFIG_MPC86xx) += fsl_8xxx_misc.o board.o
-COBJS-$(CONFIG_NAND_ACTL) += actl_nand.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_FSL_PCI_INIT) += fsl_8xxx_pci.o
+obj-$(CONFIG_MPC8572) += fsl_8xxx_clk.o
+obj-$(CONFIG_MPC86xx) += fsl_8xxx_clk.o
+obj-$(CONFIG_P2020) += fsl_8xxx_clk.o
+obj-$(CONFIG_MPC85xx) += fsl_8xxx_misc.o board.o
+obj-$(CONFIG_MPC86xx) += fsl_8xxx_misc.o board.o
+obj-$(CONFIG_NAND_ACTL) += actl_nand.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-SOBJS = init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = xpedite1000.o
+extra-y += init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude ($obj).depend
-
-#########################################################################
+obj-y += xpedite517x.o
+obj-y += ddr.o
+obj-y += law.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += xpedite520x.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += xpedite537x.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y += $(BOARD).o
-COBJS-y += ddr.o
-COBJS-y += law.o
-COBJS-y += tlb.o
-
-SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS-y))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += xpedite550x.o
+obj-y += ddr.o
+obj-y += law.o
+obj-y += tlb.o
ddr_freq <= pbsp->datarate_mhz_high) {
popts->clk_adjust = pbsp->clk_adjust;
popts->cpo_override = pbsp->cpo;
- popts->twoT_en = 0;
+ popts->twot_en = 0;
break;
}
pbsp++;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = microblaze-generic.o
# SPDX-License-Identifier: GPL-2.0+
#
-COBJS += $(BOARD).o
+obj-y += ml507.o
include $(SRCTREE)/board/xilinx/ppc440-generic/Makefile
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../../xilinx/ppc405-generic)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS += ../../xilinx/ppc405-generic/xilinx_ppc405_generic.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += ../../xilinx/ppc405-generic/xilinx_ppc405_generic.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
ifneq ($(OBJTREE),$(SRCTREE))
$(shell mkdir -p $(obj)../../xilinx/ppc440-generic)
endif
-LIB = $(obj)lib$(BOARD).o
-
-COBJS += ../../xilinx/ppc440-generic/xilinx_ppc440_generic.o
-SOBJS += ../../xilinx/ppc440-generic/init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += ../../xilinx/ppc440-generic/xilinx_ppc440_generic.o
+extra-y += ../../xilinx/ppc440-generic/init.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS-y := board.o
-
-COBJS := $(sort $(COBJS-y))
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak $(obj).depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := board.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS = $(BOARD).o update.o
-SOBJS =
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y = zeus.o update.o
-
#
# Copyright (C) 2009
# Marek Vasut <marek.vasut@gmail.com>
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := zipitz2.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := zipitz2.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := $(BOARD).o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y := zpc1900.o
Active arm arm926ejs mx25 freescale mx25pdk mx25pdk mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg Fabio Estevam <fabio.estevam@freescale.com>
Active arm arm926ejs mx25 karo tx25 tx25 - John Rigby <jcrigby@gmail.com>
Active arm arm926ejs mx25 syteco zmx25 zmx25 - Matthias Weisser <weisserm@arcor.de>
-Active arm arm926ejs mx27 armadeus apf27 apf27 - Philippe Reynes <tremyfr@yahoo.fr>:Eric Jarrige <eric.jarrige@armadeus.org>
+Active arm arm926ejs mx27 armadeus apf27 apf27 - Philippe Reynes <tremyfr@yahoo.fr>:Eric Jarrige <eric.jarrige@armadeus.org>
Active arm arm926ejs mx27 logicpd imx27lite imx27lite - Wolfgang Denk <wd@denx.de>
Active arm arm926ejs mx27 logicpd imx27lite magnesium - Heiko Schocher <hs@denx.de>
Active arm arm926ejs mxs bluegiga apx4devkit apx4devkit apx4devkit Lauri Hintsala <lauri.hintsala@bluegiga.com>
Active arm arm926ejs mxs freescale mx28evk mx28evk_auart_console mx28evk:MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_MMC Fabio Estevam <fabio.estevam@freescale.com>
Active arm arm926ejs mxs freescale mx28evk mx28evk_nand mx28evk:ENV_IS_IN_NAND Fabio Estevam <fabio.estevam@freescale.com>
Active arm arm926ejs mxs olimex mx23_olinuxino mx23_olinuxino mx23_olinuxino Marek Vasut <marek.vasut@gmail.com>
+Active arm arm926ejs mxs ppcag bg0900 bg0900 bg0900 Marek Vasut <marex@denx.de>
Active arm arm926ejs mxs sandisk sansa_fuze_plus sansa_fuze_plus - Marek Vasut <marek.vasut@gmail.com>
Active arm arm926ejs mxs schulercontrol sc_sps_1 sc_sps_1 - Marek Vasut <marek.vasut@gmail.com>
Active arm arm926ejs nomadik st nhk8815 nhk8815 - Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>:Alessandro Rubini <rubini@unipv.it>
Active arm arm926ejs nomadik st nhk8815 nhk8815_onenand nhk8815:BOOT_ONENAND Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>:Alessandro Rubini <rubini@unipv.it>
Active arm arm926ejs omap ti - omap5912osk - Rishi Bhattacharya <rishi@ti.com>
-Active arm arm926ejs omap ti omap730p2 omap730p2 omap730p2:CS3_BOOT Dave Peverley <dpeverley@mpc-data.co.uk>
-Active arm arm926ejs omap ti omap730p2 omap730p2_cs0boot omap730p2:CS0_BOOT Dave Peverley <dpeverley@mpc-data.co.uk>
-Active arm arm926ejs omap ti omap730p2 omap730p2_cs3boot omap730p2:CS3_BOOT Dave Peverley <dpeverley@mpc-data.co.uk>
Active arm arm926ejs orion5x LaCie - edminiv2 - Albert ARIBAUD <albert.u.boot@aribaud.net>
Active arm arm926ejs pantheon Marvell - dkb - Lei Wen <leiwen@marvell.com>
Active arm arm926ejs spear spear - x600 x600 Stefan Roese <sr@denx.de>
Active arm armv7 am33xx ti am335x am335x_evm_nor am335x_evm:SERIAL1,CONS_INDEX=1,NAND,NOR Tom Rini <trini@ti.com>
Active arm armv7 am33xx ti am335x am335x_evm_norboot am335x_evm:SERIAL1,CONS_INDEX=1,NOR,NOR_BOOT Tom Rini <trini@ti.com>
Active arm armv7 am33xx ti am335x am335x_evm_spiboot am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT Tom Rini <trini@ti.com>
-Active arm armv7 am33xx ti am335x am335x_evm_uart1 am335x_evm:SERIAL2,CONS_INDEX=1,NAND Tom Rini <trini@ti.com>
-Active arm armv7 am33xx ti am335x am335x_evm_uart2 am335x_evm:SERIAL3,CONS_INDEX=1,NAND Tom Rini <trini@ti.com>
-Active arm armv7 am33xx ti am335x am335x_evm_uart3 am335x_evm:SERIAL4,CONS_INDEX=1,NAND Tom Rini <trini@ti.com>
-Active arm armv7 am33xx ti am335x am335x_evm_uart4 am335x_evm:SERIAL5,CONS_INDEX=1,NAND Tom Rini <trini@ti.com>
-Active arm armv7 am33xx ti am335x am335x_evm_uart5 am335x_evm:SERIAL6,CONS_INDEX=1,NAND Tom Rini <trini@ti.com>
+Active arm armv7 am33xx ti am335x am335x_evm_uart1 am335x_evm:SERIAL2,CONS_INDEX=2,NAND Tom Rini <trini@ti.com>
+Active arm armv7 am33xx ti am335x am335x_evm_uart2 am335x_evm:SERIAL3,CONS_INDEX=3,NAND Tom Rini <trini@ti.com>
+Active arm armv7 am33xx ti am335x am335x_evm_uart3 am335x_evm:SERIAL4,CONS_INDEX=4,NAND Tom Rini <trini@ti.com>
+Active arm armv7 am33xx ti am335x am335x_evm_uart4 am335x_evm:SERIAL5,CONS_INDEX=5,NAND Tom Rini <trini@ti.com>
+Active arm armv7 am33xx ti am335x am335x_evm_uart5 am335x_evm:SERIAL6,CONS_INDEX=6,NAND Tom Rini <trini@ti.com>
Active arm armv7 am33xx ti am335x am335x_evm_usbspl am335x_evm:SERIAL1,CONS_INDEX=1,NAND,SPL_USBETH_SUPPORT Tom Rini <trini@ti.com>
Active arm armv7 am33xx ti am43xx am43xx_evm am43xx_evm:SERIAL1,CONS_INDEX=1 -
-Active arm armv7 am33xx ti ti814x ti814x_evm - Matt Porter <mporter@ti.com>
+Active arm armv7 am33xx ti ti814x ti814x_evm - Matt Porter <matt.porter@linaro.org>
Active arm armv7 am33xx ti ti816x ti816x_evm - -
Active arm armv7 at91 atmel sama5d3xek sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC Bo Shen <voice.shen@atmel.com>
Active arm armv7 at91 atmel sama5d3xek sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH Bo Shen <voice.shen@atmel.com>
Active arm armv7 mx5 genesi mx51_efikamx mx51_efikamx mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_mx.cfg -
Active arm armv7 mx5 genesi mx51_efikamx mx51_efikasb mx51_efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/genesi/mx51_efikamx/imximage_sb.cfg -
Active arm armv7 mx5 ttcontrol vision2 vision2 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg Stefano Babic <sbabic@denx.de>
+Active arm armv7 mx6 - udoo udoo_quad udoo:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024 Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 - wandboard wandboard_dl wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024 Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 - wandboard wandboard_quad wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048 Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 - wandboard wandboard_solo wandboard:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512 Fabio Estevam <fabio.estevam@freescale.com>
Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS MPC8572DS -
Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_36BIT MPC8572DS:36BIT -
Active powerpc mpc85xx - freescale mpc8572ds MPC8572DS_NAND MPC8572DS:NAND -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_36BIT_NAND P1010RDB:P1010RDB,36BIT,NAND -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_36BIT_NAND_SECBOOT P1010RDB:P1010RDB,36BIT,NAND_SECBOOT,SECURE_BOOT -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_36BIT_NOR P1010RDB:P1010RDB,36BIT -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_36BIT_NOR_SECBOOT P1010RDB:P1010RDB,36BIT,SECURE_BOOT -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_36BIT_SDCARD P1010RDB:P1010RDB,36BIT,SDCARD -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_36BIT_SPIFLASH P1010RDB:P1010RDB,36BIT,SPIFLASH -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_36BIT_SPIFLASH_SECBOOT P1010RDB:P1010RDB,36BIT,SPIFLASH,SECURE_BOOT -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_NAND P1010RDB:P1010RDB,NAND -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_NAND_SECBOOT P1010RDB:P1010RDB,NAND_SECBOOT,SECURE_BOOT -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_NOR P1010RDB:P1010RDB -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_NOR_SECBOOT P1010RDB:P1010RDB,SECURE_BOOT -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_SDCARD P1010RDB:P1010RDB,SDCARD -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_SPIFLASH P1010RDB:P1010RDB,SPIFLASH -
-Active powerpc mpc85xx - freescale p1010rdb P1010RDB_SPIFLASH_SECBOOT P1010RDB:P1010RDB,SPIFLASH,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND P1010RDB:P1010RDB_PA,36BIT,NAND -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NAND_SECBOOT P1010RDB:P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NOR P1010RDB:P1010RDB_PA,36BIT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_NOR_SECBOOT P1010RDB:P1010RDB_PA,36BIT,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_SDCARD P1010RDB:P1010RDB_PA,36BIT,SDCARD -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_SPIFLASH P1010RDB:P1010RDB_PA,36BIT,SPIFLASH -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_36BIT_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PA,36BIT,SPIFLASH,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NAND P1010RDB:P1010RDB_PA,NAND -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NAND_SECBOOT P1010RDB:P1010RDB_PA,NAND_SECBOOT,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NOR P1010RDB:P1010RDB_PA -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_NOR_SECBOOT P1010RDB:P1010RDB_PA,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_SDCARD P1010RDB:P1010RDB_PA,SDCARD -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_SPIFLASH P1010RDB:P1010RDB_PA,SPIFLASH -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PA_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PA,SPIFLASH,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NAND P1010RDB:P1010RDB_PB,36BIT,NAND -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NAND_SECBOOT P1010RDB:P1010RDB_PB,36BIT,NAND_SECBOOT,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NOR P1010RDB:P1010RDB_PB,36BIT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_NOR_SECBOOT P1010RDB:P1010RDB_PB,36BIT,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_SDCARD P1010RDB:P1010RDB_PB,36BIT,SDCARD -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_SPIFLASH P1010RDB:P1010RDB_PB,36BIT,SPIFLASH -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_36BIT_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PB,36BIT,SPIFLASH,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NAND P1010RDB:P1010RDB_PB,NAND -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NAND_SECBOOT P1010RDB:P1010RDB_PB,NAND_SECBOOT,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NOR P1010RDB:P1010RDB_PB -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_NOR_SECBOOT P1010RDB:P1010RDB_PB,SECURE_BOOT -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_SDCARD P1010RDB:P1010RDB_PB,SDCARD -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_SPIFLASH P1010RDB:P1010RDB_PB,SPIFLASH -
+Active powerpc mpc85xx - freescale p1010rdb P1010RDB-PB_SPIFLASH_SECBOOT P1010RDB:P1010RDB_PB,SPIFLASH,SECURE_BOOT -
Active powerpc mpc85xx - freescale p1022ds P1022DS - Timur Tabi <timur@freescale.com>
Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT P1022DS:36BIT Timur Tabi <timur@freescale.com>
Active powerpc mpc85xx - freescale p1022ds P1022DS_36BIT_NAND P1022DS:36BIT,NAND Timur Tabi <timur@freescale.com>
Active powerpc mpc85xx - freescale t4qds T4240QDS_SDCARD T4240QDS:PPC_T4240,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 -
Active powerpc mpc85xx - freescale t4qds T4240QDS_SPIFLASH T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 -
Active powerpc mpc85xx - freescale t4qds T4240QDS_SRIO_PCIE_BOOT T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000 -
+Active powerpc mpc85xx - freescale t1040qds T1040QDS T1040QDS:PPC_T1040 Naveen Burmi <NaveenBurmi@freescale.com>
Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD controlcenterd:36BIT,SDCARD Dirk Eibach <eibach@gdsys.de>
Active powerpc mpc85xx - gdsys p1022 controlcenterd_36BIT_SDCARD_DEVELOP controlcenterd:36BIT,SDCARD,DEVELOP Dirk Eibach <eibach@gdsys.de>
Active powerpc mpc85xx - gdsys p1022 controlcenterd_TRAILBLAZER controlcenterd:TRAILBLAZER,SPIFLASH Dirk Eibach <eibach@gdsys.de>
Active powerpc mpc85xx - gdsys p1022 controlcenterd_TRAILBLAZER_DEVELOP controlcenterd:TRAILBLAZER,SPIFLASH,DEVELOP Dirk Eibach <eibach@gdsys.de>
+Active powerpc mpc85xx - keymile kmp204x kmlion1 kmp204x:KMLION1 Valentin Longchamp <valentin.longchamp@keymile.com>
Active powerpc mpc85xx - stx stxgp3 stxgp3 - Dan Malek <dan@embeddedalley.com>
Active powerpc mpc85xx - stx stxssa stxssa stxssa Dan Malek <dan@embeddedalley.com>
Active powerpc mpc85xx - stx stxssa stxssa_4M stxssa:STXSSA_4M Dan Malek <dan@embeddedalley.com>
Orphan powerpc mpc8xx - - mbx8xx MBX - -
Orphan powerpc mpc8xx - - mbx8xx MBX860T - -
Orphan powerpc mpc8xx - - nx823 NX823 - -
+
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libcommon.o
-
# core
ifndef CONFIG_SPL_BUILD
-COBJS-y += main.o
-COBJS-y += command.o
-COBJS-y += exports.o
-COBJS-y += hash.o
-COBJS-$(CONFIG_SYS_HUSH_PARSER) += hush.o
-COBJS-y += s_record.o
-COBJS-y += xyzModem.o
-COBJS-y += cmd_disk.o
+obj-y += main.o
+obj-y += command.o
+obj-y += exports.o
+obj-y += hash.o
+obj-$(CONFIG_SYS_HUSH_PARSER) += hush.o
+obj-y += s_record.o
+obj-y += xyzModem.o
+obj-y += cmd_disk.o
# boards
-COBJS-$(CONFIG_SYS_GENERIC_BOARD) += board_f.o
-COBJS-$(CONFIG_SYS_GENERIC_BOARD) += board_r.o
+obj-$(CONFIG_SYS_GENERIC_BOARD) += board_f.o
+obj-$(CONFIG_SYS_GENERIC_BOARD) += board_r.o
# core command
-COBJS-y += cmd_boot.o
-COBJS-$(CONFIG_CMD_BOOTM) += cmd_bootm.o
-COBJS-y += cmd_help.o
-COBJS-y += cmd_version.o
+obj-y += cmd_boot.o
+obj-$(CONFIG_CMD_BOOTM) += cmd_bootm.o
+obj-y += cmd_help.o
+obj-y += cmd_version.o
# environment
-COBJS-y += env_attr.o
-COBJS-y += env_callback.o
-COBJS-y += env_flags.o
-COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o
-COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o
-XCOBJS-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o
-COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_embedded.o
-XCOBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_embedded.o
-COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_embedded.o
-COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
-COBJS-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
-COBJS-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o
-COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
-COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o
-COBJS-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o
-COBJS-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
-COBJS-$(CONFIG_ENV_IS_IN_REMOTE) += env_remote.o
-COBJS-$(CONFIG_ENV_IS_IN_UBI) += env_ubi.o
-COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
+obj-y += env_attr.o
+obj-y += env_callback.o
+obj-y += env_flags.o
+obj-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o
+obj-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o
+extra-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o
+obj-$(CONFIG_ENV_IS_IN_EEPROM) += env_embedded.o
+extra-$(CONFIG_ENV_IS_IN_FLASH) += env_embedded.o
+obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_embedded.o
+obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
+obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
+obj-$(CONFIG_ENV_IS_IN_FAT) += env_fat.o
+obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
+obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o
+obj-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o
+obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
+obj-$(CONFIG_ENV_IS_IN_REMOTE) += env_remote.o
+obj-$(CONFIG_ENV_IS_IN_UBI) += env_ubi.o
+obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
# command
-COBJS-$(CONFIG_CMD_AMBAPP) += cmd_ambapp.o
-COBJS-$(CONFIG_SOURCE) += cmd_source.o
-COBJS-$(CONFIG_CMD_SOURCE) += cmd_source.o
-COBJS-$(CONFIG_CMD_BDI) += cmd_bdinfo.o
-COBJS-$(CONFIG_CMD_BEDBUG) += bedbug.o cmd_bedbug.o
-COBJS-$(CONFIG_CMD_BMP) += cmd_bmp.o
-COBJS-$(CONFIG_CMD_BOOTMENU) += cmd_bootmenu.o
-COBJS-$(CONFIG_CMD_BOOTLDR) += cmd_bootldr.o
-COBJS-$(CONFIG_CMD_BOOTSTAGE) += cmd_bootstage.o
-COBJS-$(CONFIG_CMD_CACHE) += cmd_cache.o
-COBJS-$(CONFIG_CMD_CBFS) += cmd_cbfs.o
-COBJS-$(CONFIG_CMD_CONSOLE) += cmd_console.o
-COBJS-$(CONFIG_CMD_CPLBINFO) += cmd_cplbinfo.o
-COBJS-$(CONFIG_DATAFLASH_MMC_SELECT) += cmd_dataflash_mmc_mux.o
-COBJS-$(CONFIG_CMD_DATE) += cmd_date.o
-COBJS-$(CONFIG_CMD_SOUND) += cmd_sound.o
+obj-$(CONFIG_CMD_AMBAPP) += cmd_ambapp.o
+obj-$(CONFIG_SOURCE) += cmd_source.o
+obj-$(CONFIG_CMD_SOURCE) += cmd_source.o
+obj-$(CONFIG_CMD_BDI) += cmd_bdinfo.o
+obj-$(CONFIG_CMD_BEDBUG) += bedbug.o cmd_bedbug.o
+obj-$(CONFIG_CMD_BMP) += cmd_bmp.o
+obj-$(CONFIG_CMD_BOOTMENU) += cmd_bootmenu.o
+obj-$(CONFIG_CMD_BOOTLDR) += cmd_bootldr.o
+obj-$(CONFIG_CMD_BOOTSTAGE) += cmd_bootstage.o
+obj-$(CONFIG_CMD_CACHE) += cmd_cache.o
+obj-$(CONFIG_CMD_CBFS) += cmd_cbfs.o
+obj-$(CONFIG_CMD_CONSOLE) += cmd_console.o
+obj-$(CONFIG_CMD_CPLBINFO) += cmd_cplbinfo.o
+obj-$(CONFIG_DATAFLASH_MMC_SELECT) += cmd_dataflash_mmc_mux.o
+obj-$(CONFIG_CMD_DATE) += cmd_date.o
+obj-$(CONFIG_CMD_SOUND) += cmd_sound.o
ifdef CONFIG_4xx
-COBJS-$(CONFIG_CMD_SETGETDCR) += cmd_dcr.o
+obj-$(CONFIG_CMD_SETGETDCR) += cmd_dcr.o
endif
ifdef CONFIG_POST
-COBJS-$(CONFIG_CMD_DIAG) += cmd_diag.o
+obj-$(CONFIG_CMD_DIAG) += cmd_diag.o
endif
-COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o
-COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o
-COBJS-$(CONFIG_CMD_ECHO) += cmd_echo.o
-COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o
-COBJS-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
-COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o
-COBJS-$(CONFIG_SYS_HUSH_PARSER) += cmd_exit.o
-COBJS-$(CONFIG_CMD_EXT4) += cmd_ext4.o
-COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o
-COBJS-$(CONFIG_CMD_FAT) += cmd_fat.o
-COBJS-$(CONFIG_CMD_FDC)$(CONFIG_CMD_FDOS) += cmd_fdc.o
-COBJS-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o
-COBJS-$(CONFIG_CMD_FDOS) += cmd_fdos.o
-COBJS-$(CONFIG_CMD_FITUPD) += cmd_fitupd.o
-COBJS-$(CONFIG_CMD_FLASH) += cmd_flash.o
+obj-$(CONFIG_CMD_DISPLAY) += cmd_display.o
+obj-$(CONFIG_CMD_DTT) += cmd_dtt.o
+obj-$(CONFIG_CMD_ECHO) += cmd_echo.o
+obj-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o
+obj-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
+obj-$(CONFIG_CMD_ELF) += cmd_elf.o
+obj-$(CONFIG_SYS_HUSH_PARSER) += cmd_exit.o
+obj-$(CONFIG_CMD_EXT4) += cmd_ext4.o
+obj-$(CONFIG_CMD_EXT2) += cmd_ext2.o
+obj-$(CONFIG_CMD_FAT) += cmd_fat.o
+obj-$(CONFIG_CMD_FDC)$(CONFIG_CMD_FDOS) += cmd_fdc.o
+obj-$(CONFIG_OF_LIBFDT) += cmd_fdt.o fdt_support.o
+obj-$(CONFIG_CMD_FDOS) += cmd_fdos.o
+obj-$(CONFIG_CMD_FITUPD) += cmd_fitupd.o
+obj-$(CONFIG_CMD_FLASH) += cmd_flash.o
ifdef CONFIG_FPGA
-COBJS-$(CONFIG_CMD_FPGA) += cmd_fpga.o
+obj-$(CONFIG_CMD_FPGA) += cmd_fpga.o
endif
-COBJS-$(CONFIG_CMD_FPGAD) += cmd_fpgad.o
-COBJS-$(CONFIG_CMD_FS_GENERIC) += cmd_fs.o
-COBJS-$(CONFIG_CMD_FUSE) += cmd_fuse.o
-COBJS-$(CONFIG_CMD_GETTIME) += cmd_gettime.o
-COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o
-COBJS-$(CONFIG_CMD_I2C) += cmd_i2c.o
-COBJS-$(CONFIG_CMD_HASH) += cmd_hash.o
-COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o
-COBJS-$(CONFIG_CMD_IMMAP) += cmd_immap.o
-COBJS-$(CONFIG_CMD_INI) += cmd_ini.o
-COBJS-$(CONFIG_CMD_IRQ) += cmd_irq.o
-COBJS-$(CONFIG_CMD_ITEST) += cmd_itest.o
-COBJS-$(CONFIG_CMD_JFFS2) += cmd_jffs2.o
-COBJS-$(CONFIG_CMD_CRAMFS) += cmd_cramfs.o
-COBJS-$(CONFIG_CMD_LDRINFO) += cmd_ldrinfo.o
-COBJS-$(CONFIG_CMD_LED) += cmd_led.o
-COBJS-$(CONFIG_CMD_LICENSE) += cmd_license.o
-COBJS-y += cmd_load.o
-COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o
-COBJS-$(CONFIG_ID_EEPROM) += cmd_mac.o
-COBJS-$(CONFIG_CMD_MD5SUM) += cmd_md5sum.o
-COBJS-$(CONFIG_CMD_MEMORY) += cmd_mem.o
-COBJS-$(CONFIG_CMD_IO) += cmd_io.o
-COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
-COBJS-$(CONFIG_MII) += miiphyutil.o
-COBJS-$(CONFIG_CMD_MII) += miiphyutil.o
-COBJS-$(CONFIG_PHYLIB) += miiphyutil.o
-COBJS-$(CONFIG_CMD_MII) += cmd_mii.o
+obj-$(CONFIG_CMD_FPGAD) += cmd_fpgad.o
+obj-$(CONFIG_CMD_FS_GENERIC) += cmd_fs.o
+obj-$(CONFIG_CMD_FUSE) += cmd_fuse.o
+obj-$(CONFIG_CMD_GETTIME) += cmd_gettime.o
+obj-$(CONFIG_CMD_GPIO) += cmd_gpio.o
+obj-$(CONFIG_CMD_I2C) += cmd_i2c.o
+obj-$(CONFIG_CMD_HASH) += cmd_hash.o
+obj-$(CONFIG_CMD_IDE) += cmd_ide.o
+obj-$(CONFIG_CMD_IMMAP) += cmd_immap.o
+obj-$(CONFIG_CMD_INI) += cmd_ini.o
+obj-$(CONFIG_CMD_IRQ) += cmd_irq.o
+obj-$(CONFIG_CMD_ITEST) += cmd_itest.o
+obj-$(CONFIG_CMD_JFFS2) += cmd_jffs2.o
+obj-$(CONFIG_CMD_CRAMFS) += cmd_cramfs.o
+obj-$(CONFIG_CMD_LDRINFO) += cmd_ldrinfo.o
+obj-$(CONFIG_CMD_LED) += cmd_led.o
+obj-$(CONFIG_CMD_LICENSE) += cmd_license.o
+obj-y += cmd_load.o
+obj-$(CONFIG_LOGBUFFER) += cmd_log.o
+obj-$(CONFIG_ID_EEPROM) += cmd_mac.o
+obj-$(CONFIG_CMD_MD5SUM) += cmd_md5sum.o
+obj-$(CONFIG_CMD_MEMORY) += cmd_mem.o
+obj-$(CONFIG_CMD_IO) += cmd_io.o
+obj-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
+obj-$(CONFIG_MII) += miiphyutil.o
+obj-$(CONFIG_CMD_MII) += miiphyutil.o
+obj-$(CONFIG_PHYLIB) += miiphyutil.o
+obj-$(CONFIG_CMD_MII) += cmd_mii.o
ifdef CONFIG_PHYLIB
-COBJS-$(CONFIG_CMD_MII) += cmd_mdio.o
+obj-$(CONFIG_CMD_MII) += cmd_mdio.o
endif
-COBJS-$(CONFIG_CMD_MISC) += cmd_misc.o
-COBJS-$(CONFIG_CMD_MMC) += cmd_mmc.o
-COBJS-$(CONFIG_CMD_MMC_SPI) += cmd_mmc_spi.o
-COBJS-$(CONFIG_MP) += cmd_mp.o
-COBJS-$(CONFIG_CMD_MTDPARTS) += cmd_mtdparts.o
-COBJS-$(CONFIG_CMD_NAND) += cmd_nand.o
-COBJS-$(CONFIG_CMD_NET) += cmd_net.o
-COBJS-$(CONFIG_CMD_ONENAND) += cmd_onenand.o
-COBJS-$(CONFIG_CMD_OTP) += cmd_otp.o
-COBJS-$(CONFIG_CMD_PART) += cmd_part.o
+obj-$(CONFIG_CMD_MISC) += cmd_misc.o
+obj-$(CONFIG_CMD_MMC) += cmd_mmc.o
+obj-$(CONFIG_CMD_MMC_SPI) += cmd_mmc_spi.o
+obj-$(CONFIG_MP) += cmd_mp.o
+obj-$(CONFIG_CMD_MTDPARTS) += cmd_mtdparts.o
+obj-$(CONFIG_CMD_NAND) += cmd_nand.o
+obj-$(CONFIG_CMD_NET) += cmd_net.o
+obj-$(CONFIG_CMD_ONENAND) += cmd_onenand.o
+obj-$(CONFIG_CMD_OTP) += cmd_otp.o
+obj-$(CONFIG_CMD_PART) += cmd_part.o
ifdef CONFIG_PCI
-COBJS-$(CONFIG_CMD_PCI) += cmd_pci.o
+obj-$(CONFIG_CMD_PCI) += cmd_pci.o
endif
-COBJS-y += cmd_pcmcia.o
-COBJS-$(CONFIG_CMD_PORTIO) += cmd_portio.o
-COBJS-$(CONFIG_CMD_PXE) += cmd_pxe.o
-COBJS-$(CONFIG_CMD_READ) += cmd_read.o
-COBJS-$(CONFIG_CMD_REGINFO) += cmd_reginfo.o
-COBJS-$(CONFIG_CMD_REISER) += cmd_reiser.o
-COBJS-$(CONFIG_SANDBOX) += cmd_sandbox.o
-COBJS-$(CONFIG_CMD_SATA) += cmd_sata.o
-COBJS-$(CONFIG_CMD_SF) += cmd_sf.o
-COBJS-$(CONFIG_CMD_SCSI) += cmd_scsi.o
-COBJS-$(CONFIG_CMD_SHA1SUM) += cmd_sha1sum.o
-COBJS-$(CONFIG_CMD_SETEXPR) += cmd_setexpr.o
-COBJS-$(CONFIG_CMD_SOFTSWITCH) += cmd_softswitch.o
-COBJS-$(CONFIG_CMD_SPI) += cmd_spi.o
-COBJS-$(CONFIG_CMD_SPIBOOTLDR) += cmd_spibootldr.o
-COBJS-$(CONFIG_CMD_STRINGS) += cmd_strings.o
-COBJS-$(CONFIG_CMD_TERMINAL) += cmd_terminal.o
-COBJS-$(CONFIG_CMD_TIME) += cmd_time.o
-COBJS-$(CONFIG_CMD_TRACE) += cmd_trace.o
-COBJS-$(CONFIG_SYS_HUSH_PARSER) += cmd_test.o
-COBJS-$(CONFIG_CMD_TPM) += cmd_tpm.o
-COBJS-$(CONFIG_CMD_TSI148) += cmd_tsi148.o
-COBJS-$(CONFIG_CMD_UBI) += cmd_ubi.o
-COBJS-$(CONFIG_CMD_UBIFS) += cmd_ubifs.o
-COBJS-$(CONFIG_CMD_UNIVERSE) += cmd_universe.o
-COBJS-$(CONFIG_CMD_UNZIP) += cmd_unzip.o
+obj-y += cmd_pcmcia.o
+obj-$(CONFIG_CMD_PORTIO) += cmd_portio.o
+obj-$(CONFIG_CMD_PXE) += cmd_pxe.o
+obj-$(CONFIG_CMD_READ) += cmd_read.o
+obj-$(CONFIG_CMD_REGINFO) += cmd_reginfo.o
+obj-$(CONFIG_CMD_REISER) += cmd_reiser.o
+obj-$(CONFIG_SANDBOX) += cmd_sandbox.o
+obj-$(CONFIG_CMD_SATA) += cmd_sata.o
+obj-$(CONFIG_CMD_SF) += cmd_sf.o
+obj-$(CONFIG_CMD_SCSI) += cmd_scsi.o
+obj-$(CONFIG_CMD_SHA1SUM) += cmd_sha1sum.o
+obj-$(CONFIG_CMD_SETEXPR) += cmd_setexpr.o
+obj-$(CONFIG_CMD_SOFTSWITCH) += cmd_softswitch.o
+obj-$(CONFIG_CMD_SPI) += cmd_spi.o
+obj-$(CONFIG_CMD_SPIBOOTLDR) += cmd_spibootldr.o
+obj-$(CONFIG_CMD_STRINGS) += cmd_strings.o
+obj-$(CONFIG_CMD_TERMINAL) += cmd_terminal.o
+obj-$(CONFIG_CMD_TIME) += cmd_time.o
+obj-$(CONFIG_CMD_TRACE) += cmd_trace.o
+obj-$(CONFIG_SYS_HUSH_PARSER) += cmd_test.o
+obj-$(CONFIG_CMD_TPM) += cmd_tpm.o
+obj-$(CONFIG_CMD_TSI148) += cmd_tsi148.o
+obj-$(CONFIG_CMD_UBI) += cmd_ubi.o
+obj-$(CONFIG_CMD_UBIFS) += cmd_ubifs.o
+obj-$(CONFIG_CMD_UNIVERSE) += cmd_universe.o
+obj-$(CONFIG_CMD_UNZIP) += cmd_unzip.o
ifdef CONFIG_CMD_USB
-COBJS-y += cmd_usb.o
-COBJS-y += usb.o usb_hub.o
-COBJS-$(CONFIG_USB_STORAGE) += usb_storage.o
+obj-y += cmd_usb.o
+obj-y += usb.o usb_hub.o
+obj-$(CONFIG_USB_STORAGE) += usb_storage.o
endif
-COBJS-$(CONFIG_CMD_USB_MASS_STORAGE) += cmd_usb_mass_storage.o
-COBJS-$(CONFIG_CMD_XIMG) += cmd_ximg.o
-COBJS-$(CONFIG_YAFFS2) += cmd_yaffs2.o
-COBJS-$(CONFIG_CMD_SPL) += cmd_spl.o
-COBJS-$(CONFIG_CMD_ZIP) += cmd_zip.o
-COBJS-$(CONFIG_CMD_ZFS) += cmd_zfs.o
+obj-$(CONFIG_CMD_USB_MASS_STORAGE) += cmd_usb_mass_storage.o
+obj-$(CONFIG_CMD_THOR_DOWNLOAD) += cmd_thordown.o
+obj-$(CONFIG_CMD_XIMG) += cmd_ximg.o
+obj-$(CONFIG_YAFFS2) += cmd_yaffs2.o
+obj-$(CONFIG_CMD_SPL) += cmd_spl.o
+obj-$(CONFIG_CMD_ZIP) += cmd_zip.o
+obj-$(CONFIG_CMD_ZFS) += cmd_zfs.o
# others
-COBJS-$(CONFIG_BOOTSTAGE) += bootstage.o
-COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o
-COBJS-y += flash.o
-COBJS-$(CONFIG_CMD_KGDB) += kgdb.o kgdb_stubs.o
-COBJS-$(CONFIG_I2C_EDID) += edid.o
-COBJS-$(CONFIG_KALLSYMS) += kallsyms.o
-COBJS-y += splash.o
-COBJS-$(CONFIG_LCD) += lcd.o
-COBJS-$(CONFIG_LYNXKDI) += lynxkdi.o
-COBJS-$(CONFIG_MENU) += menu.o
-COBJS-$(CONFIG_MODEM_SUPPORT) += modem.o
-COBJS-$(CONFIG_UPDATE_TFTP) += update.o
-COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
-COBJS-$(CONFIG_CMD_DFU) += cmd_dfu.o
-COBJS-$(CONFIG_CMD_GPT) += cmd_gpt.o
+obj-$(CONFIG_BOOTSTAGE) += bootstage.o
+obj-$(CONFIG_CONSOLE_MUX) += iomux.o
+obj-y += flash.o
+obj-$(CONFIG_CMD_KGDB) += kgdb.o kgdb_stubs.o
+obj-$(CONFIG_I2C_EDID) += edid.o
+obj-$(CONFIG_KALLSYMS) += kallsyms.o
+obj-y += splash.o
+obj-$(CONFIG_LCD) += lcd.o
+obj-$(CONFIG_LYNXKDI) += lynxkdi.o
+obj-$(CONFIG_MENU) += menu.o
+obj-$(CONFIG_MODEM_SUPPORT) += modem.o
+obj-$(CONFIG_UPDATE_TFTP) += update.o
+obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
+obj-$(CONFIG_CMD_DFU) += cmd_dfu.o
+obj-$(CONFIG_CMD_GPT) += cmd_gpt.o
endif
ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
-COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o
+obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
+obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
+obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o
# environment
-COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_attr.o
-COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_flags.o
-COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_callback.o
+obj-$(CONFIG_SPL_ENV_SUPPORT) += env_attr.o
+obj-$(CONFIG_SPL_ENV_SUPPORT) += env_flags.o
+obj-$(CONFIG_SPL_ENV_SUPPORT) += env_callback.o
ifneq ($(CONFIG_SPL_NET_SUPPORT),y)
-COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
-COBJS-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
-COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
-COBJS-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
-COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
+obj-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o
+obj-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o
+obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o
+obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o
+obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
else
-COBJS-y += env_nowhere.o
+obj-y += env_nowhere.o
endif
endif
# core command
-COBJS-y += cmd_nvedit.o
+obj-y += cmd_nvedit.o
#environment
-COBJS-y += env_common.o
+obj-y += env_common.o
#others
ifdef CONFIG_DDR_SPD
SPD := y
ifdef CONFIG_SPD_EEPROM
SPD := y
endif
-COBJS-$(SPD) += ddr_spd.o
-COBJS-$(CONFIG_HWCONFIG) += hwconfig.o
-COBJS-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o
-COBJS-y += console.o
-COBJS-y += dlmalloc.o
-COBJS-y += image.o
-COBJS-$(CONFIG_OF_LIBFDT) += image-fdt.o
-COBJS-$(CONFIG_FIT) += image-fit.o
-COBJS-$(CONFIG_FIT_SIGNATURE) += image-sig.o
-COBJS-y += memsize.o
-COBJS-y += stdio.o
-
-
-COBJS := $(sort $(COBJS-y))
-XCOBJS := $(sort $(XCOBJS-y))
-SRCS := $(COBJS:.o=.c) $(XCOBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-XOBJS := $(addprefix $(obj),$(XCOBJS))
+obj-$(SPD) += ddr_spd.o
+obj-$(CONFIG_HWCONFIG) += hwconfig.o
+obj-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o
+obj-y += console.o
+obj-y += dlmalloc.o
+obj-y += image.o
+obj-$(CONFIG_OF_LIBFDT) += image-fdt.o
+obj-$(CONFIG_FIT) += image-fit.o
+obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o
+obj-y += memsize.o
+obj-y += stdio.o
CPPFLAGS += -I..
-all: $(LIB) $(XOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
$(obj)env_embedded.o: $(src)env_embedded.c $(obj)../tools/envcrc
$(CC) $(AFLAGS) -Wa,--no-warn \
-DENV_CRC=$(shell $(obj)../tools/envcrc) \
# SEE README.arm-unaligned-accesses
$(obj)hush.o: CFLAGS += $(PLATFORM_NO_UNALIGNED)
$(obj)fdt_support.o: CFLAGS += $(PLATFORM_NO_UNALIGNED)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
static int init_func_i2c(void)
{
puts("I2C: ");
+#ifdef CONFIG_SYS_I2C
+ i2c_init_all();
+#else
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+#endif
puts("ready\n");
return 0;
}
char *consdev;
char *cmdline;
- if (flag & BOOTM_STATE_OS_PREP)
+ if (flag != BOOTM_STATE_OS_GO)
return 0;
- if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- return 1;
#if defined(CONFIG_FIT)
if (!images->legacy_hdr_valid) {
{
image_header_t *hdr = &images->legacy_hdr_os_copy;
- if (flag & BOOTM_STATE_OS_PREP)
+ if (flag != BOOTM_STATE_OS_GO)
return 0;
- if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- return 1;
#if defined(CONFIG_FIT)
if (!images->legacy_hdr_valid) {
{
void (*entry_point)(bd_t *);
- if (flag & BOOTM_STATE_OS_PREP)
+ if (flag != BOOTM_STATE_OS_GO)
return 0;
- if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- return 1;
#if defined(CONFIG_FIT)
if (!images->legacy_hdr_valid) {
{
void (*entry_point)(void);
- if (flag & BOOTM_STATE_OS_PREP)
+ if (flag != BOOTM_STATE_OS_GO)
return 0;
- if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- return 1;
#if defined(CONFIG_FIT)
if (!images->legacy_hdr_valid) {
void (*entry_point)(void);
char *s;
- if (flag & BOOTM_STATE_OS_PREP)
+ if (flag != BOOTM_STATE_OS_GO)
return 0;
- if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- return 1;
#if defined(CONFIG_FIT)
if (!images->legacy_hdr_valid) {
{
char str[80];
- if (flag & BOOTM_STATE_OS_PREP)
+ if (flag != BOOTM_STATE_OS_GO)
return 0;
- if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- return 1;
#if defined(CONFIG_FIT)
if (!images->legacy_hdr_valid) {
char *local_args[2];
char str[16];
- if (flag & BOOTM_STATE_OS_PREP)
+ if (flag != BOOTM_STATE_OS_GO)
return 0;
- if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- return 1;
#if defined(CONFIG_FIT)
if (!images->legacy_hdr_valid) {
{
void (*entry_point)(void);
- if (flag & BOOTM_STATE_OS_PREP)
+ if (flag != BOOTM_STATE_OS_GO)
return 0;
- if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
- return 1;
#if defined(CONFIG_FIT)
if (!images->legacy_hdr_valid) {
#include <common.h>
#include <dfu.h>
#include <g_dnl.h>
+#include <usb.h>
static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
+ if (argc < 4)
+ return CMD_RET_USAGE;
+
+ char *usb_controller = argv[1];
+ char *interface = argv[2];
+ char *devstring = argv[3];
+
char *s = "dfu";
int ret, i = 0;
- if (argc < 3)
- return CMD_RET_USAGE;
-
- ret = dfu_init_env_entities(argv[1], simple_strtoul(argv[2], NULL, 10));
+ ret = dfu_init_env_entities(interface, simple_strtoul(devstring,
+ NULL, 10));
if (ret)
return ret;
- if (argc > 3 && strcmp(argv[3], "list") == 0) {
+ if (argc > 4 && strcmp(argv[4], "list") == 0) {
dfu_show_entities();
goto done;
}
-#ifdef CONFIG_TRATS
- board_usb_init();
-#endif
+ int controller_index = simple_strtoul(usb_controller, NULL, 0);
+ board_usb_init(controller_index, USB_INIT_DEVICE);
g_dnl_register(s);
while (1) {
U_BOOT_CMD(dfu, CONFIG_SYS_MAXARGS, 1, do_dfu,
"Device Firmware Upgrade",
- "<interface> <dev> [list]\n"
- " - device firmware upgrade on a device <dev>\n"
- " attached to interface <interface>\n"
- " [list] - list available alt settings"
+ "<USB_controller> <interface> <dev> [list]\n"
+ " - device firmware upgrade via <USB_controller>\n"
+ " on device <dev>, attached to interface\n"
+ " <interface>\n"
+ " [list] - list available alt settings\n"
);
image_header_t *hdr =
(image_header_t *)fpga_data;
ulong data;
-
- data = (ulong)image_get_data(hdr);
- data_size = image_get_data_size(hdr);
+ uint8_t comp;
+
+ comp = image_get_comp(hdr);
+ if (comp == IH_COMP_GZIP) {
+ ulong image_buf = image_get_data(hdr);
+ data = image_get_load(hdr);
+ ulong image_size = ~0UL;
+
+ if (gunzip((void *)data, ~0UL,
+ (void *)image_buf,
+ &image_size) != 0) {
+ puts("GUNZIP: error\n");
+ return 1;
+ }
+ data_size = image_size;
+ } else {
+ data = (ulong)image_get_data(hdr);
+ data_size = image_get_data_size(hdr);
+ }
rc = fpga_load(dev, (void *)data, data_size);
}
break;
#include <common.h>
#include <malloc.h>
#include <command.h>
-#include <mmc.h>
#include <part_efi.h>
#include <exports.h>
#include <linux/ctype.h>
int errno = 0;
uint64_t size_ll, start_ll;
- debug("%s: MMC lba num: 0x%x %d\n", __func__,
+ debug("%s: lba num: 0x%x %d\n", __func__,
(unsigned int)dev_desc->lba, (unsigned int)dev_desc->lba);
if (str_part == NULL)
return errno;
}
-static int gpt_mmc_default(int dev, const char *str_part)
+static int gpt_default(block_dev_desc_t *blk_dev_desc, const char *str_part)
{
int ret;
char *str_disk_guid;
u8 part_count = 0;
disk_partition_t *partitions = NULL;
- struct mmc *mmc = find_mmc_device(dev);
-
- if (mmc == NULL) {
- printf("%s: mmc dev %d NOT available\n", __func__, dev);
- return CMD_RET_FAILURE;
- }
-
if (!str_part)
return -1;
/* fill partitions */
- ret = set_gpt_info(&mmc->block_dev, str_part,
+ ret = set_gpt_info(blk_dev_desc, str_part,
&str_disk_guid, &partitions, &part_count);
if (ret) {
if (ret == -1)
}
/* save partitions layout to disk */
- gpt_restore(&mmc->block_dev, str_disk_guid, partitions, part_count);
+ gpt_restore(blk_dev_desc, str_disk_guid, partitions, part_count);
free(str_disk_guid);
free(partitions);
{
int ret = CMD_RET_SUCCESS;
int dev = 0;
- char *pstr;
+ char *ep;
+ block_dev_desc_t *blk_dev_desc;
if (argc < 5)
return CMD_RET_USAGE;
/* command: 'write' */
if ((strcmp(argv[1], "write") == 0) && (argc == 5)) {
- /* device: 'mmc' */
- if (strcmp(argv[2], "mmc") == 0) {
- /* check if 'dev' is a number */
- for (pstr = argv[3]; *pstr != '\0'; pstr++)
- if (!isdigit(*pstr)) {
- printf("'%s' is not a number\n",
- argv[3]);
- return CMD_RET_USAGE;
- }
- dev = (int)simple_strtoul(argv[3], NULL, 10);
- /* write to mmc */
- if (gpt_mmc_default(dev, argv[4]))
- return CMD_RET_FAILURE;
+ dev = (int)simple_strtoul(argv[3], &ep, 10);
+ if (!ep || ep[0] != '\0') {
+ printf("'%s' is not a number\n", argv[3]);
+ return CMD_RET_USAGE;
}
+ blk_dev_desc = get_dev(argv[2], dev);
+ if (!blk_dev_desc) {
+ printf("%s: %s dev %d NOT available\n",
+ __func__, argv[2], dev);
+ return CMD_RET_FAILURE;
+ }
+
+ if (gpt_default(blk_dev_desc, argv[4]))
+ return CMD_RET_FAILURE;
} else {
return CMD_RET_USAGE;
}
grep_how = H_MATCH_SUBSTR; /* default: substring search */
grep_what = H_MATCH_BOTH; /* default: grep names and values */
- while (argc > 1 && **(argv + 1) == '-') {
- char *arg = *++argv;
-
- --argc;
+ while (--argc > 0 && **++argv == '-') {
+ char *arg = *argv;
while (*++arg) {
switch (*arg) {
#ifdef CONFIG_REGEX
}
#endif
+#if defined(CONFIG_CMD_ENV_EXISTS)
+static int do_env_exists(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ ENTRY e, *ep;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ e.key = argv[1];
+ e.data = NULL;
+ hsearch_r(e, FIND, &ep, &env_htab, 0);
+
+ return (ep == NULL) ? 1 : 0;
+}
+#endif
+
/*
* New command line interface: "env" command with subcommands
*/
U_BOOT_CMD_MKENT(save, 1, 0, do_env_save, "", ""),
#endif
U_BOOT_CMD_MKENT(set, CONFIG_SYS_MAXARGS, 0, do_env_set, "", ""),
+#if defined(CONFIG_CMD_ENV_EXISTS)
+ U_BOOT_CMD_MKENT(exists, 2, 0, do_env_exists, "", ""),
+#endif
};
#if defined(CONFIG_NEEDS_MANUAL_RELOC)
#if defined(CONFIG_CMD_EDITENV)
"env edit name - edit environment variable\n"
#endif
+#if defined(CONFIG_CMD_ENV_EXISTS)
+ "env exists name - tests for existence of variable\n"
+#endif
#if defined(CONFIG_CMD_EXPORTENV)
"env export [-t | -b | -c] [-s size] addr [var ...] - export environment\n"
#endif
NULL
};
+static bool is_pxe;
+
/*
* Like getenv, but prints an error if envvar isn't defined in the
* environment. It always returns what getenv does, so it can be used in
char *bootfile, *last_slash;
size_t path_len = 0;
- if (file_path[0] == '/')
+ /* Only syslinux allows absolute paths */
+ if (file_path[0] == '/' && !is_pxe)
goto ret;
bootfile = from_env("bootfile");
if (argc < 2)
return CMD_RET_USAGE;
+ is_pxe = true;
+
/* drop initial "pxe" arg */
argc--;
argv++;
char *filename;
int prompt = 0;
+ is_pxe = false;
+
if (strstr(argv[1], "-p")) {
prompt = 1;
argc--;
filelen = reiserfs_open(filename);
if (filelen < 0) {
- printf("** File not found %s\n", filename);
+ printf("** File not found %s **\n", filename);
return 1;
}
if ((count < filelen) && (count != 0)) {
--- /dev/null
+/*
+ * cmd_thordown.c -- USB TIZEN "THOR" Downloader gadget
+ *
+ * Copyright (C) 2013 Lukasz Majewski <l.majewski@samsung.com>
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <thor.h>
+#include <dfu.h>
+#include <g_dnl.h>
+#include <usb.h>
+
+int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ if (argc < 4)
+ return CMD_RET_USAGE;
+
+ char *usb_controller = argv[1];
+ char *interface = argv[2];
+ char *devstring = argv[3];
+
+ const char *s = "thor";
+ int ret;
+
+ puts("TIZEN \"THOR\" Downloader\n");
+
+ ret = dfu_init_env_entities(interface, simple_strtoul(devstring,
+ NULL, 10));
+ if (ret)
+ return ret;
+
+ int controller_index = simple_strtoul(usb_controller, NULL, 0);
+ ret = board_usb_init(controller_index, USB_INIT_DEVICE);
+ if (ret) {
+ error("USB init failed: %d", ret);
+ ret = CMD_RET_FAILURE;
+ goto exit;
+ }
+
+ g_dnl_register(s);
+
+ ret = thor_init();
+ if (ret) {
+ error("THOR DOWNLOAD failed: %d", ret);
+ ret = CMD_RET_FAILURE;
+ goto exit;
+ }
+
+ ret = thor_handle();
+ if (ret) {
+ error("THOR failed: %d", ret);
+ ret = CMD_RET_FAILURE;
+ goto exit;
+ }
+
+exit:
+ g_dnl_unregister();
+ dfu_free_entities();
+
+ return ret;
+}
+
+U_BOOT_CMD(thordown, CONFIG_SYS_MAXARGS, 1, do_thor_down,
+ "TIZEN \"THOR\" downloader",
+ "<USB_controller> <interface> <dev>\n"
+ " - device software upgrade via LTHOR TIZEN dowload\n"
+ " program via <USB_controller> on device <dev>,\n"
+ " attached to interface <interface>\n"
+);
debug("Using filename %s\n", filename);
ret = ubifs_ls(filename);
- if (ret)
- printf("%s not found!\n", filename);
+ if (ret) {
+ printf("** File not found %s **\n", filename);
+ ret = CMD_RET_FAILURE;
+ }
return ret;
}
debug("Loading file '%s' to address 0x%08x (size %d)\n", filename, addr, size);
ret = ubifs_load(filename, addr, size);
- if (ret)
- printf("%s not found!\n", filename);
+ if (ret) {
+ printf("** File not found %s **\n", filename);
+ ret = CMD_RET_FAILURE;
+ }
return ret;
}
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <errno.h>
#include <common.h>
#include <command.h>
#include <g_dnl.h>
+#include <usb.h>
#include <usb_mass_storage.h>
int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
int argc, char * const argv[])
{
- char *ep;
- unsigned int dev_num = 0, offset = 0, part_size = 0;
- int rc;
+ if (argc < 3)
+ return CMD_RET_USAGE;
- struct ums_board_info *ums_info;
- static char *s = "ums";
+ const char *usb_controller = argv[1];
+ const char *mmc_devstring = argv[2];
- if (argc < 2) {
- printf("usage: ums <dev> - e.g. ums 0\n");
- return 0;
- }
+ unsigned int dev_num = simple_strtoul(mmc_devstring, NULL, 0);
- dev_num = (int)simple_strtoul(argv[1], &ep, 16);
+ struct ums *ums = ums_init(dev_num);
+ if (!ums)
+ return CMD_RET_FAILURE;
- if (dev_num) {
- puts("\nSet eMMC device to 0! - e.g. ums 0\n");
- goto fail;
+ unsigned int controller_index = (unsigned int)(simple_strtoul(
+ usb_controller, NULL, 0));
+ if (board_usb_init(controller_index, USB_INIT_DEVICE)) {
+ error("Couldn't init USB controller.");
+ return CMD_RET_FAILURE;
}
- board_usb_init();
- ums_info = board_ums_init(dev_num, offset, part_size);
-
- if (!ums_info) {
- printf("MMC: %d -> NOT available\n", dev_num);
- goto fail;
- }
- rc = fsg_init(ums_info);
+ int rc = fsg_init(ums);
if (rc) {
- printf("cmd ums: fsg_init failed\n");
- goto fail;
+ error("fsg_init failed");
+ return CMD_RET_FAILURE;
}
- g_dnl_register(s);
+ g_dnl_register("ums");
while (1) {
- /* Handle control-c and timeouts */
- if (ctrlc()) {
- printf("The remote end did not respond in time.\n");
- goto exit;
- }
usb_gadget_handle_interrupts();
- /* Check if USB cable has been detached */
- if (fsg_main_thread(NULL) == EIO)
+
+ rc = fsg_main_thread(NULL);
+ if (rc) {
+ /* Check I/O error */
+ if (rc == -EIO)
+ printf("\rCheck USB cable connection\n");
+
+ /* Check CTRL+C */
+ if (rc == -EPIPE)
+ printf("\rCTRL+C - Operation aborted\n");
+
goto exit;
+ }
}
exit:
g_dnl_unregister();
- return 0;
-
-fail:
- return -1;
+ return CMD_RET_SUCCESS;
}
U_BOOT_CMD(ums, CONFIG_SYS_MAXARGS, 1, do_usb_mass_storage,
"Use the UMS [User Mass Storage]",
- "ums - User Mass Storage Gadget"
+ "ums <USB_controller> <mmc_dev> e.g. ums 0 0"
);
memset(&zfile, 0, sizeof(zfile));
zfile.device = &vdev;
if (zfs_open(&zfile, filename)) {
- printf("** File not found %s\n", filename);
+ printf("** File not found %s **\n", filename);
return 1;
}
debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>");
if (bootdelay != -1 && s && !abortboot(bootdelay)) {
-#ifdef CONFIG_AUTOBOOT_KEYED
+#if defined(CONFIG_AUTOBOOT_KEYED) && !defined(CONFIG_AUTOBOOT_KEYED_CTRLC)
int prev = disable_ctrlc(1); /* disable Control C checking */
#endif
run_command_list(s, -1, 0);
-#ifdef CONFIG_AUTOBOOT_KEYED
+#if defined(CONFIG_AUTOBOOT_KEYED) && !defined(CONFIG_AUTOBOOT_KEYED_CTRLC)
disable_ctrlc(prev); /* restore Control C checking */
#endif
}
# Based on common/Makefile.
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libspl.o
-
ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_SPL_FRAMEWORK) += spl.o
-COBJS-$(CONFIG_SPL_NOR_SUPPORT) += spl_nor.o
-COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
-COBJS-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
-COBJS-$(CONFIG_SPL_ONENAND_SUPPORT) += spl_onenand.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
-COBJS-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
+obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
+obj-$(CONFIG_SPL_NOR_SUPPORT) += spl_nor.o
+obj-$(CONFIG_SPL_YMODEM_SUPPORT) += spl_ymodem.o
+obj-$(CONFIG_SPL_NAND_SUPPORT) += spl_nand.o
+obj-$(CONFIG_SPL_ONENAND_SUPPORT) += spl_onenand.o
+obj-$(CONFIG_SPL_NET_SUPPORT) += spl_net.o
+obj-$(CONFIG_SPL_MMC_SUPPORT) += spl_mmc.o
endif
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#include <linux/ctype.h>
#include <asm/byteorder.h>
#include <asm/unaligned.h>
+#include <compiler.h>
#include <usb.h>
#ifdef CONFIG_4xx
for (i = 0; i < CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
/* init low_level USB */
printf("USB%d: ", i);
- if (usb_lowlevel_init(i, &ctrl)) {
+ if (usb_lowlevel_init(i, USB_INIT_HOST, &ctrl)) {
puts("lowlevel init failed\n");
continue;
}
usb_dev[dev_index].devnum = -1;
}
+/*
+ * XHCI issues Enable Slot command and thereafter
+ * allocates device contexts. Provide a weak alias
+ * function for the purpose, so that XHCI overrides it
+ * and EHCI/OHCI just work out of the box.
+ */
+__weak int usb_alloc_device(struct usb_device *udev)
+{
+ return 0;
+}
/*
* By the time we get here, the device has gotten a new device ID
* and is in the default state. We need to identify the thing and
int tmp;
ALLOC_CACHE_ALIGN_BUFFER(unsigned char, tmpbuf, USB_BUFSIZ);
+ /*
+ * Allocate usb 3.0 device context.
+ * USB 3.0 (xHCI) protocol tries to allocate device slot
+ * and related data structures first. This call does that.
+ * Refer to sec 4.3.2 in xHCI spec rev1.0
+ */
+ if (usb_alloc_device(dev)) {
+ printf("Cannot allocate device context to get SLOT_ID\n");
+ return -1;
+ }
+
/* We still haven't set the Address yet */
addr = dev->devnum;
dev->devnum = 0;
* http://sourceforge.net/mailarchive/forum.php?
* thread_id=5729457&forum_id=5398
*/
- struct usb_device_descriptor *desc;
+ __maybe_unused struct usb_device_descriptor *desc;
int port = -1;
struct usb_device *parent = dev->parent;
unsigned short portstatus;
dev->epmaxpacketin[0] = 64;
dev->epmaxpacketout[0] = 64;
+ /*
+ * XHCI needs to issue a Address device command to setup
+ * proper device context structures, before it can interact
+ * with the device. So a get_descriptor will fail before any
+ * of that is done for XHCI unlike EHCI.
+ */
+#ifndef CONFIG_USB_XHCI
err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, desc, 64);
if (err < 0) {
debug("usb_new_device: usb_get_descriptor() failed\n");
* to differentiate between HUB and DEVICE.
*/
dev->descriptor.bDeviceClass = desc->bDeviceClass;
+#endif
- /* find the port number we're at */
if (parent) {
int j;
+ /* find the port number we're at */
for (j = 0; j < parent->maxchild; j++) {
if (parent->children[j] == dev) {
port = j;
return 0;
}
+__weak
+int board_usb_init(int index, enum usb_init_type init)
+{
+ return 0;
+}
/* EOF */
endif
ifneq ($(OBJTREE),$(SRCTREE))
-CPPFLAGS += -I$(OBJTREE)/include2 -I$(OBJTREE)/include
+CPPFLAGS += -I$(OBJTREE)/include
endif
-CPPFLAGS += -I$(TOPDIR)/include
+CPPFLAGS += -I$(TOPDIR)/include -I$(SRCTREE)/arch/$(ARCH)/include
CPPFLAGS += -fno-builtin -ffreestanding -nostdinc \
-isystem $(gccincdir) -pipe $(PLATFORM_CPPFLAGS)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
#CFLAGS += -DET_DEBUG -DDEBUG
-LIB = $(obj)libdisk.o
-
-COBJS-$(CONFIG_PARTITIONS) += part.o
-COBJS-$(CONFIG_MAC_PARTITION) += part_mac.o
-COBJS-$(CONFIG_DOS_PARTITION) += part_dos.o
-COBJS-$(CONFIG_ISO_PARTITION) += part_iso.o
-COBJS-$(CONFIG_AMIGA_PARTITION) += part_amiga.o
-COBJS-$(CONFIG_EFI_PARTITION) += part_efi.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_PARTITIONS) += part.o
+obj-$(CONFIG_MAC_PARTITION) += part_mac.o
+obj-$(CONFIG_DOS_PARTITION) += part_dos.o
+obj-$(CONFIG_ISO_PARTITION) += part_iso.o
+obj-$(CONFIG_AMIGA_PARTITION) += part_amiga.o
+obj-$(CONFIG_EFI_PARTITION) += part_efi.o
"bootretry" is >= 0.
CONFIG_AUTOBOOT_KEYED
+ CONFIG_AUTOBOOT_KEYED_CTRLC
CONFIG_AUTOBOOT_PROMPT
CONFIG_AUTOBOOT_DELAY_STR
CONFIG_AUTOBOOT_STOP_STR
environment variable you can specify a second, alternate
string (which allows you to have two "password" strings).
+ The CONFIG_AUTOBOOT_KEYED_CTRLC #define allows for the boot
+ sequence to be interrupted by ctrl-c, in addition to the
+ "bootdelaykey" and "bootstopkey". Setting this variable
+ provides an escape sequence from the limited "password"
+ strings.
+
+
CONFIG_ZERO_BOOTDELAY_CHECK
If this option is defined, you can stop the autoboot process
1) Prerequisites
----------------
-To make a MXS based board bootable, some tools are necessary. The first one is
-the "elftosb" tool distributed by Freescale Semiconductor. The other one is the
-"mxsboot" tool found in U-Boot source tree.
+To make a MXS based board bootable, some tools are necessary. The only
+mandatory tool is the "mxsboot" tool found in U-Boot source tree. The
+tool is built automatically when compiling U-Boot for i.MX23 or i.MX28.
+
+The production of BootStream image is handled via "mkimage", which is
+also part of the U-Boot source tree. The "mkimage" requires OpenSSL
+development libraries to be installed. In case of Debian and derivates,
+this is installed by running:
+
+ $ sudo apt-get install libssl-dev
+
+NOTE: The "elftosb" tool distributed by Freescale Semiconductor is no
+ longer necessary for general use of U-Boot on i.MX23 and i.MX28.
+ The mkimage supports generation of BootStream images encrypted
+ with a zero key, which is the vast majority of use-cases. In
+ case you do need to produce image encrypted with non-zero key
+ or other special features, please use the "elftosb" tool,
+ otherwise continue to section 2). The installation procedure of
+ the "elftosb" is outlined below:
Firstly, obtain the elftosb archive from the following location:
Make sure the "elftosb" binary can be found in your $PATH, in this case this
means "/usr/local/bin/" has to be in your $PATH.
-Install the 'libssl-dev' package as well. On a Debian-based distribution, this
-package can be installed as follows:
-
- $ sudo apt-get install libssl-dev
-
2) Compiling U-Boot for a MXS based board
-------------------------------------------
proper header to allow successful boot from SD or NAND. Adding the header is
discussed in the following chapters.
+NOTE: The process that produces u-boot.sb uses the mkimage to generate the
+ BootStream. The BootStream is encrypted with zero key. In case you need
+ some special features of the BootStream and plan on using the "elftosb"
+ tool instead, the invocation to produce a compatible BootStream with the
+ one produced by mkimage is outlined below. For further details, refer to
+ the documentation bundled with the "elftosb" package.
+
+ $ elftosb -zf imx23 -c arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd \
+ -o u-boot.sb
+ $ elftosb -zf imx28 -c arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd \
+ -o u-boot.sb
+
3) Installation of U-Boot for a MXS based board to SD card
----------------------------------------------------------
1. Building PBL Boot Image.
The default Image is u-boot.pbl.
- For eSPI boot(available on P3041/P4080/P5020):
+ For eSPI boot(available on P2041/P3041/P4080/P5020/P5040/T4240):
To build the eSPI boot image:
- make <board_name>_SPIFLASH_config
- make u-boot.pbl
+ make <board_name>_SPIFLASH
- For SD boot(available on P3041/P4080/P5020):
+ For SD boot(available on P2041/P3041/P4080/P5020/P5040/T4240):
To build the SD boot image:
- make <board_name>_SDCARD_config
- make u-boot.pbl
+ make <board_name>_SDCARD
- For Nand boot(available on P3041/P5020):
+ For Nand boot(available on P2041/P3041/P5020/P5040):
To build the NAND boot image:
- make <board_name>_NAND_config
- make u-boot.pbl
+ make <board_name>_NAND
2. pblimage support available with mkimage utility will generate Freescale PBL
Board Arch CPU Commit Removed Last known maintainer/contact
=================================================================================================
-pdnb3 arm ixp - 2013-09-24 Stefan Roese <sr@denx.de>
-scpu arm ixp - 2013-09-24 Stefan Roese <sr@denx.de>
+omap730p2 arm arm926ejs - 2013-11-11
+pdnb3 arm ixp 304db0b 2013-09-24 Stefan Roese <sr@denx.de>
+scpu arm ixp 304db0b 2013-09-24 Stefan Roese <sr@denx.de>
omap1510inn arm arm925t 0610a16 2013-09-23 Kshitij Gupta <kshitij@ti.com>
CANBT powerpc 405CR fb8f4fd 2013-08-07 Matthias Fuchs <matthias.fuchs@esd.eu>
Alaska8220 powerpc mpc8220 d6ed322 2013-05-11
Yukon8220 powerpc mpc8220 d6ed322 2013-05-11
sorcery powerpc mpc8220 d6ed322 2013-05-11
-smdk6400 arm arm1176 52587f1 2013-04-12 Zhong Hongbo <bocui107@gmail.com>
-ns9750dev arm arm926ejs 4cfc611 2013-02-28 Markus Pietrek <mpietrek@fsforth.de>
+smdk6400 arm arm1176 52587f1 2013-04-12 Zhong Hongbo <bocui107@gmail.com>
+ns9750dev arm arm926ejs 4cfc611 2013-02-28 Markus Pietrek <mpietrek@fsforth.de>
AMX860 powerpc mpc860 1b0757e 2012-10-28 Wolfgang Denk <wd@denx.de>
c2mon powerpc mpc855 1b0757e 2012-10-28 Wolfgang Denk <wd@denx.de>
+EP88x powerpc mpc885 1b0757e 2012-10-28
ETX094 powerpc mpc850 1b0757e 2012-10-28 Wolfgang Denk <wd@denx.de>
IAD210 powerpc mpc860 1b0757e 2012-10-28 -
LANTEC powerpc mpc850 1b0757e 2012-10-28 Wolfgang Denk <wd@denx.de>
R5200 ColdFire - 48ead7a 2008-03-31 Zachary P. Landau <zachary.landau@labxtechnologies.com>
CPCI440 powerpc 440GP b568fd2 2007-12-27 Matthias Fuchs <matthias.fuchs@esd-electronics.com>
PCIPPC2 powerpc MPC740/MPC750 7c9e89b 2013-02-07 Wolfgang Denk <wd@denx.de>
-PCIPPC6 powerpc MPC740/MPC750 - - Wolfgang Denk <wd@denx.de>
+PCIPPC6 powerpc MPC740/MPC750 - - Wolfgang Denk <wd@denx.de>
omap2420h4 arm omap24xx - 2013-06-04 Richard Woodruff <r-woodruff2@ti.com>
III) Analysis of in-tree drivers
--------------------------------
- 1) ahci.c
- ---------
+ ahci.c
+ ------
SCSI API, will be rewritten for a different API.
- 2) ata_piix.c
- -------------
+ ata_piix.c
+ ----------
SATA API, easy to port.
- 3) fsl_sata.c
- -------------
+ fsl_sata.c
+ ----------
SATA API, few CONFIG macros, easy to port.
- 4) ftide020.c
- -------------
+ ftide020.c
+ ----------
IDE API, defines CONFIG_IDE_AHB and ide_preinit hook functions.
- 5) mg_disk.c
- ------------
+ mg_disk.c
+ ---------
Single driver with mg_disk API, not much to change, easy to port.
- 6) mvsata_ide.c
- ---------------
+ mvsata_ide.c
+ ------------
IDE API, only defines ide_preinit hook function.
- 7) mxc_ata.c
- ------------
+ mxc_ata.c
+ ---------
IDE API, only defines ide_preinit hook function.
- 8) pata_bfin.c
- --------------
+ pata_bfin.c
+ -----------
SATA API, easy to port.
- 9) sata_dwc.c
- -------------
+ sata_dwc.c
+ ----------
SATA API, easy to port.
- 10) sata_sil3114.c
- ------------------
+ sata_sil3114.c
+ --------------
SATA API, easy to port.
- 11) sata_sil.c
- --------------
+ sata_sil.c
+ ----------
SATA API, easy to port.
- 12) sil680.c
- ------------
+ sil680.c
+ --------
IDE API, only defines ide_preinit hook function.
- 13) sym53c8xx.c
- ---------------
+ sym53c8xx.c
+ -----------
SCSI API, may be merged with code from cmd_scsi.
- 14) systemace.c
- ---------------
+ systemace.c
+ -----------
Single driver with systemace API, not much to change, easy to port.
III) Analysis of in-tree drivers
--------------------------------
- 1) altera_pio.c
- ---------------
+ altera_pio.c
+ ------------
Meets standard API. Implements gpio_request() properly. Simple conversion
possible.
- 2) at91_gpio.c
- --------------
+ at91_gpio.c
+ -----------
Don't meet standard API. Need some other methods to implement.
- 3) da8xx_gpio.c
- ---------------
+ da8xx_gpio.c
+ ------------
Meets standard API. Implements gpio_request() properly. Simple conversion
possible.
- 4) kw_gpio.c
- ------------
+ kw_gpio.c
+ ---------
Doesn't meet standard API. Needs some other methods to implement and move some
methods to another file.
- 5) mpc83xx_gpio.c
- -----------------
+ mpc83xx_gpio.c
+ --------------
Meets standard API. Doesn't implement gpio_request() properly (only checks
if the pin is valid). Simple conversion possible.
- 6) mvgpio.c
- -----------
+ mvgpio.c
+ --------
Meets standard API. Doesn't implement gpio_request() properly (only checks
if the pin is valid). Simple conversion possible.
- 7) mvgpio.h
- -----------
+ mvgpio.h
+ --------
Wrong placement. Will be moved to another location.
- 8) mvmfp.c
- ----------
+ mvmfp.c
+ -------
Wrong placement. Will be moved to another location.
III) Analysis of in-tree drivers
--------------------------------
- 1) drivers/hwmon/lm81.c
- -----------------------
+ drivers/hwmon/lm81.c
+ --------------------
The driver is standard dtt. Simple conversion is possible.
- 2) drivers/hwmon/ds1722.c
- -------------------------
+ drivers/hwmon/ds1722.c
+ ----------------------
The driver is not standard dtt, but interface is similar to dtt.
The interface has to be changed in order to comply to above mentioned
specification.
- 3) drivers/hwmon/ds1775.c
- -------------------------
+ drivers/hwmon/ds1775.c
+ ----------------------
The driver is standard dtt. Simple conversion is possible.
- 4) drivers/hwmon/lm73.c
- -----------------------
+ drivers/hwmon/lm73.c
+ --------------------
The driver is standard dtt. Simple conversion is possible.
- 5) drivers/hwmon/lm63.c
- -----------------------
+ drivers/hwmon/lm63.c
+ --------------------
The driver is standard dtt. Simple conversion is possible.
- 6) drivers/hwmon/adt7460.c
- --------------------------
+ drivers/hwmon/adt7460.c
+ -----------------------
The driver is standard dtt. Simple conversion is possible.
- 7) drivers/hwmon/lm75.c
- -----------------------
+ drivers/hwmon/lm75.c
+ --------------------
The driver is standard dtt. Simple conversion is possible.
- 8) drivers/hwmon/ds1621.c
- -------------------------
+ drivers/hwmon/ds1621.c
+ ----------------------
The driver is standard dtt. Simple conversion is possible.
- 9) drivers/hwmon/adm1021.c
- --------------------------
+ drivers/hwmon/adm1021.c
+ -----------------------
The driver is standard dtt. Simple conversion is possible.
III) Analysis of in-tree drivers
--------------------------------
- 1) board/mpl/common/kbd.c
- -------------------------
+ board/mpl/common/kbd.c
+ ----------------------
This driver is a classic STDIO driver, no problem with conversion is expected.
Only necessary change will be to move this driver to a proper location.
- 2) board/rbc823/kbd.c
- ---------------------
+ board/rbc823/kbd.c
+ ------------------
This driver is a classic STDIO driver, no problem with conversion is expected.
Only necessary change will be to move this driver to a proper location.
- 3) drivers/input/keyboard.c
- ---------------------------
+ drivers/input/keyboard.c
+ ------------------------
This driver is special in many ways. Firstly because this is a universal stub
driver for converting scancodes from i8042 and the likes. Secondly because the
buffer is filled by various other ad-hoc implementations of keyboard input by
III) Analysis of in-tree drivers
--------------------------------
- 1) arm_pl180_mmci.c
- -------------------
+ arm_pl180_mmci.c
+ ----------------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 2) atmel_mci.c
- --------------
+ atmel_mci.c
+ -----------
This driver uses the legacy API and should be removed unless converted. It is
probably possbible to replace this driver with gen_atmel_mci.c . No conversion
will be done on this driver.
- 3) bfin_sdh.c
- -------------
+ bfin_sdh.c
+ ----------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 4) davinci_mmc.c
- ----------------
+ davinci_mmc.c
+ -------------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 5) fsl_esdhc.c
- --------------
+ fsl_esdhc.c
+ -----------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple, unless some problem appears due to the FDT
component of the driver.
- 6) ftsdc010_esdhc.c
- -------------------
+ ftsdc010_esdhc.c
+ ----------------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 7) gen_atmel_mci.c
- ------------------
+ gen_atmel_mci.c
+ ---------------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 8) mmc_spi.c
- ------------
+ mmc_spi.c
+ ---------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 9) mv_sdhci.c
- -------------
+ mv_sdhci.c
+ ----------
This is a component of the SDHCI support, allowing it to run on Marvell
Kirkwood chip. It is probable the SDHCI support will have to be modified to
allow calling functions from this file based on information passed via
platform_data.
- 10) mxcmmc.c
- ------------
+ mxcmmc.c
+ --------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 11) mxsmmc.c
- ------------
+ mxsmmc.c
+ --------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 12) omap_hsmmc.c
- ----------------
+ omap_hsmmc.c
+ ------------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 13) pxa_mmc.c
- -------------
+ pxa_mmc.c
+ ---------
This driver uses the legacy API and is written in a severely ad-hoc manner.
This driver will be removed in favor of pxa_mmc_gen.c, which is proved to work
better and is already well tested. No conversion will be done on this driver
anymore.
- 14) pxa_mmc_gen.c
- -----------------
+ pxa_mmc_gen.c
+ -------------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 15) s5p_mmc.c
- -------------
+ s5p_mmc.c
+ ---------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 16) sdhci.c
- -----------
+ sdhci.c
+ -------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple, though it'd be necessary to modify this driver
to also support the Kirkwood series and probably also Tegra series of CPUs.
See the respective parts of this section for details.
- 17) sh_mmcif.c
- --------------
+ sh_mmcif.c
+ ----------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
- 18) tegra2_mmc.c
- ----------------
+ tegra2_mmc.c
+ ------------
Follows the new API and also has a good encapsulation of the whole driver. The
conversion here will be simple.
III) Analysis of in-tree drivers
--------------------------------
- 1) drivers/net/4xx_enet.c
- -------------------------
+ drivers/net/4xx_enet.c
+ ----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 2) drivers/net/altera_tse.c
- ---------------------------
+ drivers/net/altera_tse.c
+ ------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 3) drivers/net/armada100_fec.c
- ------------------------------
+ drivers/net/armada100_fec.c
+ ---------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 4) drivers/net/at91_emac.c
- --------------------------
+ drivers/net/at91_emac.c
+ -----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 5) drivers/net/ax88180.c
- ------------------------
+ drivers/net/ax88180.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 6) drivers/net/ax88796.c
- ------------------------
+ drivers/net/ax88796.c
+ ---------------------
This file contains a components of the NE2000 driver, implementing only
different parts on the NE2000 clone AX88796. This being no standalone driver,
no conversion will be done here.
- 7) drivers/net/bfin_mac.c
- -------------------------
+ drivers/net/bfin_mac.c
+ ----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 8) drivers/net/calxedaxgmac.c
- -----------------------------
+ drivers/net/calxedaxgmac.c
+ --------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 9) drivers/net/cs8900.c
- -----------------------
+ drivers/net/cs8900.c
+ --------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 10) drivers/net/davinci_emac.c
- ------------------------------
+ drivers/net/davinci_emac.c
+ --------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 11) drivers/net/dc2114x.c
- -------------------------
+ drivers/net/dc2114x.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 12) drivers/net/designware.c
- ----------------------------
+ drivers/net/designware.c
+ ------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 13) drivers/net/dm9000x.c
- -------------------------
+ drivers/net/dm9000x.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 14) drivers/net/dnet.c
- ----------------------
+ drivers/net/dnet.c
+ ------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 15) drivers/net/e1000.c
- -----------------------
+ drivers/net/e1000.c
+ -------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 16) drivers/net/e1000_spi.c
- ---------------------------
+ drivers/net/e1000_spi.c
+ -----------------------
Driver for the SPI bus integrated on the Intel E1000. This is not part of the
network stack.
- 17) drivers/net/eepro100.c
- --------------------------
+ drivers/net/eepro100.c
+ ----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 18) drivers/net/enc28j60.c
- --------------------------
+ drivers/net/enc28j60.c
+ ----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 19) drivers/net/ep93xx_eth.c
- ----------------------------
+ drivers/net/ep93xx_eth.c
+ ------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 20) drivers/net/ethoc.c
- -----------------------
+ drivers/net/ethoc.c
+ -------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 21) drivers/net/fec_mxc.c
- -------------------------
+ drivers/net/fec_mxc.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 22) drivers/net/fsl_mcdmafec.c
- ------------------------------
+ drivers/net/fsl_mcdmafec.c
+ --------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 23) drivers/net/fsl_mdio.c
- --------------------------
+ drivers/net/fsl_mdio.c
+ ----------------------
This file contains driver for FSL MDIO interface, which is not part of the
networking stack.
- 24) drivers/net/ftgmac100.c
- ---------------------------
+ drivers/net/ftgmac100.c
+ -----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 25) drivers/net/ftmac100.c
- --------------------------
+ drivers/net/ftmac100.c
+ ----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 26) drivers/net/greth.c
- -----------------------
+ drivers/net/greth.c
+ -------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 27) drivers/net/inca-ip_sw.c
- ----------------------------
+ drivers/net/inca-ip_sw.c
+ ------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 28) drivers/net/ks8695eth.c
- ---------------------------
+ drivers/net/ks8695eth.c
+ -----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 29) drivers/net/lan91c96.c
- --------------------------
+ drivers/net/lan91c96.c
+ ----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 30) drivers/net/macb.c
- ----------------------
+ drivers/net/macb.c
+ ------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 31) drivers/net/mcffec.c
- ------------------------
+ drivers/net/mcffec.c
+ --------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 32) drivers/net/mcfmii.c
- ------------------------
+ drivers/net/mcfmii.c
+ --------------------
This file contains MII interface driver for MCF FEC.
- 33) drivers/net/mpc512x_fec.c
- -----------------------------
+ drivers/net/mpc512x_fec.c
+ -------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 34) drivers/net/mpc5xxx_fec.c
- -----------------------------
+ drivers/net/mpc5xxx_fec.c
+ -------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 35) drivers/net/mvgbe.c
- -----------------------
+ drivers/net/mvgbe.c
+ -------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 36) drivers/net/natsemi.c
- -------------------------
+ drivers/net/natsemi.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 37) drivers/net/ne2000_base.c
- -----------------------------
+ drivers/net/ne2000_base.c
+ -------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process. This driver contains the core
implementation of NE2000, which needs a few external functions, implemented by
AX88796, NE2000 etc.
- 38) drivers/net/ne2000.c
- ------------------------
+ drivers/net/ne2000.c
+ --------------------
This file implements external functions necessary for native NE2000 compatible
networking card to work.
- 39) drivers/net/netarm_eth.c
- ----------------------------
-
- This driver uses the old, legacy, network API and will either have to be
- converted or removed.
-
- 40) drivers/net/netconsole.c
- ----------------------------
+ drivers/net/netconsole.c
+ ------------------------
This is actually an STDIO driver.
- 41) drivers/net/ns8382x.c
- -------------------------
+ drivers/net/ns8382x.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 42) drivers/net/pcnet.c
- -----------------------
+ drivers/net/pcnet.c
+ -------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 43) drivers/net/plb2800_eth.c
- -----------------------------
+ drivers/net/plb2800_eth.c
+ -------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 44) drivers/net/rtl8139.c
- -------------------------
+ drivers/net/rtl8139.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 45) drivers/net/rtl8169.c
- -------------------------
+ drivers/net/rtl8169.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 46) drivers/net/sh_eth.c
- ------------------------
+ drivers/net/sh_eth.c
+ --------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 47) drivers/net/smc91111.c
- --------------------------
+ drivers/net/smc91111.c
+ ----------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 48) drivers/net/smc911x.c
- -------------------------
+ drivers/net/smc911x.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 49) drivers/net/tsec.c
- ----------------------
+ drivers/net/tsec.c
+ ------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 50) drivers/net/tsi108_eth.c
- ----------------------------
+ drivers/net/tsi108_eth.c
+ ------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 51) drivers/net/uli526x.c
- -------------------------
+ drivers/net/uli526x.c
+ ---------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 52) drivers/net/vsc7385.c
- -------------------------
+ drivers/net/vsc7385.c
+ ---------------------
This is a driver that only uploads firmware to a switch. This is not subject
of conversion.
- 53) drivers/net/xilinx_axi_emac.c
- ---------------------------------
+ drivers/net/xilinx_axi_emac.c
+ -----------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
- 54) drivers/net/xilinx_emaclite.c
- ---------------------------------
+ drivers/net/xilinx_emaclite.c
+ -----------------------------
This driver uses the standard new networking API, therefore there should be no
obstacles throughout the conversion process.
A) drivers in drivers/pci/
--------------------------
- 1) pci_indirect.c
- -----------------
+ pci_indirect.c
+ --------------
Shared driver for indirect PCI bridges, several CONFIG macros - will
require significant cleanup.
- 2) pci_ixp.c
- ------------
+ pci_ixp.c
+ ---------
Standard driver, specifies all read/write functions separately.
- 3) pci_sh4.c
- ------------
+ pci_sh4.c
+ ---------
Shared init function for SH4 drivers, uses dword for read/write ops.
- 4) pci_sh7751.c
- ---------------
+ pci_sh7751.c
+ ------------
Standard driver, uses SH4 shared init.
- 5) pci_sh7780.c
- ---------------
+ pci_sh7780.c
+ ------------
Standard driver, uses SH4 shared init.
- 6) tsi108_pci.c
- ---------------
+ tsi108_pci.c
+ ------------
Standard driver, uses dword for read/write ops.
- 7) fsl_pci_init.c
- -----------------
+ fsl_pci_init.c
+ --------------
Driver for PCI and PCI-e, uses indirect functions.
- 8) pci_ftpci100.c
- -----------------
+ pci_ftpci100.c
+ --------------
Standard driver, uses indirect functions, has separate scan/setup
functions.
B) driver in arch/
------------------
- 1) x86/lib/pci_type1.c
- ----------------------
+ x86/lib/pci_type1.c
+ -------------------
Standard driver, specifies all read/write functions separately.
- 2) m68k/cpu/mcf5445x/pci.c
- --------------------------
+ m68k/cpu/mcf5445x/pci.c
+ -----------------------
Standard driver, specifies all read/write functions separately.
- 3) m68k/cpu/mcf547x_8x/pci.c
- ----------------------------
+ m68k/cpu/mcf547x_8x/pci.c
+ -------------------------
Standard driver, specifies all read/write functions separately.
- 4) powerpc/cpu/mpc824x/pci.c
- ----------------------------
+ powerpc/cpu/mpc824x/pci.c
+ -------------------------
Standard driver, uses indirect functions, does not setup HW.
- 5) powerpc/cpu/mpc8260/pci.c
- ----------------------------
+ powerpc/cpu/mpc8260/pci.c
+ -------------------------
Standard driver, uses indirect functions.
- 6) powerpc/cpu/ppc4xx/4xx_pci.c
- -------------------------------
+ powerpc/cpu/ppc4xx/4xx_pci.c
+ ----------------------------
Standard driver, uses indirect functions.
- 7) powerpc/cpu/ppc4xx/4xx_pcie.c
- --------------------------------
+ powerpc/cpu/ppc4xx/4xx_pcie.c
+ -----------------------------
PCI-e driver, specifies all read/write functions separately.
- 8) powerpc/cpu/mpc83xx/pci.c
- ----------------------------
+ powerpc/cpu/mpc83xx/pci.c
+ -------------------------
Standard driver, uses indirect functions.
- 9) powerpc/cpu/mpc83xx/pcie.c
- -----------------------------
+ powerpc/cpu/mpc83xx/pcie.c
+ --------------------------
PCI-e driver, specifies all read/write functions separately.
- 10) powerpc/cpu/mpc5xxx/pci_mpc5200.c
- -------------------------------------
+ powerpc/cpu/mpc5xxx/pci_mpc5200.c
+ ---------------------------------
Standard driver, uses dword for read/write ops.
- 11) powerpc/cpu/mpc512x/pci.c
- -----------------------------
+ powerpc/cpu/mpc512x/pci.c
+ -------------------------
Standard driver, uses indirect functions.
- 12) powerpc/cpu/mpc85xx/pci.c
- -----------------------------
+ powerpc/cpu/mpc85xx/pci.c
+ -------------------------
Standard driver, uses indirect functions, has two busses.
C) drivers in board/
--------------------
- 1) eltec/elppc/pci.c
- --------------------
+ eltec/elppc/pci.c
+ -----------------
Standard driver, uses indirect functions.
- 2) amirix/ap1000/pci.c
- ----------------------
+ amirix/ap1000/pci.c
+ -------------------
Standard driver, specifies all read/write functions separately.
- 3) prodrive/p3mx/pci.c
- ----------------------
+ prodrive/p3mx/pci.c
+ -------------------
Standard driver, uses dword for read/write ops, has two busses.
- 4) esd/cpci750/pci.c
- --------------------
+ esd/cpci750/pci.c
+ -----------------
Standard driver, uses dword for read/write ops, has two busses.
- 5) esd/common/pci.c
- -------------------
+ esd/common/pci.c
+ ----------------
Standard driver, uses dword for read/write ops.
- 6) dave/common/pci.c
- --------------------
+ dave/common/pci.c
+ -----------------
Standard driver, uses dword for read/write ops.
- 7) ppmc7xx/pci.c
- ----------------
+ ppmc7xx/pci.c
+ -------------
Standard driver, uses indirect functions.
- 9) Marvell/db64360/pci.c
- ------------------------
+ Marvell/db64360/pci.c
+ ---------------------
Standard driver, uses dword for read/write ops, has two busses.
- 10) Marvell/db64460/pci.c
- -------------------------
+ Marvell/db64460/pci.c
+ ---------------------
Standard driver, uses dword for read/write ops, has two busses.
- 11) evb64260/pci.c
- ------------------
+ evb64260/pci.c
+ --------------
Standard driver, uses dword for read/write ops, has two busses.
- 12) armltd/integrator/pci.c
- ---------------------------
+ armltd/integrator/pci.c
+ -----------------------
Standard driver, specifies all read/write functions separately.
All drivers will be moved to drivers/pci. Several drivers seem
III) Analysis of in-tree drivers
--------------------------------
- 1) i82365.c
- -----------
+ i82365.c
+ --------
Driver methods have different name i82365_init() and i82365_exit but
all functionality is the same. Board files board/atc/ti113x.c and
board/cpc45/pd67290.c use their own implementation of these method.
In this case all methods in driver behave only as wrappers.
- 2) marubun_pcmcia.c
- -------------------
+ marubun_pcmcia.c
+ ----------------
Meets standard API behaviour. Simple conversion.
- 3) mpc8xx_pcmcia.c
- ------------------
+ mpc8xx_pcmcia.c
+ ---------------
Meets standard API behaviour. Simple conversion.
- 4) rpx_pcmcia.c
- ---------------
+ rpx_pcmcia.c
+ ------------
Implements only internal API used in other drivers. Non of methods
implemented here are used outside driver model.
- 5) ti_pci1410a.c
- ----------------
+ ti_pci1410a.c
+ -------------
Has different API but methods in this file are never called. Probably
dead code.
- 6)tqm8xx_pcmcia.c
- -----------------
+ tqm8xx_pcmcia.c
+ ---------------
Implements only internal API used in other drivers. Non of methods
implemented here are used outside driver model.
III) Analysis of in-tree drivers
--------------------------------
- 1) ftpmu010.c
- -------------
+ ftpmu010.c
+ ----------
All methods of this file are moved to another location.
void ftpmu010_32768osc_enable(void): Move to boards hacks
void ftpmu010_mfpsr_select_dev(unsigned int dev): Move to board file
void ftpmu010_sdramhtc_set(unsigned int val): Move to board file
arch/nds32/lib/board.c
- 2) twl4030.c
- ------------
+ twl4030.c
+ ---------
All methods of this file are moved to another location.
void twl4030_power_reset_init(void): Move to board hacks
void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val, u8 dev_grp,
void twl4030_power_init(void): Move to board hacks
void twl4030_power_mmc_init(void): Move to board hacks
- 3) twl6030.c
- ------------
+ twl6030.c
+ ---------
Some methods are converted to new API and rest are moved to another location.
void twl6030_stop_usb_charging(void): Convert to new API
void twl6030_start_usb_charging(void): Convert to new API
III) Analysis of in-tree drivers
--------------------------------
- 1) drivers/rtc/rv3029.c
- -----------------------
+ drivers/rtc/rv3029.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 2) drivers/rtc/s3c24x0_rtc.c
- ----------------------------
+ drivers/rtc/s3c24x0_rtc.c
+ -------------------------
The driver is standard rtc. Simple conversion is possible.
- 3) drivers/rtc/pt7c4338.c
- -------------------------
+ drivers/rtc/pt7c4338.c
+ ----------------------
The driver is standard rtc. Simple conversion is possible.
- 4) drivers/rtc/mvrtc.c
- ----------------------
+ drivers/rtc/mvrtc.c
+ -------------------
The driver is standard rtc. Simple conversion is possible.
- 5) drivers/rtc/ftrtc010.c
- -------------------------
+ drivers/rtc/ftrtc010.c
+ ----------------------
The driver is standard rtc. Simple conversion is possible.
- 6) drivers/rtc/mpc5xxx.c
- ------------------------
+ drivers/rtc/mpc5xxx.c
+ ---------------------
The driver is standard rtc. Simple conversion is possible.
- 7) drivers/rtc/ds164x.c
- -----------------------
+ drivers/rtc/ds164x.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 8) drivers/rtc/rs5c372.c
- ------------------------
+ drivers/rtc/rs5c372.c
+ ---------------------
The driver is standard rtc. Simple conversion is possible.
- 9) drivers/rtc/m41t94.c
- -----------------------
+ drivers/rtc/m41t94.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 10) drivers/rtc/mc13xxx-rtc.c
- -----------------------------
+ drivers/rtc/mc13xxx-rtc.c
+ -------------------------
The driver is standard rtc. Simple conversion is possible.
- 11) drivers/rtc/mcfrtc.c
- ------------------------
+ drivers/rtc/mcfrtc.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 12) drivers/rtc/davinci.c
- -------------------------
+ drivers/rtc/davinci.c
+ ---------------------
The driver is standard rtc. Simple conversion is possible.
- 13) drivers/rtc/rx8025.c
- ------------------------
+ drivers/rtc/rx8025.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 14) drivers/rtc/bfin_rtc.c
- --------------------------
+ drivers/rtc/bfin_rtc.c
+ ----------------------
The driver is standard rtc. Simple conversion is possible.
- 15) drivers/rtc/m41t62.c
- ------------------------
+ drivers/rtc/m41t62.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 16) drivers/rtc/ds1306.c
- ------------------------
+ drivers/rtc/ds1306.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 17) drivers/rtc/mpc8xx.c
- ------------------------
+ drivers/rtc/mpc8xx.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 18) drivers/rtc/ds3231.c
- ------------------------
+ drivers/rtc/ds3231.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 19) drivers/rtc/ds12887.c
- -------------------------
+ drivers/rtc/ds12887.c
+ ---------------------
The driver is standard rtc. Simple conversion is possible.
- 20) drivers/rtc/ds1302.c
- ------------------------
+ drivers/rtc/ds1302.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 21) drivers/rtc/ds1374.c
- ------------------------
+ drivers/rtc/ds1374.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 22) drivers/rtc/ds174x.c
- ------------------------
+ drivers/rtc/ds174x.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 23) drivers/rtc/m41t60.c
- ------------------------
+ drivers/rtc/m41t60.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 24) drivers/rtc/m48t35ax.c
- --------------------------
+ drivers/rtc/m48t35ax.c
+ ----------------------
The driver is standard rtc. Simple conversion is possible.
- 25) drivers/rtc/pl031.c
- -----------------------
+ drivers/rtc/pl031.c
+ -------------------
The driver is standard rtc. Simple conversion is possible.
- 26) drivers/rtc/x1205.c
- -----------------------
+ drivers/rtc/x1205.c
+ -------------------
The driver is standard rtc. Simple conversion is possible.
- 27) drivers/rtc/m41t11.c
- ------------------------
+ drivers/rtc/m41t11.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 28) drivers/rtc/pcf8563.c
- -------------------------
+ drivers/rtc/pcf8563.c
+ ---------------------
The driver is standard rtc. Simple conversion is possible.
- 29) drivers/rtc/mk48t59.c
- -------------------------
+ drivers/rtc/mk48t59.c
+ ---------------------
Macros needs cleanup. Besides that the driver is standard rtc.
Simple conversion is possible.
- 30) drivers/rtc/mxsrtc.c
- ------------------------
+ drivers/rtc/mxsrtc.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 31) drivers/rtc/ds1307.c
- ------------------------
+ drivers/rtc/ds1307.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 32) drivers/rtc/ds1556.c
- ------------------------
+ drivers/rtc/ds1556.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 33) drivers/rtc/rtc4543.c
- -------------------------
+ drivers/rtc/rtc4543.c
+ ---------------------
The driver is standard rtc. Simple conversion is possible.
- 34) drivers/rtc/ds1337.c
- ------------------------
+ drivers/rtc/ds1337.c
+ --------------------
The driver is standard rtc. Simple conversion is possible.
- 35) drivers/rtc/isl1208.c
- -------------------------
+ drivers/rtc/isl1208.c
+ ---------------------
The driver is standard rtc. Simple conversion is possible.
- 36) drivers/rtc/max6900.c
- -------------------------
+ drivers/rtc/max6900.c
+ ---------------------
The driver is standard rtc. Simple conversion is possible.
- 37) drivers/rtc/mc146818.c
- --------------------------
+ drivers/rtc/mc146818.c
+ ----------------------
The driver is standard rtc. Simple conversion is possible.
- 38) drivers/rtc/at91sam9_rtt.c
- ------------------------------
+ drivers/rtc/at91sam9_rtt.c
+ --------------------------
The driver is standard rtc. Simple conversion is possible.
III) Analysis of in-tree drivers
--------------------------------
- 1) altera_jtag_uart.c
- ---------------------
+ altera_jtag_uart.c
+ ------------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 2) altera_uart.c
- ----------------
+ altera_uart.c
+ -------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 3) arm_dcc.c
- ------------
+ arm_dcc.c
+ ---------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible, unless used
with CONFIG_ARM_DCC_MULTI. Then it registers another separate IOMUX.
- 4) atmel_usart.c
- ----------------
+ atmel_usart.c
+ -------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 5) mcfuart.c
- ------------
+ mcfuart.c
+ ---------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 6) ns16550.c
- ------------
+ ns16550.c
+ ---------
This driver seems complicated and certain consideration will need to be made
during conversion. This driver is implemented in very universal manner,
therefore it'll be necessary to properly design it's platform_data.
- 7) ns9750_serial.c
- ------------------
- Unmaintained port. Code got removed.
-
- 8) opencores_yanu.c
- -------------------
+ opencores_yanu.c
+ ----------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 9) s3c4510b_uart.c
- ------------------
+ sandbox.c
+ ---------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 10) sandbox.c
- -------------
- No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
-
- 11) serial.c
- ------------
+ serial.c
+ --------
This is a complementary part of NS16550 UART driver, see above.
- 12) serial_clps7111.c
- ---------------------
- No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
-
- 13) serial_imx.c
- ----------------
+ serial_imx.c
+ ------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible. This driver
might be removed in favor of serial_mxc.c .
- 14) serial_ixp.c
- ----------------
- No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
-
- 15) serial_ks8695.c
- -------------------
+ serial_ixp.c
+ ------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 16) serial_max3100.c
- --------------------
+ serial_ks8695.c
+ ---------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 17) serial_mxc.c
+ serial_max3100.c
----------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 18) serial_netarm.c
- -------------------
+ serial_mxc.c
+ ------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 19) serial_pl01x.c
- ------------------
+ serial_pl01x.c
+ --------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible, though this
driver in fact contains two drivers in total.
- 20) serial_pxa.c
- ----------------
+ serial_pxa.c
+ ------------
This driver is a bit complicated, but due to clean support for
CONFIG_SERIAL_MULTI, there are no expected obstructions throughout the
conversion process.
- 21) serial_s3c24x0.c
- --------------------
+ serial_s3c24x0.c
+ ----------------
This driver, being quite ad-hoc might need some work to bring back to shape.
- 22) serial_s5p.c
- ----------------
+ serial_s5p.c
+ ------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 23) serial_sa1100.c
- -------------------
+ serial_sa1100.c
+ ---------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 24) serial_sh.c
- ---------------
+ serial_sh.c
+ -----------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 25) serial_xuartlite.c
- ----------------------
+ serial_xuartlite.c
+ ------------------
No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
- 26) usbtty.c
- ------------
+ usbtty.c
+ --------
This driver seems very complicated and entangled with USB framework. The
conversion might be complicated here.
- 27) arch/powerpc/cpu/mpc512x/serial.c
- -------------------------------------
+ arch/powerpc/cpu/mpc512x/serial.c
+ ---------------------------------
This driver supports CONFIG_SERIAL_MULTI. This driver will need to be moved to
proper place.
III) Analysis of in-tree drivers
--------------------------------
- 1) altera_spi.c
- ---------------
+ altera_spi.c
+ ------------
All methods have designated structure. Simple conversion possible.
- 2) andes_spi.c
- --------------
+ andes_spi.c
+ -----------
All methods have designated structure. Simple conversion possible.
- 3) andes_spi.h
- --------------
+ andes_spi.h
+ -----------
Support file for andes_spi.c. No conversion is needed.
- 4) armada100_spi.c
- ------------------
+ armada100_spi.c
+ ---------------
All methods have designated structure. Simple conversion possible.
- 5) atmel_dataflash_spi.c
- ------------------------
+ atmel_dataflash_spi.c
+ ---------------------
Wrong placement. Will be moved to another location.
- 6) atmel_spi.c
- --------------
+ atmel_spi.c
+ -----------
Supports more than one bus. Need some minor change.
- 7) atmel_spi.h
- --------------
+ atmel_spi.h
+ -----------
Support file for andes_spi.c. No conversion is needed.
- 8) bfin_spi.c
- -------------
+ bfin_spi.c
+ ----------
Supports more than one bus. Need some minor change.
- 9) cf_spi.c
- -----------
+ cf_spi.c
+ --------
Cooperate with some cpu specific methods from other files. Hard conversion.
- 10) davinci_spi.c
- -----------------
+ davinci_spi.c
+ -------------
All methods have designated structure. Simple conversion possible.
- 11) davinci_spi.h
- -----------------
+ davinci_spi.h
+ -------------
Support file for davinci_spi.h. No conversion is needed.
- 12) fsl_espi.c
- --------------
+ fsl_espi.c
+ ----------
All methods have designated structure. Simple conversion possible.
- 13) kirkwood_spi.c
- ------------------
+ kirkwood_spi.c
+ --------------
All methods have designated structure. Simple conversion possible.
- 14) mpc8xxx_spi.c
- -----------------
+ mpc8xxx_spi.c
+ -------------
All methods have designated structure. Simple conversion possible.
- 15) mpc52xx_spi.c
- -----------------
+ mpc52xx_spi.c
+ -------------
All methods have designated structure. Simple conversion possible.
- 16) mxc_spi.c
- -------------
+ mxc_spi.c
+ ---------
All methods have designated structure. Simple conversion possible.
- 17) mxs_spi.c
- -------------
+ mxs_spi.c
+ ---------
All methods have designated structure. Simple conversion possible.
- 18) oc_tiny_spi.c
- -----------------
+ oc_tiny_spi.c
+ -------------
Supports more than one bus. Need some minor change.
- 19) omap3_spi.c
- ---------------
+ omap3_spi.c
+ -----------
Supports more than one bus. Need some minor change.
- 20) omap3_spi.h
- ---------------
+ omap3_spi.h
+ -----------
Support file for omap3_spi.c. No conversion is needed.
- 21) sh_spi.c
- ------------
+ sh_spi.c
+ --------
All methods have designated structure. Simple conversion possible.
- 22) sh_spi.h
- ------------
+ sh_spi.h
+ --------
Support file for sh_spi.h. No conversion is needed.
- 23) soft_spi.c
- --------------
+ soft_spi.c
+ ----------
Use many board specific method linked from other files. Need careful debugging.
- 24) tegra2_spi.c
- ----------------
+ tegra2_spi.c
+ ------------
Some hardware specific problem when releasing bus.
For in-depth analysis of keyboard drivers, refer to [ UDM-keyboard.txt ].
For in-depth analysis of video drivers, refer to [ UDM-video.txt ].
- 1) arch/blackfin/cpu/jtag-console.c
- -----------------------------------
+ arch/blackfin/cpu/jtag-console.c
+ --------------------------------
This driver is a classic STDIO driver, no problem with conversion is expected.
- 2) board/mpl/pati/pati.c
- ------------------------
+ board/mpl/pati/pati.c
+ ---------------------
This driver registers with the STDIO framework, though it uses a lot of ad-hoc
stuff which will need to be sorted out.
- 3) board/netphone/phone_console.c
- ---------------------------------
+ board/netphone/phone_console.c
+ ------------------------------
This driver is a classic STDIO driver, no problem with conversion is expected.
- 4) drivers/net/netconsole.c
- ---------------------------
+ drivers/net/netconsole.c
+ ------------------------
This driver is a classic STDIO driver, no problem with conversion is expected.
IV) Other involved files (To be removed)
III) Analysis of in-tree drivers
--------------------------------
- 1) drivers/twserial/soft_tws.c
- ------------------------------
+ drivers/twserial/soft_tws.c
+ ---------------------------
The driver is the only TWserial driver. The ad-hoc part in
include/configs/inka4x0.h and the core soft_tws driver should be consolidated
to one compact driver and moved to misc/ .
III) Analysis of in-tree drivers
--------------------------------
- 1) arch/powerpc/cpu/mpc8xx/video.c
- ----------------------------------
+ arch/powerpc/cpu/mpc8xx/video.c
+ -------------------------------
This driver copies the cfb_console [ see drivers/video/cfb_console.c ]
approach and acts only as a STDIO device. Therefore there are currently two
possible approaches, first being the conversion of this driver to usual STDIO
device and second, long-term one, being conversion of this driver to video
driver that provides console.
- 2) arch/x86/lib/video.c
- -----------------------
+ arch/x86/lib/video.c
+ --------------------
This driver registers two separate STDIO devices and should be therefore
converted as such.
- 3) board/bf527-ezkit/video.c
- ----------------------------
+ board/bf527-ezkit/video.c
+ -------------------------
This driver seems bogus as it behaves as STDIO device, but provides no input
or output capabilities. It relies on DEV_EXT_VIDEO, which is no longer in use
or present otherwise than as a dead code/define.
- 4) board/bf533-stamp/video.c
- ----------------------------
+ board/bf533-stamp/video.c
+ -------------------------
This driver seems bogus as it behaves as STDIO device, but provides no input
or output capabilities. It relies on DEV_EXT_VIDEO, which is no longer in use
or present otherwise than as a dead code/define.
- 5) board/bf548-ezkit/video.c
- ----------------------------
+ board/bf548-ezkit/video.c
+ -------------------------
This driver seems bogus as it behaves as STDIO device, but provides no input
or output capabilities. It relies on DEV_EXT_VIDEO, which is no longer in use
or present otherwise than as a dead code/define.
- 6) board/cm-bf548/video.c
- ----------------------------
+ board/cm-bf548/video.c
+ ----------------------
This driver seems bogus as it behaves as STDIO device, but provides no input
or output capabilities. It relies on DEV_EXT_VIDEO, which is no longer in use
or present otherwise than as a dead code/define.
III) Analysis of in-tree drivers
--------------------------------
- 1) drivers/watchdog/at91sam9_wdt.c
- ----------------------------------
+ drivers/watchdog/at91sam9_wdt.c
+ -------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 2) drivers/watchdog/ftwdt010_wdt.c
- ----------------------------------
+ drivers/watchdog/ftwdt010_wdt.c
+ -------------------------------
The driver is ad-hoc HW watchdog. Conversion has to take into account
driver parts spread in include/faraday/*. Restructuring the driver and
code cleanup has to be considered.
- 3) arch/arm/cpu/arm1136/mx31/timer.c
- ------------------------------------
+ arch/arm/cpu/arm1136/mx31/timer.c
+ ---------------------------------
The driver is semi-standard ad-hoc HW watchdog. Conversion has to take
into account driver parts spread in the timer.c file.
- 4) arch/arm/cpu/arm926ejs/davinci/timer.c
- -----------------------------------------
+ arch/arm/cpu/arm926ejs/davinci/timer.c
+ --------------------------------------
The driver is ad-hoc semi-standard HW watchdog. Conversion has to take
into account driver parts spread in the timer.c file.
- 5) arch/arm/cpu/armv7/omap-common/hwinit-common.c
- -------------------------------------------------
+ arch/arm/cpu/armv7/omap-common/hwinit-common.c
+ ----------------------------------------------
The driver is non-standard ad-hoc HW watchdog. Conversion is possible
but functions has to be renamed and constants moved to another places.
- 6) arch/arm/cpu/armv7/omap3/board.c
- -----------------------------------
+ arch/arm/cpu/armv7/omap3/board.c
+ --------------------------------
The driver is non-standard ad-hoc HW watchdog. Conversion is possible
but functions has to be renamed and constants moved to another places.
- 7) arch/blackfin/cpu/watchdog.c
- -------------------------------
+ arch/blackfin/cpu/watchdog.c
+ ----------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 8) arch/m68k/cpu/mcf523x/cpu.c
- ------------------------------
+ arch/m68k/cpu/mcf523x/cpu.c
+ ---------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 9) arch/m68k/cpu/mcf52x2/cpu.c
- ------------------------------
+ arch/m68k/cpu/mcf52x2/cpu.c
+ ---------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 10) arch/m68k/cpu/mcf532x/cpu.c
- -------------------------------
+ arch/m68k/cpu/mcf532x/cpu.c
+ ---------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 11) arch/m68k/cpu/mcf547x_8x/cpu.c
- ----------------------------------
+ arch/m68k/cpu/mcf547x_8x/cpu.c
+ ------------------------------
The driver is standard HW watchdog (there is slight naming convention
violation that has to be rectified). Simple conversion is possible.
- 12) arch/powerpc/cpu/74xx_7xx/cpu.c
- -----------------------------------
+ arch/powerpc/cpu/74xx_7xx/cpu.c
+ -------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 13) arch/powerpc/cpu/mpc512x/cpu.c
- ----------------------------------
+ arch/powerpc/cpu/mpc512x/cpu.c
+ ------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 14) arch/powerpc/cpu/mpc5xx/cpu.c
- ---------------------------------
+ arch/powerpc/cpu/mpc5xx/cpu.c
+ -----------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 15) arch/powerpc/cpu/mpc5xxx/cpu.c
- ----------------------------------
+ arch/powerpc/cpu/mpc5xxx/cpu.c
+ ------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 16) arch/powerpc/cpu/mpc8260/cpu.c
- ----------------------------------
+ arch/powerpc/cpu/mpc8260/cpu.c
+ ------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 17) arch/powerpc/cpu/mpc83xx/cpu.c
- ----------------------------------
+ arch/powerpc/cpu/mpc83xx/cpu.c
+ ------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 18) arch/powerpc/cpu/mpc85xx/cpu.c
- ----------------------------------
+ arch/powerpc/cpu/mpc85xx/cpu.c
+ ------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 19) arch/powerpc/cpu/mpc86xx/cpu.c
- ----------------------------------
+ arch/powerpc/cpu/mpc86xx/cpu.c
+ ------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 20) arch/powerpc/cpu/mpc8xx/cpu.c
-
+ arch/powerpc/cpu/mpc8xx/cpu.c
+ -----------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 21) arch/powerpc/cpu/ppc4xx/cpu.c
- ---------------------------------
+ arch/powerpc/cpu/ppc4xx/cpu.c
+ -----------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 22) arch/sh/cpu/sh2/watchdog.c
- ------------------------------
+ arch/sh/cpu/sh2/watchdog.c
+ --------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 23) arch/sh/cpu/sh3/watchdog.c
- ------------------------------
+ arch/sh/cpu/sh3/watchdog.c
+ --------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 24) arch/sh/cpu/sh4/watchdog.c
- ------------------------------
+ arch/sh/cpu/sh4/watchdog.c
+ --------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 25) board/amcc/luan/luan.c
- --------------------------
+ board/amcc/luan/luan.c
+ ----------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 26) board/amcc/yosemite/yosemite.c
- ----------------------------------
+ board/amcc/yosemite/yosemite.c
+ ------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 27) board/apollon/apollon.c
- ---------------------------
+ board/apollon/apollon.c
+ -----------------------
The driver is standard HW watchdog however the watchdog_init()
function is called in early initialization. Simple conversion is possible.
- 28) board/bmw/m48t59y.c
- -----------------------
+ board/bmw/m48t59y.c
+ -------------------
Special watchdog driver. Dead code. To be removed.
- 29) board/davedenx/qong/qong.c
- ------------------------------
+ board/davedenx/qong/qong.c
+ --------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 30) board/dvlhost/watchdog.c
- ----------------------------
+ board/dvlhost/watchdog.c
+ ------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 31) board/eNET/eNET.c
- ---------------------
+ board/eNET/eNET.c
+ -----------------
The driver is standard HW watchdog. Simple conversion is possible.
- 32) board/eltec/elppc/elppc.c
- -----------------------------
+ board/eltec/elppc/elppc.c
+ -------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 33) board/enbw/enbw_cmc/enbw_cmc.c
- ----------------------------------
+ board/enbw/enbw_cmc/enbw_cmc.c
+ ------------------------------
Only function proxy call. Code cleanup needed.
- 34) board/freescale/mx31pdk/mx31pdk.c
- -------------------------------------
+ board/freescale/mx31pdk/mx31pdk.c
+ ---------------------------------
Only function proxy call. Code cleanup needed.
- 35) board/gth2/gth2.c
- ---------------------
+ board/gth2/gth2.c
+ -----------------
The driver is standard HW watchdog. Simple conversion is possible.
- 36) board/lwmon5/lwmon5.c
- -------------------------
+ board/lwmon5/lwmon5.c
+ ---------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 37) board/manroland/mucmc52/mucmc52.c
- -------------------------------------
+ board/manroland/mucmc52/mucmc52.c
+ ---------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 38) board/manroland/uc101/uc101.c
- ---------------------------------
+ board/manroland/uc101/uc101.c
+ -----------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 39) board/mousse/m48t59y.c
- --------------------------
+ board/mousse/m48t59y.c
+ ----------------------
Special watchdog driver. Dead code. To be removed.
- 40) board/mvblue/mvblue.c
- -------------------------
+ board/mvblue/mvblue.c
+ ---------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 41) board/netphone/netphone.c
- -----------------------------
+ board/netphone/netphone.c
+ -------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 42) board/netta/netta.c
- -----------------------
+ board/netta/netta.c
+ -------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 43) board/netta2/netta2.c
- -------------------------
+ board/netta2/netta2.c
+ ---------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 44) board/omicron/calimain/calimain.c
- -------------------------------------
+ board/omicron/calimain/calimain.c
+ ---------------------------------
Only function proxy call. Code cleanup needed.
- 46) board/pcs440ep/pcs440ep.c
- -----------------------------
+ board/pcs440ep/pcs440ep.c
+ -------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 47) board/stx/stxxtc/stxxtc.c
- -----------------------------
+ board/stx/stxxtc/stxxtc.c
+ -------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 48) board/ti/omap2420h4/omap2420h4.c
- ------------------------------------
+ board/ti/omap2420h4/omap2420h4.c
+ --------------------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 49) board/ttcontrol/vision2/vision2.c
- -------------------------------------
+ board/ttcontrol/vision2/vision2.c
+ ---------------------------------
The driver is standard HW watchdog but namespace is polluted by
non-standard macros. Simple conversion is possible, code cleanup
needed.
- 50) board/v38b/v38b.c
- ---------------------
+ board/v38b/v38b.c
+ -----------------
The driver is standard HW watchdog. Simple conversion is possible.
- 51) board/ve8313/ve8313.c
- -------------------------
+ board/ve8313/ve8313.c
+ ---------------------
The driver is standard HW watchdog. Simple conversion is possible.
- 52) board/w7o/watchdog.c
- ------------------------
+ board/w7o/watchdog.c
+ --------------------
The driver is standard HW watchdog. Simple conversion is possible.
--- /dev/null
+obj-y += bios_emulator/
+obj-y += block/
+obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/
+obj-y += crypto/
+obj-y += fpga/
+obj-y += hwmon/
+obj-y += misc/
+obj-y += pcmcia/
+obj-y += dfu/
+obj-y += rtc/
+obj-y += sound/
+obj-y += tpm/
+obj-y += twserial/
+obj-y += video/
+obj-y += watchdog/
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libatibiosemu.o
-
X86DIR = x86emu
$(shell mkdir -p $(obj)$(X86DIR))
-COBJS-$(CONFIG_BIOSEMU) = atibios.o biosemu.o besys.o bios.o \
+obj-$(CONFIG_BIOSEMU) = atibios.o biosemu.o besys.o bios.o \
$(X86DIR)/decode.o \
$(X86DIR)/ops2.o \
$(X86DIR)/ops.o \
$(X86DIR)/sys.o \
$(X86DIR)/debug.o
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
EXTRA_CFLAGS += -I. -I./include -I$(TOPDIR)/include \
-D__PPC__ -D__BIG_ENDIAN__
CFLAGS += $(EXTRA_CFLAGS)
HOSTCFLAGS += $(EXTRA_CFLAGS)
CPPFLAGS += $(EXTRA_CFLAGS)
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libblock.o
-
-COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
-COBJS-$(CONFIG_ATA_PIIX) += ata_piix.o
-COBJS-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
-COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o
-COBJS-$(CONFIG_IDE_FTIDE020) += ftide020.o
-COBJS-$(CONFIG_LIBATA) += libata.o
-COBJS-$(CONFIG_MVSATA_IDE) += mvsata_ide.o
-COBJS-$(CONFIG_MX51_PATA) += mxc_ata.o
-COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o
-COBJS-$(CONFIG_SATA_DWC) += sata_dwc.o
-COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
-COBJS-$(CONFIG_SATA_SIL) += sata_sil.o
-COBJS-$(CONFIG_IDE_SIL680) += sil680.o
-COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
-COBJS-$(CONFIG_SYSTEMACE) += systemace.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_SCSI_AHCI) += ahci.o
+obj-$(CONFIG_ATA_PIIX) += ata_piix.o
+obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o
+obj-$(CONFIG_FSL_SATA) += fsl_sata.o
+obj-$(CONFIG_IDE_FTIDE020) += ftide020.o
+obj-$(CONFIG_LIBATA) += libata.o
+obj-$(CONFIG_MVSATA_IDE) += mvsata_ide.o
+obj-$(CONFIG_MX51_PATA) += mxc_ata.o
+obj-$(CONFIG_PATA_BFIN) += pata_bfin.o
+obj-$(CONFIG_SATA_DWC) += sata_dwc.o
+obj-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
+obj-$(CONFIG_SATA_SIL) += sata_sil.o
+obj-$(CONFIG_IDE_SIL680) += sil680.o
+obj-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
+obj-$(CONFIG_SYSTEMACE) += systemace.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libbootcount.o
-
-COBJS-y += bootcount.o
-COBJS-$(CONFIG_AT91SAM9XE) += bootcount_at91.o
-COBJS-$(CONFIG_BLACKFIN) += bootcount_blackfin.o
-COBJS-$(CONFIG_SOC_DA8XX) += bootcount_davinci.o
-COBJS-$(CONFIG_AM33XX) += bootcount_davinci.o
-COBJS-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-########################################################################
+obj-y += bootcount.o
+obj-$(CONFIG_AT91SAM9XE) += bootcount_at91.o
+obj-$(CONFIG_BLACKFIN) += bootcount_blackfin.o
+obj-$(CONFIG_SOC_DA8XX) += bootcount_davinci.o
+obj-$(CONFIG_BOOTCOUNT_AM33XX) += bootcount_davinci.o
+obj-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o
+obj-$(CONFIG_BOOTCOUNT_ENV) += bootcount_env.o
* (C) Copyright 2011
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
+ * A bootcount driver for the RTC IP block found on many TI platforms.
+ * This requires the RTC clocks, etc, to be enabled prior to use and
+ * not all boards with this IP block on it will have the RTC in use.
+ *
* SPDX-License-Identifier: GPL-2.0+
*/
--- /dev/null
+/*
+ * (C) Copyright 2013
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+void bootcount_store(ulong a)
+{
+ int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+
+ if (upgrade_available) {
+ setenv_ulong("bootcount", a);
+ saveenv();
+ }
+}
+
+ulong bootcount_load(void)
+{
+ int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+ ulong val = 0;
+
+ if (upgrade_available)
+ val = getenv_ulong("bootcount", 10, 0);
+
+ return val;
+}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libcrypto.o
-
-COBJS-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-########################################################################
+obj-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libdfu.o
-
-COBJS-$(CONFIG_DFU_FUNCTION) += dfu.o
-COBJS-$(CONFIG_DFU_MMC) += dfu_mmc.o
-COBJS-$(CONFIG_DFU_NAND) += dfu_nand.o
-COBJS-$(CONFIG_DFU_RAM) += dfu_ram.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_DFU_FUNCTION) += dfu.o
+obj-$(CONFIG_DFU_MMC) += dfu_mmc.o
+obj-$(CONFIG_DFU_NAND) += dfu_nand.o
+obj-$(CONFIG_DFU_RAM) += dfu_ram.o
static unsigned char *dfu_buf;
static unsigned long dfu_buf_size = CONFIG_SYS_DFU_DATA_BUF_SIZE;
-static unsigned char *dfu_free_buf(void)
+unsigned char *dfu_free_buf(void)
{
free(dfu_buf);
dfu_buf = NULL;
return dfu_buf;
}
-static unsigned char *dfu_get_buf(void)
+unsigned char *dfu_get_buf(void)
{
char *s;
dfu->crc = crc32(dfu->crc, buf, chunk);
dfu->i_buf += chunk;
dfu->b_left -= chunk;
+ dfu->r_left -= chunk;
size -= chunk;
buf += chunk;
readn += chunk;
dfu->offset = 0;
dfu->i_buf_end = dfu_get_buf() + dfu_buf_size;
dfu->i_buf = dfu->i_buf_start;
- dfu->b_left = 0;
+ dfu->b_left = min(dfu_buf_size, dfu->r_left);
dfu->bad_skip = 0;
}
static int dfu_fill_entity(struct dfu_entity *dfu, char *s, int alt,
- char *interface, int num)
+ char *interface, int num)
{
char *st;
return NULL;
}
+
+int dfu_get_alt(char *name)
+{
+ struct dfu_entity *dfu;
+
+ list_for_each_entry(dfu, &dfu_list, list) {
+ if (!strncmp(dfu->name, name, strlen(dfu->name)))
+ return dfu->alt;
+ }
+
+ return -ENODEV;
+}
switch (dfu->layout) {
case DFU_RAW_ADDR:
+ *len = dfu->data.nand.size;
ret = nand_block_read(dfu, offset, buf, len);
break;
default:
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libdma.o
-
-COBJS-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
-COBJS-$(CONFIG_APBH_DMA) += apbh_dma.o
-COBJS-$(CONFIG_FSL_DMA) += fsl_dma.o
-COBJS-$(CONFIG_OMAP3_DMA) += omap3_dma.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
+obj-$(CONFIG_APBH_DMA) += apbh_dma.o
+obj-$(CONFIG_FSL_DMA) += fsl_dma.o
+obj-$(CONFIG_OMAP3_DMA) += omap3_dma.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libfpga.o
-
ifdef CONFIG_FPGA
-COBJS-y += fpga.o
-COBJS-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
-COBJS-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
-COBJS-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
-COBJS-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o
-COBJS-$(CONFIG_FPGA_XILINX) += xilinx.o
-COBJS-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
+obj-y += fpga.o
+obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
+obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
+obj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
+obj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o
+obj-$(CONFIG_FPGA_XILINX) += xilinx.o
+obj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
ifdef CONFIG_FPGA_ALTERA
-COBJS-y += altera.o
-COBJS-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
-COBJS-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
-COBJS-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
+obj-y += altera.o
+obj-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
+obj-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
+obj-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
endif
endif
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#include <common.h>
#include <asm/io.h>
#include <zynqpl.h>
+#include <asm/sizes.h>
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
return FPGA_FAIL;
}
- if ((u32)buf_start & 0x3) {
- u32 *new_buf = (u32 *)((u32)buf & ~0x3);
+ if ((u32)buf < SZ_1M) {
+ printf("%s: Bitstream has to be placed up to 1MB (%x)\n",
+ __func__, (u32)buf);
+ return FPGA_FAIL;
+ }
+
+ if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) {
+ u32 *new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN);
printf("%s: Align buffer at %x to %x(swap %d)\n", __func__,
(u32)buf_start, (u32)new_buf, swap);
debug("%s: Source = 0x%08X\n", __func__, (u32)buf);
debug("%s: Size = %zu\n", __func__, bsize);
+ /* flush(clean & invalidate) d-cache range buf */
+ flush_dcache_range((u32)buf, (u32)buf +
+ roundup(bsize, ARCH_DMA_MINALIGN));
+
/* Set up the transfer */
writel((u32)buf | 1, &devcfg_base->dma_src_addr);
writel(0xFFFFFFFF, &devcfg_base->dma_dst_addr);
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libgpio.o
-
-COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
-COBJS-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
-COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
-COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
-COBJS-$(CONFIG_MARVELL_MFP) += mvmfp.o
-COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o
-COBJS-$(CONFIG_MXS_GPIO) += mxs_gpio.o
-COBJS-$(CONFIG_PCA953X) += pca953x.o
-COBJS-$(CONFIG_PCA9698) += pca9698.o
-COBJS-$(CONFIG_S5P) += s5p_gpio.o
-COBJS-$(CONFIG_SANDBOX_GPIO) += sandbox.o
-COBJS-$(CONFIG_SPEAR_GPIO) += spear_gpio.o
-COBJS-$(CONFIG_TEGRA_GPIO) += tegra_gpio.o
-COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
-COBJS-$(CONFIG_DM644X_GPIO) += da8xx_gpio.o
-COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o
-COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
-COBJS-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o
-COBJS-$(CONFIG_OMAP_GPIO) += omap_gpio.o
-COBJS-$(CONFIG_DB8500_GPIO) += db8500_gpio.o
-COBJS-$(CONFIG_BCM2835_GPIO) += bcm2835_gpio.o
-COBJS-$(CONFIG_S3C2440_GPIO) += s3c2440_gpio.o
-COBJS-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o
-COBJS-$(CONFIG_ADI_GPIO2) += adi_gpio2.o
-COBJS-$(CONFIG_TCA642X) += tca642x.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-########################################################################
+obj-$(CONFIG_AT91_GPIO) += at91_gpio.o
+obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
+obj-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
+obj-$(CONFIG_MARVELL_GPIO) += mvgpio.o
+obj-$(CONFIG_MARVELL_MFP) += mvmfp.o
+obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
+obj-$(CONFIG_MXS_GPIO) += mxs_gpio.o
+obj-$(CONFIG_PCA953X) += pca953x.o
+obj-$(CONFIG_PCA9698) += pca9698.o
+obj-$(CONFIG_S5P) += s5p_gpio.o
+obj-$(CONFIG_SANDBOX_GPIO) += sandbox.o
+obj-$(CONFIG_SPEAR_GPIO) += spear_gpio.o
+obj-$(CONFIG_TEGRA_GPIO) += tegra_gpio.o
+obj-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
+obj-$(CONFIG_DM644X_GPIO) += da8xx_gpio.o
+obj-$(CONFIG_ALTERA_PIO) += altera_pio.o
+obj-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
+obj-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o
+obj-$(CONFIG_OMAP_GPIO) += omap_gpio.o
+obj-$(CONFIG_DB8500_GPIO) += db8500_gpio.o
+obj-$(CONFIG_BCM2835_GPIO) += bcm2835_gpio.o
+obj-$(CONFIG_S3C2440_GPIO) += s3c2440_gpio.o
+obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o
+obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o
+obj-$(CONFIG_TCA642X) += tca642x.o
+oby-$(CONFIG_SX151X) += sx151x.o
#include <common.h>
#include <asm/errno.h>
#include <asm/gpio.h>
-#include <asm/portmux.h>
-
-static struct gpio_port_t * const gpio_array[] = {
- (struct gpio_port_t *)PORTA_FER,
- (struct gpio_port_t *)PORTB_FER,
- (struct gpio_port_t *)PORTC_FER,
- (struct gpio_port_t *)PORTD_FER,
- (struct gpio_port_t *)PORTE_FER,
- (struct gpio_port_t *)PORTF_FER,
- (struct gpio_port_t *)PORTG_FER,
-#if defined(CONFIG_BF54x)
- (struct gpio_port_t *)PORTH_FER,
- (struct gpio_port_t *)PORTI_FER,
- (struct gpio_port_t *)PORTJ_FER,
-#endif
-};
#define RESOURCE_LABEL_SIZE 16
else
gpio_array[gpio_bank(gpio)]->port_fer_set = gpio_bit(gpio);
#endif
- SSYNC();
}
inline void portmux_setup(unsigned short per)
--- /dev/null
+/*
+ * (C) Copyright 2013
+ * Viktar Palstsiuk, Promwad, viktar.palstsiuk@promwad.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * Driver for Semtech SX151x SPI GPIO Expanders
+ */
+
+#include <common.h>
+#include <spi.h>
+#include <sx151x.h>
+
+#ifndef CONFIG_SX151X_SPI_BUS
+#define CONFIG_SX151X_SPI_BUS 0
+#endif
+
+/*
+ * The SX151x registers
+ */
+
+#ifdef CONFIG_SX151X_GPIO_COUNT_8
+/* 8bit: SX1511 */
+#define SX151X_REG_DIR 0x07
+#define SX151X_REG_DATA 0x08
+#else
+/* 16bit: SX1512 */
+#define SX151X_REG_DIR 0x0F
+#define SX151X_REG_DATA 0x11
+#endif
+#define SX151X_REG_RESET 0x7D
+
+static int sx151x_spi_write(int chip, unsigned char reg, unsigned char val)
+{
+ struct spi_slave *slave;
+ unsigned char buf[2];
+ int ret;
+
+ slave = spi_setup_slave(CONFIG_SX151X_SPI_BUS, chip, 1000000,
+ SPI_MODE_0);
+ if (!slave)
+ return 0;
+
+ spi_claim_bus(slave);
+
+ buf[0] = reg;
+ buf[1] = val;
+
+ ret = spi_xfer(slave, 16, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END);
+ if (ret < 0)
+ printf("spi%d.%d write fail: can't write %02x to %02x: %d\n",
+ CONFIG_SX151X_SPI_BUS, chip, val, reg, ret);
+ else
+ printf("spi%d.%d write 0x%02x to register 0x%02x\n",
+ CONFIG_SX151X_SPI_BUS, chip, val, reg);
+ spi_release_bus(slave);
+ spi_free_slave(slave);
+
+ return ret;
+}
+
+static int sx151x_spi_read(int chip, unsigned char reg)
+{
+ struct spi_slave *slave;
+ int ret;
+
+ slave = spi_setup_slave(CONFIG_SX151X_SPI_BUS, chip, 1000000,
+ SPI_MODE_0);
+ if (!slave)
+ return 0;
+
+ spi_claim_bus(slave);
+
+ ret = spi_w8r8(slave, reg | 0x80);
+ if (ret < 0)
+ printf("spi%d.%d read fail: can't read %02x: %d\n",
+ CONFIG_SX151X_SPI_BUS, chip, reg, ret);
+ else
+ printf("spi%d.%d read register 0x%02x: 0x%02x\n",
+ CONFIG_SX151X_SPI_BUS, chip, reg, ret);
+
+ spi_release_bus(slave);
+ spi_free_slave(slave);
+
+ return ret;
+}
+
+static inline void sx151x_find_cfg(int gpio, unsigned char *reg, unsigned char *mask)
+{
+ *reg -= gpio / 8;
+ *mask = 1 << (gpio % 8);
+}
+
+static int sx151x_write_cfg(int chip, unsigned char gpio, unsigned char reg, int val)
+{
+ unsigned char mask;
+ unsigned char data;
+ int ret;
+
+ sx151x_find_cfg(gpio, ®, &mask);
+ ret = sx151x_spi_read(chip, reg);
+ if (ret < 0)
+ return ret;
+ else
+ data = ret;
+ data &= ~mask;
+ data |= (val << (gpio % 8)) & mask;
+ return sx151x_spi_write(chip, reg, data);
+}
+
+int sx151x_get_value(int chip, int gpio)
+{
+ unsigned char reg = SX151X_REG_DATA;
+ unsigned char mask;
+ int ret;
+
+ sx151x_find_cfg(gpio, ®, &mask);
+ ret = sx151x_spi_read(chip, reg);
+ if (ret >= 0)
+ ret = (ret & mask) != 0 ? 1 : 0;
+
+ return ret;
+}
+
+int sx151x_set_value(int chip, int gpio, int val)
+{
+ return sx151x_write_cfg(chip, gpio, SX151X_REG_DATA, (val ? 1 : 0));
+}
+
+int sx151x_direction_input(int chip, int gpio)
+{
+ return sx151x_write_cfg(chip, gpio, SX151X_REG_DIR, 1);
+}
+
+int sx151x_direction_output(int chip, int gpio)
+{
+ return sx151x_write_cfg(chip, gpio, SX151X_REG_DIR, 0);
+}
+
+int sx151x_reset(int chip)
+{
+ int err;
+
+ err = sx151x_spi_write(chip, SX151X_REG_RESET, 0x12);
+ if (err < 0)
+ return err;
+
+ err = sx151x_spi_write(chip, SX151X_REG_RESET, 0x34);
+ return err;
+}
+
+#ifdef CONFIG_CMD_SX151X
+
+int do_sx151x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ int ret = CMD_RET_USAGE, chip = 0, gpio = 0, val = 0;
+
+ if (argc < 3)
+ return CMD_RET_USAGE;
+
+ /* arg2 used as chip number */
+ chip = simple_strtoul(argv[2], NULL, 10);
+
+ if (strcmp(argv[1], "reset") == 0) {
+ ret = sx151x_reset(chip);
+ if (!ret) {
+ printf("Device at spi%d.%d was reset\n",
+ CONFIG_SX151X_SPI_BUS, chip);
+ }
+ return ret;
+ }
+
+ if (argc < 4)
+ return CMD_RET_USAGE;
+
+ /* arg3 used as gpio number */
+ gpio = simple_strtoul(argv[3], NULL, 10);
+
+ if (strcmp(argv[1], "get") == 0) {
+ ret = sx151x_get_value(chip, gpio);
+ if (ret < 0)
+ printf("Failed to get value at spi%d.%d gpio %d\n",
+ CONFIG_SX151X_SPI_BUS, chip, gpio);
+ else {
+ printf("Value at spi%d.%d gpio %d is %d\n",
+ CONFIG_SX151X_SPI_BUS, chip, gpio, ret);
+ ret = 0;
+ }
+ return ret;
+ }
+
+ if (argc < 5)
+ return CMD_RET_USAGE;
+
+ /* arg4 used as value or direction */
+ val = simple_strtoul(argv[4], NULL, 10);
+
+ if (strcmp(argv[1], "set") == 0) {
+ ret = sx151x_set_value(chip, gpio, val);
+ if (ret < 0)
+ printf("Failed to set value at spi%d.%d gpio %d\n",
+ CONFIG_SX151X_SPI_BUS, chip, gpio);
+ else
+ printf("New value at spi%d.%d gpio %d is %d\n",
+ CONFIG_SX151X_SPI_BUS, chip, gpio, val);
+ return ret;
+ } else if (strcmp(argv[1], "dir") == 0) {
+ if (val == 0)
+ ret = sx151x_direction_output(chip, gpio);
+ else
+ ret = sx151x_direction_input(chip, gpio);
+
+ if (ret < 0)
+ printf("Failed to set direction of spi%d.%d gpio %d\n",
+ CONFIG_SX151X_SPI_BUS, chip, gpio);
+ else
+ printf("New direction of spi%d.%d gpio %d is %d\n",
+ CONFIG_SX151X_SPI_BUS, chip, gpio, val);
+ return ret;
+ }
+
+ printf("Please see usage\n");
+
+ return ret;
+}
+
+U_BOOT_CMD(
+ sx151x, 5, 1, do_sx151x,
+ "sx151x gpio access",
+ "dir chip gpio 0|1\n"
+ " - set gpio direction (0 for output, 1 for input)\n"
+ "sx151x get chip gpio\n"
+ " - get gpio value\n"
+ "sx151x set chip gpio 0|1\n"
+ " - set gpio value\n"
+ "sx151x reset chip\n"
+ " - reset chip"
+);
+
+#endif /* CONFIG_CMD_SX151X */
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
#CFLAGS += -DDEBUG
-LIB = $(obj)libhwmon.o
-
-COBJS-$(CONFIG_DTT_ADM1021) += adm1021.o
-COBJS-$(CONFIG_DTT_ADT7460) += adt7460.o
-COBJS-$(CONFIG_DTT_DS1621) += ds1621.o
-COBJS-$(CONFIG_DTT_DS1722) += ds1722.o
-COBJS-$(CONFIG_DTT_DS1775) += ds1775.o
-COBJS-$(CONFIG_DTT_LM63) += lm63.o
-COBJS-$(CONFIG_DTT_LM73) += lm73.o
-COBJS-$(CONFIG_DTT_LM75) += lm75.o
-COBJS-$(CONFIG_DTT_LM81) += lm81.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_DTT_ADM1021) += adm1021.o
+obj-$(CONFIG_DTT_ADT7460) += adt7460.o
+obj-$(CONFIG_DTT_DS1621) += ds1621.o
+obj-$(CONFIG_DTT_DS1722) += ds1722.o
+obj-$(CONFIG_DTT_DS1775) += ds1775.o
+obj-$(CONFIG_DTT_LM63) += lm63.o
+obj-$(CONFIG_DTT_LM73) += lm73.o
+obj-$(CONFIG_DTT_LM75) += lm75.o
+obj-$(CONFIG_DTT_LM81) += lm81.o
-
#include <common.h>
#include <asm/ic/ssi.h>
#include <ds1722.h>
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libi2c.o
-
-COBJS-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o
-COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
-COBJS-$(CONFIG_DW_I2C) += designware_i2c.o
-COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
-COBJS-$(CONFIG_I2C_MV) += mv_i2c.o
-COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o
-COBJS-$(CONFIG_I2C_MXS) += mxs_i2c.o
-COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
-COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
-COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
-COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
-COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
-COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
-COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o
-COBJS-$(CONFIG_SH_I2C) += sh_i2c.o
-COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
-COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
-COBJS-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
-COBJS-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
-COBJS-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
-COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
-COBJS-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
-COBJS-$(CONFIG_ZYNQ_I2C) += zynq_i2c.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o
+obj-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o
+obj-$(CONFIG_DW_I2C) += designware_i2c.o
+obj-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
+obj-$(CONFIG_I2C_MV) += mv_i2c.o
+obj-$(CONFIG_I2C_MXS) += mxs_i2c.o
+obj-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
+obj-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
+obj-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
+obj-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
+obj-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
+obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
+obj-$(CONFIG_U8500_I2C) += u8500_i2c.o
+obj-$(CONFIG_SH_I2C) += sh_i2c.o
+obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
+obj-$(CONFIG_SYS_I2C) += i2c_core.o
+obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
+obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
+obj-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
+obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
+obj-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
+obj-$(CONFIG_SYS_I2C_TEGRA) += tegra_i2c.o
+obj-$(CONFIG_ZYNQ_I2C) += zynq_i2c.o
return;
for (i = 0; i < max; i++) {
- /* adapter itself */
- addr = (unsigned long)i2c_adap_p;
- addr += gd->reloc_off;
- i2c_adap_p = (struct i2c_adapter *)addr;
/* i2c_init() */
addr = (unsigned long)i2c_adap_p->init;
addr += gd->reloc_off;
- i2c_adap_p->init = (void (*)(int, int))addr;
+ i2c_adap_p->init = (void *)addr;
/* i2c_probe() */
addr = (unsigned long)i2c_adap_p->probe;
addr += gd->reloc_off;
- i2c_adap_p->probe = (int (*)(uint8_t))addr;
+ i2c_adap_p->probe = (void *)addr;
/* i2c_read() */
addr = (unsigned long)i2c_adap_p->read;
addr += gd->reloc_off;
- i2c_adap_p->read = (int (*)(uint8_t, uint, int, uint8_t *,
- int))addr;
+ i2c_adap_p->read = (void *)addr;
/* i2c_write() */
addr = (unsigned long)i2c_adap_p->write;
addr += gd->reloc_off;
- i2c_adap_p->write = (int (*)(uint8_t, uint, int, uint8_t *,
- int))addr;
+ i2c_adap_p->write = (void *)addr;
/* i2c_set_bus_speed() */
addr = (unsigned long)i2c_adap_p->set_bus_speed;
addr += gd->reloc_off;
- i2c_adap_p->set_bus_speed = (uint (*)(uint))addr;
+ i2c_adap_p->set_bus_speed = (void *)addr;
/* name */
addr = (unsigned long)i2c_adap_p->name;
addr += gd->reloc_off;
return -1;
buf = (uint8_t)((channel & 0x07) | (1 << 3));
break;
+ case I2C_MUX_PCA9548_ID:
+ if (channel > 7)
+ return -1;
+ buf = (uint8_t)(0x01 << channel);
+ break;
default:
printf("%s: wrong mux id: %d\n", __func__, mux_id);
return -1;
*/
int i2c_set_bus_num(unsigned int bus)
{
- int max = ll_entry_count(struct i2c_adapter, i2c);
+ int max;
+
+ if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0))
+ return 0;
- if (I2C_ADAPTER(bus) >= max) {
- printf("Error, wrong i2c adapter %d max %d possible\n",
- I2C_ADAPTER(bus), max);
- return -2;
- }
#ifndef CONFIG_SYS_I2C_DIRECT_BUS
if (bus >= CONFIG_SYS_NUM_I2C_BUSES)
return -1;
#endif
- if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0))
- return 0;
+ max = ll_entry_count(struct i2c_adapter, i2c);
+ if (I2C_ADAPTER(bus) >= max) {
+ printf("Error, wrong i2c adapter %d max %d possible\n",
+ I2C_ADAPTER(bus), max);
+ return -2;
+ }
#ifndef CONFIG_SYS_I2C_DIRECT_BUS
i2c_mux_disconnet_all();
};
#endif
+
+#ifndef CONFIG_SYS_MXC_I2C1_SPEED
+#define CONFIG_SYS_MXC_I2C1_SPEED 100000
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SPEED
+#define CONFIG_SYS_MXC_I2C2_SPEED 100000
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SPEED
+#define CONFIG_SYS_MXC_I2C3_SPEED 100000
+#endif
+
+#ifndef CONFIG_SYS_MXC_I2C1_SLAVE
+#define CONFIG_SYS_MXC_I2C1_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SLAVE
+#define CONFIG_SYS_MXC_I2C2_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SLAVE
+#define CONFIG_SYS_MXC_I2C3_SLAVE 0
+#endif
+
+
/*
* Calculate and set proper clock divider
*/
return 0;
}
-/*
- * Get I2C Speed
- */
-static unsigned int bus_i2c_get_bus_speed(void *base)
-{
- struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
- u8 clk_idx = readb(&i2c_regs->ifdr);
- u8 clk_div;
-
- for (clk_div = 0; i2c_clk_div[clk_div][1] != clk_idx; clk_div++)
- ;
-
- return mxc_get_clock(MXC_I2C_CLK) / i2c_clk_div[clk_div][0];
-}
-
#define ST_BUS_IDLE (0 | (I2SR_IBB << 8))
#define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB << 8))
#define ST_IIF (I2SR_IIF | (I2SR_IIF << 8))
*/
static struct sram_data __attribute__((section(".data"))) srdata;
-void *get_base(void)
-{
-#ifdef CONFIG_SYS_I2C_BASE
-#ifdef CONFIG_I2C_MULTI_BUS
- void *ret = srdata.i2c_data[srdata.curr_i2c_bus].base;
- if (ret)
- return ret;
-#endif
- return (void *)CONFIG_SYS_I2C_BASE;
-#elif defined(CONFIG_I2C_MULTI_BUS)
- return srdata.i2c_data[srdata.curr_i2c_bus].base;
+static void * const i2c_bases[] = {
+#if defined(CONFIG_MX25)
+ (void *)IMX_I2C_BASE,
+ (void *)IMX_I2C2_BASE,
+ (void *)IMX_I2C3_BASE
+#elif defined(CONFIG_MX27)
+ (void *)IMX_I2C1_BASE,
+ (void *)IMX_I2C2_BASE
+#elif defined(CONFIG_MX31) || defined(CONFIG_MX35) || \
+ defined(CONFIG_MX51) || defined(CONFIG_MX53) || \
+ defined(CONFIG_MX6)
+ (void *)I2C1_BASE_ADDR,
+ (void *)I2C2_BASE_ADDR,
+ (void *)I2C3_BASE_ADDR
+#elif defined(CONFIG_VF610)
+ (void *)I2C0_BASE_ADDR
#else
- return srdata.i2c_data[0].base;
+#error "architecture not supported"
#endif
+};
+
+void *i2c_get_base(struct i2c_adapter *adap)
+{
+ return i2c_bases[adap->hwadapnr];
}
static struct i2c_parms *i2c_get_parms(void *base)
return 0;
}
-#ifdef CONFIG_I2C_MULTI_BUS
-unsigned int i2c_get_bus_num(void)
-{
- return srdata.curr_i2c_bus;
-}
-
-int i2c_set_bus_num(unsigned bus_idx)
-{
- if (bus_idx >= ARRAY_SIZE(srdata.i2c_data))
- return -1;
- if (!srdata.i2c_data[bus_idx].base)
- return -1;
- srdata.curr_i2c_bus = bus_idx;
- return 0;
-}
-#endif
-
-int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
+static int mxc_i2c_read(struct i2c_adapter *adap, uint8_t chip,
+ uint addr, int alen, uint8_t *buffer,
+ int len)
{
- return bus_i2c_read(get_base(), chip, addr, alen, buf, len);
+ return bus_i2c_read(i2c_get_base(adap), chip, addr, alen, buffer, len);
}
-int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
+static int mxc_i2c_write(struct i2c_adapter *adap, uint8_t chip,
+ uint addr, int alen, uint8_t *buffer,
+ int len)
{
- return bus_i2c_write(get_base(), chip, addr, alen, buf, len);
+ return bus_i2c_write(i2c_get_base(adap), chip, addr, alen, buffer, len);
}
/*
* Test if a chip at a given address responds (probe the chip)
*/
-int i2c_probe(uchar chip)
+static int mxc_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
{
- return bus_i2c_write(get_base(), chip, 0, 0, NULL, 0);
+ return bus_i2c_write(i2c_get_base(adap), chip, 0, 0, NULL, 0);
}
void bus_i2c_init(void *base, int speed, int unused,
/*
* Init I2C Bus
*/
-void i2c_init(int speed, int unused)
+static void mxc_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
{
- bus_i2c_init(get_base(), speed, unused, NULL, NULL);
+ bus_i2c_init(i2c_get_base(adap), speed, slaveaddr, NULL, NULL);
}
/*
* Set I2C Speed
*/
-int i2c_set_bus_speed(unsigned int speed)
+static uint mxc_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)
{
- return bus_i2c_set_bus_speed(get_base(), speed);
+ return bus_i2c_set_bus_speed(i2c_get_base(adap), speed);
}
/*
- * Get I2C Speed
+ * Register mxc i2c adapters
*/
-unsigned int i2c_get_bus_speed(void)
-{
- return bus_i2c_get_bus_speed(get_base());
-}
+U_BOOT_I2C_ADAP_COMPLETE(mxc0, mxc_i2c_init, mxc_i2c_probe,
+ mxc_i2c_read, mxc_i2c_write,
+ mxc_i2c_set_bus_speed,
+ CONFIG_SYS_MXC_I2C1_SPEED,
+ CONFIG_SYS_MXC_I2C1_SLAVE, 0)
+U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe,
+ mxc_i2c_read, mxc_i2c_write,
+ mxc_i2c_set_bus_speed,
+ CONFIG_SYS_MXC_I2C2_SPEED,
+ CONFIG_SYS_MXC_I2C2_SLAVE, 1)
+#if defined(CONFIG_MX31) || defined(CONFIG_MX35) ||\
+ defined(CONFIG_MX51) || defined(CONFIG_MX53) ||\
+ defined(CONFIG_MX6)
+U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
+ mxc_i2c_read, mxc_i2c_write,
+ mxc_i2c_set_bus_speed,
+ CONFIG_SYS_MXC_I2C3_SPEED,
+ CONFIG_SYS_MXC_I2C3_SLAVE, 2)
+#endif
--- /dev/null
+/*
+ * drivers/i2c/rcar_i2c.c
+ *
+ * Copyright (C) 2013 Renesas Electronics Corporation
+ * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct rcar_i2c {
+ u32 icscr;
+ u32 icmcr;
+ u32 icssr;
+ u32 icmsr;
+ u32 icsier;
+ u32 icmier;
+ u32 icccr;
+ u32 icsar;
+ u32 icmar;
+ u32 icrxdtxd;
+ u32 icccr2;
+ u32 icmpr;
+ u32 ichpr;
+ u32 iclpr;
+};
+
+#define MCR_MDBS 0x80 /* non-fifo mode switch */
+#define MCR_FSCL 0x40 /* override SCL pin */
+#define MCR_FSDA 0x20 /* override SDA pin */
+#define MCR_OBPC 0x10 /* override pins */
+#define MCR_MIE 0x08 /* master if enable */
+#define MCR_TSBE 0x04
+#define MCR_FSB 0x02 /* force stop bit */
+#define MCR_ESG 0x01 /* en startbit gen. */
+
+#define MSR_MASK 0x7f
+#define MSR_MNR 0x40 /* nack received */
+#define MSR_MAL 0x20 /* arbitration lost */
+#define MSR_MST 0x10 /* sent a stop */
+#define MSR_MDE 0x08
+#define MSR_MDT 0x04
+#define MSR_MDR 0x02
+#define MSR_MAT 0x01 /* slave addr xfer done */
+
+static const struct rcar_i2c *i2c_dev[CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS] = {
+ (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C0_BASE,
+ (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C1_BASE,
+ (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C2_BASE,
+ (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C3_BASE,
+};
+
+static void rcar_i2c_raw_rw_common(struct rcar_i2c *dev, u8 chip, uint addr)
+{
+ /* set slave address */
+ writel(chip << 1, &dev->icmar);
+ /* set register address */
+ writel(addr, &dev->icrxdtxd);
+ /* clear status */
+ writel(0, &dev->icmsr);
+ /* start master send */
+ writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr);
+
+ while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDE))
+ != (MSR_MAT | MSR_MDE))
+ udelay(10);
+
+ /* clear ESG */
+ writel(MCR_MDBS | MCR_MIE, &dev->icmcr);
+ /* start SCLclk */
+ writel(~(MSR_MAT | MSR_MDE), &dev->icmsr);
+
+ while (!(readl(&dev->icmsr) & MSR_MDE))
+ udelay(10);
+}
+
+static void rcar_i2c_raw_rw_finish(struct rcar_i2c *dev)
+{
+ while (!(readl(&dev->icmsr) & MSR_MST))
+ udelay(10);
+
+ writel(0, &dev->icmcr);
+}
+
+static int
+rcar_i2c_raw_write(struct rcar_i2c *dev, u8 chip, uint addr, u8 *val, int size)
+{
+ rcar_i2c_raw_rw_common(dev, chip, addr);
+
+ /* set send date */
+ writel(*val, &dev->icrxdtxd);
+ /* start SCLclk */
+ writel(~MSR_MDE, &dev->icmsr);
+
+ while (!(readl(&dev->icmsr) & MSR_MDE))
+ udelay(10);
+
+ /* set stop condition */
+ writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr);
+ /* start SCLclk */
+ writel(~MSR_MDE, &dev->icmsr);
+
+ rcar_i2c_raw_rw_finish(dev);
+
+ return 0;
+}
+
+static u8
+rcar_i2c_raw_read(struct rcar_i2c *dev, u8 chip, uint addr)
+{
+ u8 ret;
+
+ rcar_i2c_raw_rw_common(dev, chip, addr);
+
+ /* set slave address, receive */
+ writel((chip << 1) | 1, &dev->icmar);
+ /* start master receive */
+ writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr);
+
+ while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDE))
+ != (MSR_MAT | MSR_MDE))
+ udelay(10);
+
+ /* clear ESG */
+ writel(MCR_MDBS | MCR_MIE, &dev->icmcr);
+ /* prepare stop condition */
+ writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr);
+ /* start SCLclk */
+ writel(~(MSR_MAT | MSR_MDR), &dev->icmsr);
+
+ while (!(readl(&dev->icmsr) & MSR_MDR))
+ udelay(10);
+
+ /* get receive data */
+ ret = (u8)readl(&dev->icrxdtxd);
+ /* start SCLclk */
+ writel(~MSR_MDR, &dev->icmsr);
+
+ rcar_i2c_raw_rw_finish(dev);
+
+ return ret;
+}
+
+/*
+ * SCL = iicck / (20 + SCGD * 8 + F[(ticf + tr + intd) * iicck])
+ * iicck : I2C internal clock < 20 MHz
+ * ticf : I2C SCL falling time: 35 ns
+ * tr : I2C SCL rising time: 200 ns
+ * intd : LSI internal delay: I2C0: 50 ns I2C1-3: 5
+ * F[n] : n rounded up to an integer
+ */
+static u32 rcar_clock_gen(int i2c_no, u32 bus_speed)
+{
+ u32 iicck, f, scl, scgd;
+ u32 intd = 5;
+
+ int bit = 0, cdf_width = 3;
+ for (bit = 0; bit < (1 << cdf_width); bit++) {
+ iicck = CONFIG_HP_CLK_FREQ / (1 + bit);
+ if (iicck < 20000000)
+ break;
+ }
+
+ if (bit > (1 << cdf_width)) {
+ puts("rcar-i2c: Can not get CDF\n");
+ return 0;
+ }
+
+ if (i2c_no == 0)
+ intd = 50;
+
+ f = (35 + 200 + intd) * (iicck / 1000000000);
+
+ for (scgd = 0; scgd < 0x40; scgd++) {
+ scl = iicck / (20 + (scgd * 8) + f);
+ if (scl <= bus_speed)
+ break;
+ }
+
+ if (scgd > 0x40) {
+ puts("rcar-i2c: Can not get SDGB\n");
+ return 0;
+ }
+
+ debug("%s: scl: %d\n", __func__, scl);
+ debug("%s: bit %x\n", __func__, bit);
+ debug("%s: scgd %x\n", __func__, scgd);
+ debug("%s: iccr %x\n", __func__, (scgd << (cdf_width) | bit));
+
+ return scgd << (cdf_width) | bit;
+}
+
+static void
+rcar_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
+{
+ struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr];
+ u32 icccr = 0;
+
+ /* No i2c support prior to relocation */
+ if (!(gd->flags & GD_FLG_RELOC))
+ return;
+
+ /*
+ * reset slave mode.
+ * slave mode is not used on this driver
+ */
+ writel(0, &dev->icsier);
+ writel(0, &dev->icsar);
+ writel(0, &dev->icscr);
+ writel(0, &dev->icssr);
+
+ /* reset master mode */
+ writel(0, &dev->icmier);
+ writel(0, &dev->icmcr);
+ writel(0, &dev->icmsr);
+ writel(0, &dev->icmar);
+
+ icccr = rcar_clock_gen(adap->hwadapnr, adap->speed);
+ if (icccr == 0)
+ puts("I2C: Init failed\n");
+ else
+ writel(icccr, &dev->icccr);
+}
+
+static int rcar_i2c_read(struct i2c_adapter *adap, uint8_t chip,
+ uint addr, int alen, u8 *data, int len)
+{
+ struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr];
+ int i;
+
+ for (i = 0; i < len; i++)
+ data[i] = rcar_i2c_raw_read(dev, chip, addr + i);
+
+ return 0;
+}
+
+static int rcar_i2c_write(struct i2c_adapter *adap, uint8_t chip, uint addr,
+ int alen, u8 *data, int len)
+{
+ struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr];
+ return rcar_i2c_raw_write(dev, chip, addr, data, len);
+}
+
+static int
+rcar_i2c_probe(struct i2c_adapter *adap, u8 dev)
+{
+ return rcar_i2c_read(adap, dev, 0, 0, NULL, 0);
+}
+
+static unsigned int rcar_i2c_set_bus_speed(struct i2c_adapter *adap,
+ unsigned int speed)
+{
+ struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr];
+ u32 icccr;
+ int ret = 0;
+
+ rcar_i2c_raw_rw_finish(dev);
+
+ icccr = rcar_clock_gen(adap->hwadapnr, speed);
+ if (icccr == 0) {
+ puts("I2C: Init failed\n");
+ ret = -1;
+ } else {
+ writel(icccr, &dev->icccr);
+ }
+ return ret;
+}
+
+/*
+ * Register RCAR i2c adapters
+ */
+U_BOOT_I2C_ADAP_COMPLETE(rcar_0, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read,
+ rcar_i2c_write, rcar_i2c_set_bus_speed,
+ CONFIG_SYS_RCAR_I2C0_SPEED, 0, 0)
+U_BOOT_I2C_ADAP_COMPLETE(rcar_1, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read,
+ rcar_i2c_write, rcar_i2c_set_bus_speed,
+ CONFIG_SYS_RCAR_I2C1_SPEED, 0, 1)
+U_BOOT_I2C_ADAP_COMPLETE(rcar_2, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read,
+ rcar_i2c_write, rcar_i2c_set_bus_speed,
+ CONFIG_SYS_RCAR_I2C2_SPEED, 0, 2)
+U_BOOT_I2C_ADAP_COMPLETE(rcar_3, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read,
+ rcar_i2c_write, rcar_i2c_set_bus_speed,
+ CONFIG_SYS_RCAR_I2C3_SPEED, 0, 3)
#define I2C_NOK_LA 3 /* Lost arbitration */
#define I2C_NOK_TOUT 4 /* time out */
+/* HSI2C specific register description */
+
+/* I2C_CTL Register bits */
+#define HSI2C_FUNC_MODE_I2C (1u << 0)
+#define HSI2C_MASTER (1u << 3)
+#define HSI2C_RXCHON (1u << 6) /* Write/Send */
+#define HSI2C_TXCHON (1u << 7) /* Read/Receive */
+#define HSI2C_SW_RST (1u << 31)
+
+/* I2C_FIFO_CTL Register bits */
+#define HSI2C_RXFIFO_EN (1u << 0)
+#define HSI2C_TXFIFO_EN (1u << 1)
+#define HSI2C_TXFIFO_TRIGGER_LEVEL (0x20 << 16)
+#define HSI2C_RXFIFO_TRIGGER_LEVEL (0x20 << 4)
+
+/* I2C_TRAILING_CTL Register bits */
+#define HSI2C_TRAILING_COUNT (0xff)
+
+/* I2C_INT_EN Register bits */
+#define HSI2C_TX_UNDERRUN_EN (1u << 2)
+#define HSI2C_TX_OVERRUN_EN (1u << 3)
+#define HSI2C_RX_UNDERRUN_EN (1u << 4)
+#define HSI2C_RX_OVERRUN_EN (1u << 5)
+#define HSI2C_INT_TRAILING_EN (1u << 6)
+#define HSI2C_INT_I2C_EN (1u << 9)
+
+#define HSI2C_INT_ERROR_MASK (HSI2C_TX_UNDERRUN_EN |\
+ HSI2C_TX_OVERRUN_EN |\
+ HSI2C_RX_UNDERRUN_EN |\
+ HSI2C_RX_OVERRUN_EN |\
+ HSI2C_INT_TRAILING_EN)
+
+/* I2C_CONF Register bits */
+#define HSI2C_AUTO_MODE (1u << 31)
+#define HSI2C_10BIT_ADDR_MODE (1u << 30)
+#define HSI2C_HS_MODE (1u << 29)
+
+/* I2C_AUTO_CONF Register bits */
+#define HSI2C_READ_WRITE (1u << 16)
+#define HSI2C_STOP_AFTER_TRANS (1u << 17)
+#define HSI2C_MASTER_RUN (1u << 31)
+
+/* I2C_TIMEOUT Register bits */
+#define HSI2C_TIMEOUT_EN (1u << 31)
+
+/* I2C_TRANS_STATUS register bits */
+#define HSI2C_MASTER_BUSY (1u << 17)
+#define HSI2C_SLAVE_BUSY (1u << 16)
+#define HSI2C_TIMEOUT_AUTO (1u << 4)
+#define HSI2C_NO_DEV (1u << 3)
+#define HSI2C_NO_DEV_ACK (1u << 2)
+#define HSI2C_TRANS_ABORT (1u << 1)
+#define HSI2C_TRANS_SUCCESS (1u << 0)
+#define HSI2C_TRANS_ERROR_MASK (HSI2C_TIMEOUT_AUTO |\
+ HSI2C_NO_DEV | HSI2C_NO_DEV_ACK |\
+ HSI2C_TRANS_ABORT)
+#define HSI2C_TRANS_FINISHED_MASK (HSI2C_TRANS_ERROR_MASK | HSI2C_TRANS_SUCCESS)
+
+
+/* I2C_FIFO_STAT Register bits */
+#define HSI2C_RX_FIFO_EMPTY (1u << 24)
+#define HSI2C_RX_FIFO_FULL (1u << 23)
+#define HSI2C_TX_FIFO_EMPTY (1u << 8)
+#define HSI2C_TX_FIFO_FULL (1u << 7)
+#define HSI2C_RX_FIFO_LEVEL(x) (((x) >> 16) & 0x7f)
+#define HSI2C_TX_FIFO_LEVEL(x) ((x) & 0x7f)
+
+#define HSI2C_SLV_ADDR_MAS(x) ((x & 0x3ff) << 10)
+
+/* S3C I2C Controller bits */
#define I2CSTAT_BSY 0x20 /* Busy bit */
#define I2CSTAT_NACK 0x01 /* Nack bit */
#define I2CCON_ACKGEN 0x80 /* Acknowledge generation */
#define I2C_START_STOP 0x20 /* START / STOP */
#define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */
-#define I2C_TIMEOUT 1 /* 1 second */
+#define I2C_TIMEOUT_MS 1000 /* 1 second */
+#define HSI2C_TIMEOUT_US 100000 /* 100 ms, finer granularity */
+
+
+/* To support VCMA9 boards and other who dont define max_i2c_num */
+#ifndef CONFIG_MAX_I2C_NUM
+#define CONFIG_MAX_I2C_NUM 1
+#endif
/*
* For SPL boot some boards need i2c before SDRAM is initialised so force
* variables to live in SRAM
*/
static unsigned int g_current_bus __attribute__((section(".data")));
-#ifdef CONFIG_OF_CONTROL
-static int i2c_busses __attribute__((section(".data")));
static struct s3c24x0_i2c_bus i2c_bus[CONFIG_MAX_I2C_NUM]
__attribute__((section(".data")));
-#endif
+
+/**
+ * Get a pointer to the given bus index
+ *
+ * @bus_idx: Bus index to look up
+ * @return pointer to bus, or NULL if invalid or not available
+ */
+static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
+{
+ if (bus_idx < ARRAY_SIZE(i2c_bus)) {
+ struct s3c24x0_i2c_bus *bus;
+
+ bus = &i2c_bus[bus_idx];
+ if (bus->active)
+ return bus;
+ }
+
+ debug("Undefined bus: %d\n", bus_idx);
+ return NULL;
+}
#if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
static int GetI2CSDA(void)
}
#endif
+/*
+ * Wait til the byte transfer is completed.
+ *
+ * @param i2c- pointer to the appropriate i2c register bank.
+ * @return I2C_OK, if transmission was ACKED
+ * I2C_NACK, if transmission was NACKED
+ * I2C_NOK_TIMEOUT, if transaction did not complete in I2C_TIMEOUT_MS
+ */
+
static int WaitForXfer(struct s3c24x0_i2c *i2c)
{
- int i;
+ ulong start_time = get_timer(0);
- i = I2C_TIMEOUT * 10000;
- while (!(readl(&i2c->iiccon) & I2CCON_IRPND) && (i > 0)) {
- udelay(100);
- i--;
- }
+ do {
+ if (readl(&i2c->iiccon) & I2CCON_IRPND)
+ return (readl(&i2c->iicstat) & I2CSTAT_NACK) ?
+ I2C_NACK : I2C_OK;
+ } while (get_timer(start_time) < I2C_TIMEOUT_MS);
- return (readl(&i2c->iiccon) & I2CCON_IRPND) ? I2C_OK : I2C_NOK_TOUT;
+ return I2C_NOK_TOUT;
}
-static int IsACK(struct s3c24x0_i2c *i2c)
+/*
+ * Wait for transfer completion.
+ *
+ * This function reads the interrupt status register waiting for the INT_I2C
+ * bit to be set, which indicates copletion of a transaction.
+ *
+ * @param i2c: pointer to the appropriate register bank
+ *
+ * @return: I2C_OK in case of successful completion, I2C_NOK_TIMEOUT in case
+ * the status bits do not get set in time, or an approrpiate error
+ * value in case of transfer errors.
+ */
+static int hsi2c_wait_for_trx(struct exynos5_hsi2c *i2c)
{
- return !(readl(&i2c->iicstat) & I2CSTAT_NACK);
+ int i = HSI2C_TIMEOUT_US;
+
+ while (i-- > 0) {
+ u32 int_status = readl(&i2c->usi_int_stat);
+
+ if (int_status & HSI2C_INT_I2C_EN) {
+ u32 trans_status = readl(&i2c->usi_trans_status);
+
+ /* Deassert pending interrupt. */
+ writel(int_status, &i2c->usi_int_stat);
+
+ if (trans_status & HSI2C_NO_DEV_ACK) {
+ debug("%s: no ACK from device\n", __func__);
+ return I2C_NACK;
+ }
+ if (trans_status & HSI2C_NO_DEV) {
+ debug("%s: no device\n", __func__);
+ return I2C_NOK;
+ }
+ if (trans_status & HSI2C_TRANS_ABORT) {
+ debug("%s: arbitration lost\n", __func__);
+ return I2C_NOK_LA;
+ }
+ if (trans_status & HSI2C_TIMEOUT_AUTO) {
+ debug("%s: device timed out\n", __func__);
+ return I2C_NOK_TOUT;
+ }
+ return I2C_OK;
+ }
+ udelay(1);
+ }
+ debug("%s: transaction timeout!\n", __func__);
+ return I2C_NOK_TOUT;
}
static void ReadWriteByte(struct s3c24x0_i2c *i2c)
writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->iicstat);
}
+#ifdef CONFIG_I2C_MULTI_BUS
+static int hsi2c_get_clk_details(struct s3c24x0_i2c_bus *i2c_bus)
+{
+ struct exynos5_hsi2c *hsregs = i2c_bus->hsregs;
+ ulong clkin;
+ unsigned int op_clk = i2c_bus->clock_frequency;
+ unsigned int i = 0, utemp0 = 0, utemp1 = 0;
+ unsigned int t_ftl_cycle;
+
+#if defined CONFIG_EXYNOS5
+ clkin = get_i2c_clk();
+#endif
+ /* FPCLK / FI2C =
+ * (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 8 + 2 * FLT_CYCLE
+ * uTemp0 = (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2)
+ * uTemp1 = (TSCLK_L + TSCLK_H + 2)
+ * uTemp2 = TSCLK_L + TSCLK_H
+ */
+ t_ftl_cycle = (readl(&hsregs->usi_conf) >> 16) & 0x7;
+ utemp0 = (clkin / op_clk) - 8 - 2 * t_ftl_cycle;
+
+ /* CLK_DIV max is 256 */
+ for (i = 0; i < 256; i++) {
+ utemp1 = utemp0 / (i + 1);
+ if ((utemp1 < 512) && (utemp1 > 4)) {
+ i2c_bus->clk_cycle = utemp1 - 2;
+ i2c_bus->clk_div = i;
+ return 0;
+ }
+ }
+ return -1;
+}
+#endif
+
+static void hsi2c_ch_init(struct s3c24x0_i2c_bus *i2c_bus)
+{
+ struct exynos5_hsi2c *hsregs = i2c_bus->hsregs;
+ unsigned int t_sr_release;
+ unsigned int n_clkdiv;
+ unsigned int t_start_su, t_start_hd;
+ unsigned int t_stop_su;
+ unsigned int t_data_su, t_data_hd;
+ unsigned int t_scl_l, t_scl_h;
+ u32 i2c_timing_s1;
+ u32 i2c_timing_s2;
+ u32 i2c_timing_s3;
+ u32 i2c_timing_sla;
+
+ n_clkdiv = i2c_bus->clk_div;
+ t_scl_l = i2c_bus->clk_cycle / 2;
+ t_scl_h = i2c_bus->clk_cycle / 2;
+ t_start_su = t_scl_l;
+ t_start_hd = t_scl_l;
+ t_stop_su = t_scl_l;
+ t_data_su = t_scl_l / 2;
+ t_data_hd = t_scl_l / 2;
+ t_sr_release = i2c_bus->clk_cycle;
+
+ i2c_timing_s1 = t_start_su << 24 | t_start_hd << 16 | t_stop_su << 8;
+ i2c_timing_s2 = t_data_su << 24 | t_scl_l << 8 | t_scl_h << 0;
+ i2c_timing_s3 = n_clkdiv << 16 | t_sr_release << 0;
+ i2c_timing_sla = t_data_hd << 0;
+
+ writel(HSI2C_TRAILING_COUNT, &hsregs->usi_trailing_ctl);
+
+ /* Clear to enable Timeout */
+ clrsetbits_le32(&hsregs->usi_timeout, HSI2C_TIMEOUT_EN, 0);
+
+ /* set AUTO mode */
+ writel(readl(&hsregs->usi_conf) | HSI2C_AUTO_MODE, &hsregs->usi_conf);
+
+ /* Enable completion conditions' reporting. */
+ writel(HSI2C_INT_I2C_EN, &hsregs->usi_int_en);
+
+ /* Enable FIFOs */
+ writel(HSI2C_RXFIFO_EN | HSI2C_TXFIFO_EN, &hsregs->usi_fifo_ctl);
+
+ /* Currently operating in Fast speed mode. */
+ writel(i2c_timing_s1, &hsregs->usi_timing_fs1);
+ writel(i2c_timing_s2, &hsregs->usi_timing_fs2);
+ writel(i2c_timing_s3, &hsregs->usi_timing_fs3);
+ writel(i2c_timing_sla, &hsregs->usi_timing_sla);
+}
+
+/* SW reset for the high speed bus */
+static void exynos5_i2c_reset(struct s3c24x0_i2c_bus *i2c_bus)
+{
+ struct exynos5_hsi2c *i2c = i2c_bus->hsregs;
+ u32 i2c_ctl;
+
+ /* Set and clear the bit for reset */
+ i2c_ctl = readl(&i2c->usi_ctl);
+ i2c_ctl |= HSI2C_SW_RST;
+ writel(i2c_ctl, &i2c->usi_ctl);
+
+ i2c_ctl = readl(&i2c->usi_ctl);
+ i2c_ctl &= ~HSI2C_SW_RST;
+ writel(i2c_ctl, &i2c->usi_ctl);
+
+ /* Initialize the configure registers */
+ hsi2c_ch_init(i2c_bus);
+}
+
/*
* MULTI BUS I2C support
*/
#ifdef CONFIG_I2C_MULTI_BUS
int i2c_set_bus_num(unsigned int bus)
{
- struct s3c24x0_i2c *i2c;
+ struct s3c24x0_i2c_bus *i2c_bus;
- if ((bus < 0) || (bus >= CONFIG_MAX_I2C_NUM)) {
- debug("Bad bus: %d\n", bus);
+ i2c_bus = get_bus(bus);
+ if (!i2c_bus)
return -1;
- }
-
g_current_bus = bus;
- i2c = get_base_i2c();
- i2c_ch_init(i2c, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+
+ if (i2c_bus->is_highspeed) {
+ if (hsi2c_get_clk_details(i2c_bus))
+ return -1;
+ hsi2c_ch_init(i2c_bus);
+ } else {
+ i2c_ch_init(i2c_bus->regs, i2c_bus->clock_frequency,
+ CONFIG_SYS_I2C_SLAVE);
+ }
return 0;
}
#if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
#endif
- int i;
+ ulong start_time = get_timer(0);
/* By default i2c channel 0 is the current bus */
g_current_bus = 0;
i2c = get_base_i2c();
- /* wait for some time to give previous transfer a chance to finish */
- i = I2C_TIMEOUT * 1000;
- while ((readl(&i2c->iicstat) & I2CSTAT_BSY) && (i > 0)) {
- udelay(1000);
- i--;
+ /*
+ * In case the previous transfer is still going, wait to give it a
+ * chance to finish.
+ */
+ while (readl(&i2c->iicstat) & I2CSTAT_BSY) {
+ if (get_timer(start_time) > I2C_TIMEOUT_MS) {
+ printf("%s: I2C bus busy for %p\n", __func__,
+ &i2c->iicstat);
+ return;
+ }
}
#if !(defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
+ int i;
+
if ((readl(&i2c->iicstat) & I2CSTAT_BSY) || GetI2CSDA() == 0) {
#ifdef CONFIG_S3C2410
ulong old_gpecon = readl(&gpio->gpecon);
i2c_ch_init(i2c, speed, slaveadd);
}
+/*
+ * Poll the appropriate bit of the fifo status register until the interface is
+ * ready to process the next byte or timeout expires.
+ *
+ * In addition to the FIFO status register this function also polls the
+ * interrupt status register to be able to detect unexpected transaction
+ * completion.
+ *
+ * When FIFO is ready to process the next byte, this function returns I2C_OK.
+ * If in course of polling the INT_I2C assertion is detected, the function
+ * returns I2C_NOK. If timeout happens before any of the above conditions is
+ * met - the function returns I2C_NOK_TOUT;
+
+ * @param i2c: pointer to the appropriate i2c register bank.
+ * @param rx_transfer: set to True if the receive transaction is in progress.
+ * @return: as described above.
+ */
+static unsigned hsi2c_poll_fifo(struct exynos5_hsi2c *i2c, bool rx_transfer)
+{
+ u32 fifo_bit = rx_transfer ? HSI2C_RX_FIFO_EMPTY : HSI2C_TX_FIFO_FULL;
+ int i = HSI2C_TIMEOUT_US;
+
+ while (readl(&i2c->usi_fifo_stat) & fifo_bit) {
+ if (readl(&i2c->usi_int_stat) & HSI2C_INT_I2C_EN) {
+ /*
+ * There is a chance that assertion of
+ * HSI2C_INT_I2C_EN and deassertion of
+ * HSI2C_RX_FIFO_EMPTY happen simultaneously. Let's
+ * give FIFO status priority and check it one more
+ * time before reporting interrupt. The interrupt will
+ * be reported next time this function is called.
+ */
+ if (rx_transfer &&
+ !(readl(&i2c->usi_fifo_stat) & fifo_bit))
+ break;
+ return I2C_NOK;
+ }
+ if (!i--) {
+ debug("%s: FIFO polling timeout!\n", __func__);
+ return I2C_NOK_TOUT;
+ }
+ udelay(1);
+ }
+ return I2C_OK;
+}
+
+/*
+ * Preapre hsi2c transaction, either read or write.
+ *
+ * Set up transfer as described in section 27.5.1.2 'I2C Channel Auto Mode' of
+ * the 5420 UM.
+ *
+ * @param i2c: pointer to the appropriate i2c register bank.
+ * @param chip: slave address on the i2c bus (with read/write bit exlcuded)
+ * @param len: number of bytes expected to be sent or received
+ * @param rx_transfer: set to true for receive transactions
+ * @param: issue_stop: set to true if i2c stop condition should be generated
+ * after this transaction.
+ * @return: I2C_NOK_TOUT in case the bus remained busy for HSI2C_TIMEOUT_US,
+ * I2C_OK otherwise.
+ */
+static int hsi2c_prepare_transaction(struct exynos5_hsi2c *i2c,
+ u8 chip,
+ u16 len,
+ bool rx_transfer,
+ bool issue_stop)
+{
+ u32 conf;
+
+ conf = len | HSI2C_MASTER_RUN;
+
+ if (issue_stop)
+ conf |= HSI2C_STOP_AFTER_TRANS;
+
+ /* Clear to enable Timeout */
+ writel(readl(&i2c->usi_timeout) & ~HSI2C_TIMEOUT_EN, &i2c->usi_timeout);
+
+ /* Set slave address */
+ writel(HSI2C_SLV_ADDR_MAS(chip), &i2c->i2c_addr);
+
+ if (rx_transfer) {
+ /* i2c master, read transaction */
+ writel((HSI2C_RXCHON | HSI2C_FUNC_MODE_I2C | HSI2C_MASTER),
+ &i2c->usi_ctl);
+
+ /* read up to len bytes, stop after transaction is finished */
+ writel(conf | HSI2C_READ_WRITE, &i2c->usi_auto_conf);
+ } else {
+ /* i2c master, write transaction */
+ writel((HSI2C_TXCHON | HSI2C_FUNC_MODE_I2C | HSI2C_MASTER),
+ &i2c->usi_ctl);
+
+ /* write up to len bytes, stop after transaction is finished */
+ writel(conf, &i2c->usi_auto_conf);
+ }
+
+ /* Reset all pending interrupt status bits we care about, if any */
+ writel(HSI2C_INT_I2C_EN, &i2c->usi_int_stat);
+
+ return I2C_OK;
+}
+
+/*
+ * Wait while i2c bus is settling down (mostly stop gets completed).
+ */
+static int hsi2c_wait_while_busy(struct exynos5_hsi2c *i2c)
+{
+ int i = HSI2C_TIMEOUT_US;
+
+ while (readl(&i2c->usi_trans_status) & HSI2C_MASTER_BUSY) {
+ if (!i--) {
+ debug("%s: bus busy\n", __func__);
+ return I2C_NOK_TOUT;
+ }
+ udelay(1);
+ }
+ return I2C_OK;
+}
+
+static int hsi2c_write(struct exynos5_hsi2c *i2c,
+ unsigned char chip,
+ unsigned char addr[],
+ unsigned char alen,
+ unsigned char data[],
+ unsigned short len,
+ bool issue_stop)
+{
+ int i, rv = 0;
+
+ if (!(len + alen)) {
+ /* Writes of zero length not supported in auto mode. */
+ debug("%s: zero length writes not supported\n", __func__);
+ return I2C_NOK;
+ }
+
+ rv = hsi2c_prepare_transaction
+ (i2c, chip, len + alen, false, issue_stop);
+ if (rv != I2C_OK)
+ return rv;
+
+ /* Move address, if any, and the data, if any, into the FIFO. */
+ for (i = 0; i < alen; i++) {
+ rv = hsi2c_poll_fifo(i2c, false);
+ if (rv != I2C_OK) {
+ debug("%s: address write failed\n", __func__);
+ goto write_error;
+ }
+ writel(addr[i], &i2c->usi_txdata);
+ }
+
+ for (i = 0; i < len; i++) {
+ rv = hsi2c_poll_fifo(i2c, false);
+ if (rv != I2C_OK) {
+ debug("%s: data write failed\n", __func__);
+ goto write_error;
+ }
+ writel(data[i], &i2c->usi_txdata);
+ }
+
+ rv = hsi2c_wait_for_trx(i2c);
+
+ write_error:
+ if (issue_stop) {
+ int tmp_ret = hsi2c_wait_while_busy(i2c);
+ if (rv == I2C_OK)
+ rv = tmp_ret;
+ }
+
+ writel(HSI2C_FUNC_MODE_I2C, &i2c->usi_ctl); /* done */
+ return rv;
+}
+
+static int hsi2c_read(struct exynos5_hsi2c *i2c,
+ unsigned char chip,
+ unsigned char addr[],
+ unsigned char alen,
+ unsigned char data[],
+ unsigned short len)
+{
+ int i, rv, tmp_ret;
+ bool drop_data = false;
+
+ if (!len) {
+ /* Reads of zero length not supported in auto mode. */
+ debug("%s: zero length read adjusted\n", __func__);
+ drop_data = true;
+ len = 1;
+ }
+
+ if (alen) {
+ /* Internal register adress needs to be written first. */
+ rv = hsi2c_write(i2c, chip, addr, alen, NULL, 0, false);
+ if (rv != I2C_OK)
+ return rv;
+ }
+
+ rv = hsi2c_prepare_transaction(i2c, chip, len, true, true);
+
+ if (rv != I2C_OK)
+ return rv;
+
+ for (i = 0; i < len; i++) {
+ rv = hsi2c_poll_fifo(i2c, true);
+ if (rv != I2C_OK)
+ goto read_err;
+ if (drop_data)
+ continue;
+ data[i] = readl(&i2c->usi_rxdata);
+ }
+
+ rv = hsi2c_wait_for_trx(i2c);
+
+ read_err:
+ tmp_ret = hsi2c_wait_while_busy(i2c);
+ if (rv == I2C_OK)
+ rv = tmp_ret;
+
+ writel(HSI2C_FUNC_MODE_I2C, &i2c->usi_ctl); /* done */
+ return rv;
+}
+
/*
* cmd_type is 0 for write, 1 for read.
*
unsigned char data[],
unsigned short data_len)
{
- int i, result;
+ int i = 0, result;
+ ulong start_time = get_timer(0);
if (data == 0 || data_len == 0) {
/*Don't support data transfer of no length or to address 0 */
return I2C_NOK;
}
- /* Check I2C bus idle */
- i = I2C_TIMEOUT * 1000;
- while ((readl(&i2c->iicstat) & I2CSTAT_BSY) && (i > 0)) {
- udelay(1000);
- i--;
+ while (readl(&i2c->iicstat) & I2CSTAT_BSY) {
+ if (get_timer(start_time) > I2C_TIMEOUT_MS)
+ return I2C_NOK_TOUT;
}
- if (readl(&i2c->iicstat) & I2CSTAT_BSY)
- return I2C_NOK_TOUT;
-
writel(readl(&i2c->iiccon) | I2CCON_ACKGEN, &i2c->iiccon);
- result = I2C_OK;
- switch (cmd_type) {
- case I2C_WRITE:
- if (addr && addr_len) {
- writel(chip, &i2c->iicds);
- /* send START */
- writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
- &i2c->iicstat);
- i = 0;
- while ((i < addr_len) && (result == I2C_OK)) {
- result = WaitForXfer(i2c);
- writel(addr[i], &i2c->iicds);
- ReadWriteByte(i2c);
- i++;
- }
- i = 0;
- while ((i < data_len) && (result == I2C_OK)) {
- result = WaitForXfer(i2c);
- writel(data[i], &i2c->iicds);
- ReadWriteByte(i2c);
- i++;
- }
- } else {
- writel(chip, &i2c->iicds);
- /* send START */
- writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
- &i2c->iicstat);
- i = 0;
- while ((i < data_len) && (result == I2C_OK)) {
- result = WaitForXfer(i2c);
- writel(data[i], &i2c->iicds);
- ReadWriteByte(i2c);
- i++;
- }
+ /* Get the slave chip address going */
+ writel(chip, &i2c->iicds);
+ if ((cmd_type == I2C_WRITE) || (addr && addr_len))
+ writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
+ &i2c->iicstat);
+ else
+ writel(I2C_MODE_MR | I2C_TXRX_ENA | I2C_START_STOP,
+ &i2c->iicstat);
+
+ /* Wait for chip address to transmit. */
+ result = WaitForXfer(i2c);
+ if (result != I2C_OK)
+ goto bailout;
+
+ /* If register address needs to be transmitted - do it now. */
+ if (addr && addr_len) {
+ while ((i < addr_len) && (result == I2C_OK)) {
+ writel(addr[i++], &i2c->iicds);
+ ReadWriteByte(i2c);
+ result = WaitForXfer(i2c);
}
+ i = 0;
+ if (result != I2C_OK)
+ goto bailout;
+ }
- if (result == I2C_OK)
+ switch (cmd_type) {
+ case I2C_WRITE:
+ while ((i < data_len) && (result == I2C_OK)) {
+ writel(data[i++], &i2c->iicds);
+ ReadWriteByte(i2c);
result = WaitForXfer(i2c);
-
- /* send STOP */
- writel(I2C_MODE_MT | I2C_TXRX_ENA, &i2c->iicstat);
- ReadWriteByte(i2c);
+ }
break;
case I2C_READ:
if (addr && addr_len) {
+ /*
+ * Register address has been sent, now send slave chip
+ * address again to start the actual read transaction.
+ */
writel(chip, &i2c->iicds);
- /* send START */
- writel(I2C_MODE_MT | I2C_TXRX_ENA | I2C_START_STOP,
- &i2c->iicstat);
- result = WaitForXfer(i2c);
- if (IsACK(i2c)) {
- i = 0;
- while ((i < addr_len) && (result == I2C_OK)) {
- writel(addr[i], &i2c->iicds);
- ReadWriteByte(i2c);
- result = WaitForXfer(i2c);
- i++;
- }
-
- writel(chip, &i2c->iicds);
- /* resend START */
- writel(I2C_MODE_MR | I2C_TXRX_ENA |
- I2C_START_STOP, &i2c->iicstat);
- ReadWriteByte(i2c);
- result = WaitForXfer(i2c);
- i = 0;
- while ((i < data_len) && (result == I2C_OK)) {
- /* disable ACK for final READ */
- if (i == data_len - 1)
- writel(readl(&i2c->iiccon)
- & ~I2CCON_ACKGEN,
- &i2c->iiccon);
- ReadWriteByte(i2c);
- result = WaitForXfer(i2c);
- data[i] = readl(&i2c->iicds);
- i++;
- }
- } else {
- result = I2C_NACK;
- }
- } else {
- writel(chip, &i2c->iicds);
- /* send START */
+ /* Generate a re-START. */
writel(I2C_MODE_MR | I2C_TXRX_ENA | I2C_START_STOP,
&i2c->iicstat);
+ ReadWriteByte(i2c);
result = WaitForXfer(i2c);
- if (IsACK(i2c)) {
- i = 0;
- while ((i < data_len) && (result == I2C_OK)) {
- /* disable ACK for final READ */
- if (i == data_len - 1)
- writel(readl(&i2c->iiccon) &
- ~I2CCON_ACKGEN,
- &i2c->iiccon);
- ReadWriteByte(i2c);
- result = WaitForXfer(i2c);
- data[i] = readl(&i2c->iicds);
- i++;
- }
- } else {
- result = I2C_NACK;
- }
+ if (result != I2C_OK)
+ goto bailout;
}
- /* send STOP */
- writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->iicstat);
- ReadWriteByte(i2c);
+ while ((i < data_len) && (result == I2C_OK)) {
+ /* disable ACK for final READ */
+ if (i == data_len - 1)
+ writel(readl(&i2c->iiccon)
+ & ~I2CCON_ACKGEN,
+ &i2c->iiccon);
+ ReadWriteByte(i2c);
+ result = WaitForXfer(i2c);
+ data[i++] = readl(&i2c->iicds);
+ }
+ if (result == I2C_NACK)
+ result = I2C_OK; /* Normal terminated read. */
break;
default:
break;
}
+bailout:
+ /* Send STOP. */
+ writel(I2C_MODE_MR | I2C_TXRX_ENA, &i2c->iicstat);
+ ReadWriteByte(i2c);
+
return result;
}
int i2c_probe(uchar chip)
{
- struct s3c24x0_i2c *i2c;
+ struct s3c24x0_i2c_bus *i2c_bus;
uchar buf[1];
+ int ret;
- i2c = get_base_i2c();
+ i2c_bus = get_bus(g_current_bus);
+ if (!i2c_bus)
+ return -1;
buf[0] = 0;
/*
* address was <ACK>ed (i.e. there was a chip at that address which
* drove the data line low).
*/
- return i2c_transfer(i2c, I2C_READ, chip << 1, 0, 0, buf, 1) != I2C_OK;
+ if (i2c_bus->is_highspeed) {
+ ret = hsi2c_read(i2c_bus->hsregs,
+ chip, 0, 0, buf, 1);
+ } else {
+ ret = i2c_transfer(i2c_bus->regs,
+ I2C_READ, chip << 1, 0, 0, buf, 1);
+ }
+
+
+ return ret != I2C_OK;
}
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
- struct s3c24x0_i2c *i2c;
+ struct s3c24x0_i2c_bus *i2c_bus;
uchar xaddr[4];
int ret;
chip |= ((addr >> (alen * 8)) &
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
- i2c = get_base_i2c();
- ret = i2c_transfer(i2c, I2C_READ, chip << 1, &xaddr[4 - alen], alen,
- buffer, len);
- if (ret != 0) {
- debug("I2c read: failed %d\n", ret);
+ i2c_bus = get_bus(g_current_bus);
+ if (!i2c_bus)
+ return -1;
+
+ if (i2c_bus->is_highspeed)
+ ret = hsi2c_read(i2c_bus->hsregs, chip, &xaddr[4 - alen],
+ alen, buffer, len);
+ else
+ ret = i2c_transfer(i2c_bus->regs, I2C_READ, chip << 1,
+ &xaddr[4 - alen], alen, buffer, len);
+
+ if (ret) {
+ if (i2c_bus->is_highspeed)
+ exynos5_i2c_reset(i2c_bus);
+ debug("I2c read failed %d\n", ret);
return 1;
}
return 0;
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
{
- struct s3c24x0_i2c *i2c;
+ struct s3c24x0_i2c_bus *i2c_bus;
uchar xaddr[4];
+ int ret;
if (alen > 4) {
debug("I2C write: addr len %d not supported\n", alen);
chip |= ((addr >> (alen * 8)) &
CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
#endif
- i2c = get_base_i2c();
- return (i2c_transfer
- (i2c, I2C_WRITE, chip << 1, &xaddr[4 - alen], alen, buffer,
- len) != 0);
+ i2c_bus = get_bus(g_current_bus);
+ if (!i2c_bus)
+ return -1;
+
+ if (i2c_bus->is_highspeed)
+ ret = hsi2c_write(i2c_bus->hsregs, chip, &xaddr[4 - alen],
+ alen, buffer, len, true);
+ else
+ ret = i2c_transfer(i2c_bus->regs, I2C_WRITE, chip << 1,
+ &xaddr[4 - alen], alen, buffer, len);
+
+ if (ret != 0) {
+ if (i2c_bus->is_highspeed)
+ exynos5_i2c_reset(i2c_bus);
+ return 1;
+ } else {
+ return 0;
+ }
}
#ifdef CONFIG_OF_CONTROL
-void board_i2c_init(const void *blob)
+static void process_nodes(const void *blob, int node_list[], int count,
+ int is_highspeed)
{
+ struct s3c24x0_i2c_bus *bus;
int i;
- int node_list[CONFIG_MAX_I2C_NUM];
- int count;
-
- count = fdtdec_find_aliases_for_id(blob, "i2c",
- COMPAT_SAMSUNG_S3C2440_I2C, node_list,
- CONFIG_MAX_I2C_NUM);
for (i = 0; i < count; i++) {
- struct s3c24x0_i2c_bus *bus;
int node = node_list[i];
if (node <= 0)
continue;
+
bus = &i2c_bus[i];
- bus->regs = (struct s3c24x0_i2c *)
- fdtdec_get_addr(blob, node, "reg");
+ bus->active = true;
+ bus->is_highspeed = is_highspeed;
+
+ if (is_highspeed)
+ bus->hsregs = (struct exynos5_hsi2c *)
+ fdtdec_get_addr(blob, node, "reg");
+ else
+ bus->regs = (struct s3c24x0_i2c *)
+ fdtdec_get_addr(blob, node, "reg");
+
bus->id = pinmux_decode_periph_id(blob, node);
+ bus->clock_frequency = fdtdec_get_int(blob, node,
+ "clock-frequency",
+ CONFIG_SYS_I2C_SPEED);
bus->node = node;
- bus->bus_num = i2c_busses++;
+ bus->bus_num = i;
exynos_pinmux_config(bus->id, 0);
+
+ /* Mark position as used */
+ node_list[i] = -1;
}
}
-static struct s3c24x0_i2c_bus *get_bus(unsigned int bus_idx)
+void board_i2c_init(const void *blob)
{
- if (bus_idx < i2c_busses)
- return &i2c_bus[bus_idx];
+ int node_list[CONFIG_MAX_I2C_NUM];
+ int count;
+
+ /* First get the normal i2c ports */
+ count = fdtdec_find_aliases_for_id(blob, "i2c",
+ COMPAT_SAMSUNG_S3C2440_I2C, node_list,
+ CONFIG_MAX_I2C_NUM);
+ process_nodes(blob, node_list, count, 0);
+
+ /* Now look for high speed i2c ports */
+ count = fdtdec_find_aliases_for_id(blob, "i2c",
+ COMPAT_SAMSUNG_EXYNOS5_I2C, node_list,
+ CONFIG_MAX_I2C_NUM);
+ process_nodes(blob, node_list, count, 1);
- debug("Undefined bus: %d\n", bus_idx);
- return NULL;
}
int i2c_get_bus_num_fdt(int node)
{
int i;
- for (i = 0; i < i2c_busses; i++) {
+ for (i = 0; i < ARRAY_SIZE(i2c_bus); i++) {
if (node == i2c_bus[i].node)
return i;
}
return -1;
}
+#ifdef CONFIG_I2C_MULTI_BUS
int i2c_reset_port_fdt(const void *blob, int node)
{
- struct s3c24x0_i2c_bus *i2c;
+ struct s3c24x0_i2c_bus *i2c_bus;
int bus;
bus = i2c_get_bus_num_fdt(node);
return -1;
}
- i2c = get_bus(bus);
- if (!i2c) {
+ i2c_bus = get_bus(bus);
+ if (!i2c_bus) {
debug("get_bus() failed for node node %d\n", node);
return -1;
}
- i2c_ch_init(i2c->regs, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ if (i2c_bus->is_highspeed) {
+ if (hsi2c_get_clk_details(i2c_bus))
+ return -1;
+ hsi2c_ch_init(i2c_bus);
+ } else {
+ i2c_ch_init(i2c_bus->regs, i2c_bus->clock_frequency,
+ CONFIG_SYS_I2C_SLAVE);
+ }
return 0;
}
#endif
+#endif
#endif /* CONFIG_HARD_I2C */
u32 iiclc;
};
+struct exynos5_hsi2c {
+ u32 usi_ctl;
+ u32 usi_fifo_ctl;
+ u32 usi_trailing_ctl;
+ u32 usi_clk_ctl;
+ u32 usi_clk_slot;
+ u32 spi_ctl;
+ u32 uart_ctl;
+ u32 res1;
+ u32 usi_int_en;
+ u32 usi_int_stat;
+ u32 usi_modem_stat;
+ u32 usi_error_stat;
+ u32 usi_fifo_stat;
+ u32 usi_txdata;
+ u32 usi_rxdata;
+ u32 res2;
+ u32 usi_conf;
+ u32 usi_auto_conf;
+ u32 usi_timeout;
+ u32 usi_manual_cmd;
+ u32 usi_trans_status;
+ u32 usi_timing_hs1;
+ u32 usi_timing_hs2;
+ u32 usi_timing_hs3;
+ u32 usi_timing_fs1;
+ u32 usi_timing_fs2;
+ u32 usi_timing_fs3;
+ u32 usi_timing_sla;
+ u32 i2c_addr;
+};
+
struct s3c24x0_i2c_bus {
+ bool active; /* port is active and available */
int node; /* device tree node */
int bus_num; /* i2c bus number */
struct s3c24x0_i2c *regs;
+ struct exynos5_hsi2c *hsregs;
+ int is_highspeed; /* High speed type, rather than I2C */
+ unsigned clock_frequency;
int id;
+ unsigned clk_cycle;
+ unsigned clk_div;
};
#endif /* _S3C24X0_I2C_H */
/*
- * Copyright (C) 2011 Renesas Solutions Corp.
- * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ * Copyright (C) 2011, 2013 Renesas Solutions Corp.
+ * Copyright (C) 2011, 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* Every register is 32bit aligned, but only 8bits in size */
#define ureg(name) u8 name; u8 __pad_##name##0; u16 __pad_##name##1;
struct sh_i2c {
{
int num, denom, tmp;
+ /* No i2c support prior to relocation */
+ if (!(gd->flags & GD_FLG_RELOC))
+ return;
+
#ifdef CONFIG_I2C_MULTI_BUS
current_bus = 0;
#endif
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libinput.o
-
-COBJS-$(CONFIG_I8042_KBD) += i8042.o
-COBJS-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
-COBJS-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o
+obj-$(CONFIG_I8042_KBD) += i8042.o
+obj-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
+obj-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o
ifdef CONFIG_PS2KBD
-COBJS-y += keyboard.o pc_keyb.o
-COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
+obj-y += keyboard.o pc_keyb.o
+obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
endif
-COBJS-y += input.o
-COBJS-$(CONFIG_OF_CONTROL) += key_matrix.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += input.o
+obj-$(CONFIG_OF_CONTROL) += key_matrix.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libmisc.o
-
-COBJS-$(CONFIG_ALI152X) += ali512x.o
-COBJS-$(CONFIG_DS4510) += ds4510.o
-COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
-COBJS-$(CONFIG_CROS_EC) += cros_ec.o
-COBJS-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
-COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
-COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
-COBJS-$(CONFIG_FSL_IIM) += fsl_iim.o
-COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
-COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
-COBJS-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
-COBJS-$(CONFIG_NS87308) += ns87308.o
-COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
-COBJS-$(CONFIG_STATUS_LED) += status_led.o
-COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_ALI152X) += ali512x.o
+obj-$(CONFIG_DS4510) += ds4510.o
+obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
+obj-$(CONFIG_CROS_EC) += cros_ec.o
+obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
+obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
+obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
+obj-$(CONFIG_FSL_IIM) += fsl_iim.o
+obj-$(CONFIG_GPIO_LED) += gpio_led.o
+obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
+obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
+obj-$(CONFIG_NS87308) += ns87308.o
+obj-$(CONFIG_PDSP188x) += pdsp188x.o
+obj-$(CONFIG_STATUS_LED) += status_led.o
+obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libmmc.o
-
-
-COBJS-$(CONFIG_BFIN_SDH) += bfin_sdh.o
-COBJS-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
-COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
-COBJS-$(CONFIG_FTSDC010) += ftsdc010_mci.o
-COBJS-$(CONFIG_GENERIC_MMC) += mmc.o
-COBJS-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
-COBJS-$(CONFIG_MMC_SPI) += mmc_spi.o
-COBJS-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
-COBJS-$(CONFIG_MV_SDHCI) += mv_sdhci.o
-COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o
-COBJS-$(CONFIG_MXS_MMC) += mxsmmc.o
-COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
-COBJS-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
-COBJS-$(CONFIG_SDHCI) += sdhci.o
-COBJS-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
-COBJS-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
-COBJS-$(CONFIG_SH_MMCIF) += sh_mmcif.o
-COBJS-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
-COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
-COBJS-$(CONFIG_DWMMC) += dw_mmc.o
-COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
-COBJS-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
+obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
+obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
+obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
+obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
+obj-$(CONFIG_GENERIC_MMC) += mmc.o
+obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
+obj-$(CONFIG_MMC_SPI) += mmc_spi.o
+obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
+obj-$(CONFIG_MV_SDHCI) += mv_sdhci.o
+obj-$(CONFIG_MXC_MMC) += mxcmmc.o
+obj-$(CONFIG_MXS_MMC) += mxsmmc.o
+obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
+obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
+obj-$(CONFIG_SDHCI) += sdhci.o
+obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
+obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
+obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
+obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
+obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o
+obj-$(CONFIG_DWMMC) += dw_mmc.o
+obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o
+obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o
ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
+obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
else
-COBJS-$(CONFIG_GENERIC_MMC) += mmc_write.o
+obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
endif
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#include <mmc.h>
#include <dwmmc.h>
#include <asm-generic/errno.h>
+#include <asm/arch/dwmmc.h>
#define PAGE_SIZE 4096
if ((freq == host->clock) || (freq == 0))
return 0;
/*
- * If host->mmc_clk didn't define,
+ * If host->get_mmc_clk didn't define,
* then assume that host->bus_hz is source clock value.
* host->bus_hz should be set from user.
*/
- if (host->mmc_clk)
- sclk = host->mmc_clk(host->dev_index);
+ if (host->get_mmc_clk)
+ sclk = host->get_mmc_clk(host->dev_index);
else if (host->bus_hz)
sclk = host->bus_hz;
else {
struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
u32 fifo_size;
+ if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) {
+ dwmci_writel(host, EMMCP_MPSBEGIN0, 0);
+ dwmci_writel(host, EMMCP_SEND0, 0);
+ dwmci_writel(host, EMMCP_CTRL0,
+ MPSCTRL_SECURE_READ_BIT |
+ MPSCTRL_SECURE_WRITE_BIT |
+ MPSCTRL_NON_SECURE_READ_BIT |
+ MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
+ }
+
dwmci_writel(host, DWMCI_PWREN, 1);
if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
host->name = "EXYNOS DWMMC";
host->ioaddr = (void *)regbase;
host->buswidth = bus_width;
+#ifdef CONFIG_EXYNOS5420
+ host->quirks = DWMCI_QUIRK_DISABLE_SMU;
+#endif
if (clksel) {
host->clksel_val = clksel;
host->clksel = exynos_dwmci_clksel;
host->dev_index = index;
- host->mmc_clk = exynos_dwmci_get_clk;
+ host->get_mmc_clk = exynos_dwmci_get_clk;
/* Add the mmc channel to be registered with mmc core */
if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) {
debug("dwmmc%d registration failed\n", index);
DECLARE_GLOBAL_DATA_PTR;
struct fsl_esdhc {
- uint dsaddr;
- uint blkattr;
- uint cmdarg;
- uint xfertyp;
- uint cmdrsp0;
- uint cmdrsp1;
- uint cmdrsp2;
- uint cmdrsp3;
- uint datport;
- uint prsstat;
- uint proctl;
- uint sysctl;
- uint irqstat;
- uint irqstaten;
- uint irqsigen;
- uint autoc12err;
- uint hostcapblt;
- uint wml;
- uint mixctrl;
- char reserved1[4];
- uint fevt;
- char reserved2[168];
- uint hostver;
- char reserved3[780];
- uint scr;
+ uint dsaddr; /* SDMA system address register */
+ uint blkattr; /* Block attributes register */
+ uint cmdarg; /* Command argument register */
+ uint xfertyp; /* Transfer type register */
+ uint cmdrsp0; /* Command response 0 register */
+ uint cmdrsp1; /* Command response 1 register */
+ uint cmdrsp2; /* Command response 2 register */
+ uint cmdrsp3; /* Command response 3 register */
+ uint datport; /* Buffer data port register */
+ uint prsstat; /* Present state register */
+ uint proctl; /* Protocol control register */
+ uint sysctl; /* System Control Register */
+ uint irqstat; /* Interrupt status register */
+ uint irqstaten; /* Interrupt status enable register */
+ uint irqsigen; /* Interrupt signal enable register */
+ uint autoc12err; /* Auto CMD error status register */
+ uint hostcapblt; /* Host controller capabilities register */
+ uint wml; /* Watermark level register */
+ uint mixctrl; /* For USDHC */
+ char reserved1[4]; /* reserved */
+ uint fevt; /* Force event register */
+ uint admaes; /* ADMA error status register */
+ uint adsaddr; /* ADMA system address register */
+ char reserved2[160]; /* reserved */
+ uint hostver; /* Host controller version register */
+ char reserved3[4]; /* reserved */
+ uint dmaerraddr; /* DMA error address register */
+ char reserved4[4]; /* reserved */
+ uint dmaerrattr; /* DMA error attribute register */
+ char reserved5[4]; /* reserved */
+ uint hostcapblt2; /* Host controller capabilities register 2 */
+ char reserved6[8]; /* reserved */
+ uint tcr; /* Tuning control register */
+ char reserved7[28]; /* reserved */
+ uint sddirctl; /* SD direction control register */
+ char reserved8[712]; /* reserved */
+ uint scr; /* eSDHC control register */
};
/* Return the XFERTYP flags for a given command and data packet */
if (!mmc)
return -ENOMEM;
+ memset(mmc, 0, sizeof(struct mmc));
sprintf(mmc->name, "FSL_SDHC");
regs = (struct fsl_esdhc *)cfg->esdhc_base;
caps = caps & ~(ESDHC_HOSTCAPBLT_SRS |
ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
#endif
+
+/* T4240 host controller capabilities register should have VS33 bit */
+#ifdef CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
+ caps = caps | ESDHC_HOSTCAPBLT_VS33;
+#endif
+
if (caps & ESDHC_HOSTCAPBLT_VS18)
voltage_caps |= MMC_VDD_165_195;
if (caps & ESDHC_HOSTCAPBLT_VS30)
}
/*
- * Check whether GROUP_DEF is set, if yes, read out
- * group size from ext_csd directly, or calculate
- * the group size from the csd value.
+ * Host needs to enable ERASE_GRP_DEF bit if device is
+ * partitioned. This bit will be lost every time after a reset
+ * or power off. This will affect erase size.
*/
- if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) {
+ if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
+ (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) {
+ err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
+ EXT_CSD_ERASE_GROUP_DEF, 1);
+
+ if (err)
+ return err;
+
+ /* Read out group size from ext_csd */
mmc->erase_grp_size =
ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
MMC_MAX_BLOCK_LEN * 1024;
} else {
+ /* Calculate the group size from the csd value. */
int erase_gsz, erase_gmul;
erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
return 0;
}
+/*
+ * No command will be sent by driver if card is busy, so driver must wait
+ * for card ready state.
+ * Every time when card is busy after timeout then (last) timeout value will be
+ * increased twice but only if it doesn't exceed global defined maximum.
+ * Each function call will use last timeout value. Max timeout can be redefined
+ * in board config file.
+ */
+#ifndef CONFIG_SDHCI_CMD_MAX_TIMEOUT
+#define CONFIG_SDHCI_CMD_MAX_TIMEOUT 3200
+#endif
+#define CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT 100
+
int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
int ret = 0;
int trans_bytes = 0, is_aligned = 1;
u32 mask, flags, mode;
- unsigned int timeout, start_addr = 0;
+ unsigned int time = 0, start_addr = 0;
unsigned int retry = 10000;
+ int mmc_dev = mmc->block_dev.dev;
- /* Wait max 10 ms */
- timeout = 10;
+ /* Timeout unit - ms */
+ static unsigned int cmd_timeout = CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT;
sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
mask &= ~SDHCI_DATA_INHIBIT;
while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
- if (timeout == 0) {
- printf("Controller never released inhibit bit(s).\n");
- return COMM_ERR;
+ if (time >= cmd_timeout) {
+ printf("MMC: %d busy ", mmc_dev);
+ if (2 * cmd_timeout <= CONFIG_SDHCI_CMD_MAX_TIMEOUT) {
+ cmd_timeout += cmd_timeout;
+ printf("timeout increasing to: %u ms.\n",
+ cmd_timeout);
+ } else {
+ puts("timeout.\n");
+ return COMM_ERR;
+ }
}
- timeout--;
+ time++;
udelay(1000);
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libmtd.o
-
ifneq (,$(findstring y,$(CONFIG_MTD_DEVICE)$(CONFIG_CMD_NAND)$(CONFIG_CMD_ONENAND)))
-COBJS-y += mtdcore.o
+obj-y += mtdcore.o
endif
-COBJS-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
-COBJS-$(CONFIG_MTD_CONCAT) += mtdconcat.o
-COBJS-$(CONFIG_HAS_DATAFLASH) += at45.o
-COBJS-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
-COBJS-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o
-COBJS-$(CONFIG_HAS_DATAFLASH) += dataflash.o
-COBJS-$(CONFIG_FTSMC020) += ftsmc020.o
-COBJS-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
-COBJS-$(CONFIG_MW_EEPROM) += mw_eeprom.o
-COBJS-$(CONFIG_ST_SMI) += st_smi.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
+obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
+obj-$(CONFIG_HAS_DATAFLASH) += at45.o
+obj-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
+obj-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o
+obj-$(CONFIG_HAS_DATAFLASH) += dataflash.o
+obj-$(CONFIG_FTSMC020) += ftsmc020.o
+obj-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
+obj-$(CONFIG_MW_EEPROM) += mw_eeprom.o
+obj-$(CONFIG_ST_SMI) += st_smi.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libnand.o
-
ifdef CONFIG_CMD_NAND
ifdef CONFIG_SPL_BUILD
NORMAL_DRIVERS=y
endif
-COBJS-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o
-COBJS-$(CONFIG_SPL_NAND_DOCG4) += docg4_spl.o
-COBJS-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
-COBJS-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
-COBJS-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
-COBJS-$(CONFIG_SPL_NAND_BASE) += nand_base.o
-COBJS-$(CONFIG_SPL_NAND_INIT) += nand.o
+obj-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o
+obj-$(CONFIG_SPL_NAND_DOCG4) += docg4_spl.o
+obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
+obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
+obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
+obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
+obj-$(CONFIG_SPL_NAND_INIT) += nand.o
else # not spl
NORMAL_DRIVERS=y
-COBJS-y += nand.o
-COBJS-y += nand_bbt.o
-COBJS-y += nand_ids.o
-COBJS-y += nand_util.o
-COBJS-y += nand_ecc.o
-COBJS-y += nand_base.o
+obj-y += nand.o
+obj-y += nand_bbt.o
+obj-y += nand_ids.o
+obj-y += nand_util.o
+obj-y += nand_ecc.o
+obj-y += nand_base.o
endif # not spl
ifdef NORMAL_DRIVERS
-COBJS-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
-
-COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
-COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
-COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
-COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
-COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
-COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
-COBJS-$(CONFIG_NAND_FSMC) += fsmc_nand.o
-COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
-COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
-COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
-COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
-COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
-COBJS-$(CONFIG_NAND_MXC) += mxc_nand.o
-COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
-COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
-COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
-COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
-COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
-COBJS-$(CONFIG_TEGRA_NAND) += tegra_nand.o
-COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
-COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o
-COBJS-$(CONFIG_NAND_DOCG4) += docg4.o
+obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
+
+obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
+obj-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
+obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
+obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
+obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
+obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
+obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o
+obj-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
+obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
+obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
+obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
+obj-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
+obj-$(CONFIG_NAND_MXC) += mxc_nand.o
+obj-$(CONFIG_NAND_MXS) += mxs_nand.o
+obj-$(CONFIG_NAND_NDFC) += ndfc.o
+obj-$(CONFIG_NAND_NOMADIK) += nomadik.o
+obj-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
+obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
+obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
+obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
+obj-$(CONFIG_NAND_PLAT) += nand_plat.o
+obj-$(CONFIG_NAND_DOCG4) += docg4.o
else # minimal SPL drivers
-COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
-COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
-COBJS-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
+obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
+obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
+obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
endif # drivers
endif # nand
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
nand->ecc.steps = 1;
nand->ecc.strength = 1;
} else {
- /* otherwise fall back to default software ECC */
+ /* otherwise fall back to software ECC */
+#if defined(CONFIG_NAND_ECC_BCH)
+ nand->ecc.mode = NAND_ECC_SOFT_BCH;
+#else
nand->ecc.mode = NAND_ECC_SOFT;
+#endif
}
ret = nand_scan_ident(mtd, 1, NULL);
* Copyright (C) 2008 Nokia Corporation: drop_ffs() function by
* Artem Bityutskiy <dedekind1@gmail.com> from mtd-utils
*
- * SPDX-License-Identifier: GPL-2.0+
+ * Copyright 2010 Freescale Semiconductor
+ *
+ * SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libonenand.o
-
ifndef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_CMD_ONENAND) := onenand_uboot.o onenand_base.o onenand_bbt.o
-COBJS-$(CONFIG_SAMSUNG_ONENAND) += samsung.o
+obj-$(CONFIG_CMD_ONENAND) := onenand_uboot.o onenand_base.o onenand_bbt.o
+obj-$(CONFIG_SAMSUNG_ONENAND) += samsung.o
else
-COBJS-y := onenand_spl.o
+obj-y := onenand_spl.o
endif
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libspi_flash.o
-
ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o
-COBJS-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
+obj-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o
+obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
endif
-ifdef CONFIG_CMD_SF
-COBJS-y += sf.o
-endif
-COBJS-$(CONFIG_SPI_FLASH) += sf_probe.o sf_ops.o
-COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
-COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_CMD_SF) += sf.o
+obj-$(CONFIG_SPI_FLASH) += sf_probe.o sf_ops.o
+obj-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o
+obj-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libubi.o
-
ifdef CONFIG_CMD_UBI
-COBJS-y += build.o vtbl.o vmt.o upd.o kapi.o eba.o io.o wl.o scan.o crc32.o
+obj-y += build.o vtbl.o vmt.o upd.o kapi.o eba.o io.o wl.o scan.o crc32.o
-COBJS-y += misc.o
-COBJS-y += debug.o
+obj-y += misc.o
+obj-y += debug.o
endif
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libnet.o
-
-COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
-COBJS-$(CONFIG_ALTERA_TSE) += altera_tse.o
-COBJS-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
-COBJS-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
-COBJS-$(CONFIG_DRIVER_AX88180) += ax88180.o
-COBJS-$(CONFIG_BFIN_MAC) += bfin_mac.o
-COBJS-$(CONFIG_CALXEDA_XGMAC) += calxedaxgmac.o
-COBJS-$(CONFIG_CS8900) += cs8900.o
-COBJS-$(CONFIG_TULIP) += dc2114x.o
-COBJS-$(CONFIG_DESIGNWARE_ETH) += designware.o
-COBJS-$(CONFIG_DRIVER_DM9000) += dm9000x.o
-COBJS-$(CONFIG_DNET) += dnet.o
-COBJS-$(CONFIG_E1000) += e1000.o
-COBJS-$(CONFIG_E1000_SPI) += e1000_spi.o
-COBJS-$(CONFIG_EEPRO100) += eepro100.o
-COBJS-$(CONFIG_ENC28J60) += enc28j60.o
-COBJS-$(CONFIG_EP93XX) += ep93xx_eth.o
-COBJS-$(CONFIG_ETHOC) += ethoc.o
-COBJS-$(CONFIG_FEC_MXC) += fec_mxc.o
-COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o
-COBJS-$(CONFIG_FTGMAC100) += ftgmac100.o
-COBJS-$(CONFIG_FTMAC110) += ftmac110.o
-COBJS-$(CONFIG_FTMAC100) += ftmac100.o
-COBJS-$(CONFIG_GRETH) += greth.o
-COBJS-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o
-COBJS-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o
-COBJS-$(CONFIG_KS8851_MLL) += ks8851_mll.o
-COBJS-$(CONFIG_LAN91C96) += lan91c96.o
-COBJS-$(CONFIG_MACB) += macb.o
-COBJS-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
-COBJS-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o
-COBJS-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o
-COBJS-$(CONFIG_MVGBE) += mvgbe.o
-COBJS-$(CONFIG_NATSEMI) += natsemi.o
-COBJS-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o
-COBJS-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o
-COBJS-$(CONFIG_NETCONSOLE) += netconsole.o
-COBJS-$(CONFIG_NS8382X) += ns8382x.o
-COBJS-$(CONFIG_PCNET) += pcnet.o
-COBJS-$(CONFIG_PLB2800_ETHER) += plb2800_eth.o
-COBJS-$(CONFIG_RTL8139) += rtl8139.o
-COBJS-$(CONFIG_RTL8169) += rtl8169.o
-COBJS-$(CONFIG_SH_ETHER) += sh_eth.o
-COBJS-$(CONFIG_SMC91111) += smc91111.o
-COBJS-$(CONFIG_SMC911X) += smc911x.o
-COBJS-$(CONFIG_SUNXI_WEMAC) += sunxi_wemac.o
-COBJS-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
-COBJS-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o
-COBJS-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o
-COBJS-$(CONFIG_FMAN_ENET) += fsl_mdio.o
-COBJS-$(CONFIG_TSI108_ETH) += tsi108_eth.o
-COBJS-$(CONFIG_ULI526X) += uli526x.o
-COBJS-$(CONFIG_VSC7385_ENET) += vsc7385.o
-COBJS-$(CONFIG_XILINX_AXIEMAC) += xilinx_axi_emac.o
-COBJS-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
-COBJS-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o xilinx_ll_temac_mdio.o \
+obj-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
+obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
+obj-$(CONFIG_ARMADA100_FEC) += armada100_fec.o
+obj-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
+obj-$(CONFIG_DRIVER_AX88180) += ax88180.o
+obj-$(CONFIG_BFIN_MAC) += bfin_mac.o
+obj-$(CONFIG_CALXEDA_XGMAC) += calxedaxgmac.o
+obj-$(CONFIG_CS8900) += cs8900.o
+obj-$(CONFIG_TULIP) += dc2114x.o
+obj-$(CONFIG_DESIGNWARE_ETH) += designware.o
+obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o
+obj-$(CONFIG_DNET) += dnet.o
+obj-$(CONFIG_E1000) += e1000.o
+obj-$(CONFIG_E1000_SPI) += e1000_spi.o
+obj-$(CONFIG_EEPRO100) += eepro100.o
+obj-$(CONFIG_ENC28J60) += enc28j60.o
+obj-$(CONFIG_EP93XX) += ep93xx_eth.o
+obj-$(CONFIG_ETHOC) += ethoc.o
+obj-$(CONFIG_FEC_MXC) += fec_mxc.o
+obj-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o
+obj-$(CONFIG_FTGMAC100) += ftgmac100.o
+obj-$(CONFIG_FTMAC110) += ftmac110.o
+obj-$(CONFIG_FTMAC100) += ftmac100.o
+obj-$(CONFIG_GRETH) += greth.o
+obj-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o
+obj-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o
+obj-$(CONFIG_KS8851_MLL) += ks8851_mll.o
+obj-$(CONFIG_LAN91C96) += lan91c96.o
+obj-$(CONFIG_MACB) += macb.o
+obj-$(CONFIG_MCFFEC) += mcffec.o mcfmii.o
+obj-$(CONFIG_MPC5xxx_FEC) += mpc5xxx_fec.o
+obj-$(CONFIG_MPC512x_FEC) += mpc512x_fec.o
+obj-$(CONFIG_MVGBE) += mvgbe.o
+obj-$(CONFIG_NATSEMI) += natsemi.o
+obj-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o
+obj-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o
+obj-$(CONFIG_NETCONSOLE) += netconsole.o
+obj-$(CONFIG_NS8382X) += ns8382x.o
+obj-$(CONFIG_PCNET) += pcnet.o
+obj-$(CONFIG_PLB2800_ETHER) += plb2800_eth.o
+obj-$(CONFIG_RTL8139) += rtl8139.o
+obj-$(CONFIG_RTL8169) += rtl8169.o
+obj-$(CONFIG_SH_ETHER) += sh_eth.o
+obj-$(CONFIG_SMC91111) += smc91111.o
+obj-$(CONFIG_SMC911X) += smc911x.o
+obj-$(CONFIG_SUNXI_WEMAC) += sunxi_wemac.o
+obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
+obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o
+obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o
+obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o
+obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o
+obj-$(CONFIG_ULI526X) += uli526x.o
+obj-$(CONFIG_VSC7385_ENET) += vsc7385.o
+obj-$(CONFIG_XILINX_AXIEMAC) += xilinx_axi_emac.o
+obj-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
+obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o xilinx_ll_temac_mdio.o \
xilinx_ll_temac_fifo.o xilinx_ll_temac_sdma.o
-COBJS-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libfm.o
-
ifdef CONFIG_FMAN_ENET
-COBJS-y += dtsec.o
-COBJS-y += eth.o
-COBJS-y += fm.o
-COBJS-y += init.o
-COBJS-y += tgec.o
-COBJS-y += tgec_phy.o
+obj-y += dtsec.o
+obj-y += eth.o
+obj-y += fm.o
+obj-y += init.o
+obj-y += tgec.o
+obj-y += tgec_phy.o
# Soc have FMAN v3 with mEMAC
-COBJS-$(CONFIG_SYS_FMAN_V3) += memac_phy.o
-COBJS-$(CONFIG_SYS_FMAN_V3) += memac.o
+obj-$(CONFIG_SYS_FMAN_V3) += memac_phy.o
+obj-$(CONFIG_SYS_FMAN_V3) += memac.o
# SoC specific SERDES support
-COBJS-$(CONFIG_P1017) += p1023.o
-COBJS-$(CONFIG_P1023) += p1023.o
+obj-$(CONFIG_P1017) += p1023.o
+obj-$(CONFIG_P1023) += p1023.o
# The P204x, P304x, and P5020 are the same
-COBJS-$(CONFIG_PPC_P2041) += p5020.o
-COBJS-$(CONFIG_PPC_P3041) += p5020.o
-COBJS-$(CONFIG_PPC_P4080) += p4080.o
-COBJS-$(CONFIG_PPC_P5020) += p5020.o
-COBJS-$(CONFIG_PPC_P5040) += p5040.o
-COBJS-$(CONFIG_PPC_T4240) += t4240.o
-COBJS-$(CONFIG_PPC_T4160) += t4240.o
-COBJS-$(CONFIG_PPC_B4420) += b4860.o
-COBJS-$(CONFIG_PPC_B4860) += b4860.o
+obj-$(CONFIG_PPC_P2041) += p5020.o
+obj-$(CONFIG_PPC_P3041) += p5020.o
+obj-$(CONFIG_PPC_P4080) += p4080.o
+obj-$(CONFIG_PPC_P5020) += p5020.o
+obj-$(CONFIG_PPC_P5040) += p5040.o
+obj-$(CONFIG_PPC_T1040) += t1040.o
+obj-$(CONFIG_PPC_T4240) += t4240.o
+obj-$(CONFIG_PPC_T4160) += t4240.o
+obj-$(CONFIG_PPC_B4420) += b4860.o
+obj-$(CONFIG_PPC_B4860) += b4860.o
endif
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
}
+void fman_enable_port(enum fm_port port)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ clrbits_be32(&gur->devdisr2, port_to_devdisr[port]);
+}
+
phy_interface_t fman_port_enet_if(enum fm_port port)
{
if (is_device_disabled(port))
#define TX_PORT_1G_BASE 0x28
#define MAX_NUM_TX_PORT_1G CONFIG_SYS_NUM_FM1_DTSEC
#define TX_PORT_10G_BASE 0x30
+#define MIIM_TIMEOUT 0xFFFF
struct fm_muram {
u32 base;
int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info);
phy_interface_t fman_port_enet_if(enum fm_port port);
void fman_disable_port(enum fm_port port);
+void fman_enable_port(enum fm_port port);
struct fsl_enet_mac {
void *base; /* MAC controller registers base address */
fman_disable_port(port);
}
+void fm_enable_port(enum fm_port port)
+{
+ int i = fm_port_to_index(port);
+
+ fm_info[i].enabled = 1;
+ fman_enable_port(port);
+}
+
void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus)
{
int i = fm_port_to_index(port);
}
#endif
}
+
+/*QSGMII Riser Card can work in SGMII mode, but the PHY address is different.
+ *This function scans which Riser Card being used(QSGMII or SGMII Riser Card),
+ *then set the correct PHY address
+ */
+void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port,
+ unsigned int port_num, int phy_base_addr)
+{
+ unsigned int regnum = 0;
+ int qsgmii;
+ int i;
+ int phy_real_addr;
+
+ qsgmii = is_qsgmii_riser_card(bus, phy_base_addr, port_num, regnum);
+
+ if (!qsgmii)
+ return;
+
+ for (i = base_port; i < base_port + port_num; i++) {
+ if (fm_info_get_enet_if(i) == PHY_INTERFACE_MODE_SGMII) {
+ phy_real_addr = phy_base_addr + i - base_port;
+ fm_info_set_phy_address(i, phy_real_addr);
+ }
+ }
+}
+
+/*to check whether qsgmii riser card is used*/
+int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr,
+ unsigned int port_num, unsigned regnum)
+{
+ int i;
+ int val;
+
+ if (!bus)
+ return 0;
+
+ for (i = phy_base_addr; i < phy_base_addr + port_num; i++) {
+ val = bus->read(bus, i, MDIO_DEVAD_NONE, regnum);
+ if (val != MIIM_TIMEOUT)
+ return 1;
+ }
+
+ return 0;
+}
setbits_be32(&gur->devdisr, port_to_devdisr[port]);
}
+void fman_enable_port(enum fm_port port)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ clrbits_be32(&gur->devdisr, port_to_devdisr[port]);
+}
+
phy_interface_t fman_port_enet_if(enum fm_port port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
}
+void fman_enable_port(enum fm_port port)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ clrbits_be32(&gur->devdisr2, port_to_devdisr[port]);
+}
+
phy_interface_t fman_port_enet_if(enum fm_port port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
}
+void fman_enable_port(enum fm_port port)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ clrbits_be32(&gur->devdisr2, port_to_devdisr[port]);
+}
+
phy_interface_t fman_port_enet_if(enum fm_port port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
}
+void fman_enable_port(enum fm_port port)
+{
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ clrbits_be32(&gur->devdisr2, port_to_devdisr[port]);
+}
+
phy_interface_t fman_port_enet_if(enum fm_port port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <phy.h>
+#include <fm_eth.h>
+#include <asm/io.h>
+#include <asm/immap_85xx.h>
+#include <asm/fsl_serdes.h>
+
+phy_interface_t fman_port_enet_if(enum fm_port port)
+{
+ return PHY_INTERFACE_MODE_NONE;
+}
setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
}
+void fman_enable_port(enum fm_port port)
+{
+ ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ clrbits_be32(&gur->devdisr2, port_to_devdisr[port]);
+}
+
phy_interface_t fman_port_enet_if(enum fm_port port)
{
ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
return; /* inside net loop */
output_packet = buf;
output_packet_len = len;
+ input_recursion = 1;
NetLoop(NETCONS); /* wait for arp reply and send packet */
+ input_recursion = 0;
output_packet_len = 0;
return;
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libnpe.o
-
LOCAL_CFLAGS += -I$(TOPDIR)/drivers/net/npe/include -DCONFIG_IXP425_COMPONENT_ETHDB -D__linux
CFLAGS += $(LOCAL_CFLAGS)
CPPFLAGS += $(LOCAL_CFLAGS) # needed for depend
HOSTCFLAGS += $(LOCAL_CFLAGS)
-COBJS-$(CONFIG_IXP4XX_NPE) := npe.o \
+obj-$(CONFIG_IXP4XX_NPE) := npe.o \
miiphy.o \
IxOsalBufferMgt.o \
IxOsalIoMem.o \
IxNpeMhSend.o \
IxNpeMhSolicitedCbMgr.o \
IxNpeMhUnsolicitedCbMgr.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
-
/**
* @file IxAtmdAcc.h
*
-
/**
* @file IxAtmdAccCtrl.h
*
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libphy.o
-
-COBJS-$(CONFIG_BITBANGMII) += miiphybb.o
-COBJS-$(CONFIG_MV88E61XX_SWITCH) += mv88e61xx.o
-COBJS-$(CONFIG_MV88E6352_SWITCH) += mv88e6352.o
-
-COBJS-$(CONFIG_PHYLIB) += phy.o
-COBJS-$(CONFIG_PHYLIB_10G) += generic_10g.o
-COBJS-$(CONFIG_PHY_ATHEROS) += atheros.o
-COBJS-$(CONFIG_PHY_BROADCOM) += broadcom.o
-COBJS-$(CONFIG_PHY_DAVICOM) += davicom.o
-COBJS-$(CONFIG_PHY_ET1011C) += et1011c.o
-COBJS-$(CONFIG_PHY_ICPLUS) += icplus.o
-COBJS-$(CONFIG_PHY_LXT) += lxt.o
-COBJS-$(CONFIG_PHY_MARVELL) += marvell.o
-COBJS-$(CONFIG_PHY_MICREL) += micrel.o
-COBJS-$(CONFIG_PHY_NATSEMI) += natsemi.o
-COBJS-$(CONFIG_PHY_REALTEK) += realtek.o
-COBJS-$(CONFIG_PHY_SMSC) += smsc.o
-COBJS-$(CONFIG_PHY_TERANETICS) += teranetics.o
-COBJS-$(CONFIG_PHY_VITESSE) += vitesse.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_BITBANGMII) += miiphybb.o
+obj-$(CONFIG_MV88E61XX_SWITCH) += mv88e61xx.o
+obj-$(CONFIG_MV88E6352_SWITCH) += mv88e6352.o
+
+obj-$(CONFIG_PHYLIB) += phy.o
+obj-$(CONFIG_PHYLIB_10G) += generic_10g.o
+obj-$(CONFIG_PHY_ATHEROS) += atheros.o
+obj-$(CONFIG_PHY_BROADCOM) += broadcom.o
+obj-$(CONFIG_PHY_DAVICOM) += davicom.o
+obj-$(CONFIG_PHY_ET1011C) += et1011c.o
+obj-$(CONFIG_PHY_ICPLUS) += icplus.o
+obj-$(CONFIG_PHY_LXT) += lxt.o
+obj-$(CONFIG_PHY_MARVELL) += marvell.o
+obj-$(CONFIG_PHY_MICREL) += micrel.o
+obj-$(CONFIG_PHY_NATSEMI) += natsemi.o
+obj-$(CONFIG_PHY_REALTEK) += realtek.o
+obj-$(CONFIG_PHY_SMSC) += smsc.o
+obj-$(CONFIG_PHY_TERANETICS) += teranetics.o
+obj-$(CONFIG_PHY_VITESSE) += vitesse.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libpci.o
-
-COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o
-COBJS-$(CONFIG_PCI) += pci.o pci_auto.o
-COBJS-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o
-COBJS-$(CONFIG_PCI_GT64120) += pci_gt64120.o
-COBJS-$(CONFIG_FTPCI100) += pci_ftpci100.o
-COBJS-$(CONFIG_IXP_PCI) += pci_ixp.o
-COBJS-$(CONFIG_SH4_PCI) += pci_sh4.o
-COBJS-$(CONFIG_SH7751_PCI) +=pci_sh7751.o
-COBJS-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
-COBJS-$(CONFIG_TSI108_PCI) += tsi108_pci.o
-COBJS-$(CONFIG_WINBOND_83C553) += w83c553f.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o
+obj-$(CONFIG_PCI) += pci.o pci_auto.o
+obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o
+obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o
+obj-$(CONFIG_FTPCI100) += pci_ftpci100.o
+obj-$(CONFIG_IXP_PCI) += pci_ixp.o
+obj-$(CONFIG_SH4_PCI) += pci_sh4.o
+obj-$(CONFIG_SH7751_PCI) +=pci_sh7751.o
+obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
+obj-$(CONFIG_TSI108_PCI) += tsi108_pci.o
+obj-$(CONFIG_WINBOND_83C553) += w83c553f.o
int enabled, r, inbound = 0;
u16 ltssm;
u8 temp8, pcie_cap;
+ int pcie_cap_pos;
+ int pci_dcr;
+ int pci_dsr;
+ int pci_lsr;
+
+#if defined(CONFIG_FSL_PCIE_DISABLE_ASPM)
+ int pci_lcr;
+#endif
+
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)cfg_addr;
struct pci_region *reg = hose->regions + hose->region_count;
pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0);
hose->region_count++;
/* see if we are a PCIe or PCI controller */
- pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap);
+ pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP);
+ pci_dcr = pcie_cap_pos + 0x08;
+ pci_dsr = pcie_cap_pos + 0x0a;
+ pci_lsr = pcie_cap_pos + 0x12;
+
+ pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap);
#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
/* boot from PCIE --master */
* - Master PERR (pci)
* - ICCA (PCIe)
*/
- pci_hose_read_config_dword(hose, dev, PCI_DCR, &temp32);
+ pci_hose_read_config_dword(hose, dev, pci_dcr, &temp32);
temp32 |= 0xf000e; /* set URR, FER, NFER (but not CER) */
- pci_hose_write_config_dword(hose, dev, PCI_DCR, temp32);
+ pci_hose_write_config_dword(hose, dev, pci_dcr, temp32);
#if defined(CONFIG_FSL_PCIE_DISABLE_ASPM)
+ pci_lcr = pcie_cap_pos + 0x10;
temp32 = 0;
- pci_hose_read_config_dword(hose, dev, PCI_LCR, &temp32);
+ pci_hose_read_config_dword(hose, dev, pci_lcr, &temp32);
temp32 &= ~0x03; /* Disable ASPM */
- pci_hose_write_config_dword(hose, dev, PCI_LCR, temp32);
+ pci_hose_write_config_dword(hose, dev, pci_lcr, temp32);
udelay(1);
#endif
if (pcie_cap == PCI_CAP_ID_EXP) {
out_be32(&pci->pme_msg_int_en, 0xffffffff);
/* Print the negotiated PCIe link width */
- pci_hose_read_config_word(hose, dev, PCI_LSR, &temp16);
+ pci_hose_read_config_word(hose, dev, pci_lsr, &temp16);
printf("x%d, regs @ 0x%lx\n", (temp16 & 0x3f0 ) >> 4,
pci_info->regs);
out_be32(&pci->pme_msg_det, 0xffffffff);
out_be32(&pci->pedr, 0xffffffff);
- pci_hose_read_config_word (hose, dev, PCI_DSR, &temp16);
+ pci_hose_read_config_word(hose, dev, pci_dsr, &temp16);
if (temp16) {
- pci_hose_write_config_word(hose, dev, PCI_DSR, 0xffff);
+ pci_hose_write_config_word(hose, dev, pci_dsr, 0xffff);
}
pci_hose_read_config_word (hose, dev, PCI_SEC_STATUS, &temp16);
int fsl_is_pci_agent(struct pci_controller *hose)
{
+ int pcie_cap_pos;
u8 pcie_cap;
pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0);
- pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap);
+ pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP);
+ pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap);
if (pcie_cap == PCI_CAP_ID_EXP) {
u8 header_type;
volatile ccsr_fsl_pci_t *pci;
struct pci_region *r;
pci_dev_t dev = PCI_BDF(busno,0,0);
+ int pcie_cap_pos;
u8 pcie_cap;
pci = (ccsr_fsl_pci_t *) pci_info->regs;
#endif
}
- pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap);
+ pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP);
+ pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap);
printf("PCI%s%x: Bus %02x - %02x\n", pcie_cap == PCI_CAP_ID_EXP ?
"e" : "", pci_info->pci_num,
hose->first_busno, hose->last_busno);
-
return(hose->last_busno + 1);
}
void fsl_pci_config_unlock(struct pci_controller *hose)
{
pci_dev_t dev = PCI_BDF(hose->first_busno,0,0);
+ int pcie_cap_pos;
u8 pcie_cap;
u16 pbfr;
if (!fsl_is_pci_agent(hose))
return;
- pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap);
+ pcie_cap_pos = pci_hose_find_capability(hose, dev, PCI_CAP_ID_EXP);
+ pci_hose_read_config_byte(hose, dev, pcie_cap_pos, &pcie_cap);
if (pcie_cap != 0x0) {
/* PCIe - set CFG_READY bit of Configuration Ready Register */
pci_hose_write_config_byte(hose, dev, FSL_PCIE_CFG_RDY, 0x1);
/* now call board specific pci_init()... */
pci_init_board();
}
+
+/* Returns the address of the requested capability structure within the
+ * device's PCI configuration space or 0 in case the device does not
+ * support it.
+ * */
+int pci_hose_find_capability(struct pci_controller *hose, pci_dev_t dev,
+ int cap)
+{
+ int pos;
+ u8 hdr_type;
+
+ pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &hdr_type);
+
+ pos = pci_hose_find_cap_start(hose, dev, hdr_type & 0x7F);
+
+ if (pos)
+ pos = pci_find_cap(hose, dev, pos, cap);
+
+ return pos;
+}
+
+/* Find the header pointer to the Capabilities*/
+int pci_hose_find_cap_start(struct pci_controller *hose, pci_dev_t dev,
+ u8 hdr_type)
+{
+ u16 status;
+
+ pci_hose_read_config_word(hose, dev, PCI_STATUS, &status);
+
+ if (!(status & PCI_STATUS_CAP_LIST))
+ return 0;
+
+ switch (hdr_type) {
+ case PCI_HEADER_TYPE_NORMAL:
+ case PCI_HEADER_TYPE_BRIDGE:
+ return PCI_CAPABILITY_LIST;
+ case PCI_HEADER_TYPE_CARDBUS:
+ return PCI_CB_CAPABILITY_LIST;
+ default:
+ return 0;
+ }
+}
+
+int pci_find_cap(struct pci_controller *hose, pci_dev_t dev, int pos, int cap)
+{
+ int ttl = PCI_FIND_CAP_TTL;
+ u8 id;
+ u8 next_pos;
+
+ while (ttl--) {
+ pci_hose_read_config_byte(hose, dev, pos, &next_pos);
+ if (next_pos < CAP_START_POS)
+ break;
+ next_pos &= ~3;
+ pos = (int) next_pos;
+ pci_hose_read_config_byte(hose, dev,
+ pos + PCI_CAP_LIST_ID, &id);
+ if (id == 0xff)
+ break;
+ if (id == cap)
+ return pos;
+ pos += PCI_CAP_LIST_NEXT;
+ }
+ return 0;
+}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libpcmcia.o
-
-COBJS-$(CONFIG_I82365) += i82365.o
-COBJS-$(CONFIG_8xx) += mpc8xx_pcmcia.o
-COBJS-y += rpx_pcmcia.o
-COBJS-$(CONFIG_IDE_TI_CARDBUS) += ti_pci1410a.o
-COBJS-y += tqm8xx_pcmcia.o
-COBJS-$(CONFIG_MARUBUN_PCCARD) += marubun_pcmcia.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_I82365) += i82365.o
+obj-$(CONFIG_8xx) += mpc8xx_pcmcia.o
+obj-y += rpx_pcmcia.o
+obj-$(CONFIG_IDE_TI_CARDBUS) += ti_pci1410a.o
+obj-y += tqm8xx_pcmcia.o
+obj-$(CONFIG_MARUBUN_PCCARD) += marubun_pcmcia.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libpower.o
-
-COBJS-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o
-COBJS-$(CONFIG_FTPMU010_POWER) += ftpmu010.o
-COBJS-$(CONFIG_TPS6586X_POWER) += tps6586x.o
-COBJS-$(CONFIG_TWL4030_POWER) += twl4030.o
-COBJS-$(CONFIG_TWL6030_POWER) += twl6030.o
-COBJS-$(CONFIG_PALMAS_POWER) += palmas.o
-
-COBJS-$(CONFIG_POWER) += power_core.o
-COBJS-$(CONFIG_DIALOG_POWER) += power_dialog.o
-COBJS-$(CONFIG_POWER_FSL) += power_fsl.o
-COBJS-$(CONFIG_POWER_I2C) += power_i2c.o
-COBJS-$(CONFIG_POWER_SPI) += power_spi.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-########################################################################
+obj-$(CONFIG_EXYNOS_TMU) += exynos-tmu.o
+obj-$(CONFIG_FTPMU010_POWER) += ftpmu010.o
+obj-$(CONFIG_TPS6586X_POWER) += tps6586x.o
+obj-$(CONFIG_TWL4030_POWER) += twl4030.o
+obj-$(CONFIG_TWL6030_POWER) += twl6030.o
+obj-$(CONFIG_PALMAS_POWER) += palmas.o
+
+obj-$(CONFIG_POWER) += power_core.o
+obj-$(CONFIG_DIALOG_POWER) += power_dialog.o
+obj-$(CONFIG_POWER_FSL) += power_fsl.o
+obj-$(CONFIG_POWER_I2C) += power_i2c.o
+obj-$(CONFIG_POWER_SPI) += power_spi.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libbattery.o
-
-COBJS-$(CONFIG_POWER_BATTERY_TRATS) += bat_trats.o
-COBJS-$(CONFIG_POWER_BATTERY_TRATS2) += bat_trats2.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-########################################################################
+obj-$(CONFIG_POWER_BATTERY_TRATS) += bat_trats.o
+obj-$(CONFIG_POWER_BATTERY_TRATS2) += bat_trats2.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libfuel_gauge.o
-
-COBJS-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-########################################################################
+obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libmfd.o
-
-COBJS-$(CONFIG_POWER_PMIC_MAX77693) += pmic_max77693.o
-COBJS-$(CONFIG_POWER_MUIC_MAX77693) += muic_max77693.o
-COBJS-$(CONFIG_POWER_FG_MAX77693) += fg_max77693.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-########################################################################
+obj-$(CONFIG_POWER_PMIC_MAX77693) += pmic_max77693.o
+obj-$(CONFIG_POWER_MUIC_MAX77693) += muic_max77693.o
+obj-$(CONFIG_POWER_FG_MAX77693) += fg_max77693.o
}
#endif
+#ifdef CONFIG_PALMAS_USB_SS_PWR
+/**
+ * @brief palmas_enable_ss_ldo - Configure EVM board specific configurations
+ * for the USB Super speed SMPS10 regulator.
+ *
+ * @return 0
+ */
+int palmas_enable_ss_ldo(void)
+{
+ /* Enable smps10 regulator */
+ return palmas_i2c_write_u8(TWL603X_CHIP_P1, SMPS10_CTRL,
+ SMPS10_MODE_ACTIVE_D);
+}
+#endif
+
/*
* Enable/disable back-up battery (or super cap) charging on TWL6035/37.
* Please use defined BB_xxx values.
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libpmic.o
-
-COBJS-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
-COBJS-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
-COBJS-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
-COBJS-$(CONFIG_POWER_MAX77686) += pmic_max77686.o
-COBJS-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
-COBJS-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-########################################################################
+obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
+obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
+obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
+obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o
+obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
+obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libqe.o
-
-COBJS-$(and $(CONFIG_QE),$(CONFIG_OF_LIBFDT)) += fdt.o
-COBJS-$(CONFIG_QE) += qe.o uccf.o uec.o uec_phy.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(and $(CONFIG_QE),$(CONFIG_OF_LIBFDT)) += fdt.o
+obj-$(CONFIG_QE) += qe.o uccf.o uec.o uec_phy.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
#CFLAGS += -DDEBUG
-LIB = $(obj)librtc.o
-
-COBJS-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o
-COBJS-$(CONFIG_RTC_BFIN) += bfin_rtc.o
-COBJS-y += date.o
-COBJS-$(CONFIG_RTC_DAVINCI) += davinci.o
-COBJS-$(CONFIG_RTC_DS12887) += ds12887.o
-COBJS-$(CONFIG_RTC_DS1302) += ds1302.o
-COBJS-$(CONFIG_RTC_DS1306) += ds1306.o
-COBJS-$(CONFIG_RTC_DS1307) += ds1307.o
-COBJS-$(CONFIG_RTC_DS1338) += ds1307.o
-COBJS-$(CONFIG_RTC_DS1337) += ds1337.o
-COBJS-$(CONFIG_RTC_DS1374) += ds1374.o
-COBJS-$(CONFIG_RTC_DS1388) += ds1337.o
-COBJS-$(CONFIG_RTC_DS1556) += ds1556.o
-COBJS-$(CONFIG_RTC_DS164x) += ds164x.o
-COBJS-$(CONFIG_RTC_DS174x) += ds174x.o
-COBJS-$(CONFIG_RTC_DS3231) += ds3231.o
-COBJS-$(CONFIG_RTC_FTRTC010) += ftrtc010.o
-COBJS-$(CONFIG_RTC_IMXDI) += imxdi.o
-COBJS-$(CONFIG_RTC_ISL1208) += isl1208.o
-COBJS-$(CONFIG_RTC_M41T11) += m41t11.o
-COBJS-$(CONFIG_RTC_M41T60) += m41t60.o
-COBJS-$(CONFIG_RTC_M41T62) += m41t62.o
-COBJS-$(CONFIG_RTC_M41T94) += m41t94.o
-COBJS-$(CONFIG_RTC_M48T35A) += m48t35ax.o
-COBJS-$(CONFIG_RTC_MAX6900) += max6900.o
-COBJS-$(CONFIG_RTC_MC13XXX) += mc13xxx-rtc.o
-COBJS-$(CONFIG_RTC_MC146818) += mc146818.o
-COBJS-$(CONFIG_MCFRTC) += mcfrtc.o
-COBJS-$(CONFIG_RTC_MK48T59) += mk48t59.o
-COBJS-$(CONFIG_RTC_MPC5200) += mpc5xxx.o
-COBJS-$(CONFIG_RTC_MPC8xx) += mpc8xx.o
-COBJS-$(CONFIG_RTC_MV) += mvrtc.o
-COBJS-$(CONFIG_RTC_MX27) += mx27rtc.o
-COBJS-$(CONFIG_RTC_MXS) += mxsrtc.o
-COBJS-$(CONFIG_RTC_PCF8563) += pcf8563.o
-COBJS-$(CONFIG_RTC_PL031) += pl031.o
-COBJS-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
-COBJS-$(CONFIG_RTC_RS5C372A) += rs5c372.o
-COBJS-$(CONFIG_RTC_RTC4543) += rtc4543.o
-COBJS-$(CONFIG_RTC_RV3029) += rv3029.o
-COBJS-$(CONFIG_RTC_RX8025) += rx8025.o
-COBJS-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o
-COBJS-$(CONFIG_RTC_X1205) += x1205.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o
+obj-$(CONFIG_RTC_BFIN) += bfin_rtc.o
+obj-y += date.o
+obj-$(CONFIG_RTC_DAVINCI) += davinci.o
+obj-$(CONFIG_RTC_DS12887) += ds12887.o
+obj-$(CONFIG_RTC_DS1302) += ds1302.o
+obj-$(CONFIG_RTC_DS1306) += ds1306.o
+obj-$(CONFIG_RTC_DS1307) += ds1307.o
+obj-$(CONFIG_RTC_DS1338) += ds1307.o
+obj-$(CONFIG_RTC_DS1337) += ds1337.o
+obj-$(CONFIG_RTC_DS1374) += ds1374.o
+obj-$(CONFIG_RTC_DS1388) += ds1337.o
+obj-$(CONFIG_RTC_DS1556) += ds1556.o
+obj-$(CONFIG_RTC_DS164x) += ds164x.o
+obj-$(CONFIG_RTC_DS174x) += ds174x.o
+obj-$(CONFIG_RTC_DS3231) += ds3231.o
+obj-$(CONFIG_RTC_FTRTC010) += ftrtc010.o
+obj-$(CONFIG_RTC_IMXDI) += imxdi.o
+obj-$(CONFIG_RTC_ISL1208) += isl1208.o
+obj-$(CONFIG_RTC_M41T11) += m41t11.o
+obj-$(CONFIG_RTC_M41T60) += m41t60.o
+obj-$(CONFIG_RTC_M41T62) += m41t62.o
+obj-$(CONFIG_RTC_M41T94) += m41t94.o
+obj-$(CONFIG_RTC_M48T35A) += m48t35ax.o
+obj-$(CONFIG_RTC_MAX6900) += max6900.o
+obj-$(CONFIG_RTC_MC13XXX) += mc13xxx-rtc.o
+obj-$(CONFIG_RTC_MC146818) += mc146818.o
+obj-$(CONFIG_MCFRTC) += mcfrtc.o
+obj-$(CONFIG_RTC_MK48T59) += mk48t59.o
+obj-$(CONFIG_RTC_MPC5200) += mpc5xxx.o
+obj-$(CONFIG_RTC_MPC8xx) += mpc8xx.o
+obj-$(CONFIG_RTC_MV) += mvrtc.o
+obj-$(CONFIG_RTC_MX27) += mx27rtc.o
+obj-$(CONFIG_RTC_MXS) += mxsrtc.o
+obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
+obj-$(CONFIG_RTC_PL031) += pl031.o
+obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
+obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o
+obj-$(CONFIG_RTC_RTC4543) += rtc4543.o
+obj-$(CONFIG_RTC_RV3029) += rv3029.o
+obj-$(CONFIG_RTC_RX8025) += rx8025.o
+obj-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o
+obj-$(CONFIG_RTC_X1205) += x1205.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libserial.o
-
-COBJS-y += serial.o
-
-COBJS-$(CONFIG_ALTERA_UART) += altera_uart.o
-COBJS-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
-COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o
-COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o
-COBJS-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
-COBJS-$(CONFIG_MCFUART) += mcfuart.o
-COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
-COBJS-$(CONFIG_SYS_NS16550) += ns16550.o
-COBJS-$(CONFIG_S5P) += serial_s5p.o
-COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o
-COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o
-COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o
-COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o
-COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o
-COBJS-$(CONFIG_MXC_UART) += serial_mxc.o
-COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o
-COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o
-COBJS-$(CONFIG_PXA_SERIAL) += serial_pxa.o
-COBJS-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o
-COBJS-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o
-COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
-COBJS-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
-COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
-COBJS-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o
-COBJS-$(CONFIG_BFIN_SERIAL) += serial_bfin.o
-COBJS-$(CONFIG_FSL_LPUART) += serial_lpuart.o
-COBJS-$(CONFIG_MXS_AUART) += mxs_auart.o
+obj-y += serial.o
+
+obj-$(CONFIG_ALTERA_UART) += altera_uart.o
+obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
+obj-$(CONFIG_ARM_DCC) += arm_dcc.o
+obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
+obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
+obj-$(CONFIG_MCFUART) += mcfuart.o
+obj-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
+obj-$(CONFIG_SYS_NS16550) += ns16550.o
+obj-$(CONFIG_S5P) += serial_s5p.o
+obj-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o
+obj-$(CONFIG_IMX_SERIAL) += serial_imx.o
+obj-$(CONFIG_IXP_SERIAL) += serial_ixp.o
+obj-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o
+obj-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o
+obj-$(CONFIG_MXC_UART) += serial_mxc.o
+obj-$(CONFIG_PL010_SERIAL) += serial_pl01x.o
+obj-$(CONFIG_PL011_SERIAL) += serial_pl01x.o
+obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
+obj-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o
+obj-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o
+obj-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
+obj-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
+obj-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
+obj-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o
+obj-$(CONFIG_BFIN_SERIAL) += serial_bfin.o
+obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o
+obj-$(CONFIG_MXS_AUART) += mxs_auart.o
ifndef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_USB_TTY) += usbtty.o
+obj-$(CONFIG_USB_TTY) += usbtty.o
endif
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
* Sets the baud rate and settings.
* The settings are: 8 data bits, no parit and 1 stop bit.
*/
-void mxs_auart_setbrg(void)
+static void mxs_auart_setbrg(void)
{
u32 div;
u32 linectrl = 0;
writel(linectrl, ®s->hw_uartapp_linectrl);
}
-int mxs_auart_init(void)
+static int mxs_auart_init(void)
{
struct mxs_uartapp_regs *regs = get_uartapp_registers();
/* Reset everything */
return 0;
}
-void mxs_auart_putc(const char c)
+static void mxs_auart_putc(const char c)
{
struct mxs_uartapp_regs *regs = get_uartapp_registers();
/* Wait in loop while the transmit FIFO is full */
mxs_auart_putc('\r');
}
-int mxs_auart_tstc(void)
+static int mxs_auart_tstc(void)
{
struct mxs_uartapp_regs *regs = get_uartapp_registers();
/* Checks if receive FIFO is empty */
return !(readl(®s->hw_uartapp_stat) & UARTAPP_STAT_RXFE_MASK);
}
-int mxs_auart_getc(void)
+static int mxs_auart_getc(void)
{
struct mxs_uartapp_regs *regs = get_uartapp_registers();
/* Wait until a character is available to read */
0xffdf,
};
-void serial_setbrg_dev(const int dev_index)
+static void serial_setbrg_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
u32 uclk = get_uart_clk(dev_index);
* Initialise the serial port with the given baudrate. The settings
* are always 8 data bits, no parity, 1 stop bit, no start bits.
*/
-int serial_init_dev(const int dev_index)
+static int serial_init_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
* otherwise. When the function is succesfull, the character read is
* written into its argument c.
*/
-int serial_getc_dev(const int dev_index)
+static int serial_getc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
/*
* Output a single byte to the serial port.
*/
-void serial_putc_dev(const char c, const int dev_index)
+static void serial_putc_dev(const char c, const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
/*
* Test whether a character is in the RX buffer
*/
-int serial_tstc_dev(const int dev_index)
+static int serial_tstc_dev(const int dev_index)
{
struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
return (int)(readl(&uart->utrstat) & 0x1);
}
-void serial_puts_dev(const char *s, const int dev_index)
+static void serial_puts_dev(const char *s, const int dev_index)
{
while (*s)
serial_putc_dev(*s++, dev_index);
/* Multi serial device functions */
#define DECLARE_S5P_SERIAL_FUNCTIONS(port) \
-int s5p_serial##port##_init(void) { return serial_init_dev(port); } \
-void s5p_serial##port##_setbrg(void) { serial_setbrg_dev(port); } \
-int s5p_serial##port##_getc(void) { return serial_getc_dev(port); } \
-int s5p_serial##port##_tstc(void) { return serial_tstc_dev(port); } \
-void s5p_serial##port##_putc(const char c) { serial_putc_dev(c, port); } \
-void s5p_serial##port##_puts(const char *s) { serial_puts_dev(s, port); }
+static int s5p_serial##port##_init(void) { return serial_init_dev(port); } \
+static void s5p_serial##port##_setbrg(void) { serial_setbrg_dev(port); } \
+static int s5p_serial##port##_getc(void) { return serial_getc_dev(port); } \
+static int s5p_serial##port##_tstc(void) { return serial_tstc_dev(port); } \
+static void s5p_serial##port##_putc(const char c) { serial_putc_dev(c, port); } \
+static void s5p_serial##port##_puts(const char *s) { serial_puts_dev(s, port); }
#define INIT_S5P_SERIAL_STRUCTURE(port, __name) { \
.name = __name, \
/*
* SuperH SCIF device driver.
+ * Copyright (C) 2013 Renesas Electronics Corporation
* Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu
* Copyright (C) 2002 - 2008 Paul Mundt
*
static void sh_serial_setbrg(void)
{
DECLARE_GLOBAL_DATA_PTR;
- sci_out(&sh_sci, SCBRR, SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ));
+
+ sci_out(&sh_sci, SCBRR,
+ SCBRR_VALUE(gd->baudrate, CONFIG_SH_SCIF_CLK_FREQ));
}
static int sh_serial_init(void)
# define SCSPTR3 0xffc60020 /* 16 bit SCIF */
# define SCIF_ORER 0x0001 /* Overrun error bit */
# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+# define SCIF_ORER 0x0001
+# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
#else
# error CPU subtype not defined
#endif
/* SH7763 SCIF2 support */
# define SCIF2_RFDC_MASK 0x001f
# define SCIF2_TXROOM_MAX 16
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
+# define SCIF_RFDC_MASK 0x003f
#else
# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
# define SCIF_RFDC_MASK 0x001f
#else
SCIF_FNS(SCSPTR, 0, 0, 0x20, 16)
#endif
+#if defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+SCIF_FNS(DL, 0, 0, 0x30, 16)
+SCIF_FNS(CKS, 0, 0, 0x34, 16)
+#endif
SCIF_FNS(SCLSR, 0, 0, 0x24, 16)
#endif
#endif
#define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk)
#elif defined(__H8300H__) || defined(__H8300S__)
#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+#define SCBRR DL
+#define SCBRR_VALUE(bps, clk) (clk / bps / 16)
#else /* Generic SH */
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
#endif
#endif
};
-void uartlite_serial_putc(const char c, const int port)
+static void uartlite_serial_putc(const char c, const int port)
{
struct uartlite *regs = userial_ports[port];
out_be32(®s->tx_fifo, c & 0xff);
}
-void uartlite_serial_puts(const char *s, const int port)
+static void uartlite_serial_puts(const char *s, const int port)
{
while (*s)
uartlite_serial_putc(*s++, port);
}
-int uartlite_serial_getc(const int port)
+static int uartlite_serial_getc(const int port)
{
struct uartlite *regs = userial_ports[port];
return in_be32(®s->rx_fifo) & 0xff;
}
-int uartlite_serial_tstc(const int port)
+static int uartlite_serial_tstc(const int port)
{
struct uartlite *regs = userial_ports[port];
/* Multi serial device functions */
#define DECLARE_ESERIAL_FUNCTIONS(port) \
- int userial##port##_init(void) \
+ static int userial##port##_init(void) \
{ return uartlite_serial_init(port); } \
- void userial##port##_setbrg(void) {} \
- int userial##port##_getc(void) \
+ static void userial##port##_setbrg(void) {} \
+ static int userial##port##_getc(void) \
{ return uartlite_serial_getc(port); } \
- int userial##port##_tstc(void) \
+ static int userial##port##_tstc(void) \
{ return uartlite_serial_tstc(port); } \
- void userial##port##_putc(const char c) \
+ static void userial##port##_putc(const char c) \
{ uartlite_serial_putc(c, port); } \
- void userial##port##_puts(const char *s) \
+ static void userial##port##_puts(const char *s) \
{ uartlite_serial_puts(s, port); }
/* Serial device descriptor */
#include <usb/mpc8xx_udc.h>
#elif defined(CONFIG_OMAP1510)
#include <usb/omap1510_udc.h>
-#elif defined(CONFIG_MUSB_UDC)
-#include <usb/musb_udc.h>
#elif defined(CONFIG_CPU_PXA27X)
#include <usb/pxa27x_udc.h>
#elif defined(CONFIG_DW_UDC)
#include <usb/mv_udc.h>
#endif
+#include <usb/udc.h>
#include <version.h>
/* If no VendorID/ProductID is defined in config.h, pretend to be Linux
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libsound.o
-
-COBJS-$(CONFIG_SOUND) += sound.o
-COBJS-$(CONFIG_I2S) += samsung-i2s.o
-COBJS-$(CONFIG_SOUND_WM8994) += wm8994.o
-COBJS-$(CONFIG_SOUND_MAX98095) += max98095.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#
+obj-$(CONFIG_SOUND) += sound.o
+obj-$(CONFIG_I2S) += samsung-i2s.o
+obj-$(CONFIG_SOUND_WM8994) += wm8994.o
+obj-$(CONFIG_SOUND_MAX98095) += max98095.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libspi.o
-
# There are many options which enable SPI, so make this library available
-COBJS-y += spi.o
-
-COBJS-$(CONFIG_ALTERA_SPI) += altera_spi.o
-COBJS-$(CONFIG_ANDES_SPI) += andes_spi.o
-COBJS-$(CONFIG_ARMADA100_SPI) += armada100_spi.o
-COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
-COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
-COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
-COBJS-$(CONFIG_BFIN_SPI6XX) += bfin_spi6xx.o
-COBJS-$(CONFIG_CF_SPI) += cf_spi.o
-COBJS-$(CONFIG_CF_QSPI) += cf_qspi.o
-COBJS-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
-COBJS-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
-COBJS-$(CONFIG_ICH_SPI) += ich.o
-COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
-COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
-COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
-COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
-COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o
-COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
-COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
-COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
-COBJS-$(CONFIG_SH_SPI) += sh_spi.o
-COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
-COBJS-$(CONFIG_FDT_SPI) += fdt_spi.o
-COBJS-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
-COBJS-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
-COBJS-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
-COBJS-$(CONFIG_TI_QSPI) += ti_qspi.o
-COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
-COBJS-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += spi.o
+
+obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
+obj-$(CONFIG_ANDES_SPI) += andes_spi.o
+obj-$(CONFIG_ARMADA100_SPI) += armada100_spi.o
+obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
+obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
+obj-$(CONFIG_BFIN_SPI) += bfin_spi.o
+obj-$(CONFIG_BFIN_SPI6XX) += bfin_spi6xx.o
+obj-$(CONFIG_CF_SPI) += cf_spi.o
+obj-$(CONFIG_CF_QSPI) += cf_qspi.o
+obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
+obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
+obj-$(CONFIG_ICH_SPI) += ich.o
+obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
+obj-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
+obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
+obj-$(CONFIG_MXC_SPI) += mxc_spi.o
+obj-$(CONFIG_MXS_SPI) += mxs_spi.o
+obj-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
+obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
+obj-$(CONFIG_SOFT_SPI) += soft_spi.o
+obj-$(CONFIG_SH_SPI) += sh_spi.o
+obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
+obj-$(CONFIG_FDT_SPI) += fdt_spi.o
+obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o
+obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o
+obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o
+obj-$(CONFIG_TI_QSPI) += ti_qspi.o
+obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o
+obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libtpm.o
-
$(shell mkdir -p $(obj)slb9635_i2c)
# TODO: Merge tpm_tis_lpc.c with tpm.c
-COBJS-$(CONFIG_TPM_ATMEL_TWI) += tpm_atmel_twi.o
-COBJS-$(CONFIG_TPM_TIS_I2C) += tpm.o
-COBJS-$(CONFIG_TPM_TIS_I2C) += tpm_tis_i2c.o
-COBJS-$(CONFIG_TPM_TIS_LPC) += tpm_tis_lpc.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_TPM_ATMEL_TWI) += tpm_atmel_twi.o
+obj-$(CONFIG_TPM_TIS_I2C) += tpm.o
+obj-$(CONFIG_TPM_TIS_I2C) += tpm_tis_i2c.o
+obj-$(CONFIG_TPM_TIS_LPC) += tpm_tis_lpc.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libtws.o
-
-COBJS-$(CONFIG_SOFT_TWS) += soft_tws.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_SOFT_TWS) += soft_tws.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libusb_eth.o
-
# new USB host ethernet layer dependencies
-COBJS-$(CONFIG_USB_HOST_ETHER) += usb_ether.o
+obj-$(CONFIG_USB_HOST_ETHER) += usb_ether.o
ifdef CONFIG_USB_ETHER_ASIX
-COBJS-y += asix.o
+obj-y += asix.o
endif
-COBJS-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o
/* SMSC LAN95xx based USB 2.0 Ethernet Devices */
+/* LED defines */
+#define LED_GPIO_CFG (0x24)
+#define LED_GPIO_CFG_SPD_LED (0x01000000)
+#define LED_GPIO_CFG_LNK_LED (0x00100000)
+#define LED_GPIO_CFG_FDX_LED (0x00010000)
+
/* Tx command words */
#define TX_CMD_A_FIRST_SEG_ 0x00002000
#define TX_CMD_A_LAST_SEG_ 0x00001000
return ret;
debug("ID_REV = 0x%08x\n", read_buf);
+ /* Configure GPIO pins as LED outputs */
+ write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
+ LED_GPIO_CFG_FDX_LED;
+ ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
+ if (ret < 0)
+ return ret;
+ debug("LED_GPIO_CFG set\n");
+
/* Init Tx */
write_buf = 0;
ret = smsc95xx_write_reg(dev, FLOW, write_buf);
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libusb_gadget.o
-
# if defined(CONFIG_USB_GADGET) || defined(CONFIG_USB_ETHER)
# Everytime you forget how crufty makefiles can get things like
# this remind you...
ifneq (,$(CONFIG_USB_GADGET)$(CONFIG_USB_ETHER))
-COBJS-y += epautoconf.o config.o usbstring.o
+obj-y += epautoconf.o config.o usbstring.o
endif
# new USB gadget layer dependencies
ifdef CONFIG_USB_GADGET
-COBJS-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
-COBJS-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
-COBJS-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
-COBJS-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o
-COBJS-$(CONFIG_DFU_FUNCTION) += f_dfu.o
-COBJS-$(CONFIG_USB_GADGET_MASS_STORAGE) += f_mass_storage.o
+obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o
+obj-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
+obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o
+obj-$(CONFIG_THOR_FUNCTION) += f_thor.o
+obj-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o
+obj-$(CONFIG_DFU_FUNCTION) += f_dfu.o
+obj-$(CONFIG_USB_GADGET_MASS_STORAGE) += f_mass_storage.o
endif
ifdef CONFIG_USB_ETHER
-COBJS-y += ether.o
-COBJS-$(CONFIG_USB_ETH_RNDIS) += rndis.o
-COBJS-$(CONFIG_MV_UDC) += mv_udc.o
-COBJS-$(CONFIG_CPU_PXA25X) += pxa25x_udc.o
+obj-y += ether.o
+obj-$(CONFIG_USB_ETH_RNDIS) += rndis.o
+obj-$(CONFIG_MV_UDC) += mv_udc.o
+obj-$(CONFIG_CPU_PXA25X) += pxa25x_udc.o
else
# Devices not related to the new gadget layer depend on CONFIG_USB_DEVICE
ifdef CONFIG_USB_DEVICE
-COBJS-y += core.o
-COBJS-y += ep0.o
-COBJS-$(CONFIG_DW_UDC) += designware_udc.o
-COBJS-$(CONFIG_OMAP1510) += omap1510_udc.o
-COBJS-$(CONFIG_OMAP1610) += omap1510_udc.o
-COBJS-$(CONFIG_MPC885_FAMILY) += mpc8xx_udc.o
-COBJS-$(CONFIG_CPU_PXA27X) += pxa27x_udc.o
+obj-y += core.o
+obj-y += ep0.o
+obj-$(CONFIG_DW_UDC) += designware_udc.o
+obj-$(CONFIG_OMAP1510) += omap1510_udc.o
+obj-$(CONFIG_OMAP1610) += omap1510_udc.o
+obj-$(CONFIG_MPC885_FAMILY) += mpc8xx_udc.o
+obj-$(CONFIG_CPU_PXA27X) += pxa27x_udc.o
endif
endif
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#include <usbdevice.h>
#include "ep0.h"
#include <usb/designware_udc.h>
+#include <usb/udc.h>
#include <asm/arch/hardware.h>
#define UDC_INIT_MDELAY 80 /* Device settle delay */
.bEndpointAddress = USB_DIR_IN,
.bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(64),
};
static struct usb_endpoint_descriptor
.bEndpointAddress = USB_DIR_OUT,
.bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(64),
};
static const struct usb_descriptor_header *fs_eth_function[11] = {
*/
debug("%s\n", __func__);
+ if (!req)
+ return -EINVAL;
size = (ETHER_HDR_SIZE + dev->mtu + RX_EXTRA);
size += dev->out_ep->maxpacket - 1;
#include <config.h>
#include <malloc.h>
#include <common.h>
+#include <usb.h>
#include <linux/err.h>
#include <linux/usb/ch9.h>
/*-------------------------------------------------------------------------*/
-struct ums_board_info *ums_info;
+struct ums *ums;
struct fsg_common *the_fsg_common;
static int fsg_set_halt(struct fsg_dev *fsg, struct usb_ep *ep)
k++;
}
+ if (k == 10) {
+ /* Handle CTRL+C */
+ if (ctrlc())
+ return -EPIPE;
+#ifdef CONFIG_USB_CABLE_CHECK
+ /* Check cable connection */
+ if (!usb_cable_connected())
+ return -EIO;
+#endif
+ k = 0;
+ }
+
usb_gadget_handle_interrupts();
}
common->thread_wakeup_needed = 0;
}
/* Perform the read */
- nread = 0;
- rc = ums_info->read_sector(&(ums_info->ums_dev),
- file_offset / SECTOR_SIZE,
- amount / SECTOR_SIZE,
- (char __user *)bh->buf);
- if (rc)
+ rc = ums->read_sector(ums,
+ file_offset / SECTOR_SIZE,
+ amount / SECTOR_SIZE,
+ (char __user *)bh->buf);
+ if (!rc)
return -EIO;
- nread = amount;
+
+ nread = rc * SECTOR_SIZE;
VLDBG(curlun, "file read %u @ %llu -> %d\n", amount,
(unsigned long long) file_offset,
amount = bh->outreq->actual;
/* Perform the write */
- rc = ums_info->write_sector(&(ums_info->ums_dev),
+ rc = ums->write_sector(ums,
file_offset / SECTOR_SIZE,
amount / SECTOR_SIZE,
(char __user *)bh->buf);
- if (rc)
+ if (!rc)
return -EIO;
- nwritten = amount;
+ nwritten = rc * SECTOR_SIZE;
VLDBG(curlun, "file write %u @ %llu -> %d\n", amount,
(unsigned long long) file_offset,
/* If an error occurred, report it and its position */
if (nwritten < amount) {
+ printf("nwritten:%d amount:%d\n", nwritten,
+ amount);
curlun->sense_data = SS_WRITE_ERROR;
curlun->info_valid = 1;
break;
}
/* Perform the read */
- nread = 0;
- rc = ums_info->read_sector(&(ums_info->ums_dev),
- file_offset / SECTOR_SIZE,
- amount / SECTOR_SIZE,
- (char __user *)bh->buf);
- if (rc)
+ rc = ums->read_sector(ums,
+ file_offset / SECTOR_SIZE,
+ amount / SECTOR_SIZE,
+ (char __user *)bh->buf);
+ if (!rc)
return -EIO;
- nread = amount;
+ nread = rc * SECTOR_SIZE;
VLDBG(curlun, "file read %u @ %llu -> %d\n", amount,
(unsigned long long) file_offset,
buf[4] = 31; /* Additional length */
/* No special options */
sprintf((char *) (buf + 8), "%-8s%-16s%04x", (char*) vendor_id ,
- ums_info->name, (u16) 0xffff);
+ ums->name, (u16) 0xffff);
return 36;
}
int fsg_main_thread(void *common_)
{
+ int ret;
struct fsg_common *common = the_fsg_common;
/* The main loop */
do {
}
if (!common->running) {
- sleep_thread(common);
+ ret = sleep_thread(common);
+ if (ret)
+ return ret;
+
continue;
}
- if (get_next_command(common))
- continue;
+ ret = get_next_command(common);
+ if (ret)
+ return ret;
if (!exception_in_progress(common))
common->state = FSG_STATE_DATA_PHASE;
return fsg_bind_config(c->cdev, c, fsg_common);
}
-int fsg_init(struct ums_board_info *ums)
+int fsg_init(struct ums *ums_dev)
{
- ums_info = ums;
+ ums = ums_dev;
return 0;
}
--- /dev/null
+/*
+ * f_thor.c -- USB TIZEN THOR Downloader gadget function
+ *
+ * Copyright (C) 2013 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * Based on code from:
+ * git://review.tizen.org/kernel/u-boot
+ *
+ * Developed by:
+ * Copyright (C) 2009 Samsung Electronics
+ * Minkyu Kang <mk7.kang@samsung.com>
+ * Sanghee Kim <sh0130.kim@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <errno.h>
+#include <common.h>
+#include <malloc.h>
+#include <version.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/composite.h>
+#include <linux/usb/cdc.h>
+#include <g_dnl.h>
+#include <dfu.h>
+
+#include "f_thor.h"
+
+static void thor_tx_data(unsigned char *data, int len);
+static void thor_set_dma(void *addr, int len);
+static int thor_rx_data(void);
+
+static struct f_thor *thor_func;
+static inline struct f_thor *func_to_thor(struct usb_function *f)
+{
+ return container_of(f, struct f_thor, usb_function);
+}
+
+DEFINE_CACHE_ALIGN_BUFFER(unsigned char, thor_tx_data_buf,
+ sizeof(struct rsp_box));
+DEFINE_CACHE_ALIGN_BUFFER(unsigned char, thor_rx_data_buf,
+ sizeof(struct rqt_box));
+
+/* ********************************************************** */
+/* THOR protocol - transmission handling */
+/* ********************************************************** */
+DEFINE_CACHE_ALIGN_BUFFER(char, f_name, F_NAME_BUF_SIZE);
+static unsigned long long int thor_file_size;
+static int alt_setting_num;
+
+static void send_rsp(const struct rsp_box *rsp)
+{
+ memcpy(thor_tx_data_buf, rsp, sizeof(struct rsp_box));
+ thor_tx_data(thor_tx_data_buf, sizeof(struct rsp_box));
+
+ debug("-RSP: %d, %d\n", rsp->rsp, rsp->rsp_data);
+}
+
+static void send_data_rsp(s32 ack, s32 count)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct data_rsp_box, rsp,
+ sizeof(struct data_rsp_box));
+
+ rsp->ack = ack;
+ rsp->count = count;
+
+ memcpy(thor_tx_data_buf, rsp, sizeof(struct data_rsp_box));
+ thor_tx_data(thor_tx_data_buf, sizeof(struct data_rsp_box));
+
+ debug("-DATA RSP: %d, %d\n", ack, count);
+}
+
+static int process_rqt_info(const struct rqt_box *rqt)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct rsp_box, rsp, sizeof(struct rsp_box));
+ memset(rsp, 0, sizeof(struct rsp_box));
+
+ rsp->rsp = rqt->rqt;
+ rsp->rsp_data = rqt->rqt_data;
+
+ switch (rqt->rqt_data) {
+ case RQT_INFO_VER_PROTOCOL:
+ rsp->int_data[0] = VER_PROTOCOL_MAJOR;
+ rsp->int_data[1] = VER_PROTOCOL_MINOR;
+ break;
+ case RQT_INIT_VER_HW:
+ snprintf(rsp->str_data[0], sizeof(rsp->str_data[0]),
+ "%x", checkboard());
+ break;
+ case RQT_INIT_VER_BOOT:
+ sprintf(rsp->str_data[0], "%s", U_BOOT_VERSION);
+ break;
+ case RQT_INIT_VER_KERNEL:
+ sprintf(rsp->str_data[0], "%s", "k unknown");
+ break;
+ case RQT_INIT_VER_PLATFORM:
+ sprintf(rsp->str_data[0], "%s", "p unknown");
+ break;
+ case RQT_INIT_VER_CSC:
+ sprintf(rsp->str_data[0], "%s", "c unknown");
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ send_rsp(rsp);
+ return true;
+}
+
+static int process_rqt_cmd(const struct rqt_box *rqt)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct rsp_box, rsp, sizeof(struct rsp_box));
+ memset(rsp, 0, sizeof(struct rsp_box));
+
+ rsp->rsp = rqt->rqt;
+ rsp->rsp_data = rqt->rqt_data;
+
+ switch (rqt->rqt_data) {
+ case RQT_CMD_REBOOT:
+ debug("TARGET RESET\n");
+ send_rsp(rsp);
+ g_dnl_unregister();
+ dfu_free_entities();
+ run_command("reset", 0);
+ break;
+ case RQT_CMD_POWEROFF:
+ case RQT_CMD_EFSCLEAR:
+ send_rsp(rsp);
+ default:
+ printf("Command not supported -> cmd: %d\n", rqt->rqt_data);
+ return -EINVAL;
+ }
+
+ return true;
+}
+
+static long long int download_head(unsigned long long total,
+ unsigned int packet_size,
+ long long int *left,
+ int *cnt)
+{
+ long long int rcv_cnt = 0, left_to_rcv, ret_rcv;
+ void *transfer_buffer = dfu_get_buf();
+ void *buf = transfer_buffer;
+ int usb_pkt_cnt = 0, ret;
+
+ /*
+ * Files smaller than THOR_STORE_UNIT_SIZE (now 32 MiB) are stored on
+ * the medium.
+ * The packet response is sent on the purpose after successful data
+ * chunk write. There is a room for improvement when asynchronous write
+ * is performed.
+ */
+ while (total - rcv_cnt >= packet_size) {
+ thor_set_dma(buf, packet_size);
+ buf += packet_size;
+ ret_rcv = thor_rx_data();
+ if (ret_rcv < 0)
+ return ret_rcv;
+ rcv_cnt += ret_rcv;
+ debug("%d: RCV data count: %llu cnt: %d\n", usb_pkt_cnt,
+ rcv_cnt, *cnt);
+
+ if ((rcv_cnt % THOR_STORE_UNIT_SIZE) == 0) {
+ ret = dfu_write(dfu_get_entity(alt_setting_num),
+ transfer_buffer, THOR_STORE_UNIT_SIZE,
+ (*cnt)++);
+ if (ret) {
+ error("DFU write failed [%d] cnt: %d",
+ ret, *cnt);
+ return ret;
+ }
+ buf = transfer_buffer;
+ }
+ send_data_rsp(0, ++usb_pkt_cnt);
+ }
+
+ /* Calculate the amount of data to arrive from PC (in bytes) */
+ left_to_rcv = total - rcv_cnt;
+
+ /*
+ * Calculate number of data already received. but not yet stored
+ * on the medium (they are smaller than THOR_STORE_UNIT_SIZE)
+ */
+ *left = left_to_rcv + buf - transfer_buffer;
+ debug("%s: left: %llu left_to_rcv: %llu buf: 0x%p\n", __func__,
+ *left, left_to_rcv, buf);
+
+ if (left_to_rcv) {
+ thor_set_dma(buf, packet_size);
+ ret_rcv = thor_rx_data();
+ if (ret_rcv < 0)
+ return ret_rcv;
+ rcv_cnt += ret_rcv;
+ send_data_rsp(0, ++usb_pkt_cnt);
+ }
+
+ debug("%s: %llu total: %llu cnt: %d\n", __func__, rcv_cnt, total, *cnt);
+
+ return rcv_cnt;
+}
+
+static int download_tail(long long int left, int cnt)
+{
+ void *transfer_buffer = dfu_get_buf();
+ int ret;
+
+ debug("%s: left: %llu cnt: %d\n", __func__, left, cnt);
+
+ if (left) {
+ ret = dfu_write(dfu_get_entity(alt_setting_num),
+ transfer_buffer, left, cnt++);
+ if (ret) {
+ error("DFU write failed [%d]: left: %llu", ret, left);
+ return ret;
+ }
+ }
+
+ /*
+ * To store last "packet" DFU storage backend requires dfu_write with
+ * size parameter equal to 0
+ *
+ * This also frees memory malloc'ed by dfu_get_buf(), so no explicit
+ * need fo call dfu_free_buf() is needed.
+ */
+ ret = dfu_write(dfu_get_entity(alt_setting_num),
+ transfer_buffer, 0, cnt);
+ if (ret)
+ error("DFU write failed [%d] cnt: %d", ret, cnt);
+
+ return ret;
+}
+
+static long long int process_rqt_download(const struct rqt_box *rqt)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct rsp_box, rsp, sizeof(struct rsp_box));
+ static long long int left, ret_head;
+ int file_type, ret = 0;
+ static int cnt;
+
+ memset(rsp, 0, sizeof(struct rsp_box));
+ rsp->rsp = rqt->rqt;
+ rsp->rsp_data = rqt->rqt_data;
+
+ switch (rqt->rqt_data) {
+ case RQT_DL_INIT:
+ thor_file_size = rqt->int_data[0];
+ debug("INIT: total %d bytes\n", rqt->int_data[0]);
+ break;
+ case RQT_DL_FILE_INFO:
+ file_type = rqt->int_data[0];
+ if (file_type == FILE_TYPE_PIT) {
+ puts("PIT table file - not supported\n");
+ rsp->ack = -ENOTSUPP;
+ ret = rsp->ack;
+ break;
+ }
+
+ thor_file_size = rqt->int_data[1];
+ memcpy(f_name, rqt->str_data[0], F_NAME_BUF_SIZE);
+
+ debug("INFO: name(%s, %d), size(%llu), type(%d)\n",
+ f_name, 0, thor_file_size, file_type);
+
+ rsp->int_data[0] = THOR_PACKET_SIZE;
+
+ alt_setting_num = dfu_get_alt(f_name);
+ if (alt_setting_num < 0) {
+ error("Alt setting [%d] to write not found!",
+ alt_setting_num);
+ rsp->ack = -ENODEV;
+ ret = rsp->ack;
+ }
+ break;
+ case RQT_DL_FILE_START:
+ send_rsp(rsp);
+ ret_head = download_head(thor_file_size, THOR_PACKET_SIZE,
+ &left, &cnt);
+ if (ret_head < 0) {
+ left = 0;
+ cnt = 0;
+ }
+ return ret_head;
+ case RQT_DL_FILE_END:
+ debug("DL FILE_END\n");
+ rsp->ack = download_tail(left, cnt);
+ ret = rsp->ack;
+ left = 0;
+ cnt = 0;
+ break;
+ case RQT_DL_EXIT:
+ debug("DL EXIT\n");
+ break;
+ default:
+ error("Operation not supported: %d", rqt->rqt_data);
+ ret = -ENOTSUPP;
+ }
+
+ send_rsp(rsp);
+ return ret;
+}
+
+static int process_data(void)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(struct rqt_box, rqt, sizeof(struct rqt_box));
+ int ret = -EINVAL;
+
+ memset(rqt, 0, sizeof(rqt));
+ memcpy(rqt, thor_rx_data_buf, sizeof(struct rqt_box));
+
+ debug("+RQT: %d, %d\n", rqt->rqt, rqt->rqt_data);
+
+ switch (rqt->rqt) {
+ case RQT_INFO:
+ ret = process_rqt_info(rqt);
+ break;
+ case RQT_CMD:
+ ret = process_rqt_cmd(rqt);
+ break;
+ case RQT_DL:
+ ret = (int) process_rqt_download(rqt);
+ break;
+ case RQT_UL:
+ puts("RQT: UPLOAD not supported!\n");
+ break;
+ default:
+ error("unknown request (%d)", rqt->rqt);
+ }
+
+ return ret;
+}
+
+/* ********************************************************** */
+/* THOR USB Function */
+/* ********************************************************** */
+
+static inline struct usb_endpoint_descriptor *
+ep_desc(struct usb_gadget *g, struct usb_endpoint_descriptor *hs,
+ struct usb_endpoint_descriptor *fs)
+{
+ if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
+ return hs;
+ return fs;
+}
+
+static struct usb_interface_descriptor thor_downloader_intf_data = {
+ .bLength = sizeof(thor_downloader_intf_data),
+ .bDescriptorType = USB_DT_INTERFACE,
+
+ .bNumEndpoints = 2,
+ .bInterfaceClass = USB_CLASS_CDC_DATA,
+};
+
+static struct usb_endpoint_descriptor fs_in_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+
+ .bEndpointAddress = USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+};
+
+static struct usb_endpoint_descriptor fs_out_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+
+ .bEndpointAddress = USB_DIR_OUT,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+};
+
+/* CDC configuration */
+static struct usb_interface_descriptor thor_downloader_intf_int = {
+ .bLength = sizeof(thor_downloader_intf_int),
+ .bDescriptorType = USB_DT_INTERFACE,
+
+ .bNumEndpoints = 1,
+ .bInterfaceClass = USB_CLASS_COMM,
+ /* 0x02 Abstract Line Control Model */
+ .bInterfaceSubClass = USB_CDC_SUBCLASS_ACM,
+ /* 0x01 Common AT commands */
+ .bInterfaceProtocol = USB_CDC_ACM_PROTO_AT_V25TER,
+};
+
+static struct usb_cdc_header_desc thor_downloader_cdc_header = {
+ .bLength = sizeof(thor_downloader_cdc_header),
+ .bDescriptorType = 0x24, /* CS_INTERFACE */
+ .bDescriptorSubType = 0x00,
+ .bcdCDC = 0x0110,
+};
+
+static struct usb_cdc_call_mgmt_descriptor thor_downloader_cdc_call = {
+ .bLength = sizeof(thor_downloader_cdc_call),
+ .bDescriptorType = 0x24, /* CS_INTERFACE */
+ .bDescriptorSubType = 0x01,
+ .bmCapabilities = 0x00,
+ .bDataInterface = 0x01,
+};
+
+static struct usb_cdc_acm_descriptor thor_downloader_cdc_abstract = {
+ .bLength = sizeof(thor_downloader_cdc_abstract),
+ .bDescriptorType = 0x24, /* CS_INTERFACE */
+ .bDescriptorSubType = 0x02,
+ .bmCapabilities = 0x00,
+};
+
+static struct usb_cdc_union_desc thor_downloader_cdc_union = {
+ .bLength = sizeof(thor_downloader_cdc_union),
+ .bDescriptorType = 0x24, /* CS_INTERFACE */
+ .bDescriptorSubType = USB_CDC_UNION_TYPE,
+};
+
+static struct usb_endpoint_descriptor fs_int_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+
+ .bEndpointAddress = 3 | USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_INT,
+ .wMaxPacketSize = __constant_cpu_to_le16(16),
+
+ .bInterval = 0x9,
+};
+
+static struct usb_interface_assoc_descriptor
+thor_iad_descriptor = {
+ .bLength = sizeof(thor_iad_descriptor),
+ .bDescriptorType = USB_DT_INTERFACE_ASSOCIATION,
+
+ .bFirstInterface = 0,
+ .bInterfaceCount = 2, /* control + data */
+ .bFunctionClass = USB_CLASS_COMM,
+ .bFunctionSubClass = USB_CDC_SUBCLASS_ACM,
+ .bFunctionProtocol = USB_CDC_PROTO_NONE,
+};
+
+static struct usb_endpoint_descriptor hs_in_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor hs_out_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize = __constant_cpu_to_le16(512),
+};
+
+static struct usb_endpoint_descriptor hs_int_desc = {
+ .bLength = USB_DT_ENDPOINT_SIZE,
+ .bDescriptorType = USB_DT_ENDPOINT,
+
+ .bmAttributes = USB_ENDPOINT_XFER_INT,
+ .wMaxPacketSize = __constant_cpu_to_le16(16),
+
+ .bInterval = 0x9,
+};
+
+static struct usb_qualifier_descriptor dev_qualifier = {
+ .bLength = sizeof(dev_qualifier),
+ .bDescriptorType = USB_DT_DEVICE_QUALIFIER,
+
+ .bcdUSB = __constant_cpu_to_le16(0x0200),
+ .bDeviceClass = USB_CLASS_VENDOR_SPEC,
+
+ .bNumConfigurations = 2,
+};
+
+/*
+ * This attribute vendor descriptor is necessary for correct operation with
+ * Windows version of THOR download program
+ *
+ * It prevents windows driver from sending zero lenght packet (ZLP) after
+ * each THOR_PACKET_SIZE. This assures consistent behaviour with libusb
+ */
+static struct usb_cdc_attribute_vendor_descriptor thor_downloader_cdc_av = {
+ .bLength = sizeof(thor_downloader_cdc_av),
+ .bDescriptorType = 0x24,
+ .bDescriptorSubType = 0x80,
+ .DAUType = 0x0002,
+ .DAULength = 0x0001,
+ .DAUValue = 0x00,
+};
+
+static const struct usb_descriptor_header *hs_thor_downloader_function[] = {
+ (struct usb_descriptor_header *)&thor_iad_descriptor,
+
+ (struct usb_descriptor_header *)&thor_downloader_intf_int,
+ (struct usb_descriptor_header *)&thor_downloader_cdc_header,
+ (struct usb_descriptor_header *)&thor_downloader_cdc_call,
+ (struct usb_descriptor_header *)&thor_downloader_cdc_abstract,
+ (struct usb_descriptor_header *)&thor_downloader_cdc_union,
+ (struct usb_descriptor_header *)&hs_int_desc,
+
+ (struct usb_descriptor_header *)&thor_downloader_intf_data,
+ (struct usb_descriptor_header *)&thor_downloader_cdc_av,
+ (struct usb_descriptor_header *)&hs_in_desc,
+ (struct usb_descriptor_header *)&hs_out_desc,
+ NULL,
+};
+
+/*-------------------------------------------------------------------------*/
+static struct usb_request *alloc_ep_req(struct usb_ep *ep, unsigned length)
+{
+ struct usb_request *req;
+
+ req = usb_ep_alloc_request(ep, 0);
+ if (!req)
+ return req;
+
+ req->length = length;
+ req->buf = memalign(CONFIG_SYS_CACHELINE_SIZE, length);
+ if (!req->buf) {
+ usb_ep_free_request(ep, req);
+ req = NULL;
+ }
+
+ return req;
+}
+
+static int thor_rx_data(void)
+{
+ struct thor_dev *dev = thor_func->dev;
+ int data_to_rx, tmp, status;
+
+ data_to_rx = dev->out_req->length;
+ tmp = data_to_rx;
+ do {
+ dev->out_req->length = data_to_rx;
+ debug("dev->out_req->length:%d dev->rxdata:%d\n",
+ dev->out_req->length, dev->rxdata);
+
+ status = usb_ep_queue(dev->out_ep, dev->out_req, 0);
+ if (status) {
+ error("kill %s: resubmit %d bytes --> %d",
+ dev->out_ep->name, dev->out_req->length, status);
+ usb_ep_set_halt(dev->out_ep);
+ return -EAGAIN;
+ }
+
+ while (!dev->rxdata) {
+ usb_gadget_handle_interrupts();
+ if (ctrlc())
+ return -1;
+ }
+ dev->rxdata = 0;
+ data_to_rx -= dev->out_req->actual;
+ } while (data_to_rx);
+
+ return tmp;
+}
+
+static void thor_tx_data(unsigned char *data, int len)
+{
+ struct thor_dev *dev = thor_func->dev;
+ unsigned char *ptr = dev->in_req->buf;
+ int status;
+
+ memset(ptr, 0, len);
+ memcpy(ptr, data, len);
+
+ dev->in_req->length = len;
+
+ debug("%s: dev->in_req->length:%d to_cpy:%d\n", __func__,
+ dev->in_req->length, sizeof(data));
+
+ status = usb_ep_queue(dev->in_ep, dev->in_req, 0);
+ if (status) {
+ error("kill %s: resubmit %d bytes --> %d",
+ dev->in_ep->name, dev->in_req->length, status);
+ usb_ep_set_halt(dev->in_ep);
+ }
+
+ /* Wait until tx interrupt received */
+ while (!dev->txdata)
+ usb_gadget_handle_interrupts();
+
+ dev->txdata = 0;
+}
+
+static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req)
+{
+ struct thor_dev *dev = thor_func->dev;
+ int status = req->status;
+
+ debug("%s: ep_ptr:%p, req_ptr:%p\n", __func__, ep, req);
+ switch (status) {
+ case 0:
+ if (ep == dev->out_ep)
+ dev->rxdata = 1;
+ else
+ dev->txdata = 1;
+
+ break;
+
+ /* this endpoint is normally active while we're configured */
+ case -ECONNABORTED: /* hardware forced ep reset */
+ case -ECONNRESET: /* request dequeued */
+ case -ESHUTDOWN: /* disconnect from host */
+ case -EREMOTEIO: /* short read */
+ case -EOVERFLOW:
+ error("ERROR:%d", status);
+ break;
+ }
+
+ debug("%s complete --> %d, %d/%d\n", ep->name,
+ status, req->actual, req->length);
+}
+
+static struct usb_request *thor_start_ep(struct usb_ep *ep)
+{
+ struct usb_request *req;
+
+ req = alloc_ep_req(ep, ep->maxpacket);
+ debug("%s: ep:%p req:%p\n", __func__, ep, req);
+
+ if (!req)
+ return NULL;
+
+ memset(req->buf, 0, req->length);
+ req->complete = thor_rx_tx_complete;
+
+ memset(req->buf, 0x55, req->length);
+
+ return req;
+}
+
+static void thor_setup_complete(struct usb_ep *ep, struct usb_request *req)
+{
+ if (req->status || req->actual != req->length)
+ debug("setup complete --> %d, %d/%d\n",
+ req->status, req->actual, req->length);
+}
+
+static int
+thor_func_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl)
+{
+ struct thor_dev *dev = thor_func->dev;
+ struct usb_request *req = dev->req;
+ struct usb_gadget *gadget = dev->gadget;
+ int value = 0;
+
+ u16 len = le16_to_cpu(ctrl->wLength);
+
+ debug("Req_Type: 0x%x Req: 0x%x wValue: 0x%x wIndex: 0x%x wLen: 0x%x\n",
+ ctrl->bRequestType, ctrl->bRequest, ctrl->wValue, ctrl->wIndex,
+ ctrl->wLength);
+
+ switch (ctrl->bRequest) {
+ case USB_CDC_REQ_SET_CONTROL_LINE_STATE:
+ value = 0;
+ break;
+ case USB_CDC_REQ_SET_LINE_CODING:
+ value = len;
+ /* Line Coding set done = configuration done */
+ thor_func->dev->configuration_done = 1;
+ break;
+
+ default:
+ error("thor_setup: unknown request: %d", ctrl->bRequest);
+ }
+
+ if (value >= 0) {
+ req->length = value;
+ req->zero = value < len;
+ value = usb_ep_queue(gadget->ep0, req, 0);
+ if (value < 0) {
+ debug("%s: ep_queue: %d\n", __func__, value);
+ req->status = 0;
+ }
+ }
+
+ return value;
+}
+
+/* Specific to the THOR protocol */
+static void thor_set_dma(void *addr, int len)
+{
+ struct thor_dev *dev = thor_func->dev;
+
+ debug("in_req:%p, out_req:%p\n", dev->in_req, dev->out_req);
+ debug("addr:%p, len:%d\n", addr, len);
+
+ dev->out_req->buf = addr;
+ dev->out_req->length = len;
+}
+
+int thor_init(void)
+{
+ struct thor_dev *dev = thor_func->dev;
+
+ /* Wait for a device enumeration and configuration settings */
+ debug("THOR enumeration/configuration setting....\n");
+ while (!dev->configuration_done)
+ usb_gadget_handle_interrupts();
+
+ thor_set_dma(thor_rx_data_buf, strlen("THOR"));
+ /* detect the download request from Host PC */
+ if (thor_rx_data() < 0) {
+ printf("%s: Data not received!\n", __func__);
+ return -1;
+ }
+
+ if (!strncmp((char *)thor_rx_data_buf, "THOR", strlen("THOR"))) {
+ puts("Download request from the Host PC\n");
+ udelay(30 * 1000); /* 30 ms */
+
+ strcpy((char *)thor_tx_data_buf, "ROHT");
+ thor_tx_data(thor_tx_data_buf, strlen("ROHT"));
+ } else {
+ puts("Wrong reply information\n");
+ return -1;
+ }
+
+ return 0;
+}
+
+int thor_handle(void)
+{
+ int ret;
+
+ /* receive the data from Host PC */
+ while (1) {
+ thor_set_dma(thor_rx_data_buf, sizeof(struct rqt_box));
+ ret = thor_rx_data();
+
+ if (ret > 0) {
+ ret = process_data();
+ if (ret < 0)
+ return ret;
+ } else {
+ printf("%s: No data received!\n", __func__);
+ break;
+ }
+ }
+
+ return 0;
+}
+
+static int thor_func_bind(struct usb_configuration *c, struct usb_function *f)
+{
+ struct usb_gadget *gadget = c->cdev->gadget;
+ struct f_thor *f_thor = func_to_thor(f);
+ struct thor_dev *dev;
+ struct usb_ep *ep;
+ int status;
+
+ thor_func = f_thor;
+ dev = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*dev));
+ if (!dev)
+ return -ENOMEM;
+
+ memset(dev, 0, sizeof(*dev));
+ dev->gadget = gadget;
+ f_thor->dev = dev;
+
+ debug("%s: usb_configuration: 0x%p usb_function: 0x%p\n",
+ __func__, c, f);
+ debug("f_thor: 0x%p thor: 0x%p\n", f_thor, dev);
+
+ /* EP0 */
+ /* preallocate control response and buffer */
+ dev->req = usb_ep_alloc_request(gadget->ep0, 0);
+ if (!dev->req) {
+ status = -ENOMEM;
+ goto fail;
+ }
+ dev->req->buf = memalign(CONFIG_SYS_CACHELINE_SIZE,
+ gadget->ep0->maxpacket);
+ if (!dev->req->buf) {
+ status = -ENOMEM;
+ goto fail;
+ }
+
+ dev->req->complete = thor_setup_complete;
+
+ /* DYNAMIC interface numbers assignments */
+ status = usb_interface_id(c, f);
+
+ if (status < 0)
+ goto fail;
+
+ thor_downloader_intf_int.bInterfaceNumber = status;
+ thor_downloader_cdc_union.bMasterInterface0 = status;
+
+ status = usb_interface_id(c, f);
+
+ if (status < 0)
+ goto fail;
+
+ thor_downloader_intf_data.bInterfaceNumber = status;
+ thor_downloader_cdc_union.bSlaveInterface0 = status;
+
+ /* allocate instance-specific endpoints */
+ ep = usb_ep_autoconfig(gadget, &fs_in_desc);
+ if (!ep) {
+ status = -ENODEV;
+ goto fail;
+ }
+
+ if (gadget_is_dualspeed(gadget)) {
+ hs_in_desc.bEndpointAddress =
+ fs_in_desc.bEndpointAddress;
+ }
+
+ dev->in_ep = ep; /* Store IN EP for enabling @ setup */
+
+ ep = usb_ep_autoconfig(gadget, &fs_out_desc);
+ if (!ep) {
+ status = -ENODEV;
+ goto fail;
+ }
+
+ if (gadget_is_dualspeed(gadget))
+ hs_out_desc.bEndpointAddress =
+ fs_out_desc.bEndpointAddress;
+
+ dev->out_ep = ep; /* Store OUT EP for enabling @ setup */
+
+ ep = usb_ep_autoconfig(gadget, &fs_int_desc);
+ if (!ep) {
+ status = -ENODEV;
+ goto fail;
+ }
+
+ dev->int_ep = ep;
+
+ if (gadget_is_dualspeed(gadget)) {
+ hs_int_desc.bEndpointAddress =
+ fs_int_desc.bEndpointAddress;
+
+ f->hs_descriptors = (struct usb_descriptor_header **)
+ &hs_thor_downloader_function;
+
+ if (!f->hs_descriptors)
+ goto fail;
+ }
+
+ debug("%s: out_ep:%p out_req:%p\n", __func__,
+ dev->out_ep, dev->out_req);
+
+ return 0;
+
+ fail:
+ free(dev);
+ return status;
+}
+
+static void free_ep_req(struct usb_ep *ep, struct usb_request *req)
+{
+ free(req->buf);
+ usb_ep_free_request(ep, req);
+}
+
+static void thor_unbind(struct usb_configuration *c, struct usb_function *f)
+{
+ struct f_thor *f_thor = func_to_thor(f);
+ struct thor_dev *dev = f_thor->dev;
+
+ free(dev);
+ memset(thor_func, 0, sizeof(*thor_func));
+ thor_func = NULL;
+}
+
+static void thor_func_disable(struct usb_function *f)
+{
+ struct f_thor *f_thor = func_to_thor(f);
+ struct thor_dev *dev = f_thor->dev;
+
+ debug("%s:\n", __func__);
+
+ /* Avoid freeing memory when ep is still claimed */
+ if (dev->in_ep->driver_data) {
+ free_ep_req(dev->in_ep, dev->in_req);
+ usb_ep_disable(dev->in_ep);
+ dev->in_ep->driver_data = NULL;
+ }
+
+ if (dev->out_ep->driver_data) {
+ dev->out_req->buf = NULL;
+ usb_ep_free_request(dev->out_ep, dev->out_req);
+ usb_ep_disable(dev->out_ep);
+ dev->out_ep->driver_data = NULL;
+ }
+
+ if (dev->int_ep->driver_data) {
+ usb_ep_disable(dev->int_ep);
+ dev->int_ep->driver_data = NULL;
+ }
+}
+
+static int thor_eps_setup(struct usb_function *f)
+{
+ struct usb_composite_dev *cdev = f->config->cdev;
+ struct usb_gadget *gadget = cdev->gadget;
+ struct thor_dev *dev = thor_func->dev;
+ struct usb_endpoint_descriptor *d;
+ struct usb_request *req;
+ struct usb_ep *ep;
+ int result;
+
+ ep = dev->in_ep;
+ d = ep_desc(gadget, &hs_in_desc, &fs_in_desc);
+ debug("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress);
+
+ result = usb_ep_enable(ep, d);
+ if (result)
+ goto exit;
+
+ ep->driver_data = cdev; /* claim */
+ req = thor_start_ep(ep);
+ if (!req) {
+ usb_ep_disable(ep);
+ result = -EIO;
+ goto exit;
+ }
+
+ dev->in_req = req;
+ ep = dev->out_ep;
+ d = ep_desc(gadget, &hs_out_desc, &fs_out_desc);
+ debug("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress);
+
+ result = usb_ep_enable(ep, d);
+ if (result)
+ goto exit;
+
+ ep->driver_data = cdev; /* claim */
+ req = thor_start_ep(ep);
+ if (!req) {
+ usb_ep_disable(ep);
+ result = -EIO;
+ goto exit;
+ }
+
+ dev->out_req = req;
+ /* ACM control EP */
+ ep = dev->int_ep;
+ ep->driver_data = cdev; /* claim */
+
+ exit:
+ return result;
+}
+
+static int thor_func_set_alt(struct usb_function *f,
+ unsigned intf, unsigned alt)
+{
+ struct thor_dev *dev = thor_func->dev;
+ int result;
+
+ debug("%s: func: %s intf: %d alt: %d\n",
+ __func__, f->name, intf, alt);
+
+ switch (intf) {
+ case 0:
+ debug("ACM INTR interface\n");
+ break;
+ case 1:
+ debug("Communication Data interface\n");
+ result = thor_eps_setup(f);
+ if (result)
+ error("%s: EPs setup failed!", __func__);
+ dev->configuration_done = 1;
+ break;
+ }
+
+ return 0;
+}
+
+static int thor_func_init(struct usb_configuration *c)
+{
+ struct f_thor *f_thor;
+ int status;
+
+ debug("%s: cdev: 0x%p\n", __func__, c->cdev);
+
+ f_thor = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*f_thor));
+ if (!f_thor)
+ return -ENOMEM;
+
+ memset(f_thor, 0, sizeof(*f_thor));
+
+ f_thor->usb_function.name = "f_thor";
+ f_thor->usb_function.bind = thor_func_bind;
+ f_thor->usb_function.unbind = thor_unbind;
+ f_thor->usb_function.setup = thor_func_setup;
+ f_thor->usb_function.set_alt = thor_func_set_alt;
+ f_thor->usb_function.disable = thor_func_disable;
+
+ status = usb_add_function(c, &f_thor->usb_function);
+ if (status)
+ free(f_thor);
+
+ return status;
+}
+
+int thor_add(struct usb_configuration *c)
+{
+ debug("%s:\n", __func__);
+ return thor_func_init(c);
+}
--- /dev/null
+/*
+ * f_thor.h - USB TIZEN THOR - internal gadget definitions
+ *
+ * Copyright (C) 2013 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _USB_THOR_H_
+#define _USB_THOR_H_
+
+#include <linux/compiler.h>
+#include <asm/sizes.h>
+
+/* THOR Composite Gadget */
+#define STRING_MANUFACTURER_IDX 0
+#define STRING_PRODUCT_IDX 1
+#define STRING_SERIAL_IDX 2
+
+/* ********************************************************** */
+/* THOR protocol definitions */
+/* ********************************************************** */
+
+/*
+ * Attribute Vendor descriptor - necessary to prevent ZLP transmission
+ * from Windows XP HOST PC
+ */
+struct usb_cdc_attribute_vendor_descriptor {
+ __u8 bLength;
+ __u8 bDescriptorType;
+ __u8 bDescriptorSubType;
+ __u16 DAUType;
+ __u16 DAULength;
+ __u8 DAUValue;
+} __packed;
+
+#define VER_PROTOCOL_MAJOR 4
+#define VER_PROTOCOL_MINOR 0
+
+enum rqt {
+ RQT_INFO = 200,
+ RQT_CMD,
+ RQT_DL,
+ RQT_UL,
+};
+
+enum rqt_data {
+ /* RQT_INFO */
+ RQT_INFO_VER_PROTOCOL = 1,
+ RQT_INIT_VER_HW,
+ RQT_INIT_VER_BOOT,
+ RQT_INIT_VER_KERNEL,
+ RQT_INIT_VER_PLATFORM,
+ RQT_INIT_VER_CSC,
+
+ /* RQT_CMD */
+ RQT_CMD_REBOOT = 1,
+ RQT_CMD_POWEROFF,
+ RQT_CMD_EFSCLEAR,
+
+ /* RQT_DL */
+ RQT_DL_INIT = 1,
+ RQT_DL_FILE_INFO,
+ RQT_DL_FILE_START,
+ RQT_DL_FILE_END,
+ RQT_DL_EXIT,
+
+ /* RQT_UL */
+ RQT_UL_INIT = 1,
+ RQT_UL_START,
+ RQT_UL_END,
+ RQT_UL_EXIT,
+};
+
+struct rqt_box { /* total: 256B */
+ s32 rqt; /* request id */
+ s32 rqt_data; /* request data id */
+ s32 int_data[14]; /* int data */
+ char str_data[5][32]; /* string data */
+ char md5[32]; /* md5 checksum */
+} __packed;
+
+struct rsp_box { /* total: 128B */
+ s32 rsp; /* response id (= request id) */
+ s32 rsp_data; /* response data id */
+ s32 ack; /* ack */
+ s32 int_data[5]; /* int data */
+ char str_data[3][32]; /* string data */
+} __packed;
+
+struct data_rsp_box { /* total: 8B */
+ s32 ack; /* response id (= request id) */
+ s32 count; /* response data id */
+} __packed;
+
+enum {
+ FILE_TYPE_NORMAL,
+ FILE_TYPE_PIT,
+};
+
+struct thor_dev {
+ struct usb_gadget *gadget;
+ struct usb_request *req; /* EP0 -> control responses */
+
+ /* IN/OUT EP's and correspoinding requests */
+ struct usb_ep *in_ep, *out_ep, *int_ep;
+ struct usb_request *in_req, *out_req;
+
+ /* Control flow variables */
+ unsigned char configuration_done;
+ unsigned char rxdata;
+ unsigned char txdata;
+};
+
+struct f_thor {
+ struct usb_function usb_function;
+ struct thor_dev *dev;
+};
+
+#define F_NAME_BUF_SIZE 32
+#define THOR_PACKET_SIZE SZ_1M /* 1 MiB */
+#define THOR_STORE_UNIT_SIZE SZ_32M /* 32 MiB */
+#endif /* _USB_THOR_H_ */
#include <g_dnl.h>
#include <usb_mass_storage.h>
#include <dfu.h>
+#include <thor.h>
#include "gadget_chips.h"
#include "composite.c"
#define STRING_PRODUCT 2
/* Index of String Descriptor describing this configuration */
#define STRING_USBDOWN 2
+/* Index of String serial */
+#define STRING_SERIAL 3
+#define MAX_STRING_SERIAL 32
/* Number of supported configurations */
#define CONFIGURATION_NUMBER 1
static const char shortname[] = "usb_dnl_";
static const char product[] = "USB download gadget";
+static char g_dnl_serial[MAX_STRING_SERIAL];
static const char manufacturer[] = CONFIG_G_DNL_MANUFACTURER;
+void g_dnl_set_serialnumber(char *s)
+{
+ memset(g_dnl_serial, 0, MAX_STRING_SERIAL);
+ if (strlen(s) < MAX_STRING_SERIAL)
+ strncpy(g_dnl_serial, s, strlen(s));
+}
+
static struct usb_device_descriptor device_desc = {
.bLength = sizeof device_desc,
.bDescriptorType = USB_DT_DEVICE,
.idVendor = __constant_cpu_to_le16(CONFIG_G_DNL_VENDOR_NUM),
.idProduct = __constant_cpu_to_le16(CONFIG_G_DNL_PRODUCT_NUM),
.iProduct = STRING_PRODUCT,
+ .iSerialNumber = STRING_SERIAL,
.bNumConfigurations = 1,
};
static struct usb_string g_dnl_string_defs[] = {
{.s = manufacturer},
{.s = product},
+ {.s = g_dnl_serial},
{ } /* end of list */
};
{
struct usb_gadget *gadget = cdev->gadget;
+ free(cdev->config);
+ cdev->config = NULL;
debug("%s: calling usb_gadget_disconnect for "
"controller '%s'\n", shortname, gadget->name);
usb_gadget_disconnect(gadget);
ret = dfu_add(c);
else if (!strcmp(s, "usb_dnl_ums"))
ret = fsg_add(c);
+ else if (!strcmp(s, "usb_dnl_thor"))
+ ret = thor_add(c);
return ret;
}
static int g_dnl_config_register(struct usb_composite_dev *cdev)
{
- static struct usb_configuration config = {
- .label = "usb_dnload",
- .bmAttributes = USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER,
- .bConfigurationValue = CONFIGURATION_NUMBER,
- .iConfiguration = STRING_USBDOWN,
+ struct usb_configuration *config;
+ const char *name = "usb_dnload";
+
+ config = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*config));
+ if (!config)
+ return -ENOMEM;
- .bind = g_dnl_do_config,
- };
+ memset(config, 0, sizeof(*config));
- return usb_add_config(cdev, &config);
+ config->label = name;
+ config->bmAttributes = USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER;
+ config->bConfigurationValue = CONFIGURATION_NUMBER;
+ config->iConfiguration = STRING_USBDOWN;
+ config->bind = g_dnl_do_config;
+
+ return usb_add_config(cdev, config);
}
__weak
-int g_dnl_bind_fixup(struct usb_device_descriptor *dev)
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
{
return 0;
}
+__weak int g_dnl_get_board_bcd_device_number(int gcnum)
+{
+ return gcnum;
+}
+
+static int g_dnl_get_bcd_device_number(struct usb_composite_dev *cdev)
+{
+ struct usb_gadget *gadget = cdev->gadget;
+ int gcnum;
+
+ gcnum = usb_gadget_controller_number(gadget);
+ if (gcnum > 0)
+ gcnum += 0x200;
+
+ return g_dnl_get_board_bcd_device_number(gcnum);
+}
+
static int g_dnl_bind(struct usb_composite_dev *cdev)
{
struct usb_gadget *gadget = cdev->gadget;
g_dnl_string_defs[1].id = id;
device_desc.iProduct = id;
- g_dnl_bind_fixup(&device_desc);
+ id = usb_string_id(cdev);
+ if (id < 0)
+ return id;
+
+ g_dnl_string_defs[2].id = id;
+ device_desc.iSerialNumber = id;
+
+ g_dnl_bind_fixup(&device_desc, cdev->driver->name);
ret = g_dnl_config_register(cdev);
if (ret)
goto error;
- gcnum = usb_gadget_controller_number(gadget);
-
- debug("gcnum: %d\n", gcnum);
+ gcnum = g_dnl_get_bcd_device_number(cdev);
if (gcnum >= 0)
- device_desc.bcdDevice = cpu_to_le16(0x0200 + gcnum);
+ device_desc.bcdDevice = cpu_to_le16(gcnum);
else {
debug("%s: controller '%s' not recognized\n",
shortname, gadget->name);
int g_dnl_register(const char *type)
{
- /* We only allow "dfu" atm, so 3 should be enough */
- static char name[sizeof(shortname) + 3];
+ /* The largest function name is 4 */
+ static char name[sizeof(shortname) + 4];
int ret;
if (!strcmp(type, "dfu")) {
} else if (!strcmp(type, "ums")) {
strcpy(name, shortname);
strcat(name, type);
+ } else if (!strcmp(type, "thor")) {
+ strcpy(name, shortname);
+ strcat(name, type);
} else {
printf("%s: unknown command: %s\n", __func__, type);
return -EINVAL;
#include <commproc.h>
#include <usbdevice.h>
#include <usb/mpc8xx_udc.h>
+#include <usb/udc.h>
#include "ep0.h"
#include <config.h>
#include <net.h>
#include <malloc.h>
+#include <asm/byteorder.h>
+#include <asm/errno.h>
#include <asm/io.h>
+#include <asm/unaligned.h>
#include <linux/types.h>
+#include <linux/usb/ch9.h>
+#include <linux/usb/gadget.h>
#include <usb/mv_udc.h>
-
-#if CONFIG_USB_MAX_CONTROLLER_COUNT > 1
-#error This driver only supports one single controller.
-#endif
+#include "../host/ehci.h"
+#include "mv_udc.h"
/*
* Check if the system has too long cachelines. If the cachelines are
.gadget = {
.name = "mv_udc",
.ops = &mv_udc_ops,
+ .is_dualspeed = 1,
},
};
return;
}
-static void ep_enable(int num, int in)
+static void ep_enable(int num, int in, int maxpacket)
{
- struct ept_queue_head *head;
struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
unsigned n;
- head = mv_get_qh(num, in);
n = readl(&udc->epctrl[num]);
if (in)
n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK);
if (num != 0) {
- head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE) | CONFIG_ZLT;
+ struct ept_queue_head *head = mv_get_qh(num, in);
+
+ head->config = CONFIG_MAX_PKT(maxpacket) | CONFIG_ZLT;
mv_flush_qh(num);
}
writel(n, &udc->epctrl[num]);
int num, in;
num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
in = (desc->bEndpointAddress & USB_DIR_IN) != 0;
- ep_enable(num, in);
mv_ep->desc = desc;
+
+ if (num) {
+ int max = get_unaligned_le16(&desc->wMaxPacketSize);
+
+ if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL))
+ max = 64;
+ if (ep->maxpacket != max) {
+ DBG("%s: from %d to %d\n", __func__,
+ ep->maxpacket, max);
+ ep->maxpacket = max;
+ }
+ }
+ ep_enable(num, in, ep->maxpacket);
+ DBG("%s: num=%d maxpacket=%d\n", __func__, num, ep->maxpacket);
return 0;
}
static int mv_ep_disable(struct usb_ep *ep)
{
+ struct mv_ep *mv_ep = container_of(ep, struct mv_ep, ep);
+
+ mv_ep->desc = NULL;
return 0;
}
-static int mv_bounce(struct mv_ep *ep)
+static int mv_bounce(struct mv_ep *ep, int in)
{
uint32_t addr = (uint32_t)ep->req.buf;
uint32_t ba;
if (!ep->b_buf)
return -ENOMEM;
}
-
- memcpy(ep->b_buf, ep->req.buf, ep->req.length);
+ if (in)
+ memcpy(ep->b_buf, ep->req.buf, ep->req.length);
flush:
ba = (uint32_t)ep->b_buf;
return 0;
}
-static void mv_debounce(struct mv_ep *ep)
+static void mv_debounce(struct mv_ep *ep, int in)
{
uint32_t addr = (uint32_t)ep->req.buf;
uint32_t ba = (uint32_t)ep->b_buf;
+ if (in) {
+ if (addr == ba)
+ return; /* not a bounce */
+ goto free;
+ }
invalidate_dcache_range(ba, ba + ep->b_len);
- /* Input buffer address is not aligned. */
- if (addr & (ARCH_DMA_MINALIGN - 1))
- goto copy;
+ if (addr == ba)
+ return; /* not a bounce */
- /* Input buffer length is not aligned. */
- if (ep->req.length & (ARCH_DMA_MINALIGN - 1))
- goto copy;
-
- /* The buffer is well aligned, only invalidate cache. */
- return;
-
-copy:
memcpy(ep->req.buf, ep->b_buf, ep->req.length);
-
+free:
/* Large payloads use allocated buffer, free it. */
- if (ep->req.length > 64)
+ if (ep->b_buf != ep->b_fast)
free(ep->b_buf);
}
head = mv_get_qh(num, in);
len = req->length;
- ret = mv_bounce(mv_ep);
+ ret = mv_bounce(mv_ep, in);
if (ret)
return ret;
item->info = INFO_BYTES(len) | INFO_IOC | INFO_ACTIVE;
item->page0 = (uint32_t)mv_ep->b_buf;
item->page1 = ((uint32_t)mv_ep->b_buf & 0xfffff000) + 0x1000;
+ mv_flush_qtd(num);
head->next = (unsigned) item;
head->info = 0;
DBG("ept%d %s queue len %x, buffer %p\n",
num, in ? "in" : "out", len, mv_ep->b_buf);
+ mv_flush_qh(num);
if (in)
bit = EPT_TX(num);
else
bit = EPT_RX(num);
- mv_flush_qh(num);
- mv_flush_qtd(num);
-
writel(bit, &udc->epprime);
return 0;
mv_invalidate_qtd(num);
if (item->info & 0xff)
- printf("EP%d/%s FAIL nfo=%x pg0=%x\n",
- num, in ? "in" : "out", item->info, item->page0);
+ printf("EP%d/%s FAIL info=%x pg0=%x\n",
+ num, in ? "in" : "out", item->info, item->page0);
len = (item->info >> 16) & 0x7fff;
-
- mv_debounce(ep);
-
ep->req.length -= len;
+ mv_debounce(ep, in);
+
DBG("ept%d %s complete %x\n",
num, in ? "in" : "out", len);
ep->req.complete(&ep->ep, &ep->req);
if ((r.wValue == 0) && (r.wLength == 0)) {
req->length = 0;
for (i = 0; i < NUM_ENDPOINTS; i++) {
- if (!controller.ep[i].desc)
+ struct mv_ep *ep = &controller.ep[i];
+
+ if (!ep->desc)
continue;
- num = controller.ep[i].desc->bEndpointAddress
+ num = ep->desc->bEndpointAddress
& USB_ENDPOINT_NUMBER_MASK;
- in = (controller.ep[i].desc->bEndpointAddress
+ in = (ep->desc->bEndpointAddress
& USB_DIR_IN) != 0;
if ((num == _num) && (in == _in)) {
- ep_enable(num, in);
+ ep_enable(num, in, ep->ep.maxpacket);
usb_ep_queue(controller.gadget.ep0,
req, 0);
break;
DBG("-- suspend --\n");
if (n & STS_PCI) {
- DBG("-- portchange --\n");
+ int max = 64;
+ int speed = USB_SPEED_FULL;
+
bit = (readl(&udc->portsc) >> 26) & 3;
+ DBG("-- portchange %x %s\n", bit, (bit == 2) ? "High" : "Full");
if (bit == 2) {
- controller.gadget.speed = USB_SPEED_HIGH;
- for (i = 1; i < NUM_ENDPOINTS && n; i++)
- if (controller.ep[i].desc)
- controller.ep[i].ep.maxpacket = 512;
- } else {
- controller.gadget.speed = USB_SPEED_FULL;
+ speed = USB_SPEED_HIGH;
+ max = 512;
+ }
+ controller.gadget.speed = speed;
+ for (i = 1; i < NUM_ENDPOINTS; i++) {
+ if (controller.ep[i].ep.maxpacket > max)
+ controller.ep[i].ep.maxpacket = max;
}
}
free(controller.epts);
return -ENOMEM;
}
+ memset(controller.items_mem, 0, ilist_sz);
for (i = 0; i < 2 * NUM_ENDPOINTS; i++) {
/*
if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH)
return -EINVAL;
- ret = usb_lowlevel_init(0, (void **)&controller.ctrl);
+ ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl);
if (ret)
return ret;
--- /dev/null
+/*
+ * Copyright 2011, Marvell Semiconductor Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+#ifndef __GADGET__MV_UDC_H__
+#define __GADGET__MV_UDC_H__
+
+#define NUM_ENDPOINTS 6
+
+struct mv_udc {
+#define MICRO_8FRAME 0x8
+#define USBCMD_ITC(x) ((((x) > 0xff) ? 0xff : x) << 16)
+#define USBCMD_FS2 (1 << 15)
+#define USBCMD_RST (1 << 1)
+#define USBCMD_RUN (1)
+ u32 usbcmd; /* 0x140 */
+#define STS_SLI (1 << 8)
+#define STS_URI (1 << 6)
+#define STS_PCI (1 << 2)
+#define STS_UEI (1 << 1)
+#define STS_UI (1 << 0)
+ u32 usbsts; /* 0x144 */
+ u32 pad1[3];
+ u32 devaddr; /* 0x154 */
+ u32 epinitaddr; /* 0x158 */
+ u32 pad2[10];
+#define PTS_ENABLE 2
+#define PTS(x) (((x) & 0x3) << 30)
+#define PFSC (1 << 24)
+ u32 portsc; /* 0x184 */
+ u32 pad3[8];
+#define USBMODE_DEVICE 2
+ u32 usbmode; /* 0x1a8 */
+ u32 epstat; /* 0x1ac */
+#define EPT_TX(x) (1 << (((x) & 0xffff) + 16))
+#define EPT_RX(x) (1 << ((x) & 0xffff))
+ u32 epprime; /* 0x1b0 */
+ u32 epflush; /* 0x1b4 */
+ u32 pad4;
+ u32 epcomp; /* 0x1bc */
+#define CTRL_TXE (1 << 23)
+#define CTRL_TXR (1 << 22)
+#define CTRL_RXE (1 << 7)
+#define CTRL_RXR (1 << 6)
+#define CTRL_TXT_BULK (2 << 18)
+#define CTRL_RXT_BULK (2 << 2)
+ u32 epctrl[16]; /* 0x1c0 */
+};
+
+struct mv_ep {
+ struct usb_ep ep;
+ struct list_head queue;
+ const struct usb_endpoint_descriptor *desc;
+
+ struct usb_request req;
+ uint8_t *b_buf;
+ uint32_t b_len;
+ uint8_t b_fast[64] __aligned(ARCH_DMA_MINALIGN);
+};
+
+struct mv_drv {
+ struct usb_gadget gadget;
+ struct usb_gadget_driver *driver;
+ struct ehci_ctrl *ctrl;
+ struct ept_queue_head *epts;
+ struct ept_queue_item *items[2 * NUM_ENDPOINTS];
+ uint8_t *items_mem;
+ struct mv_ep ep[NUM_ENDPOINTS];
+};
+
+struct ept_queue_head {
+ unsigned config;
+ unsigned current; /* read-only */
+
+ unsigned next;
+ unsigned info;
+ unsigned page0;
+ unsigned page1;
+ unsigned page2;
+ unsigned page3;
+ unsigned page4;
+ unsigned reserved_0;
+
+ unsigned char setup_data[8];
+
+ unsigned reserved_1;
+ unsigned reserved_2;
+ unsigned reserved_3;
+ unsigned reserved_4;
+};
+
+#define CONFIG_MAX_PKT(n) ((n) << 16)
+#define CONFIG_ZLT (1 << 29) /* stop on zero-len xfer */
+#define CONFIG_IOS (1 << 15) /* IRQ on setup */
+
+struct ept_queue_item {
+ unsigned next;
+ unsigned info;
+ unsigned page0;
+ unsigned page1;
+ unsigned page2;
+ unsigned page3;
+ unsigned page4;
+ unsigned reserved;
+};
+
+#define TERMINATE 1
+#define INFO_BYTES(n) ((n) << 16)
+#define INFO_IOC (1 << 15)
+#define INFO_ACTIVE (1 << 7)
+#define INFO_HALTED (1 << 6)
+#define INFO_BUFFER_ERROR (1 << 5)
+#define INFO_TX_ERROR (1 << 3)
+#endif
#endif
#include <usbdevice.h>
#include <usb/omap1510_udc.h>
+#include <usb/udc.h>
#include "ep0.h"
#include <asm/arch/hardware.h>
#include <asm/io.h>
#include <usb/pxa27x_udc.h>
+#include <usb/udc.h>
#include "ep0.h"
invalidate_dcache_range((unsigned long) ep->dev->dma_buf[ep_num],
(unsigned long) ep->dev->dma_buf[ep_num]
- + DMA_BUFFER_SIZE);
+ + ROUND(ep->ep.maxpacket,
+ CONFIG_SYS_CACHELINE_SIZE));
if (length == 0)
pktcnt = 1;
#define ETOOSMALL 525
#include <usb_mass_storage.h>
-extern struct ums_board_info *ums_info;
/*-------------------------------------------------------------------------*/
static int fsg_lun_open(struct fsg_lun *curlun, const char *filename)
{
int ro;
- int rc = -EINVAL;
- loff_t size;
- loff_t num_sectors;
- loff_t min_sectors;
/* R/W if we can, R/O if we must */
ro = curlun->initially_ro;
- ums_info->get_capacity(&(ums_info->ums_dev), &size);
- if (size < 0) {
- printf("unable to find file size: %s\n", filename);
- rc = (int) size;
- goto out;
- }
- num_sectors = size >> 9; /* File size in 512-byte blocks */
- min_sectors = 1;
- if (num_sectors < min_sectors) {
- printf("file too small: %s\n", filename);
- rc = -ETOOSMALL;
- goto out;
- }
-
curlun->ro = ro;
- curlun->file_length = size;
- curlun->num_sectors = num_sectors;
+ curlun->file_length = ums->num_sectors << 9;
+ curlun->num_sectors = ums->num_sectors;
debug("open backing file: %s\n", filename);
- rc = 0;
-out:
- return rc;
+ return 0;
}
static void fsg_lun_close(struct fsg_lun *curlun)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libusb_host.o
-
# ohci
-COBJS-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o
-COBJS-$(CONFIG_USB_ATMEL) += ohci-at91.o
-COBJS-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
-COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
-COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
-COBJS-$(CONFIG_USB_SL811HS) += sl811-hcd.o
-COBJS-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o
+obj-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o
+obj-$(CONFIG_USB_ATMEL) += ohci-at91.o
+obj-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
+obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
+obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
+obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o
+obj-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o
# echi
-COBJS-$(CONFIG_USB_EHCI) += ehci-hcd.o
-COBJS-$(CONFIG_USB_EHCI_ARMADA100) += ehci-armada100.o utmi-armada100.o
-COBJS-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o
+obj-$(CONFIG_USB_EHCI) += ehci-hcd.o
+obj-$(CONFIG_USB_EHCI_ARMADA100) += ehci-armada100.o utmi-armada100.o
+obj-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o
ifdef CONFIG_MPC512X
-COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-mpc512x.o
+obj-$(CONFIG_USB_EHCI_FSL) += ehci-mpc512x.o
else
-COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o
+obj-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o
endif
-COBJS-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o
-COBJS-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
-COBJS-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
-COBJS-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o
-COBJS-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
-COBJS-$(CONFIG_USB_EHCI_MX6) += ehci-mx6.o
-COBJS-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
-COBJS-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
-COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
-COBJS-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
-COBJS-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
-COBJS-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
-COBJS-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
-COBJS-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o
+obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
+obj-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
+obj-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o
+obj-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
+obj-$(CONFIG_USB_EHCI_MX6) += ehci-mx6.o
+obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
+obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
+obj-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o
+obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
+obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
+obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
+obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
+obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
+
+# xhci
+obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o
+obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
+obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
/*
* EHCI host controller init
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
if (utmi_init() < 0)
return -1;
*/
#define EN_UPLL_TIMEOUT 500UL
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
ulong start_time, tmp_time;
#include <asm/arch/ehci.h>
#include <asm/arch/system.h>
#include <asm/arch/power.h>
+#include <asm/gpio.h>
#include <asm-generic/errno.h>
#include <linux/compat.h>
#include "ehci.h"
struct exynos_ehci {
struct exynos_usb_phy *usb;
struct ehci_hccr *hcd;
+ struct fdt_gpio_state vbus_gpio;
};
static struct exynos_ehci exynos;
exynos->hcd = (struct ehci_hccr *)addr;
+ /* Vbus gpio */
+ fdtdec_decode_gpio(blob, node, "samsung,vbus-gpio", &exynos->vbus_gpio);
+
depth = 0;
node = fdtdec_next_compatible_subnode(blob, node,
COMPAT_SAMSUNG_EXYNOS_USB_PHY, &depth);
* Create the appropriate control structures to manage
* a new EHCI host controller.
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
struct exynos_ehci *ctx = &exynos;
ctx->hcd = (struct ehci_hccr *)samsung_get_base_usb_ehci();
#endif
+#ifdef CONFIG_OF_CONTROL
+ /* setup the Vbus gpio here */
+ if (!fdtdec_setup_gpio(&ctx->vbus_gpio))
+ gpio_direction_output(ctx->vbus_gpio.gpio, 1);
+#endif
+
setup_usb_phy(ctx->usb);
*hccr = ctx->hcd;
* Create the appropriate control structures to manage
* a new EHCI host controller.
*/
-int ehci_hcd_init(int index, struct ehci_hccr **ret_hccr,
- struct ehci_hcor **ret_hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **ret_hccr, struct ehci_hcor **ret_hcor)
{
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
*
* Excerpts from linux ehci fsl driver.
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- struct usb_ehci *ehci;
+ struct usb_ehci *ehci = NULL;
const char *phy_type = NULL;
size_t len;
#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
usb_phy[0] = '\0';
#endif
- ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ switch (index) {
+ case 0:
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
+ break;
+ case 1:
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB2_ADDR;
+ break;
+ default:
+ printf("ERROR: wrong controller index!!\n");
+ break;
+ };
+
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
return ehci_hcd_stop(index);
}
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
uint32_t reg;
uint32_t cmd;
struct QH *qh_list;
struct QH *periodic;
int i;
+ int rc;
- if (ehci_hcd_init(index, &ehcic[index].hccr, &ehcic[index].hcor))
- return -1;
+ rc = ehci_hcd_init(index, init, &ehcic[index].hccr, &ehcic[index].hcor);
+ if (rc)
+ return rc;
+ if (init == USB_INIT_DEVICE)
+ goto done;
/* EHCI spec section 4.1 */
if (ehci_reset(index))
return -1;
#if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
- if (ehci_hcd_init(index, &ehcic[index].hccr, &ehcic[index].hcor))
- return -1;
+ rc = ehci_hcd_init(index, init, &ehcic[index].hccr, &ehcic[index].hcor);
+ if (rc)
+ return rc;
#endif
/* Set the high address word (aka segment) for 64-bit controller */
if (ehci_readl(&ehcic[index].hccr->cr_hccparams) & 1)
printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
ehcic[index].rootdev = 0;
-
+done:
*controller = &ehcic[index];
return 0;
}
* Create the appropriate control structures to manage
* a new EHCI host controller.
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
*hccr = (struct ehci_hccr *)(0xcd000100);
*hcor = (struct ehci_hcor *)((uint32_t) *hccr
* Create the appropriate control structures to manage
* a new EHCI host controller.
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
usb_brg_adrdec_setup();
* This code is derived from EHCI FSL USB Linux driver for MPC5121
*
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
volatile struct usb_ehci *ehci;
/* Hook the memory mapped registers for EHCI-Controller */
- ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
*hccr = (struct ehci_hccr *)((uint32_t)&(ehci->caplength));
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
int exit_status = 0;
/* Reset the USB controller */
- ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
+ ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
exit_status = reset_usb_controller(ehci);
return exit_status;
{
}
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
struct usb_ehci *ehci;
#define USBPHY_CTRL_CLKGATE 0x40000000
#define USBPHY_CTRL_ENUTMILEVEL3 0x00008000
#define USBPHY_CTRL_ENUTMILEVEL2 0x00004000
+#define USBPHY_CTRL_OTG_ID 0x08000000
#define ANADIG_USB2_CHRG_DETECT_EN_B 0x00100000
#define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B 0x00080000
#define UCTRL_OVER_CUR_DIS (1 << 7) /* Disable OTG Overcurrent Detection */
/* USBCMD */
-#define UH1_USBCMD_OFFSET 0x140
#define UCMD_RUN_STOP (1 << 0) /* controller run/stop */
#define UCMD_RESET (1 << 1) /* controller reset */
-static void usbh1_internal_phy_clock_gate(int on)
+static const unsigned phy_bases[] = {
+ USB_PHY0_BASE_ADDR,
+ USB_PHY1_BASE_ADDR,
+};
+
+static void usb_internal_phy_clock_gate(int index, int on)
{
- void __iomem *phy_reg = (void __iomem *)USB_PHY1_BASE_ADDR;
+ void __iomem *phy_reg;
+
+ if (index >= ARRAY_SIZE(phy_bases))
+ return;
+ phy_reg = (void __iomem *)phy_bases[index];
phy_reg += on ? USBPHY_CTRL_CLR : USBPHY_CTRL_SET;
__raw_writel(USBPHY_CTRL_CLKGATE, phy_reg);
}
-static void usbh1_power_config(void)
+static void usb_power_config(int index)
{
struct anatop_regs __iomem *anatop =
(struct anatop_regs __iomem *)ANATOP_BASE_ADDR;
+ void __iomem *chrg_detect;
+ void __iomem *pll_480_ctrl_clr;
+ void __iomem *pll_480_ctrl_set;
+
+ switch (index) {
+ case 0:
+ chrg_detect = &anatop->usb1_chrg_detect;
+ pll_480_ctrl_clr = &anatop->usb1_pll_480_ctrl_clr;
+ pll_480_ctrl_set = &anatop->usb1_pll_480_ctrl_set;
+ break;
+ case 1:
+ chrg_detect = &anatop->usb2_chrg_detect;
+ pll_480_ctrl_clr = &anatop->usb2_pll_480_ctrl_clr;
+ pll_480_ctrl_set = &anatop->usb2_pll_480_ctrl_set;
+ break;
+ default:
+ return;
+ }
/*
- * Some phy and power's special controls for host1
+ * Some phy and power's special controls
* 1. The external charger detector needs to be disabled
* or the signal at DP will be poor
- * 2. The PLL's power and output to usb for host 1
+ * 2. The PLL's power and output to usb
* is totally controlled by IC, so the Software only needs
* to enable them at initializtion.
*/
__raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B |
ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
- &anatop->usb2_chrg_detect);
+ chrg_detect);
__raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS,
- &anatop->usb2_pll_480_ctrl_clr);
+ pll_480_ctrl_clr);
__raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE |
ANADIG_USB2_PLL_480_CTRL_POWER |
ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS,
- &anatop->usb2_pll_480_ctrl_set);
+ pll_480_ctrl_set);
}
-static int usbh1_phy_enable(void)
+/* Return 0 : host node, <>0 : device mode */
+static int usb_phy_enable(int index, struct usb_ehci *ehci)
{
- void __iomem *phy_reg = (void __iomem *)USB_PHY1_BASE_ADDR;
- void __iomem *phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
- void __iomem *usb_cmd = (void __iomem *)(USBOH3_USB_BASE_ADDR +
- USB_H1REGS_OFFSET +
- UH1_USBCMD_OFFSET);
+ void __iomem *phy_reg;
+ void __iomem *phy_ctrl;
+ void __iomem *usb_cmd;
u32 val;
+ if (index >= ARRAY_SIZE(phy_bases))
+ return 0;
+
+ phy_reg = (void __iomem *)phy_bases[index];
+ phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
+ usb_cmd = (void __iomem *)&ehci->usbcmd;
+
/* Stop then Reset */
val = __raw_readl(usb_cmd);
val &= ~UCMD_RUN_STOP;
/* Power up the PHY */
__raw_writel(0, phy_reg + USBPHY_PWD);
/* enable FS/LS device */
- val = __raw_readl(phy_reg + USBPHY_CTRL);
+ val = __raw_readl(phy_ctrl);
val |= (USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3);
- __raw_writel(val, phy_reg + USBPHY_CTRL);
+ __raw_writel(val, phy_ctrl);
- return 0;
+ return val & USBPHY_CTRL_OTG_ID;
}
-static void usbh1_oc_config(void)
+/* Base address for this IP block is 0x02184800 */
+struct usbnc_regs {
+ u32 ctrl[4]; /* otg/host1-3 */
+ u32 uh2_hsic_ctrl;
+ u32 uh3_hsic_ctrl;
+ u32 otg_phy_ctrl_0;
+ u32 uh1_phy_ctrl_0;
+};
+
+static void usb_oc_config(int index)
{
- void __iomem *usb_base = (void __iomem *)USBOH3_USB_BASE_ADDR;
- void __iomem *usbother_base = usb_base + USB_OTHERREGS_OFFSET;
+ struct usbnc_regs *usbnc = (struct usbnc_regs *)(USBOH3_USB_BASE_ADDR +
+ USB_OTHERREGS_OFFSET);
+ void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]);
u32 val;
- val = __raw_readl(usbother_base + USB_H1_CTRL_OFFSET);
+ val = __raw_readl(ctrl);
#if CONFIG_MACH_TYPE == MACH_TYPE_MX6Q_ARM2
/* mx6qarm2 seems to required a different setting*/
val &= ~UCTRL_OVER_CUR_POL;
#else
val |= UCTRL_OVER_CUR_POL;
#endif
- __raw_writel(val, usbother_base + USB_H1_CTRL_OFFSET);
+ __raw_writel(val, ctrl);
- val = __raw_readl(usbother_base + USB_H1_CTRL_OFFSET);
+ val = __raw_readl(ctrl);
val |= UCTRL_OVER_CUR_DIS;
- __raw_writel(val, usbother_base + USB_H1_CTRL_OFFSET);
+ __raw_writel(val, ctrl);
}
int __weak board_ehci_hcd_init(int port)
return 0;
}
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int __weak board_ehci_power(int port, int on)
{
- struct usb_ehci *ehci;
+ return 0;
+}
+
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+ enum usb_init_type type;
+ struct usb_ehci *ehci = (struct usb_ehci *)(USBOH3_USB_BASE_ADDR +
+ (0x200 * index));
+ if (index > 3)
+ return -EINVAL;
enable_usboh3_clk(1);
mdelay(1);
/* Do board specific initialization */
- board_ehci_hcd_init(CONFIG_MXC_USB_PORT);
-
-#if CONFIG_MXC_USB_PORT == 1
- /* USB Host 1 */
- usbh1_power_config();
- usbh1_oc_config();
- usbh1_internal_phy_clock_gate(1);
- usbh1_phy_enable();
-#else
-#error "MXC USB port not yet supported"
-#endif
+ board_ehci_hcd_init(index);
+
+ usb_power_config(index);
+ usb_oc_config(index);
+ usb_internal_phy_clock_gate(index, 1);
+ type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE : USB_INIT_HOST;
- ehci = (struct usb_ehci *)(USBOH3_USB_BASE_ADDR +
- (0x200 * CONFIG_MXC_USB_PORT));
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t)*hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
- setbits_le32(&ehci->usbmode, CM_HOST);
+ if ((type == init) || (type == USB_INIT_DEVICE))
+ board_ehci_power(index, (type == USB_INIT_DEVICE) ? 0 : 1);
+ if (type != init)
+ return -ENODEV;
+ if (type == USB_INIT_DEVICE)
+ return 0;
+ setbits_le32(&ehci->usbmode, CM_HOST);
__raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
setbits_le32(&ehci->portsc, USB_EN);
return 0;
}
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
struct usb_ehci *ehci;
#ifdef CONFIG_MX31
return 0;
}
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
int ret;
}
#endif
-inline int __board_usb_init(void)
-{
- return 0;
-}
-int board_usb_init(void) __attribute__((weak, alias("__board_usb_init")));
-
#if defined(CONFIG_OMAP_EHCI_PHY1_RESET_GPIO) || \
defined(CONFIG_OMAP_EHCI_PHY2_RESET_GPIO) || \
defined(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO)
* Based on "drivers/usb/host/ehci-omap.c" from Linux 3.1
* See there for additional Copyrights.
*/
-int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
int ret;
unsigned int i, reg = 0, rev = 0;
debug("Initializing OMAP EHCI\n");
- ret = board_usb_init();
+ ret = board_usb_init(index, USB_INIT_HOST);
if (ret < 0)
return ret;
* Create the appropriate control structures to manage
* a new EHCI host controller.
*/
-int ehci_hcd_init(int index, struct ehci_hccr **ret_hccr,
- struct ehci_hcor **ret_hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **ret_hccr, struct ehci_hcor **ret_hcor)
{
pci_dev_t pdev;
uint32_t cmd;
* Create the appropriate control structures to manage
* a new EHCI host controller.
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
*hccr = (struct ehci_hccr *)(CONFIG_SYS_PPC4XX_USB_ADDR);
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
* Create the appropriate control structures to manage
* a new EHCI host controller.
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
*hccr = (struct ehci_hccr *)(CONFIG_SYS_UHC0_EHCI_BASE + 0x100);
*hcor = (struct ehci_hcor *)((uint32_t)*hccr
return 0;
}
-int board_usb_init(const void *blob)
+int usb_process_devicetree(const void *blob)
{
int node_list[USB_PORTS_MAX];
int count, err = 0;
* @param hcor returns start address of EHCI HCOR registers
* @return 0 if ok, -1 on error (generally invalid port number)
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
struct fdt_usb *config;
struct usb_ctlr *usbctlr;
* Create the appropriate control structures to manage
* a new EHCI host controller.
*/
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
int ret;
u32 vct_hccr;
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#endif
-/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
-#define DeviceRequest \
- ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
-
-#define DeviceOutRequest \
- ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
-
-#define InterfaceRequest \
- ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
-
-#define EndpointRequest \
- ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
-
-#define EndpointOutRequest \
- ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
-
/*
* Register Space.
*/
};
/* Low level init functions */
-int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor);
+int ehci_hcd_init(int index, enum usb_init_type init,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor);
int ehci_hcd_stop(int index);
#endif /* USB_EHCI_H */
return 0;
}
-int usb_lowlevel_init(int index, void **controller))
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller))
{
struct isp116x *isp116x = &isp116x_dev;
}
dev->status = stat;
- dev->act_len = transfer_len;
+ dev->act_len = urb->actual_length;
#ifdef DEBUG
pkt_print(urb, dev, pipe, buffer, transfer_len,
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
#ifdef CONFIG_PCI_OHCI
pci_dev_t pdev;
#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
/* board dependant init */
- if (usb_board_init())
+ if (board_usb_init(index, USB_INIT_HOST))
return -1;
#endif
memset(&gohci, 0, sizeof(ohci_t));
err ("can't reset usb-%s", gohci.slot_name);
#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
/* board dependant cleanup */
- usb_board_init_fail();
+ board_usb_cleanup(index, USB_INIT_HOST);
#endif
#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
#endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
/* functions for doing board or CPU specific setup/cleanup */
-extern int usb_board_init(void);
-extern int usb_board_stop(void);
-extern int usb_board_init_fail(void);
-
-extern int usb_cpu_init(void);
-extern int usb_cpu_stop(void);
-extern int usb_cpu_init_fail(void);
+int usb_board_stop(void);
+int usb_cpu_init(void);
+int usb_cpu_stop(void);
+int usb_cpu_init_fail(void);
static int cc_to_error[16] = {
return 0;
}
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
struct r8a66597 *r8a66597 = &gr8a66597;
return 1;
}
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
root_hub_devnum = 0;
sl811_hc_reset();
--- /dev/null
+/*
+ * SAMSUNG EXYNOS5 USB HOST XHCI Controller
+ *
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ * Vivek Gautam <gautam.vivek@samsung.com>
+ * Vikas Sajjan <vikas.sajjan@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ * This file is a conglomeration for DWC3-init sequence and further
+ * exynos5 specific PHY-init sequence.
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <libfdt.h>
+#include <malloc.h>
+#include <usb.h>
+#include <watchdog.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/power.h>
+#include <asm/arch/xhci-exynos.h>
+#include <asm/gpio.h>
+#include <asm-generic/errno.h>
+#include <linux/compat.h>
+#include <linux/usb/dwc3.h>
+
+#include "xhci.h"
+
+/* Declare global data pointer */
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * Contains pointers to register base addresses
+ * for the usb controller.
+ */
+struct exynos_xhci {
+ struct exynos_usb3_phy *usb3_phy;
+ struct xhci_hccr *hcd;
+ struct dwc3 *dwc3_reg;
+ struct fdt_gpio_state vbus_gpio;
+};
+
+static struct exynos_xhci exynos;
+
+#ifdef CONFIG_OF_CONTROL
+static int exynos_usb3_parse_dt(const void *blob, struct exynos_xhci *exynos)
+{
+ fdt_addr_t addr;
+ unsigned int node;
+ int depth;
+
+ node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_XHCI);
+ if (node <= 0) {
+ debug("XHCI: Can't get device node for xhci\n");
+ return -ENODEV;
+ }
+
+ /*
+ * Get the base address for XHCI controller from the device node
+ */
+ addr = fdtdec_get_addr(blob, node, "reg");
+ if (addr == FDT_ADDR_T_NONE) {
+ debug("Can't get the XHCI register base address\n");
+ return -ENXIO;
+ }
+ exynos->hcd = (struct xhci_hccr *)addr;
+
+ /* Vbus gpio */
+ fdtdec_decode_gpio(blob, node, "samsung,vbus-gpio", &exynos->vbus_gpio);
+
+ depth = 0;
+ node = fdtdec_next_compatible_subnode(blob, node,
+ COMPAT_SAMSUNG_EXYNOS5_USB3_PHY, &depth);
+ if (node <= 0) {
+ debug("XHCI: Can't get device node for usb3-phy controller\n");
+ return -ENODEV;
+ }
+
+ /*
+ * Get the base address for usbphy from the device node
+ */
+ exynos->usb3_phy = (struct exynos_usb3_phy *)fdtdec_get_addr(blob, node,
+ "reg");
+ if (exynos->usb3_phy == NULL) {
+ debug("Can't get the usbphy register address\n");
+ return -ENXIO;
+ }
+
+ return 0;
+}
+#endif
+
+static void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy)
+{
+ u32 reg;
+
+ /* enabling usb_drd phy */
+ set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
+
+ /* Reset USB 3.0 PHY */
+ writel(0x0, &phy->phy_reg0);
+
+ clrbits_le32(&phy->phy_param0,
+ /* Select PHY CLK source */
+ PHYPARAM0_REF_USE_PAD |
+ /* Set Loss-of-Signal Detector sensitivity */
+ PHYPARAM0_REF_LOSLEVEL_MASK);
+ setbits_le32(&phy->phy_param0, PHYPARAM0_REF_LOSLEVEL);
+
+ writel(0x0, &phy->phy_resume);
+
+ /*
+ * Setting the Frame length Adj value[6:1] to default 0x20
+ * See xHCI 1.0 spec, 5.2.4
+ */
+ setbits_le32(&phy->link_system,
+ LINKSYSTEM_XHCI_VERSION_CONTROL |
+ LINKSYSTEM_FLADJ(0x20));
+
+ /* Set Tx De-Emphasis level */
+ clrbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH_MASK);
+ setbits_le32(&phy->phy_param1, PHYPARAM1_PCS_TXDEEMPH);
+
+ setbits_le32(&phy->phy_batchg, PHYBATCHG_UTMI_CLKSEL);
+
+ /* PHYTEST POWERDOWN Control */
+ clrbits_le32(&phy->phy_test,
+ PHYTEST_POWERDOWN_SSP |
+ PHYTEST_POWERDOWN_HSP);
+
+ /* UTMI Power Control */
+ writel(PHYUTMI_OTGDISABLE, &phy->phy_utmi);
+
+ /* Use core clock from main PLL */
+ reg = PHYCLKRST_REFCLKSEL_EXT_REFCLK |
+ /* Default 24Mhz crystal clock */
+ PHYCLKRST_FSEL(FSEL_CLKSEL_24M) |
+ PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF |
+ PHYCLKRST_SSC_REFCLKSEL(0x88) |
+ /* Force PortReset of PHY */
+ PHYCLKRST_PORTRESET |
+ /* Digital power supply in normal operating mode */
+ PHYCLKRST_RETENABLEN |
+ /* Enable ref clock for SS function */
+ PHYCLKRST_REF_SSP_EN |
+ /* Enable spread spectrum */
+ PHYCLKRST_SSC_EN |
+ /* Power down HS Bias and PLL blocks in suspend mode */
+ PHYCLKRST_COMMONONN;
+
+ writel(reg, &phy->phy_clk_rst);
+
+ /* giving time to Phy clock to settle before resetting */
+ udelay(10);
+
+ reg &= ~PHYCLKRST_PORTRESET;
+ writel(reg, &phy->phy_clk_rst);
+}
+
+static void exynos5_usb3_phy_exit(struct exynos_usb3_phy *phy)
+{
+ setbits_le32(&phy->phy_utmi,
+ PHYUTMI_OTGDISABLE |
+ PHYUTMI_FORCESUSPEND |
+ PHYUTMI_FORCESLEEP);
+
+ clrbits_le32(&phy->phy_clk_rst,
+ PHYCLKRST_REF_SSP_EN |
+ PHYCLKRST_SSC_EN |
+ PHYCLKRST_COMMONONN);
+
+ /* PHYTEST POWERDOWN Control to remove leakage current */
+ setbits_le32(&phy->phy_test,
+ PHYTEST_POWERDOWN_SSP |
+ PHYTEST_POWERDOWN_HSP);
+
+ /* disabling usb_drd phy */
+ set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_DISABLE);
+}
+
+void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
+{
+ clrsetbits_le32(&dwc3_reg->g_ctl,
+ DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG),
+ DWC3_GCTL_PRTCAPDIR(mode));
+}
+
+static void dwc3_core_soft_reset(struct dwc3 *dwc3_reg)
+{
+ /* Before Resetting PHY, put Core in Reset */
+ setbits_le32(&dwc3_reg->g_ctl,
+ DWC3_GCTL_CORESOFTRESET);
+
+ /* Assert USB3 PHY reset */
+ setbits_le32(&dwc3_reg->g_usb3pipectl[0],
+ DWC3_GUSB3PIPECTL_PHYSOFTRST);
+
+ /* Assert USB2 PHY reset */
+ setbits_le32(&dwc3_reg->g_usb2phycfg,
+ DWC3_GUSB2PHYCFG_PHYSOFTRST);
+
+ mdelay(100);
+
+ /* Clear USB3 PHY reset */
+ clrbits_le32(&dwc3_reg->g_usb3pipectl[0],
+ DWC3_GUSB3PIPECTL_PHYSOFTRST);
+
+ /* Clear USB2 PHY reset */
+ clrbits_le32(&dwc3_reg->g_usb2phycfg,
+ DWC3_GUSB2PHYCFG_PHYSOFTRST);
+
+ /* After PHYs are stable we can take Core out of reset state */
+ clrbits_le32(&dwc3_reg->g_ctl,
+ DWC3_GCTL_CORESOFTRESET);
+}
+
+static int dwc3_core_init(struct dwc3 *dwc3_reg)
+{
+ u32 reg;
+ u32 revision;
+ unsigned int dwc3_hwparams1;
+
+ revision = readl(&dwc3_reg->g_snpsid);
+ /* This should read as U3 followed by revision number */
+ if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) {
+ puts("this is not a DesignWare USB3 DRD Core\n");
+ return -EINVAL;
+ }
+
+ dwc3_core_soft_reset(dwc3_reg);
+
+ dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1);
+
+ reg = readl(&dwc3_reg->g_ctl);
+ reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
+ reg &= ~DWC3_GCTL_DISSCRAMBLE;
+ switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) {
+ case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
+ reg &= ~DWC3_GCTL_DSBLCLKGTNG;
+ break;
+ default:
+ debug("No power optimization available\n");
+ }
+
+ /*
+ * WORKAROUND: DWC3 revisions <1.90a have a bug
+ * where the device can fail to connect at SuperSpeed
+ * and falls back to high-speed mode which causes
+ * the device to enter a Connect/Disconnect loop
+ */
+ if ((revision & DWC3_REVISION_MASK) < 0x190a)
+ reg |= DWC3_GCTL_U2RSTECN;
+
+ writel(reg, &dwc3_reg->g_ctl);
+
+ return 0;
+}
+
+static int exynos_xhci_core_init(struct exynos_xhci *exynos)
+{
+ int ret;
+
+ exynos5_usb3_phy_init(exynos->usb3_phy);
+
+ ret = dwc3_core_init(exynos->dwc3_reg);
+ if (ret) {
+ debug("failed to initialize core\n");
+ return -EINVAL;
+ }
+
+ /* We are hard-coding DWC3 core to Host Mode */
+ dwc3_set_mode(exynos->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
+
+ return 0;
+}
+
+static void exynos_xhci_core_exit(struct exynos_xhci *exynos)
+{
+ exynos5_usb3_phy_exit(exynos->usb3_phy);
+}
+
+int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
+{
+ struct exynos_xhci *ctx = &exynos;
+ int ret;
+
+#ifdef CONFIG_OF_CONTROL
+ exynos_usb3_parse_dt(gd->fdt_blob, ctx);
+#else
+ ctx->usb3_phy = (struct exynos_usb3_phy *)samsung_get_base_usb3_phy();
+ ctx->hcd = (struct xhci_hccr *)samsung_get_base_usb_xhci();
+#endif
+
+ ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
+
+#ifdef CONFIG_OF_CONTROL
+ /* setup the Vbus gpio here */
+ if (!fdtdec_setup_gpio(&ctx->vbus_gpio))
+ gpio_direction_output(ctx->vbus_gpio.gpio, 1);
+#endif
+
+ ret = exynos_xhci_core_init(ctx);
+ if (ret) {
+ puts("XHCI: failed to initialize controller\n");
+ return -EINVAL;
+ }
+
+ *hccr = (ctx->hcd);
+ *hcor = (struct xhci_hcor *)((uint32_t) *hccr
+ + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
+
+ debug("Exynos5-xhci: init hccr %x and hcor %x hc_length %d\n",
+ (uint32_t)*hccr, (uint32_t)*hcor,
+ (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
+
+ return 0;
+}
+
+void xhci_hcd_stop(int index)
+{
+ struct exynos_xhci *ctx = &exynos;
+
+ exynos_xhci_core_exit(ctx);
+}
--- /dev/null
+/*
+ * USB HOST XHCI Controller stack
+ *
+ * Based on xHCI host controller driver in linux-kernel
+ * by Sarah Sharp.
+ *
+ * Copyright (C) 2008 Intel Corp.
+ * Author: Sarah Sharp
+ *
+ * Copyright (C) 2013 Samsung Electronics Co.Ltd
+ * Authors: Vivek Gautam <gautam.vivek@samsung.com>
+ * Vikas Sajjan <vikas.sajjan@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/byteorder.h>
+#include <usb.h>
+#include <malloc.h>
+#include <asm/cache.h>
+#include <asm-generic/errno.h>
+
+#include "xhci.h"
+
+#define CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
+/**
+ * flushes the address passed till the length
+ *
+ * @param addr pointer to memory region to be flushed
+ * @param len the length of the cache line to be flushed
+ * @return none
+ */
+void xhci_flush_cache(uint32_t addr, u32 len)
+{
+ BUG_ON((void *)addr == NULL || len == 0);
+
+ flush_dcache_range(addr & ~(CACHELINE_SIZE - 1),
+ ALIGN(addr + len, CACHELINE_SIZE));
+}
+
+/**
+ * invalidates the address passed till the length
+ *
+ * @param addr pointer to memory region to be invalidates
+ * @param len the length of the cache line to be invalidated
+ * @return none
+ */
+void xhci_inval_cache(uint32_t addr, u32 len)
+{
+ BUG_ON((void *)addr == NULL || len == 0);
+
+ invalidate_dcache_range(addr & ~(CACHELINE_SIZE - 1),
+ ALIGN(addr + len, CACHELINE_SIZE));
+}
+
+
+/**
+ * frees the "segment" pointer passed
+ *
+ * @param ptr pointer to "segement" to be freed
+ * @return none
+ */
+static void xhci_segment_free(struct xhci_segment *seg)
+{
+ free(seg->trbs);
+ seg->trbs = NULL;
+
+ free(seg);
+}
+
+/**
+ * frees the "ring" pointer passed
+ *
+ * @param ptr pointer to "ring" to be freed
+ * @return none
+ */
+static void xhci_ring_free(struct xhci_ring *ring)
+{
+ struct xhci_segment *seg;
+ struct xhci_segment *first_seg;
+
+ BUG_ON(!ring);
+
+ first_seg = ring->first_seg;
+ seg = first_seg->next;
+ while (seg != first_seg) {
+ struct xhci_segment *next = seg->next;
+ xhci_segment_free(seg);
+ seg = next;
+ }
+ xhci_segment_free(first_seg);
+
+ free(ring);
+}
+
+/**
+ * frees the "xhci_container_ctx" pointer passed
+ *
+ * @param ptr pointer to "xhci_container_ctx" to be freed
+ * @return none
+ */
+static void xhci_free_container_ctx(struct xhci_container_ctx *ctx)
+{
+ free(ctx->bytes);
+ free(ctx);
+}
+
+/**
+ * frees the virtual devices for "xhci_ctrl" pointer passed
+ *
+ * @param ptr pointer to "xhci_ctrl" whose virtual devices are to be freed
+ * @return none
+ */
+static void xhci_free_virt_devices(struct xhci_ctrl *ctrl)
+{
+ int i;
+ int slot_id;
+ struct xhci_virt_device *virt_dev;
+
+ /*
+ * refactored here to loop through all virt_dev
+ * Slot ID 0 is reserved
+ */
+ for (slot_id = 0; slot_id < MAX_HC_SLOTS; slot_id++) {
+ virt_dev = ctrl->devs[slot_id];
+ if (!virt_dev)
+ continue;
+
+ ctrl->dcbaa->dev_context_ptrs[slot_id] = 0;
+
+ for (i = 0; i < 31; ++i)
+ if (virt_dev->eps[i].ring)
+ xhci_ring_free(virt_dev->eps[i].ring);
+
+ if (virt_dev->in_ctx)
+ xhci_free_container_ctx(virt_dev->in_ctx);
+ if (virt_dev->out_ctx)
+ xhci_free_container_ctx(virt_dev->out_ctx);
+
+ free(virt_dev);
+ /* make sure we are pointing to NULL */
+ ctrl->devs[slot_id] = NULL;
+ }
+}
+
+/**
+ * frees all the memory allocated
+ *
+ * @param ptr pointer to "xhci_ctrl" to be cleaned up
+ * @return none
+ */
+void xhci_cleanup(struct xhci_ctrl *ctrl)
+{
+ xhci_ring_free(ctrl->event_ring);
+ xhci_ring_free(ctrl->cmd_ring);
+ xhci_free_virt_devices(ctrl);
+ free(ctrl->erst.entries);
+ free(ctrl->dcbaa);
+ memset(ctrl, '\0', sizeof(struct xhci_ctrl));
+}
+
+/**
+ * Malloc the aligned memory
+ *
+ * @param size size of memory to be allocated
+ * @return allocates the memory and returns the aligned pointer
+ */
+static void *xhci_malloc(unsigned int size)
+{
+ void *ptr;
+ size_t cacheline_size = max(XHCI_ALIGNMENT, CACHELINE_SIZE);
+
+ ptr = memalign(cacheline_size, ALIGN(size, cacheline_size));
+ BUG_ON(!ptr);
+ memset(ptr, '\0', size);
+
+ xhci_flush_cache((uint32_t)ptr, size);
+
+ return ptr;
+}
+
+/**
+ * Make the prev segment point to the next segment.
+ * Change the last TRB in the prev segment to be a Link TRB which points to the
+ * address of the next segment. The caller needs to set any Link TRB
+ * related flags, such as End TRB, Toggle Cycle, and no snoop.
+ *
+ * @param prev pointer to the previous segment
+ * @param next pointer to the next segment
+ * @param link_trbs flag to indicate whether to link the trbs or NOT
+ * @return none
+ */
+static void xhci_link_segments(struct xhci_segment *prev,
+ struct xhci_segment *next, bool link_trbs)
+{
+ u32 val;
+ u64 val_64 = 0;
+
+ if (!prev || !next)
+ return;
+ prev->next = next;
+ if (link_trbs) {
+ val_64 = (uintptr_t)next->trbs;
+ prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = val_64;
+
+ /*
+ * Set the last TRB in the segment to
+ * have a TRB type ID of Link TRB
+ */
+ val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control);
+ val &= ~TRB_TYPE_BITMASK;
+ val |= (TRB_LINK << TRB_TYPE_SHIFT);
+
+ prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val);
+ }
+}
+
+/**
+ * Initialises the Ring's enqueue,dequeue,enq_seg pointers
+ *
+ * @param ring pointer to the RING to be intialised
+ * @return none
+ */
+static void xhci_initialize_ring_info(struct xhci_ring *ring)
+{
+ /*
+ * The ring is empty, so the enqueue pointer == dequeue pointer
+ */
+ ring->enqueue = ring->first_seg->trbs;
+ ring->enq_seg = ring->first_seg;
+ ring->dequeue = ring->enqueue;
+ ring->deq_seg = ring->first_seg;
+
+ /*
+ * The ring is initialized to 0. The producer must write 1 to the
+ * cycle bit to handover ownership of the TRB, so PCS = 1.
+ * The consumer must compare CCS to the cycle bit to
+ * check ownership, so CCS = 1.
+ */
+ ring->cycle_state = 1;
+}
+
+/**
+ * Allocates a generic ring segment from the ring pool, sets the dma address,
+ * initializes the segment to zero, and sets the private next pointer to NULL.
+ * Section 4.11.1.1:
+ * "All components of all Command and Transfer TRBs shall be initialized to '0'"
+ *
+ * @param none
+ * @return pointer to the newly allocated SEGMENT
+ */
+static struct xhci_segment *xhci_segment_alloc(void)
+{
+ struct xhci_segment *seg;
+
+ seg = (struct xhci_segment *)malloc(sizeof(struct xhci_segment));
+ BUG_ON(!seg);
+
+ seg->trbs = (union xhci_trb *)xhci_malloc(SEGMENT_SIZE);
+
+ seg->next = NULL;
+
+ return seg;
+}
+
+/**
+ * Create a new ring with zero or more segments.
+ * TODO: current code only uses one-time-allocated single-segment rings
+ * of 1KB anyway, so we might as well get rid of all the segment and
+ * linking code (and maybe increase the size a bit, e.g. 4KB).
+ *
+ *
+ * Link each segment together into a ring.
+ * Set the end flag and the cycle toggle bit on the last segment.
+ * See section 4.9.2 and figures 15 and 16 of XHCI spec rev1.0.
+ *
+ * @param num_segs number of segments in the ring
+ * @param link_trbs flag to indicate whether to link the trbs or NOT
+ * @return pointer to the newly created RING
+ */
+struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs)
+{
+ struct xhci_ring *ring;
+ struct xhci_segment *prev;
+
+ ring = (struct xhci_ring *)malloc(sizeof(struct xhci_ring));
+ BUG_ON(!ring);
+
+ if (num_segs == 0)
+ return ring;
+
+ ring->first_seg = xhci_segment_alloc();
+ BUG_ON(!ring->first_seg);
+
+ num_segs--;
+
+ prev = ring->first_seg;
+ while (num_segs > 0) {
+ struct xhci_segment *next;
+
+ next = xhci_segment_alloc();
+ BUG_ON(!next);
+
+ xhci_link_segments(prev, next, link_trbs);
+
+ prev = next;
+ num_segs--;
+ }
+ xhci_link_segments(prev, ring->first_seg, link_trbs);
+ if (link_trbs) {
+ /* See section 4.9.2.1 and 6.4.4.1 */
+ prev->trbs[TRBS_PER_SEGMENT-1].link.control |=
+ cpu_to_le32(LINK_TOGGLE);
+ }
+ xhci_initialize_ring_info(ring);
+
+ return ring;
+}
+
+/**
+ * Allocates the Container context
+ *
+ * @param ctrl Host controller data structure
+ * @param type type of XHCI Container Context
+ * @return NULL if failed else pointer to the context on success
+ */
+static struct xhci_container_ctx
+ *xhci_alloc_container_ctx(struct xhci_ctrl *ctrl, int type)
+{
+ struct xhci_container_ctx *ctx;
+
+ ctx = (struct xhci_container_ctx *)
+ malloc(sizeof(struct xhci_container_ctx));
+ BUG_ON(!ctx);
+
+ BUG_ON((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT));
+ ctx->type = type;
+ ctx->size = (MAX_EP_CTX_NUM + 1) *
+ CTX_SIZE(readl(&ctrl->hccr->cr_hccparams));
+ if (type == XHCI_CTX_TYPE_INPUT)
+ ctx->size += CTX_SIZE(readl(&ctrl->hccr->cr_hccparams));
+
+ ctx->bytes = (u8 *)xhci_malloc(ctx->size);
+
+ return ctx;
+}
+
+/**
+ * Allocating virtual device
+ *
+ * @param udev pointer to USB deivce structure
+ * @return 0 on success else -1 on failure
+ */
+int xhci_alloc_virt_device(struct usb_device *udev)
+{
+ u64 byte_64 = 0;
+ unsigned int slot_id = udev->slot_id;
+ struct xhci_virt_device *virt_dev;
+ struct xhci_ctrl *ctrl = udev->controller;
+
+ /* Slot ID 0 is reserved */
+ if (ctrl->devs[slot_id]) {
+ printf("Virt dev for slot[%d] already allocated\n", slot_id);
+ return -EEXIST;
+ }
+
+ ctrl->devs[slot_id] = (struct xhci_virt_device *)
+ malloc(sizeof(struct xhci_virt_device));
+
+ if (!ctrl->devs[slot_id]) {
+ puts("Failed to allocate virtual device\n");
+ return -ENOMEM;
+ }
+
+ memset(ctrl->devs[slot_id], 0, sizeof(struct xhci_virt_device));
+ virt_dev = ctrl->devs[slot_id];
+
+ /* Allocate the (output) device context that will be used in the HC. */
+ virt_dev->out_ctx = xhci_alloc_container_ctx(ctrl,
+ XHCI_CTX_TYPE_DEVICE);
+ if (!virt_dev->out_ctx) {
+ puts("Failed to allocate out context for virt dev\n");
+ return -ENOMEM;
+ }
+
+ /* Allocate the (input) device context for address device command */
+ virt_dev->in_ctx = xhci_alloc_container_ctx(ctrl,
+ XHCI_CTX_TYPE_INPUT);
+ if (!virt_dev->in_ctx) {
+ puts("Failed to allocate in context for virt dev\n");
+ return -ENOMEM;
+ }
+
+ /* Allocate endpoint 0 ring */
+ virt_dev->eps[0].ring = xhci_ring_alloc(1, true);
+
+ byte_64 = (uintptr_t)(virt_dev->out_ctx->bytes);
+
+ /* Point to output device context in dcbaa. */
+ ctrl->dcbaa->dev_context_ptrs[slot_id] = byte_64;
+
+ xhci_flush_cache((uint32_t)&ctrl->dcbaa->dev_context_ptrs[slot_id],
+ sizeof(__le64));
+ return 0;
+}
+
+/**
+ * Allocates the necessary data structures
+ * for XHCI host controller
+ *
+ * @param ctrl Host controller data structure
+ * @param hccr pointer to HOST Controller Control Registers
+ * @param hcor pointer to HOST Controller Operational Registers
+ * @return 0 if successful else -1 on failure
+ */
+int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,
+ struct xhci_hcor *hcor)
+{
+ uint64_t val_64;
+ uint64_t trb_64;
+ uint32_t val;
+ unsigned long deq;
+ int i;
+ struct xhci_segment *seg;
+
+ /* DCBAA initialization */
+ ctrl->dcbaa = (struct xhci_device_context_array *)
+ xhci_malloc(sizeof(struct xhci_device_context_array));
+ if (ctrl->dcbaa == NULL) {
+ puts("unable to allocate DCBA\n");
+ return -ENOMEM;
+ }
+
+ val_64 = (uintptr_t)ctrl->dcbaa;
+ /* Set the pointer in DCBAA register */
+ xhci_writeq(&hcor->or_dcbaap, val_64);
+
+ /* Command ring control pointer register initialization */
+ ctrl->cmd_ring = xhci_ring_alloc(1, true);
+
+ /* Set the address in the Command Ring Control register */
+ trb_64 = (uintptr_t)ctrl->cmd_ring->first_seg->trbs;
+ val_64 = xhci_readq(&hcor->or_crcr);
+ val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
+ (trb_64 & (u64) ~CMD_RING_RSVD_BITS) |
+ ctrl->cmd_ring->cycle_state;
+ xhci_writeq(&hcor->or_crcr, val_64);
+
+ /* write the address of db register */
+ val = xhci_readl(&hccr->cr_dboff);
+ val &= DBOFF_MASK;
+ ctrl->dba = (struct xhci_doorbell_array *)((char *)hccr + val);
+
+ /* write the address of runtime register */
+ val = xhci_readl(&hccr->cr_rtsoff);
+ val &= RTSOFF_MASK;
+ ctrl->run_regs = (struct xhci_run_regs *)((char *)hccr + val);
+
+ /* writting the address of ir_set structure */
+ ctrl->ir_set = &ctrl->run_regs->ir_set[0];
+
+ /* Event ring does not maintain link TRB */
+ ctrl->event_ring = xhci_ring_alloc(ERST_NUM_SEGS, false);
+ ctrl->erst.entries = (struct xhci_erst_entry *)
+ xhci_malloc(sizeof(struct xhci_erst_entry) * ERST_NUM_SEGS);
+
+ ctrl->erst.num_entries = ERST_NUM_SEGS;
+
+ for (val = 0, seg = ctrl->event_ring->first_seg;
+ val < ERST_NUM_SEGS;
+ val++) {
+ trb_64 = 0;
+ trb_64 = (uintptr_t)seg->trbs;
+ struct xhci_erst_entry *entry = &ctrl->erst.entries[val];
+ xhci_writeq(&entry->seg_addr, trb_64);
+ entry->seg_size = cpu_to_le32(TRBS_PER_SEGMENT);
+ entry->rsvd = 0;
+ seg = seg->next;
+ }
+ xhci_flush_cache((uint32_t)ctrl->erst.entries,
+ ERST_NUM_SEGS * sizeof(struct xhci_erst_entry));
+
+ deq = (unsigned long)ctrl->event_ring->dequeue;
+
+ /* Update HC event ring dequeue pointer */
+ xhci_writeq(&ctrl->ir_set->erst_dequeue,
+ (u64)deq & (u64)~ERST_PTR_MASK);
+
+ /* set ERST count with the number of entries in the segment table */
+ val = xhci_readl(&ctrl->ir_set->erst_size);
+ val &= ERST_SIZE_MASK;
+ val |= ERST_NUM_SEGS;
+ xhci_writel(&ctrl->ir_set->erst_size, val);
+
+ /* this is the event ring segment table pointer */
+ val_64 = xhci_readq(&ctrl->ir_set->erst_base);
+ val_64 &= ERST_PTR_MASK;
+ val_64 |= ((u32)(ctrl->erst.entries) & ~ERST_PTR_MASK);
+
+ xhci_writeq(&ctrl->ir_set->erst_base, val_64);
+
+ /* initializing the virtual devices to NULL */
+ for (i = 0; i < MAX_HC_SLOTS; ++i)
+ ctrl->devs[i] = NULL;
+
+ /*
+ * Just Zero'ing this register completely,
+ * or some spurious Device Notification Events
+ * might screw things here.
+ */
+ xhci_writel(&hcor->or_dnctrl, 0x0);
+
+ return 0;
+}
+
+/**
+ * Give the input control context for the passed container context
+ *
+ * @param ctx pointer to the context
+ * @return pointer to the Input control context data
+ */
+struct xhci_input_control_ctx
+ *xhci_get_input_control_ctx(struct xhci_container_ctx *ctx)
+{
+ BUG_ON(ctx->type != XHCI_CTX_TYPE_INPUT);
+ return (struct xhci_input_control_ctx *)ctx->bytes;
+}
+
+/**
+ * Give the slot context for the passed container context
+ *
+ * @param ctrl Host controller data structure
+ * @param ctx pointer to the context
+ * @return pointer to the slot control context data
+ */
+struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_ctrl *ctrl,
+ struct xhci_container_ctx *ctx)
+{
+ if (ctx->type == XHCI_CTX_TYPE_DEVICE)
+ return (struct xhci_slot_ctx *)ctx->bytes;
+
+ return (struct xhci_slot_ctx *)
+ (ctx->bytes + CTX_SIZE(readl(&ctrl->hccr->cr_hccparams)));
+}
+
+/**
+ * Gets the EP context from based on the ep_index
+ *
+ * @param ctrl Host controller data structure
+ * @param ctx context container
+ * @param ep_index index of the endpoint
+ * @return pointer to the End point context
+ */
+struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_ctrl *ctrl,
+ struct xhci_container_ctx *ctx,
+ unsigned int ep_index)
+{
+ /* increment ep index by offset of start of ep ctx array */
+ ep_index++;
+ if (ctx->type == XHCI_CTX_TYPE_INPUT)
+ ep_index++;
+
+ return (struct xhci_ep_ctx *)
+ (ctx->bytes +
+ (ep_index * CTX_SIZE(readl(&ctrl->hccr->cr_hccparams))));
+}
+
+/**
+ * Copy output xhci_ep_ctx to the input xhci_ep_ctx copy.
+ * Useful when you want to change one particular aspect of the endpoint
+ * and then issue a configure endpoint command.
+ *
+ * @param ctrl Host controller data structure
+ * @param in_ctx contains the input context
+ * @param out_ctx contains the input context
+ * @param ep_index index of the end point
+ * @return none
+ */
+void xhci_endpoint_copy(struct xhci_ctrl *ctrl,
+ struct xhci_container_ctx *in_ctx,
+ struct xhci_container_ctx *out_ctx,
+ unsigned int ep_index)
+{
+ struct xhci_ep_ctx *out_ep_ctx;
+ struct xhci_ep_ctx *in_ep_ctx;
+
+ out_ep_ctx = xhci_get_ep_ctx(ctrl, out_ctx, ep_index);
+ in_ep_ctx = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
+
+ in_ep_ctx->ep_info = out_ep_ctx->ep_info;
+ in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2;
+ in_ep_ctx->deq = out_ep_ctx->deq;
+ in_ep_ctx->tx_info = out_ep_ctx->tx_info;
+}
+
+/**
+ * Copy output xhci_slot_ctx to the input xhci_slot_ctx.
+ * Useful when you want to change one particular aspect of the endpoint
+ * and then issue a configure endpoint command.
+ * Only the context entries field matters, but
+ * we'll copy the whole thing anyway.
+ *
+ * @param ctrl Host controller data structure
+ * @param in_ctx contains the inpout context
+ * @param out_ctx contains the inpout context
+ * @return none
+ */
+void xhci_slot_copy(struct xhci_ctrl *ctrl, struct xhci_container_ctx *in_ctx,
+ struct xhci_container_ctx *out_ctx)
+{
+ struct xhci_slot_ctx *in_slot_ctx;
+ struct xhci_slot_ctx *out_slot_ctx;
+
+ in_slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
+ out_slot_ctx = xhci_get_slot_ctx(ctrl, out_ctx);
+
+ in_slot_ctx->dev_info = out_slot_ctx->dev_info;
+ in_slot_ctx->dev_info2 = out_slot_ctx->dev_info2;
+ in_slot_ctx->tt_info = out_slot_ctx->tt_info;
+ in_slot_ctx->dev_state = out_slot_ctx->dev_state;
+}
+
+/**
+ * Setup an xHCI virtual device for a Set Address command
+ *
+ * @param udev pointer to the Device Data Structure
+ * @return returns negative value on failure else 0 on success
+ */
+void xhci_setup_addressable_virt_dev(struct usb_device *udev)
+{
+ struct usb_device *hop = udev;
+ struct xhci_virt_device *virt_dev;
+ struct xhci_ep_ctx *ep0_ctx;
+ struct xhci_slot_ctx *slot_ctx;
+ u32 port_num = 0;
+ u64 trb_64 = 0;
+ struct xhci_ctrl *ctrl = udev->controller;
+
+ virt_dev = ctrl->devs[udev->slot_id];
+
+ BUG_ON(!virt_dev);
+
+ /* Extract the EP0 and Slot Ctrl */
+ ep0_ctx = xhci_get_ep_ctx(ctrl, virt_dev->in_ctx, 0);
+ slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->in_ctx);
+
+ /* Only the control endpoint is valid - one endpoint context */
+ slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | 0);
+
+ switch (udev->speed) {
+ case USB_SPEED_SUPER:
+ slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS);
+ break;
+ case USB_SPEED_HIGH:
+ slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_HS);
+ break;
+ case USB_SPEED_FULL:
+ slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_FS);
+ break;
+ case USB_SPEED_LOW:
+ slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_LS);
+ break;
+ default:
+ /* Speed was set earlier, this shouldn't happen. */
+ BUG();
+ }
+
+ /* Extract the root hub port number */
+ if (hop->parent)
+ while (hop->parent->parent)
+ hop = hop->parent;
+ port_num = hop->portnr;
+ debug("port_num = %d\n", port_num);
+
+ slot_ctx->dev_info2 |=
+ cpu_to_le32(((port_num & ROOT_HUB_PORT_MASK) <<
+ ROOT_HUB_PORT_SHIFT));
+
+ /* Step 4 - ring already allocated */
+ /* Step 5 */
+ ep0_ctx->ep_info2 = cpu_to_le32(CTRL_EP << EP_TYPE_SHIFT);
+ debug("SPEED = %d\n", udev->speed);
+
+ switch (udev->speed) {
+ case USB_SPEED_SUPER:
+ ep0_ctx->ep_info2 |= cpu_to_le32(((512 & MAX_PACKET_MASK) <<
+ MAX_PACKET_SHIFT));
+ debug("Setting Packet size = 512bytes\n");
+ break;
+ case USB_SPEED_HIGH:
+ /* USB core guesses at a 64-byte max packet first for FS devices */
+ case USB_SPEED_FULL:
+ ep0_ctx->ep_info2 |= cpu_to_le32(((64 & MAX_PACKET_MASK) <<
+ MAX_PACKET_SHIFT));
+ debug("Setting Packet size = 64bytes\n");
+ break;
+ case USB_SPEED_LOW:
+ ep0_ctx->ep_info2 |= cpu_to_le32(((8 & MAX_PACKET_MASK) <<
+ MAX_PACKET_SHIFT));
+ debug("Setting Packet size = 8bytes\n");
+ break;
+ default:
+ /* New speed? */
+ BUG();
+ }
+
+ /* EP 0 can handle "burst" sizes of 1, so Max Burst Size field is 0 */
+ ep0_ctx->ep_info2 |=
+ cpu_to_le32(((0 & MAX_BURST_MASK) << MAX_BURST_SHIFT) |
+ ((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT));
+
+ trb_64 = (uintptr_t)virt_dev->eps[0].ring->first_seg->trbs;
+ ep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state);
+
+ /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
+
+ xhci_flush_cache((uint32_t)ep0_ctx, sizeof(struct xhci_ep_ctx));
+ xhci_flush_cache((uint32_t)slot_ctx, sizeof(struct xhci_slot_ctx));
+}
--- /dev/null
+/*
+ * OMAP USB HOST xHCI Controller
+ *
+ * (C) Copyright 2013
+ * Texas Instruments, <www.ti.com>
+ *
+ * Author: Dan Murphy <dmurphy@ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm-generic/errno.h>
+#include <asm/omap_common.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/sys_proto.h>
+
+#include <linux/compat.h>
+#include <linux/usb/dwc3.h>
+#include <linux/usb/xhci-omap.h>
+
+#include "xhci.h"
+
+/* Declare global data pointer */
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct omap_xhci omap;
+
+inline int __board_usb_init(int index, enum usb_init_type init)
+{
+ return 0;
+}
+int board_usb_init(int index, enum usb_init_type init)
+ __attribute__((weak, alias("__board_usb_init")));
+
+static void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
+{
+ clrsetbits_le32(&dwc3_reg->g_ctl,
+ DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG),
+ DWC3_GCTL_PRTCAPDIR(mode));
+}
+
+static void dwc3_core_soft_reset(struct dwc3 *dwc3_reg)
+{
+ /* Before Resetting PHY, put Core in Reset */
+ setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET);
+
+ omap_reset_usb_phy(dwc3_reg);
+
+ /* After PHYs are stable we can take Core out of reset state */
+ clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET);
+}
+
+static int dwc3_core_init(struct dwc3 *dwc3_reg)
+{
+ u32 reg;
+ u32 revision;
+ unsigned int dwc3_hwparams1;
+
+ revision = readl(&dwc3_reg->g_snpsid);
+ /* This should read as U3 followed by revision number */
+ if ((revision & DWC3_GSNPSID_MASK) != 0x55330000) {
+ puts("this is not a DesignWare USB3 DRD Core\n");
+ return -1;
+ }
+
+ dwc3_core_soft_reset(dwc3_reg);
+
+ dwc3_hwparams1 = readl(&dwc3_reg->g_hwparams1);
+
+ reg = readl(&dwc3_reg->g_ctl);
+ reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
+ reg &= ~DWC3_GCTL_DISSCRAMBLE;
+ switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc3_hwparams1)) {
+ case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
+ reg &= ~DWC3_GCTL_DSBLCLKGTNG;
+ break;
+ default:
+ debug("No power optimization available\n");
+ }
+
+ /*
+ * WORKAROUND: DWC3 revisions <1.90a have a bug
+ * where the device can fail to connect at SuperSpeed
+ * and falls back to high-speed mode which causes
+ * the device to enter a Connect/Disconnect loop
+ */
+ if ((revision & DWC3_REVISION_MASK) < 0x190a)
+ reg |= DWC3_GCTL_U2RSTECN;
+
+ writel(reg, &dwc3_reg->g_ctl);
+
+ return 0;
+}
+
+static int omap_xhci_core_init(struct omap_xhci *omap)
+{
+ int ret = 0;
+
+ omap_enable_phy(omap);
+
+ ret = dwc3_core_init(omap->dwc3_reg);
+ if (ret) {
+ debug("%s:failed to initialize core\n", __func__);
+ return ret;
+ }
+
+ /* We are hard-coding DWC3 core to Host Mode */
+ dwc3_set_mode(omap->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
+
+ return ret;
+}
+
+static void omap_xhci_core_exit(struct omap_xhci *omap)
+{
+ usb_phy_power(0);
+}
+
+int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
+{
+ struct omap_xhci *ctx = &omap;
+ int ret = 0;
+
+ ctx->hcd = (struct xhci_hccr *)OMAP_XHCI_BASE;
+ ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
+ ctx->usb3_phy = (struct omap_usb3_phy *)OMAP_OCP1_SCP_BASE;
+ ctx->otg_wrapper = (struct omap_dwc_wrapper *)OMAP_OTG_WRAPPER_BASE;
+
+ ret = board_usb_init(index, USB_INIT_HOST);
+ if (ret != 0) {
+ puts("Failed to initialize board for USB\n");
+ return ret;
+ }
+
+ ret = omap_xhci_core_init(ctx);
+ if (ret < 0) {
+ puts("Failed to initialize xhci\n");
+ return ret;
+ }
+
+ *hccr = (struct xhci_hccr *)(OMAP_XHCI_BASE);
+ *hcor = (struct xhci_hcor *)((uint32_t) *hccr
+ + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
+
+ debug("omap-xhci: init hccr %x and hcor %x hc_length %d\n",
+ (uint32_t)*hccr, (uint32_t)*hcor,
+ (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
+
+ return ret;
+}
+
+void xhci_hcd_stop(int index)
+{
+ struct omap_xhci *ctx = &omap;
+
+ omap_xhci_core_exit(ctx);
+}
--- /dev/null
+/*
+ * USB HOST XHCI Controller stack
+ *
+ * Based on xHCI host controller driver in linux-kernel
+ * by Sarah Sharp.
+ *
+ * Copyright (C) 2008 Intel Corp.
+ * Author: Sarah Sharp
+ *
+ * Copyright (C) 2013 Samsung Electronics Co.Ltd
+ * Authors: Vivek Gautam <gautam.vivek@samsung.com>
+ * Vikas Sajjan <vikas.sajjan@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/byteorder.h>
+#include <usb.h>
+#include <asm/unaligned.h>
+#include <asm-generic/errno.h>
+
+#include "xhci.h"
+
+/**
+ * Is this TRB a link TRB or was the last TRB the last TRB in this event ring
+ * segment? I.e. would the updated event TRB pointer step off the end of the
+ * event seg ?
+ *
+ * @param ctrl Host controller data structure
+ * @param ring pointer to the ring
+ * @param seg poniter to the segment to which TRB belongs
+ * @param trb poniter to the ring trb
+ * @return 1 if this TRB a link TRB else 0
+ */
+static int last_trb(struct xhci_ctrl *ctrl, struct xhci_ring *ring,
+ struct xhci_segment *seg, union xhci_trb *trb)
+{
+ if (ring == ctrl->event_ring)
+ return trb == &seg->trbs[TRBS_PER_SEGMENT];
+ else
+ return TRB_TYPE_LINK_LE32(trb->link.control);
+}
+
+/**
+ * Does this link TRB point to the first segment in a ring,
+ * or was the previous TRB the last TRB on the last segment in the ERST?
+ *
+ * @param ctrl Host controller data structure
+ * @param ring pointer to the ring
+ * @param seg poniter to the segment to which TRB belongs
+ * @param trb poniter to the ring trb
+ * @return 1 if this TRB is the last TRB on the last segment else 0
+ */
+static bool last_trb_on_last_seg(struct xhci_ctrl *ctrl,
+ struct xhci_ring *ring,
+ struct xhci_segment *seg,
+ union xhci_trb *trb)
+{
+ if (ring == ctrl->event_ring)
+ return ((trb == &seg->trbs[TRBS_PER_SEGMENT]) &&
+ (seg->next == ring->first_seg));
+ else
+ return le32_to_cpu(trb->link.control) & LINK_TOGGLE;
+}
+
+/**
+ * See Cycle bit rules. SW is the consumer for the event ring only.
+ * Don't make a ring full of link TRBs. That would be dumb and this would loop.
+ *
+ * If we've just enqueued a TRB that is in the middle of a TD (meaning the
+ * chain bit is set), then set the chain bit in all the following link TRBs.
+ * If we've enqueued the last TRB in a TD, make sure the following link TRBs
+ * have their chain bit cleared (so that each Link TRB is a separate TD).
+ *
+ * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
+ * set, but other sections talk about dealing with the chain bit set. This was
+ * fixed in the 0.96 specification errata, but we have to assume that all 0.95
+ * xHCI hardware can't handle the chain bit being cleared on a link TRB.
+ *
+ * @param ctrl Host controller data structure
+ * @param ring pointer to the ring
+ * @param more_trbs_coming flag to indicate whether more trbs
+ * are expected or NOT.
+ * Will you enqueue more TRBs before calling
+ * prepare_ring()?
+ * @return none
+ */
+static void inc_enq(struct xhci_ctrl *ctrl, struct xhci_ring *ring,
+ bool more_trbs_coming)
+{
+ u32 chain;
+ union xhci_trb *next;
+
+ chain = le32_to_cpu(ring->enqueue->generic.field[3]) & TRB_CHAIN;
+ next = ++(ring->enqueue);
+
+ /*
+ * Update the dequeue pointer further if that was a link TRB or we're at
+ * the end of an event ring segment (which doesn't have link TRBS)
+ */
+ while (last_trb(ctrl, ring, ring->enq_seg, next)) {
+ if (ring != ctrl->event_ring) {
+ /*
+ * If the caller doesn't plan on enqueueing more
+ * TDs before ringing the doorbell, then we
+ * don't want to give the link TRB to the
+ * hardware just yet. We'll give the link TRB
+ * back in prepare_ring() just before we enqueue
+ * the TD at the top of the ring.
+ */
+ if (!chain && !more_trbs_coming)
+ break;
+
+ /*
+ * If we're not dealing with 0.95 hardware or
+ * isoc rings on AMD 0.96 host,
+ * carry over the chain bit of the previous TRB
+ * (which may mean the chain bit is cleared).
+ */
+ next->link.control &= cpu_to_le32(~TRB_CHAIN);
+ next->link.control |= cpu_to_le32(chain);
+
+ next->link.control ^= cpu_to_le32(TRB_CYCLE);
+ xhci_flush_cache((uint32_t)next,
+ sizeof(union xhci_trb));
+ }
+ /* Toggle the cycle bit after the last ring segment. */
+ if (last_trb_on_last_seg(ctrl, ring,
+ ring->enq_seg, next))
+ ring->cycle_state = (ring->cycle_state ? 0 : 1);
+
+ ring->enq_seg = ring->enq_seg->next;
+ ring->enqueue = ring->enq_seg->trbs;
+ next = ring->enqueue;
+ }
+}
+
+/**
+ * See Cycle bit rules. SW is the consumer for the event ring only.
+ * Don't make a ring full of link TRBs. That would be dumb and this would loop.
+ *
+ * @param ctrl Host controller data structure
+ * @param ring Ring whose Dequeue TRB pointer needs to be incremented.
+ * return none
+ */
+static void inc_deq(struct xhci_ctrl *ctrl, struct xhci_ring *ring)
+{
+ do {
+ /*
+ * Update the dequeue pointer further if that was a link TRB or
+ * we're at the end of an event ring segment (which doesn't have
+ * link TRBS)
+ */
+ if (last_trb(ctrl, ring, ring->deq_seg, ring->dequeue)) {
+ if (ring == ctrl->event_ring &&
+ last_trb_on_last_seg(ctrl, ring,
+ ring->deq_seg, ring->dequeue)) {
+ ring->cycle_state = (ring->cycle_state ? 0 : 1);
+ }
+ ring->deq_seg = ring->deq_seg->next;
+ ring->dequeue = ring->deq_seg->trbs;
+ } else {
+ ring->dequeue++;
+ }
+ } while (last_trb(ctrl, ring, ring->deq_seg, ring->dequeue));
+}
+
+/**
+ * Generic function for queueing a TRB on a ring.
+ * The caller must have checked to make sure there's room on the ring.
+ *
+ * @param more_trbs_coming: Will you enqueue more TRBs before calling
+ * prepare_ring()?
+ * @param ctrl Host controller data structure
+ * @param ring pointer to the ring
+ * @param more_trbs_coming flag to indicate whether more trbs
+ * @param trb_fields pointer to trb field array containing TRB contents
+ * @return pointer to the enqueued trb
+ */
+static struct xhci_generic_trb *queue_trb(struct xhci_ctrl *ctrl,
+ struct xhci_ring *ring,
+ bool more_trbs_coming,
+ unsigned int *trb_fields)
+{
+ struct xhci_generic_trb *trb;
+ int i;
+
+ trb = &ring->enqueue->generic;
+
+ for (i = 0; i < 4; i++)
+ trb->field[i] = cpu_to_le32(trb_fields[i]);
+
+ xhci_flush_cache((uint32_t)trb, sizeof(struct xhci_generic_trb));
+
+ inc_enq(ctrl, ring, more_trbs_coming);
+
+ return trb;
+}
+
+/**
+ * Does various checks on the endpoint ring, and makes it ready
+ * to queue num_trbs.
+ *
+ * @param ctrl Host controller data structure
+ * @param ep_ring pointer to the EP Transfer Ring
+ * @param ep_state State of the End Point
+ * @return error code in case of invalid ep_state, 0 on success
+ */
+static int prepare_ring(struct xhci_ctrl *ctrl, struct xhci_ring *ep_ring,
+ u32 ep_state)
+{
+ union xhci_trb *next = ep_ring->enqueue;
+
+ /* Make sure the endpoint has been added to xHC schedule */
+ switch (ep_state) {
+ case EP_STATE_DISABLED:
+ /*
+ * USB core changed config/interfaces without notifying us,
+ * or hardware is reporting the wrong state.
+ */
+ puts("WARN urb submitted to disabled ep\n");
+ return -ENOENT;
+ case EP_STATE_ERROR:
+ puts("WARN waiting for error on ep to be cleared\n");
+ return -EINVAL;
+ case EP_STATE_HALTED:
+ puts("WARN halted endpoint, queueing URB anyway.\n");
+ case EP_STATE_STOPPED:
+ case EP_STATE_RUNNING:
+ debug("EP STATE RUNNING.\n");
+ break;
+ default:
+ puts("ERROR unknown endpoint state for ep\n");
+ return -EINVAL;
+ }
+
+ while (last_trb(ctrl, ep_ring, ep_ring->enq_seg, next)) {
+ /*
+ * If we're not dealing with 0.95 hardware or isoc rings
+ * on AMD 0.96 host, clear the chain bit.
+ */
+ next->link.control &= cpu_to_le32(~TRB_CHAIN);
+
+ next->link.control ^= cpu_to_le32(TRB_CYCLE);
+
+ xhci_flush_cache((uint32_t)next, sizeof(union xhci_trb));
+
+ /* Toggle the cycle bit after the last ring segment. */
+ if (last_trb_on_last_seg(ctrl, ep_ring,
+ ep_ring->enq_seg, next))
+ ep_ring->cycle_state = (ep_ring->cycle_state ? 0 : 1);
+ ep_ring->enq_seg = ep_ring->enq_seg->next;
+ ep_ring->enqueue = ep_ring->enq_seg->trbs;
+ next = ep_ring->enqueue;
+ }
+
+ return 0;
+}
+
+/**
+ * Generic function for queueing a command TRB on the command ring.
+ * Check to make sure there's room on the command ring for one command TRB.
+ *
+ * @param ctrl Host controller data structure
+ * @param ptr Pointer address to write in the first two fields (opt.)
+ * @param slot_id Slot ID to encode in the flags field (opt.)
+ * @param ep_index Endpoint index to encode in the flags field (opt.)
+ * @param cmd Command type to enqueue
+ * @return none
+ */
+void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr, u32 slot_id,
+ u32 ep_index, trb_type cmd)
+{
+ u32 fields[4];
+ u64 val_64 = (uintptr_t)ptr;
+
+ BUG_ON(prepare_ring(ctrl, ctrl->cmd_ring, EP_STATE_RUNNING));
+
+ fields[0] = lower_32_bits(val_64);
+ fields[1] = upper_32_bits(val_64);
+ fields[2] = 0;
+ fields[3] = TRB_TYPE(cmd) | EP_ID_FOR_TRB(ep_index) |
+ SLOT_ID_FOR_TRB(slot_id) | ctrl->cmd_ring->cycle_state;
+
+ queue_trb(ctrl, ctrl->cmd_ring, false, fields);
+
+ /* Ring the command ring doorbell */
+ xhci_writel(&ctrl->dba->doorbell[0], DB_VALUE_HOST);
+}
+
+/**
+ * The TD size is the number of bytes remaining in the TD (including this TRB),
+ * right shifted by 10.
+ * It must fit in bits 21:17, so it can't be bigger than 31.
+ *
+ * @param remainder remaining packets to be sent
+ * @return remainder if remainder is less than max else max
+ */
+static u32 xhci_td_remainder(unsigned int remainder)
+{
+ u32 max = (1 << (21 - 17 + 1)) - 1;
+
+ if ((remainder >> 10) >= max)
+ return max << 17;
+ else
+ return (remainder >> 10) << 17;
+}
+
+/**
+ * Finds out the remanining packets to be sent
+ *
+ * @param running_total total size sent so far
+ * @param trb_buff_len length of the TRB Buffer
+ * @param total_packet_count total packet count
+ * @param maxpacketsize max packet size of current pipe
+ * @param num_trbs_left number of TRBs left to be processed
+ * @return 0 if running_total or trb_buff_len is 0, else remainder
+ */
+static u32 xhci_v1_0_td_remainder(int running_total,
+ int trb_buff_len,
+ unsigned int total_packet_count,
+ int maxpacketsize,
+ unsigned int num_trbs_left)
+{
+ int packets_transferred;
+
+ /* One TRB with a zero-length data packet. */
+ if (num_trbs_left == 0 || (running_total == 0 && trb_buff_len == 0))
+ return 0;
+
+ /*
+ * All the TRB queueing functions don't count the current TRB in
+ * running_total.
+ */
+ packets_transferred = (running_total + trb_buff_len) / maxpacketsize;
+
+ if ((total_packet_count - packets_transferred) > 31)
+ return 31 << 17;
+ return (total_packet_count - packets_transferred) << 17;
+}
+
+/**
+ * Ring the doorbell of the End Point
+ *
+ * @param udev pointer to the USB device structure
+ * @param ep_index index of the endpoint
+ * @param start_cycle cycle flag of the first TRB
+ * @param start_trb pionter to the first TRB
+ * @return none
+ */
+static void giveback_first_trb(struct usb_device *udev, int ep_index,
+ int start_cycle,
+ struct xhci_generic_trb *start_trb)
+{
+ struct xhci_ctrl *ctrl = udev->controller;
+
+ /*
+ * Pass all the TRBs to the hardware at once and make sure this write
+ * isn't reordered.
+ */
+ if (start_cycle)
+ start_trb->field[3] |= cpu_to_le32(start_cycle);
+ else
+ start_trb->field[3] &= cpu_to_le32(~TRB_CYCLE);
+
+ xhci_flush_cache((uint32_t)start_trb, sizeof(struct xhci_generic_trb));
+
+ /* Ringing EP doorbell here */
+ xhci_writel(&ctrl->dba->doorbell[udev->slot_id],
+ DB_VALUE(ep_index, 0));
+
+ return;
+}
+
+/**** POLLING mechanism for XHCI ****/
+
+/**
+ * Finalizes a handled event TRB by advancing our dequeue pointer and giving
+ * the TRB back to the hardware for recycling. Must call this exactly once at
+ * the end of each event handler, and not touch the TRB again afterwards.
+ *
+ * @param ctrl Host controller data structure
+ * @return none
+ */
+void xhci_acknowledge_event(struct xhci_ctrl *ctrl)
+{
+ /* Advance our dequeue pointer to the next event */
+ inc_deq(ctrl, ctrl->event_ring);
+
+ /* Inform the hardware */
+ xhci_writeq(&ctrl->ir_set->erst_dequeue,
+ (uintptr_t)ctrl->event_ring->dequeue | ERST_EHB);
+}
+
+/**
+ * Checks if there is a new event to handle on the event ring.
+ *
+ * @param ctrl Host controller data structure
+ * @return 0 if failure else 1 on success
+ */
+static int event_ready(struct xhci_ctrl *ctrl)
+{
+ union xhci_trb *event;
+
+ xhci_inval_cache((uint32_t)ctrl->event_ring->dequeue,
+ sizeof(union xhci_trb));
+
+ event = ctrl->event_ring->dequeue;
+
+ /* Does the HC or OS own the TRB? */
+ if ((le32_to_cpu(event->event_cmd.flags) & TRB_CYCLE) !=
+ ctrl->event_ring->cycle_state)
+ return 0;
+
+ return 1;
+}
+
+/**
+ * Waits for a specific type of event and returns it. Discards unexpected
+ * events. Caller *must* call xhci_acknowledge_event() after it is finished
+ * processing the event, and must not access the returned pointer afterwards.
+ *
+ * @param ctrl Host controller data structure
+ * @param expected TRB type expected from Event TRB
+ * @return pointer to event trb
+ */
+union xhci_trb *xhci_wait_for_event(struct xhci_ctrl *ctrl, trb_type expected)
+{
+ trb_type type;
+ unsigned long ts = get_timer(0);
+
+ do {
+ union xhci_trb *event = ctrl->event_ring->dequeue;
+
+ if (!event_ready(ctrl))
+ continue;
+
+ type = TRB_FIELD_TO_TYPE(le32_to_cpu(event->event_cmd.flags));
+ if (type == expected)
+ return event;
+
+ if (type == TRB_PORT_STATUS)
+ /* TODO: remove this once enumeration has been reworked */
+ /*
+ * Port status change events always have a
+ * successful completion code
+ */
+ BUG_ON(GET_COMP_CODE(
+ le32_to_cpu(event->generic.field[2])) !=
+ COMP_SUCCESS);
+ else
+ printf("Unexpected XHCI event TRB, skipping... "
+ "(%08x %08x %08x %08x)\n",
+ le32_to_cpu(event->generic.field[0]),
+ le32_to_cpu(event->generic.field[1]),
+ le32_to_cpu(event->generic.field[2]),
+ le32_to_cpu(event->generic.field[3]));
+
+ xhci_acknowledge_event(ctrl);
+ } while (get_timer(ts) < XHCI_TIMEOUT);
+
+ if (expected == TRB_TRANSFER)
+ return NULL;
+
+ printf("XHCI timeout on event type %d... cannot recover.\n", expected);
+ BUG();
+}
+
+/*
+ * Stops transfer processing for an endpoint and throws away all unprocessed
+ * TRBs by setting the xHC's dequeue pointer to our enqueue pointer. The next
+ * xhci_bulk_tx/xhci_ctrl_tx on this enpoint will add new transfers there and
+ * ring the doorbell, causing this endpoint to start working again.
+ * (Careful: This will BUG() when there was no transfer in progress. Shouldn't
+ * happen in practice for current uses and is too complicated to fix right now.)
+ */
+static void abort_td(struct usb_device *udev, int ep_index)
+{
+ struct xhci_ctrl *ctrl = udev->controller;
+ struct xhci_ring *ring = ctrl->devs[udev->slot_id]->eps[ep_index].ring;
+ union xhci_trb *event;
+ u32 field;
+
+ xhci_queue_command(ctrl, NULL, udev->slot_id, ep_index, TRB_STOP_RING);
+
+ event = xhci_wait_for_event(ctrl, TRB_TRANSFER);
+ field = le32_to_cpu(event->trans_event.flags);
+ BUG_ON(TRB_TO_SLOT_ID(field) != udev->slot_id);
+ BUG_ON(TRB_TO_EP_INDEX(field) != ep_index);
+ BUG_ON(GET_COMP_CODE(le32_to_cpu(event->trans_event.transfer_len
+ != COMP_STOP)));
+ xhci_acknowledge_event(ctrl);
+
+ event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
+ != udev->slot_id || GET_COMP_CODE(le32_to_cpu(
+ event->event_cmd.status)) != COMP_SUCCESS);
+ xhci_acknowledge_event(ctrl);
+
+ xhci_queue_command(ctrl, (void *)((uintptr_t)ring->enqueue |
+ ring->cycle_state), udev->slot_id, ep_index, TRB_SET_DEQ);
+ event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
+ != udev->slot_id || GET_COMP_CODE(le32_to_cpu(
+ event->event_cmd.status)) != COMP_SUCCESS);
+ xhci_acknowledge_event(ctrl);
+}
+
+static void record_transfer_result(struct usb_device *udev,
+ union xhci_trb *event, int length)
+{
+ udev->act_len = min(length, length -
+ EVENT_TRB_LEN(le32_to_cpu(event->trans_event.transfer_len)));
+
+ switch (GET_COMP_CODE(le32_to_cpu(event->trans_event.transfer_len))) {
+ case COMP_SUCCESS:
+ BUG_ON(udev->act_len != length);
+ /* fallthrough */
+ case COMP_SHORT_TX:
+ udev->status = 0;
+ break;
+ case COMP_STALL:
+ udev->status = USB_ST_STALLED;
+ break;
+ case COMP_DB_ERR:
+ case COMP_TRB_ERR:
+ udev->status = USB_ST_BUF_ERR;
+ break;
+ case COMP_BABBLE:
+ udev->status = USB_ST_BABBLE_DET;
+ break;
+ default:
+ udev->status = 0x80; /* USB_ST_TOO_LAZY_TO_MAKE_A_NEW_MACRO */
+ }
+}
+
+/**** Bulk and Control transfer methods ****/
+/**
+ * Queues up the BULK Request
+ *
+ * @param udev pointer to the USB device structure
+ * @param pipe contains the DIR_IN or OUT , devnum
+ * @param length length of the buffer
+ * @param buffer buffer to be read/written based on the request
+ * @return returns 0 if successful else -1 on failure
+ */
+int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe,
+ int length, void *buffer)
+{
+ int num_trbs = 0;
+ struct xhci_generic_trb *start_trb;
+ bool first_trb = 0;
+ int start_cycle;
+ u32 field = 0;
+ u32 length_field = 0;
+ struct xhci_ctrl *ctrl = udev->controller;
+ int slot_id = udev->slot_id;
+ int ep_index;
+ struct xhci_virt_device *virt_dev;
+ struct xhci_ep_ctx *ep_ctx;
+ struct xhci_ring *ring; /* EP transfer ring */
+ union xhci_trb *event;
+
+ int running_total, trb_buff_len;
+ unsigned int total_packet_count;
+ int maxpacketsize;
+ u64 addr;
+ int ret;
+ u32 trb_fields[4];
+ u64 val_64 = (uintptr_t)buffer;
+
+ debug("dev=%p, pipe=%lx, buffer=%p, length=%d\n",
+ udev, pipe, buffer, length);
+
+ ep_index = usb_pipe_ep_index(pipe);
+ virt_dev = ctrl->devs[slot_id];
+
+ xhci_inval_cache((uint32_t)virt_dev->out_ctx->bytes,
+ virt_dev->out_ctx->size);
+
+ ep_ctx = xhci_get_ep_ctx(ctrl, virt_dev->out_ctx, ep_index);
+
+ ring = virt_dev->eps[ep_index].ring;
+ /*
+ * How much data is (potentially) left before the 64KB boundary?
+ * XHCI Spec puts restriction( TABLE 49 and 6.4.1 section of XHCI Spec)
+ * that the buffer should not span 64KB boundary. if so
+ * we send request in more than 1 TRB by chaining them.
+ */
+ running_total = TRB_MAX_BUFF_SIZE -
+ (lower_32_bits(val_64) & (TRB_MAX_BUFF_SIZE - 1));
+ trb_buff_len = running_total;
+ running_total &= TRB_MAX_BUFF_SIZE - 1;
+
+ /*
+ * If there's some data on this 64KB chunk, or we have to send a
+ * zero-length transfer, we need at least one TRB
+ */
+ if (running_total != 0 || length == 0)
+ num_trbs++;
+
+ /* How many more 64KB chunks to transfer, how many more TRBs? */
+ while (running_total < length) {
+ num_trbs++;
+ running_total += TRB_MAX_BUFF_SIZE;
+ }
+
+ /*
+ * XXX: Calling routine prepare_ring() called in place of
+ * prepare_trasfer() as there in 'Linux' since we are not
+ * maintaining multiple TDs/transfer at the same time.
+ */
+ ret = prepare_ring(ctrl, ring,
+ le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK);
+ if (ret < 0)
+ return ret;
+
+ /*
+ * Don't give the first TRB to the hardware (by toggling the cycle bit)
+ * until we've finished creating all the other TRBs. The ring's cycle
+ * state may change as we enqueue the other TRBs, so save it too.
+ */
+ start_trb = &ring->enqueue->generic;
+ start_cycle = ring->cycle_state;
+
+ running_total = 0;
+ maxpacketsize = usb_maxpacket(udev, pipe);
+
+ total_packet_count = DIV_ROUND_UP(length, maxpacketsize);
+
+ /* How much data is in the first TRB? */
+ /*
+ * How much data is (potentially) left before the 64KB boundary?
+ * XHCI Spec puts restriction( TABLE 49 and 6.4.1 section of XHCI Spec)
+ * that the buffer should not span 64KB boundary. if so
+ * we send request in more than 1 TRB by chaining them.
+ */
+ addr = val_64;
+
+ if (trb_buff_len > length)
+ trb_buff_len = length;
+
+ first_trb = true;
+
+ /* flush the buffer before use */
+ xhci_flush_cache((uint32_t)buffer, length);
+
+ /* Queue the first TRB, even if it's zero-length */
+ do {
+ u32 remainder = 0;
+ field = 0;
+ /* Don't change the cycle bit of the first TRB until later */
+ if (first_trb) {
+ first_trb = false;
+ if (start_cycle == 0)
+ field |= TRB_CYCLE;
+ } else {
+ field |= ring->cycle_state;
+ }
+
+ /*
+ * Chain all the TRBs together; clear the chain bit in the last
+ * TRB to indicate it's the last TRB in the chain.
+ */
+ if (num_trbs > 1)
+ field |= TRB_CHAIN;
+ else
+ field |= TRB_IOC;
+
+ /* Only set interrupt on short packet for IN endpoints */
+ if (usb_pipein(pipe))
+ field |= TRB_ISP;
+
+ /* Set the TRB length, TD size, and interrupter fields. */
+ if (HC_VERSION(xhci_readl(&ctrl->hccr->cr_capbase)) < 0x100)
+ remainder = xhci_td_remainder(length - running_total);
+ else
+ remainder = xhci_v1_0_td_remainder(running_total,
+ trb_buff_len,
+ total_packet_count,
+ maxpacketsize,
+ num_trbs - 1);
+
+ length_field = ((trb_buff_len & TRB_LEN_MASK) |
+ remainder |
+ ((0 & TRB_INTR_TARGET_MASK) <<
+ TRB_INTR_TARGET_SHIFT));
+
+ trb_fields[0] = lower_32_bits(addr);
+ trb_fields[1] = upper_32_bits(addr);
+ trb_fields[2] = length_field;
+ trb_fields[3] = field | (TRB_NORMAL << TRB_TYPE_SHIFT);
+
+ queue_trb(ctrl, ring, (num_trbs > 1), trb_fields);
+
+ --num_trbs;
+
+ running_total += trb_buff_len;
+
+ /* Calculate length for next transfer */
+ addr += trb_buff_len;
+ trb_buff_len = min((length - running_total), TRB_MAX_BUFF_SIZE);
+ } while (running_total < length);
+
+ giveback_first_trb(udev, ep_index, start_cycle, start_trb);
+
+ event = xhci_wait_for_event(ctrl, TRB_TRANSFER);
+ if (!event) {
+ debug("XHCI bulk transfer timed out, aborting...\n");
+ abort_td(udev, ep_index);
+ udev->status = USB_ST_NAK_REC; /* closest thing to a timeout */
+ udev->act_len = 0;
+ return -ETIMEDOUT;
+ }
+ field = le32_to_cpu(event->trans_event.flags);
+
+ BUG_ON(TRB_TO_SLOT_ID(field) != slot_id);
+ BUG_ON(TRB_TO_EP_INDEX(field) != ep_index);
+ BUG_ON(*(void **)(uintptr_t)le64_to_cpu(event->trans_event.buffer) -
+ buffer > (size_t)length);
+
+ record_transfer_result(udev, event, length);
+ xhci_acknowledge_event(ctrl);
+ xhci_inval_cache((uint32_t)buffer, length);
+
+ return (udev->status != USB_ST_NOT_PROC) ? 0 : -1;
+}
+
+/**
+ * Queues up the Control Transfer Request
+ *
+ * @param udev pointer to the USB device structure
+ * @param pipe contains the DIR_IN or OUT , devnum
+ * @param req request type
+ * @param length length of the buffer
+ * @param buffer buffer to be read/written based on the request
+ * @return returns 0 if successful else error code on failure
+ */
+int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe,
+ struct devrequest *req, int length,
+ void *buffer)
+{
+ int ret;
+ int start_cycle;
+ int num_trbs;
+ u32 field;
+ u32 length_field;
+ u64 buf_64 = 0;
+ struct xhci_generic_trb *start_trb;
+ struct xhci_ctrl *ctrl = udev->controller;
+ int slot_id = udev->slot_id;
+ int ep_index;
+ u32 trb_fields[4];
+ struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
+ struct xhci_ring *ep_ring;
+ union xhci_trb *event;
+
+ debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
+ req->request, req->request,
+ req->requesttype, req->requesttype,
+ le16_to_cpu(req->value), le16_to_cpu(req->value),
+ le16_to_cpu(req->index));
+
+ ep_index = usb_pipe_ep_index(pipe);
+
+ ep_ring = virt_dev->eps[ep_index].ring;
+
+ /*
+ * Check to see if the max packet size for the default control
+ * endpoint changed during FS device enumeration
+ */
+ if (udev->speed == USB_SPEED_FULL) {
+ ret = xhci_check_maxpacket(udev);
+ if (ret < 0)
+ return ret;
+ }
+
+ xhci_inval_cache((uint32_t)virt_dev->out_ctx->bytes,
+ virt_dev->out_ctx->size);
+
+ struct xhci_ep_ctx *ep_ctx = NULL;
+ ep_ctx = xhci_get_ep_ctx(ctrl, virt_dev->out_ctx, ep_index);
+
+ /* 1 TRB for setup, 1 for status */
+ num_trbs = 2;
+ /*
+ * Don't need to check if we need additional event data and normal TRBs,
+ * since data in control transfers will never get bigger than 16MB
+ * XXX: can we get a buffer that crosses 64KB boundaries?
+ */
+
+ if (length > 0)
+ num_trbs++;
+ /*
+ * XXX: Calling routine prepare_ring() called in place of
+ * prepare_trasfer() as there in 'Linux' since we are not
+ * maintaining multiple TDs/transfer at the same time.
+ */
+ ret = prepare_ring(ctrl, ep_ring,
+ le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK);
+
+ if (ret < 0)
+ return ret;
+
+ /*
+ * Don't give the first TRB to the hardware (by toggling the cycle bit)
+ * until we've finished creating all the other TRBs. The ring's cycle
+ * state may change as we enqueue the other TRBs, so save it too.
+ */
+ start_trb = &ep_ring->enqueue->generic;
+ start_cycle = ep_ring->cycle_state;
+
+ debug("start_trb %p, start_cycle %d\n", start_trb, start_cycle);
+
+ /* Queue setup TRB - see section 6.4.1.2.1 */
+ /* FIXME better way to translate setup_packet into two u32 fields? */
+ field = 0;
+ field |= TRB_IDT | (TRB_SETUP << TRB_TYPE_SHIFT);
+ if (start_cycle == 0)
+ field |= 0x1;
+
+ /* xHCI 1.0 6.4.1.2.1: Transfer Type field */
+ if (HC_VERSION(xhci_readl(&ctrl->hccr->cr_capbase)) == 0x100) {
+ if (length > 0) {
+ if (req->requesttype & USB_DIR_IN)
+ field |= (TRB_DATA_IN << TRB_TX_TYPE_SHIFT);
+ else
+ field |= (TRB_DATA_OUT << TRB_TX_TYPE_SHIFT);
+ }
+ }
+
+ debug("req->requesttype = %d, req->request = %d,"
+ "le16_to_cpu(req->value) = %d,"
+ "le16_to_cpu(req->index) = %d,"
+ "le16_to_cpu(req->length) = %d\n",
+ req->requesttype, req->request, le16_to_cpu(req->value),
+ le16_to_cpu(req->index), le16_to_cpu(req->length));
+
+ trb_fields[0] = req->requesttype | req->request << 8 |
+ le16_to_cpu(req->value) << 16;
+ trb_fields[1] = le16_to_cpu(req->index) |
+ le16_to_cpu(req->length) << 16;
+ /* TRB_LEN | (TRB_INTR_TARGET) */
+ trb_fields[2] = (8 | ((0 & TRB_INTR_TARGET_MASK) <<
+ TRB_INTR_TARGET_SHIFT));
+ /* Immediate data in pointer */
+ trb_fields[3] = field;
+ queue_trb(ctrl, ep_ring, true, trb_fields);
+
+ /* Re-initializing field to zero */
+ field = 0;
+ /* If there's data, queue data TRBs */
+ /* Only set interrupt on short packet for IN endpoints */
+ if (usb_pipein(pipe))
+ field = TRB_ISP | (TRB_DATA << TRB_TYPE_SHIFT);
+ else
+ field = (TRB_DATA << TRB_TYPE_SHIFT);
+
+ length_field = (length & TRB_LEN_MASK) | xhci_td_remainder(length) |
+ ((0 & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT);
+ debug("length_field = %d, length = %d,"
+ "xhci_td_remainder(length) = %d , TRB_INTR_TARGET(0) = %d\n",
+ length_field, (length & TRB_LEN_MASK),
+ xhci_td_remainder(length), 0);
+
+ if (length > 0) {
+ if (req->requesttype & USB_DIR_IN)
+ field |= TRB_DIR_IN;
+ buf_64 = (uintptr_t)buffer;
+
+ trb_fields[0] = lower_32_bits(buf_64);
+ trb_fields[1] = upper_32_bits(buf_64);
+ trb_fields[2] = length_field;
+ trb_fields[3] = field | ep_ring->cycle_state;
+
+ xhci_flush_cache((uint32_t)buffer, length);
+ queue_trb(ctrl, ep_ring, true, trb_fields);
+ }
+
+ /*
+ * Queue status TRB -
+ * see Table 7 and sections 4.11.2.2 and 6.4.1.2.3
+ */
+
+ /* If the device sent data, the status stage is an OUT transfer */
+ field = 0;
+ if (length > 0 && req->requesttype & USB_DIR_IN)
+ field = 0;
+ else
+ field = TRB_DIR_IN;
+
+ trb_fields[0] = 0;
+ trb_fields[1] = 0;
+ trb_fields[2] = ((0 & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT);
+ /* Event on completion */
+ trb_fields[3] = field | TRB_IOC |
+ (TRB_STATUS << TRB_TYPE_SHIFT) |
+ ep_ring->cycle_state;
+
+ queue_trb(ctrl, ep_ring, false, trb_fields);
+
+ giveback_first_trb(udev, ep_index, start_cycle, start_trb);
+
+ event = xhci_wait_for_event(ctrl, TRB_TRANSFER);
+ if (!event)
+ goto abort;
+ field = le32_to_cpu(event->trans_event.flags);
+
+ BUG_ON(TRB_TO_SLOT_ID(field) != slot_id);
+ BUG_ON(TRB_TO_EP_INDEX(field) != ep_index);
+
+ record_transfer_result(udev, event, length);
+ xhci_acknowledge_event(ctrl);
+
+ /* Invalidate buffer to make it available to usb-core */
+ if (length > 0)
+ xhci_inval_cache((uint32_t)buffer, length);
+
+ if (GET_COMP_CODE(le32_to_cpu(event->trans_event.transfer_len))
+ == COMP_SHORT_TX) {
+ /* Short data stage, clear up additional status stage event */
+ event = xhci_wait_for_event(ctrl, TRB_TRANSFER);
+ if (!event)
+ goto abort;
+ BUG_ON(TRB_TO_SLOT_ID(field) != slot_id);
+ BUG_ON(TRB_TO_EP_INDEX(field) != ep_index);
+ xhci_acknowledge_event(ctrl);
+ }
+
+ return (udev->status != USB_ST_NOT_PROC) ? 0 : -1;
+
+abort:
+ debug("XHCI control transfer timed out, aborting...\n");
+ abort_td(udev, ep_index);
+ udev->status = USB_ST_NAK_REC;
+ udev->act_len = 0;
+ return -ETIMEDOUT;
+}
--- /dev/null
+/*
+ * USB HOST XHCI Controller stack
+ *
+ * Based on xHCI host controller driver in linux-kernel
+ * by Sarah Sharp.
+ *
+ * Copyright (C) 2008 Intel Corp.
+ * Author: Sarah Sharp
+ *
+ * Copyright (C) 2013 Samsung Electronics Co.Ltd
+ * Authors: Vivek Gautam <gautam.vivek@samsung.com>
+ * Vikas Sajjan <vikas.sajjan@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/**
+ * This file gives the xhci stack for usb3.0 looking into
+ * xhci specification Rev1.0 (5/21/10).
+ * The quirk devices support hasn't been given yet.
+ */
+
+#include <common.h>
+#include <asm/byteorder.h>
+#include <usb.h>
+#include <malloc.h>
+#include <watchdog.h>
+#include <asm/cache.h>
+#include <asm/unaligned.h>
+#include <asm-generic/errno.h>
+#include "xhci.h"
+
+#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#endif
+
+static struct descriptor {
+ struct usb_hub_descriptor hub;
+ struct usb_device_descriptor device;
+ struct usb_config_descriptor config;
+ struct usb_interface_descriptor interface;
+ struct usb_endpoint_descriptor endpoint;
+ struct usb_ss_ep_comp_descriptor ep_companion;
+} __attribute__ ((packed)) descriptor = {
+ {
+ 0xc, /* bDescLength */
+ 0x2a, /* bDescriptorType: hub descriptor */
+ 2, /* bNrPorts -- runtime modified */
+ cpu_to_le16(0x8), /* wHubCharacteristics */
+ 10, /* bPwrOn2PwrGood */
+ 0, /* bHubCntrCurrent */
+ {}, /* Device removable */
+ {} /* at most 7 ports! XXX */
+ },
+ {
+ 0x12, /* bLength */
+ 1, /* bDescriptorType: UDESC_DEVICE */
+ cpu_to_le16(0x0300), /* bcdUSB: v3.0 */
+ 9, /* bDeviceClass: UDCLASS_HUB */
+ 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
+ 3, /* bDeviceProtocol: UDPROTO_SSHUBSTT */
+ 9, /* bMaxPacketSize: 512 bytes 2^9 */
+ 0x0000, /* idVendor */
+ 0x0000, /* idProduct */
+ cpu_to_le16(0x0100), /* bcdDevice */
+ 1, /* iManufacturer */
+ 2, /* iProduct */
+ 0, /* iSerialNumber */
+ 1 /* bNumConfigurations: 1 */
+ },
+ {
+ 0x9,
+ 2, /* bDescriptorType: UDESC_CONFIG */
+ cpu_to_le16(0x1f), /* includes SS endpoint descriptor */
+ 1, /* bNumInterface */
+ 1, /* bConfigurationValue */
+ 0, /* iConfiguration */
+ 0x40, /* bmAttributes: UC_SELF_POWER */
+ 0 /* bMaxPower */
+ },
+ {
+ 0x9, /* bLength */
+ 4, /* bDescriptorType: UDESC_INTERFACE */
+ 0, /* bInterfaceNumber */
+ 0, /* bAlternateSetting */
+ 1, /* bNumEndpoints */
+ 9, /* bInterfaceClass: UICLASS_HUB */
+ 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
+ 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
+ 0 /* iInterface */
+ },
+ {
+ 0x7, /* bLength */
+ 5, /* bDescriptorType: UDESC_ENDPOINT */
+ 0x81, /* bEndpointAddress: IN endpoint 1 */
+ 3, /* bmAttributes: UE_INTERRUPT */
+ 8, /* wMaxPacketSize */
+ 255 /* bInterval */
+ },
+ {
+ 0x06, /* ss_bLength */
+ 0x30, /* ss_bDescriptorType: SS EP Companion */
+ 0x00, /* ss_bMaxBurst: allows 1 TX between ACKs */
+ /* ss_bmAttributes: 1 packet per service interval */
+ 0x00,
+ /* ss_wBytesPerInterval: 15 bits for max 15 ports */
+ cpu_to_le16(0x02),
+ },
+};
+
+static struct xhci_ctrl xhcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
+
+/**
+ * Waits for as per specified amount of time
+ * for the "result" to match with "done"
+ *
+ * @param ptr pointer to the register to be read
+ * @param mask mask for the value read
+ * @param done value to be campared with result
+ * @param usec time to wait till
+ * @return 0 if handshake is success else < 0 on failure
+ */
+static int handshake(uint32_t volatile *ptr, uint32_t mask,
+ uint32_t done, int usec)
+{
+ uint32_t result;
+
+ do {
+ result = xhci_readl(ptr);
+ if (result == ~(uint32_t)0)
+ return -ENODEV;
+ result &= mask;
+ if (result == done)
+ return 0;
+ usec--;
+ udelay(1);
+ } while (usec > 0);
+
+ return -ETIMEDOUT;
+}
+
+/**
+ * Set the run bit and wait for the host to be running.
+ *
+ * @param hcor pointer to host controller operation registers
+ * @return status of the Handshake
+ */
+static int xhci_start(struct xhci_hcor *hcor)
+{
+ u32 temp;
+ int ret;
+
+ puts("Starting the controller\n");
+ temp = xhci_readl(&hcor->or_usbcmd);
+ temp |= (CMD_RUN);
+ xhci_writel(&hcor->or_usbcmd, temp);
+
+ /*
+ * Wait for the HCHalted Status bit to be 0 to indicate the host is
+ * running.
+ */
+ ret = handshake(&hcor->or_usbsts, STS_HALT, 0, XHCI_MAX_HALT_USEC);
+ if (ret)
+ debug("Host took too long to start, "
+ "waited %u microseconds.\n",
+ XHCI_MAX_HALT_USEC);
+ return ret;
+}
+
+/**
+ * Resets the XHCI Controller
+ *
+ * @param hcor pointer to host controller operation registers
+ * @return -EBUSY if XHCI Controller is not halted else status of handshake
+ */
+int xhci_reset(struct xhci_hcor *hcor)
+{
+ u32 cmd;
+ u32 state;
+ int ret;
+
+ /* Halting the Host first */
+ debug("// Halt the HC\n");
+ state = xhci_readl(&hcor->or_usbsts) & STS_HALT;
+ if (!state) {
+ cmd = xhci_readl(&hcor->or_usbcmd);
+ cmd &= ~CMD_RUN;
+ xhci_writel(&hcor->or_usbcmd, cmd);
+ }
+
+ ret = handshake(&hcor->or_usbsts,
+ STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
+ if (ret) {
+ printf("Host not halted after %u microseconds.\n",
+ XHCI_MAX_HALT_USEC);
+ return -EBUSY;
+ }
+
+ debug("// Reset the HC\n");
+ cmd = xhci_readl(&hcor->or_usbcmd);
+ cmd |= CMD_RESET;
+ xhci_writel(&hcor->or_usbcmd, cmd);
+
+ ret = handshake(&hcor->or_usbcmd, CMD_RESET, 0, XHCI_MAX_RESET_USEC);
+ if (ret)
+ return ret;
+
+ /*
+ * xHCI cannot write to any doorbells or operational registers other
+ * than status until the "Controller Not Ready" flag is cleared.
+ */
+ return handshake(&hcor->or_usbsts, STS_CNR, 0, XHCI_MAX_RESET_USEC);
+}
+
+/**
+ * Used for passing endpoint bitmasks between the core and HCDs.
+ * Find the index for an endpoint given its descriptor.
+ * Use the return value to right shift 1 for the bitmask.
+ *
+ * Index = (epnum * 2) + direction - 1,
+ * where direction = 0 for OUT, 1 for IN.
+ * For control endpoints, the IN index is used (OUT index is unused), so
+ * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
+ *
+ * @param desc USB enpdoint Descriptor
+ * @return index of the Endpoint
+ */
+static unsigned int xhci_get_ep_index(struct usb_endpoint_descriptor *desc)
+{
+ unsigned int index;
+
+ if (usb_endpoint_xfer_control(desc))
+ index = (unsigned int)(usb_endpoint_num(desc) * 2);
+ else
+ index = (unsigned int)((usb_endpoint_num(desc) * 2) -
+ (usb_endpoint_dir_in(desc) ? 0 : 1));
+
+ return index;
+}
+
+/**
+ * Issue a configure endpoint command or evaluate context command
+ * and wait for it to finish.
+ *
+ * @param udev pointer to the Device Data Structure
+ * @param ctx_change flag to indicate the Context has changed or NOT
+ * @return 0 on success, -1 on failure
+ */
+static int xhci_configure_endpoints(struct usb_device *udev, bool ctx_change)
+{
+ struct xhci_container_ctx *in_ctx;
+ struct xhci_virt_device *virt_dev;
+ struct xhci_ctrl *ctrl = udev->controller;
+ union xhci_trb *event;
+
+ virt_dev = ctrl->devs[udev->slot_id];
+ in_ctx = virt_dev->in_ctx;
+
+ xhci_flush_cache((uint32_t)in_ctx->bytes, in_ctx->size);
+ xhci_queue_command(ctrl, in_ctx->bytes, udev->slot_id, 0,
+ ctx_change ? TRB_EVAL_CONTEXT : TRB_CONFIG_EP);
+ event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
+ != udev->slot_id);
+
+ switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) {
+ case COMP_SUCCESS:
+ debug("Successful %s command\n",
+ ctx_change ? "Evaluate Context" : "Configure Endpoint");
+ break;
+ default:
+ printf("ERROR: %s command returned completion code %d.\n",
+ ctx_change ? "Evaluate Context" : "Configure Endpoint",
+ GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)));
+ return -EINVAL;
+ }
+
+ xhci_acknowledge_event(ctrl);
+
+ return 0;
+}
+
+/**
+ * Configure the endpoint, programming the device contexts.
+ *
+ * @param udev pointer to the USB device structure
+ * @return returns the status of the xhci_configure_endpoints
+ */
+static int xhci_set_configuration(struct usb_device *udev)
+{
+ struct xhci_container_ctx *in_ctx;
+ struct xhci_container_ctx *out_ctx;
+ struct xhci_input_control_ctx *ctrl_ctx;
+ struct xhci_slot_ctx *slot_ctx;
+ struct xhci_ep_ctx *ep_ctx[MAX_EP_CTX_NUM];
+ int cur_ep;
+ int max_ep_flag = 0;
+ int ep_index;
+ unsigned int dir;
+ unsigned int ep_type;
+ struct xhci_ctrl *ctrl = udev->controller;
+ int num_of_ep;
+ int ep_flag = 0;
+ u64 trb_64 = 0;
+ int slot_id = udev->slot_id;
+ struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
+ struct usb_interface *ifdesc;
+
+ out_ctx = virt_dev->out_ctx;
+ in_ctx = virt_dev->in_ctx;
+
+ num_of_ep = udev->config.if_desc[0].no_of_ep;
+ ifdesc = &udev->config.if_desc[0];
+
+ ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
+ /* Zero the input context control */
+ ctrl_ctx->add_flags = 0;
+ ctrl_ctx->drop_flags = 0;
+
+ /* EP_FLAG gives values 1 & 4 for EP1OUT and EP2IN */
+ for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
+ ep_flag = xhci_get_ep_index(&ifdesc->ep_desc[cur_ep]);
+ ctrl_ctx->add_flags |= cpu_to_le32(1 << (ep_flag + 1));
+ if (max_ep_flag < ep_flag)
+ max_ep_flag = ep_flag;
+ }
+
+ xhci_inval_cache((uint32_t)out_ctx->bytes, out_ctx->size);
+
+ /* slot context */
+ xhci_slot_copy(ctrl, in_ctx, out_ctx);
+ slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
+ slot_ctx->dev_info &= ~(LAST_CTX_MASK);
+ slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(max_ep_flag + 1) | 0);
+
+ xhci_endpoint_copy(ctrl, in_ctx, out_ctx, 0);
+
+ /* filling up ep contexts */
+ for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
+ struct usb_endpoint_descriptor *endpt_desc = NULL;
+
+ endpt_desc = &ifdesc->ep_desc[cur_ep];
+ trb_64 = 0;
+
+ ep_index = xhci_get_ep_index(endpt_desc);
+ ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
+
+ /* Allocate the ep rings */
+ virt_dev->eps[ep_index].ring = xhci_ring_alloc(1, true);
+ if (!virt_dev->eps[ep_index].ring)
+ return -ENOMEM;
+
+ /*NOTE: ep_desc[0] actually represents EP1 and so on */
+ dir = (((endpt_desc->bEndpointAddress) & (0x80)) >> 7);
+ ep_type = (((endpt_desc->bmAttributes) & (0x3)) | (dir << 2));
+ ep_ctx[ep_index]->ep_info2 =
+ cpu_to_le32(ep_type << EP_TYPE_SHIFT);
+ ep_ctx[ep_index]->ep_info2 |=
+ cpu_to_le32(MAX_PACKET
+ (get_unaligned(&endpt_desc->wMaxPacketSize)));
+
+ ep_ctx[ep_index]->ep_info2 |=
+ cpu_to_le32(((0 & MAX_BURST_MASK) << MAX_BURST_SHIFT) |
+ ((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT));
+
+ trb_64 = (uintptr_t)
+ virt_dev->eps[ep_index].ring->enqueue;
+ ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |
+ virt_dev->eps[ep_index].ring->cycle_state);
+ }
+
+ return xhci_configure_endpoints(udev, false);
+}
+
+/**
+ * Issue an Address Device command (which will issue a SetAddress request to
+ * the device).
+ *
+ * @param udev pointer to the Device Data Structure
+ * @return 0 if successful else error code on failure
+ */
+static int xhci_address_device(struct usb_device *udev)
+{
+ int ret = 0;
+ struct xhci_ctrl *ctrl = udev->controller;
+ struct xhci_slot_ctx *slot_ctx;
+ struct xhci_input_control_ctx *ctrl_ctx;
+ struct xhci_virt_device *virt_dev;
+ int slot_id = udev->slot_id;
+ union xhci_trb *event;
+
+ virt_dev = ctrl->devs[slot_id];
+
+ /*
+ * This is the first Set Address since device plug-in
+ * so setting up the slot context.
+ */
+ debug("Setting up addressable devices\n");
+ xhci_setup_addressable_virt_dev(udev);
+
+ ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
+ ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
+ ctrl_ctx->drop_flags = 0;
+
+ xhci_queue_command(ctrl, (void *)ctrl_ctx, slot_id, 0, TRB_ADDR_DEV);
+ event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) != slot_id);
+
+ switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) {
+ case COMP_CTX_STATE:
+ case COMP_EBADSLT:
+ printf("Setup ERROR: address device command for slot %d.\n",
+ slot_id);
+ ret = -EINVAL;
+ break;
+ case COMP_TX_ERR:
+ puts("Device not responding to set address.\n");
+ ret = -EPROTO;
+ break;
+ case COMP_DEV_ERR:
+ puts("ERROR: Incompatible device"
+ "for address device command.\n");
+ ret = -ENODEV;
+ break;
+ case COMP_SUCCESS:
+ debug("Successful Address Device command\n");
+ udev->status = 0;
+ break;
+ default:
+ printf("ERROR: unexpected command completion code 0x%x.\n",
+ GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)));
+ ret = -EINVAL;
+ break;
+ }
+
+ xhci_acknowledge_event(ctrl);
+
+ if (ret < 0)
+ /*
+ * TODO: Unsuccessful Address Device command shall leave the
+ * slot in default state. So, issue Disable Slot command now.
+ */
+ return ret;
+
+ xhci_inval_cache((uint32_t)virt_dev->out_ctx->bytes,
+ virt_dev->out_ctx->size);
+ slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->out_ctx);
+
+ debug("xHC internal address is: %d\n",
+ le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
+
+ return 0;
+}
+
+/**
+ * Issue Enable slot command to the controller to allocate
+ * device slot and assign the slot id. It fails if the xHC
+ * ran out of device slots, the Enable Slot command timed out,
+ * or allocating memory failed.
+ *
+ * @param udev pointer to the Device Data Structure
+ * @return Returns 0 on succes else return error code on failure
+ */
+int usb_alloc_device(struct usb_device *udev)
+{
+ union xhci_trb *event;
+ struct xhci_ctrl *ctrl = udev->controller;
+ int ret;
+
+ /*
+ * Root hub will be first device to be initailized.
+ * If this device is root-hub, don't do any xHC related
+ * stuff.
+ */
+ if (ctrl->rootdev == 0) {
+ udev->speed = USB_SPEED_SUPER;
+ return 0;
+ }
+
+ xhci_queue_command(ctrl, NULL, 0, 0, TRB_ENABLE_SLOT);
+ event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
+ BUG_ON(GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))
+ != COMP_SUCCESS);
+
+ udev->slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags));
+
+ xhci_acknowledge_event(ctrl);
+
+ ret = xhci_alloc_virt_device(udev);
+ if (ret < 0) {
+ /*
+ * TODO: Unsuccessful Address Device command shall leave
+ * the slot in default. So, issue Disable Slot command now.
+ */
+ puts("Could not allocate xHCI USB device data structures\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+/*
+ * Full speed devices may have a max packet size greater than 8 bytes, but the
+ * USB core doesn't know that until it reads the first 8 bytes of the
+ * descriptor. If the usb_device's max packet size changes after that point,
+ * we need to issue an evaluate context command and wait on it.
+ *
+ * @param udev pointer to the Device Data Structure
+ * @return returns the status of the xhci_configure_endpoints
+ */
+int xhci_check_maxpacket(struct usb_device *udev)
+{
+ struct xhci_ctrl *ctrl = udev->controller;
+ unsigned int slot_id = udev->slot_id;
+ int ep_index = 0; /* control endpoint */
+ struct xhci_container_ctx *in_ctx;
+ struct xhci_container_ctx *out_ctx;
+ struct xhci_input_control_ctx *ctrl_ctx;
+ struct xhci_ep_ctx *ep_ctx;
+ int max_packet_size;
+ int hw_max_packet_size;
+ int ret = 0;
+ struct usb_interface *ifdesc;
+
+ ifdesc = &udev->config.if_desc[0];
+
+ out_ctx = ctrl->devs[slot_id]->out_ctx;
+ xhci_inval_cache((uint32_t)out_ctx->bytes, out_ctx->size);
+
+ ep_ctx = xhci_get_ep_ctx(ctrl, out_ctx, ep_index);
+ hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
+ max_packet_size = usb_endpoint_maxp(&ifdesc->ep_desc[0]);
+ if (hw_max_packet_size != max_packet_size) {
+ debug("Max Packet Size for ep 0 changed.\n");
+ debug("Max packet size in usb_device = %d\n", max_packet_size);
+ debug("Max packet size in xHCI HW = %d\n", hw_max_packet_size);
+ debug("Issuing evaluate context command.\n");
+
+ /* Set up the modified control endpoint 0 */
+ xhci_endpoint_copy(ctrl, ctrl->devs[slot_id]->in_ctx,
+ ctrl->devs[slot_id]->out_ctx, ep_index);
+ in_ctx = ctrl->devs[slot_id]->in_ctx;
+ ep_ctx = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
+ ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
+ ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
+
+ /*
+ * Set up the input context flags for the command
+ * FIXME: This won't work if a non-default control endpoint
+ * changes max packet sizes.
+ */
+ ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
+ ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
+ ctrl_ctx->drop_flags = 0;
+
+ ret = xhci_configure_endpoints(udev, true);
+ }
+ return ret;
+}
+
+/**
+ * Clears the Change bits of the Port Status Register
+ *
+ * @param wValue request value
+ * @param wIndex request index
+ * @param addr address of posrt status register
+ * @param port_status state of port status register
+ * @return none
+ */
+static void xhci_clear_port_change_bit(u16 wValue,
+ u16 wIndex, volatile uint32_t *addr, u32 port_status)
+{
+ char *port_change_bit;
+ u32 status;
+
+ switch (wValue) {
+ case USB_PORT_FEAT_C_RESET:
+ status = PORT_RC;
+ port_change_bit = "reset";
+ break;
+ case USB_PORT_FEAT_C_CONNECTION:
+ status = PORT_CSC;
+ port_change_bit = "connect";
+ break;
+ case USB_PORT_FEAT_C_OVER_CURRENT:
+ status = PORT_OCC;
+ port_change_bit = "over-current";
+ break;
+ case USB_PORT_FEAT_C_ENABLE:
+ status = PORT_PEC;
+ port_change_bit = "enable/disable";
+ break;
+ case USB_PORT_FEAT_C_SUSPEND:
+ status = PORT_PLC;
+ port_change_bit = "suspend/resume";
+ break;
+ default:
+ /* Should never happen */
+ return;
+ }
+
+ /* Change bits are all write 1 to clear */
+ xhci_writel(addr, port_status | status);
+
+ port_status = xhci_readl(addr);
+ debug("clear port %s change, actual port %d status = 0x%x\n",
+ port_change_bit, wIndex, port_status);
+}
+
+/**
+ * Save Read Only (RO) bits and save read/write bits where
+ * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
+ * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
+ *
+ * @param state state of the Port Status and Control Regsiter
+ * @return a value that would result in the port being in the
+ * same state, if the value was written to the port
+ * status control register.
+ */
+static u32 xhci_port_state_to_neutral(u32 state)
+{
+ /* Save read-only status and port state */
+ return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
+}
+
+/**
+ * Submits the Requests to the XHCI Host Controller
+ *
+ * @param udev pointer to the USB device structure
+ * @param pipe contains the DIR_IN or OUT , devnum
+ * @param buffer buffer to be read/written based on the request
+ * @return returns 0 if successful else -1 on failure
+ */
+static int xhci_submit_root(struct usb_device *udev, unsigned long pipe,
+ void *buffer, struct devrequest *req)
+{
+ uint8_t tmpbuf[4];
+ u16 typeReq;
+ void *srcptr = NULL;
+ int len, srclen;
+ uint32_t reg;
+ volatile uint32_t *status_reg;
+ struct xhci_ctrl *ctrl = udev->controller;
+ struct xhci_hcor *hcor = ctrl->hcor;
+
+ if (((req->requesttype & USB_RT_PORT) &&
+ le16_to_cpu(req->index)) > CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS) {
+ printf("The request port(%d) is not configured\n",
+ le16_to_cpu(req->index) - 1);
+ return -EINVAL;
+ }
+
+ status_reg = (volatile uint32_t *)
+ (&hcor->portregs[le16_to_cpu(req->index) - 1].or_portsc);
+ srclen = 0;
+
+ typeReq = req->request | req->requesttype << 8;
+
+ switch (typeReq) {
+ case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
+ switch (le16_to_cpu(req->value) >> 8) {
+ case USB_DT_DEVICE:
+ debug("USB_DT_DEVICE request\n");
+ srcptr = &descriptor.device;
+ srclen = 0x12;
+ break;
+ case USB_DT_CONFIG:
+ debug("USB_DT_CONFIG config\n");
+ srcptr = &descriptor.config;
+ srclen = 0x19;
+ break;
+ case USB_DT_STRING:
+ debug("USB_DT_STRING config\n");
+ switch (le16_to_cpu(req->value) & 0xff) {
+ case 0: /* Language */
+ srcptr = "\4\3\11\4";
+ srclen = 4;
+ break;
+ case 1: /* Vendor String */
+ srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
+ srclen = 14;
+ break;
+ case 2: /* Product Name */
+ srcptr = "\52\3X\0H\0C\0I\0 "
+ "\0H\0o\0s\0t\0 "
+ "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
+ srclen = 42;
+ break;
+ default:
+ printf("unknown value DT_STRING %x\n",
+ le16_to_cpu(req->value));
+ goto unknown;
+ }
+ break;
+ default:
+ printf("unknown value %x\n", le16_to_cpu(req->value));
+ goto unknown;
+ }
+ break;
+ case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
+ switch (le16_to_cpu(req->value) >> 8) {
+ case USB_DT_HUB:
+ debug("USB_DT_HUB config\n");
+ srcptr = &descriptor.hub;
+ srclen = 0x8;
+ break;
+ default:
+ printf("unknown value %x\n", le16_to_cpu(req->value));
+ goto unknown;
+ }
+ break;
+ case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
+ debug("USB_REQ_SET_ADDRESS\n");
+ ctrl->rootdev = le16_to_cpu(req->value);
+ break;
+ case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
+ /* Do nothing */
+ break;
+ case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
+ tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
+ tmpbuf[1] = 0;
+ srcptr = tmpbuf;
+ srclen = 2;
+ break;
+ case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
+ memset(tmpbuf, 0, 4);
+ reg = xhci_readl(status_reg);
+ if (reg & PORT_CONNECT) {
+ tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
+ switch (reg & DEV_SPEED_MASK) {
+ case XDEV_FS:
+ debug("SPEED = FULLSPEED\n");
+ break;
+ case XDEV_LS:
+ debug("SPEED = LOWSPEED\n");
+ tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
+ break;
+ case XDEV_HS:
+ debug("SPEED = HIGHSPEED\n");
+ tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
+ break;
+ case XDEV_SS:
+ debug("SPEED = SUPERSPEED\n");
+ tmpbuf[1] |= USB_PORT_STAT_SUPER_SPEED >> 8;
+ break;
+ }
+ }
+ if (reg & PORT_PE)
+ tmpbuf[0] |= USB_PORT_STAT_ENABLE;
+ if ((reg & PORT_PLS_MASK) == XDEV_U3)
+ tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
+ if (reg & PORT_OC)
+ tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
+ if (reg & PORT_RESET)
+ tmpbuf[0] |= USB_PORT_STAT_RESET;
+ if (reg & PORT_POWER)
+ /*
+ * XXX: This Port power bit (for USB 3.0 hub)
+ * we are faking in USB 2.0 hub port status;
+ * since there's a change in bit positions in
+ * two:
+ * USB 2.0 port status PP is at position[8]
+ * USB 3.0 port status PP is at position[9]
+ * So, we are still keeping it at position [8]
+ */
+ tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
+ if (reg & PORT_CSC)
+ tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
+ if (reg & PORT_PEC)
+ tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
+ if (reg & PORT_OCC)
+ tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
+ if (reg & PORT_RC)
+ tmpbuf[2] |= USB_PORT_STAT_C_RESET;
+
+ srcptr = tmpbuf;
+ srclen = 4;
+ break;
+ case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
+ reg = xhci_readl(status_reg);
+ reg = xhci_port_state_to_neutral(reg);
+ switch (le16_to_cpu(req->value)) {
+ case USB_PORT_FEAT_ENABLE:
+ reg |= PORT_PE;
+ xhci_writel(status_reg, reg);
+ break;
+ case USB_PORT_FEAT_POWER:
+ reg |= PORT_POWER;
+ xhci_writel(status_reg, reg);
+ break;
+ case USB_PORT_FEAT_RESET:
+ reg |= PORT_RESET;
+ xhci_writel(status_reg, reg);
+ break;
+ default:
+ printf("unknown feature %x\n", le16_to_cpu(req->value));
+ goto unknown;
+ }
+ break;
+ case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
+ reg = xhci_readl(status_reg);
+ reg = xhci_port_state_to_neutral(reg);
+ switch (le16_to_cpu(req->value)) {
+ case USB_PORT_FEAT_ENABLE:
+ reg &= ~PORT_PE;
+ break;
+ case USB_PORT_FEAT_POWER:
+ reg &= ~PORT_POWER;
+ break;
+ case USB_PORT_FEAT_C_RESET:
+ case USB_PORT_FEAT_C_CONNECTION:
+ case USB_PORT_FEAT_C_OVER_CURRENT:
+ case USB_PORT_FEAT_C_ENABLE:
+ xhci_clear_port_change_bit((le16_to_cpu(req->value)),
+ le16_to_cpu(req->index),
+ status_reg, reg);
+ break;
+ default:
+ printf("unknown feature %x\n", le16_to_cpu(req->value));
+ goto unknown;
+ }
+ xhci_writel(status_reg, reg);
+ break;
+ default:
+ puts("Unknown request\n");
+ goto unknown;
+ }
+
+ debug("scrlen = %d\n req->length = %d\n",
+ srclen, le16_to_cpu(req->length));
+
+ len = min(srclen, le16_to_cpu(req->length));
+
+ if (srcptr != NULL && len > 0)
+ memcpy(buffer, srcptr, len);
+ else
+ debug("Len is 0\n");
+
+ udev->act_len = len;
+ udev->status = 0;
+
+ return 0;
+
+unknown:
+ udev->act_len = 0;
+ udev->status = USB_ST_STALLED;
+
+ return -ENODEV;
+}
+
+/**
+ * Submits the INT request to XHCI Host cotroller
+ *
+ * @param udev pointer to the USB device
+ * @param pipe contains the DIR_IN or OUT , devnum
+ * @param buffer buffer to be read/written based on the request
+ * @param length length of the buffer
+ * @param interval interval of the interrupt
+ * @return 0
+ */
+int
+submit_int_msg(struct usb_device *udev, unsigned long pipe, void *buffer,
+ int length, int interval)
+{
+ /*
+ * TODO: Not addressing any interrupt type transfer requests
+ * Add support for it later.
+ */
+ return -EINVAL;
+}
+
+/**
+ * submit the BULK type of request to the USB Device
+ *
+ * @param udev pointer to the USB device
+ * @param pipe contains the DIR_IN or OUT , devnum
+ * @param buffer buffer to be read/written based on the request
+ * @param length length of the buffer
+ * @return returns 0 if successful else -1 on failure
+ */
+int
+submit_bulk_msg(struct usb_device *udev, unsigned long pipe, void *buffer,
+ int length)
+{
+ if (usb_pipetype(pipe) != PIPE_BULK) {
+ printf("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
+ return -EINVAL;
+ }
+
+ return xhci_bulk_tx(udev, pipe, length, buffer);
+}
+
+/**
+ * submit the control type of request to the Root hub/Device based on the devnum
+ *
+ * @param udev pointer to the USB device
+ * @param pipe contains the DIR_IN or OUT , devnum
+ * @param buffer buffer to be read/written based on the request
+ * @param length length of the buffer
+ * @param setup Request type
+ * @return returns 0 if successful else -1 on failure
+ */
+int
+submit_control_msg(struct usb_device *udev, unsigned long pipe, void *buffer,
+ int length, struct devrequest *setup)
+{
+ struct xhci_ctrl *ctrl = udev->controller;
+ int ret = 0;
+
+ if (usb_pipetype(pipe) != PIPE_CONTROL) {
+ printf("non-control pipe (type=%lu)", usb_pipetype(pipe));
+ return -EINVAL;
+ }
+
+ if (usb_pipedevice(pipe) == ctrl->rootdev)
+ return xhci_submit_root(udev, pipe, buffer, setup);
+
+ if (setup->request == USB_REQ_SET_ADDRESS)
+ return xhci_address_device(udev);
+
+ if (setup->request == USB_REQ_SET_CONFIGURATION) {
+ ret = xhci_set_configuration(udev);
+ if (ret) {
+ puts("Failed to configure xHCI endpoint\n");
+ return ret;
+ }
+ }
+
+ return xhci_ctrl_tx(udev, pipe, setup, length, buffer);
+}
+
+/**
+ * Intialises the XHCI host controller
+ * and allocates the necessary data structures
+ *
+ * @param index index to the host controller data structure
+ * @return pointer to the intialised controller
+ */
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
+{
+ uint32_t val;
+ uint32_t val2;
+ uint32_t reg;
+ struct xhci_hccr *hccr;
+ struct xhci_hcor *hcor;
+ struct xhci_ctrl *ctrl;
+
+ if (xhci_hcd_init(index, &hccr, (struct xhci_hcor **)&hcor) != 0)
+ return -ENODEV;
+
+ if (xhci_reset(hcor) != 0)
+ return -ENODEV;
+
+ ctrl = &xhcic[index];
+
+ ctrl->hccr = hccr;
+ ctrl->hcor = hcor;
+
+ /*
+ * Program the Number of Device Slots Enabled field in the CONFIG
+ * register with the max value of slots the HC can handle.
+ */
+ val = (xhci_readl(&hccr->cr_hcsparams1) & HCS_SLOTS_MASK);
+ val2 = xhci_readl(&hcor->or_config);
+ val |= (val2 & ~HCS_SLOTS_MASK);
+ xhci_writel(&hcor->or_config, val);
+
+ /* initializing xhci data structures */
+ if (xhci_mem_init(ctrl, hccr, hcor) < 0)
+ return -ENOMEM;
+
+ reg = xhci_readl(&hccr->cr_hcsparams1);
+ descriptor.hub.bNbrPorts = ((reg & HCS_MAX_PORTS_MASK) >>
+ HCS_MAX_PORTS_SHIFT);
+ printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
+
+ /* Port Indicators */
+ reg = xhci_readl(&hccr->cr_hccparams);
+ if (HCS_INDICATOR(reg))
+ put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
+ | 0x80, &descriptor.hub.wHubCharacteristics);
+
+ /* Port Power Control */
+ if (HCC_PPC(reg))
+ put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
+ | 0x01, &descriptor.hub.wHubCharacteristics);
+
+ if (xhci_start(hcor)) {
+ xhci_reset(hcor);
+ return -ENODEV;
+ }
+
+ /* Zero'ing IRQ control register and IRQ pending register */
+ xhci_writel(&ctrl->ir_set->irq_control, 0x0);
+ xhci_writel(&ctrl->ir_set->irq_pending, 0x0);
+
+ reg = HC_VERSION(xhci_readl(&hccr->cr_capbase));
+ printf("USB XHCI %x.%02x\n", reg >> 8, reg & 0xff);
+
+ *controller = &xhcic[index];
+
+ return 0;
+}
+
+/**
+ * Stops the XHCI host controller
+ * and cleans up all the related data structures
+ *
+ * @param index index to the host controller data structure
+ * @return none
+ */
+int usb_lowlevel_stop(int index)
+{
+ struct xhci_ctrl *ctrl = (xhcic + index);
+ u32 temp;
+
+ xhci_reset(ctrl->hcor);
+
+ debug("// Disabling event ring interrupts\n");
+ temp = xhci_readl(&ctrl->hcor->or_usbsts);
+ xhci_writel(&ctrl->hcor->or_usbsts, temp & ~STS_EINT);
+ temp = xhci_readl(&ctrl->ir_set->irq_pending);
+ xhci_writel(&ctrl->ir_set->irq_pending, ER_IRQ_DISABLE(temp));
+
+ xhci_hcd_stop(index);
+
+ xhci_cleanup(ctrl);
+
+ return 0;
+}
--- /dev/null
+/*
+ * USB HOST XHCI Controller
+ *
+ * Based on xHCI host controller driver in linux-kernel
+ * by Sarah Sharp.
+ *
+ * Copyright (C) 2008 Intel Corp.
+ * Author: Sarah Sharp
+ *
+ * Copyright (C) 2013 Samsung Electronics Co.Ltd
+ * Authors: Vivek Gautam <gautam.vivek@samsung.com>
+ * Vikas Sajjan <vikas.sajjan@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef HOST_XHCI_H_
+#define HOST_XHCI_H_
+
+#include <asm/cache.h>
+#include <asm/io.h>
+#include <linux/list.h>
+
+#define upper_32_bits(n) (u32)((n) >> 32)
+#define lower_32_bits(n) (u32)(n)
+
+#define MAX_EP_CTX_NUM 31
+#define XHCI_ALIGNMENT 64
+/* Generic timeout for XHCI events */
+#define XHCI_TIMEOUT 5000
+/* Max number of USB devices for any host controller - limit in section 6.1 */
+#define MAX_HC_SLOTS 256
+/* Section 5.3.3 - MaxPorts */
+#define MAX_HC_PORTS 127
+
+/* Up to 16 ms to halt an HC */
+#define XHCI_MAX_HALT_USEC (16*1000)
+
+#define XHCI_MAX_RESET_USEC (250*1000)
+
+/*
+ * These bits are Read Only (RO) and should be saved and written to the
+ * registers: 0, 3, 10:13, 30
+ * connect status, over-current status, port speed, and device removable.
+ * connect status and port speed are also sticky - meaning they're in
+ * the AUX well and they aren't changed by a hot, warm, or cold reset.
+ */
+#define XHCI_PORT_RO ((1 << 0) | (1 << 3) | (0xf << 10) | (1 << 30))
+/*
+ * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
+ * bits 5:8, 9, 14:15, 25:27
+ * link state, port power, port indicator state, "wake on" enable state
+ */
+#define XHCI_PORT_RWS ((0xf << 5) | (1 << 9) | (0x3 << 14) | (0x7 << 25))
+/*
+ * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
+ * bit 4 (port reset)
+ */
+#define XHCI_PORT_RW1S ((1 << 4))
+/*
+ * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
+ * bits 1, 17, 18, 19, 20, 21, 22, 23
+ * port enable/disable, and
+ * change bits: connect, PED,
+ * warm port reset changed (reserved zero for USB 2.0 ports),
+ * over-current, reset, link state, and L1 change
+ */
+#define XHCI_PORT_RW1CS ((1 << 1) | (0x7f << 17))
+/*
+ * Bit 16 is RW, and writing a '1' to it causes the link state control to be
+ * latched in
+ */
+#define XHCI_PORT_RW ((1 << 16))
+/*
+ * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
+ * bits 2, 24, 28:31
+ */
+#define XHCI_PORT_RZ ((1 << 2) | (1 << 24) | (0xf << 28))
+
+/*
+ * XHCI Register Space.
+ */
+struct xhci_hccr {
+ uint32_t cr_capbase;
+ uint32_t cr_hcsparams1;
+ uint32_t cr_hcsparams2;
+ uint32_t cr_hcsparams3;
+ uint32_t cr_hccparams;
+ uint32_t cr_dboff;
+ uint32_t cr_rtsoff;
+
+/* hc_capbase bitmasks */
+/* bits 7:0 - how long is the Capabilities register */
+#define HC_LENGTH(p) XHCI_HC_LENGTH(p)
+/* bits 31:16 */
+#define HC_VERSION(p) (((p) >> 16) & 0xffff)
+
+/* HCSPARAMS1 - hcs_params1 - bitmasks */
+/* bits 0:7, Max Device Slots */
+#define HCS_MAX_SLOTS(p) (((p) >> 0) & 0xff)
+#define HCS_SLOTS_MASK 0xff
+/* bits 8:18, Max Interrupters */
+#define HCS_MAX_INTRS(p) (((p) >> 8) & 0x7ff)
+/* bits 24:31, Max Ports - max value is 0x7F = 127 ports */
+#define HCS_MAX_PORTS_SHIFT 24
+#define HCS_MAX_PORTS_MASK (0x7f << HCS_MAX_PORTS_SHIFT)
+#define HCS_MAX_PORTS(p) (((p) >> 24) & 0x7f)
+
+/* HCSPARAMS2 - hcs_params2 - bitmasks */
+/* bits 0:3, frames or uframes that SW needs to queue transactions
+ * ahead of the HW to meet periodic deadlines */
+#define HCS_IST(p) (((p) >> 0) & 0xf)
+/* bits 4:7, max number of Event Ring segments */
+#define HCS_ERST_MAX(p) (((p) >> 4) & 0xf)
+/* bit 26 Scratchpad restore - for save/restore HW state - not used yet */
+/* bits 27:31 number of Scratchpad buffers SW must allocate for the HW */
+#define HCS_MAX_SCRATCHPAD(p) (((p) >> 27) & 0x1f)
+
+/* HCSPARAMS3 - hcs_params3 - bitmasks */
+/* bits 0:7, Max U1 to U0 latency for the roothub ports */
+#define HCS_U1_LATENCY(p) (((p) >> 0) & 0xff)
+/* bits 16:31, Max U2 to U0 latency for the roothub ports */
+#define HCS_U2_LATENCY(p) (((p) >> 16) & 0xffff)
+
+/* HCCPARAMS - hcc_params - bitmasks */
+/* true: HC can use 64-bit address pointers */
+#define HCC_64BIT_ADDR(p) ((p) & (1 << 0))
+/* true: HC can do bandwidth negotiation */
+#define HCC_BANDWIDTH_NEG(p) ((p) & (1 << 1))
+/* true: HC uses 64-byte Device Context structures
+ * FIXME 64-byte context structures aren't supported yet.
+ */
+#define HCC_64BYTE_CONTEXT(p) ((p) & (1 << 2))
+/* true: HC has port power switches */
+#define HCC_PPC(p) ((p) & (1 << 3))
+/* true: HC has port indicators */
+#define HCS_INDICATOR(p) ((p) & (1 << 4))
+/* true: HC has Light HC Reset Capability */
+#define HCC_LIGHT_RESET(p) ((p) & (1 << 5))
+/* true: HC supports latency tolerance messaging */
+#define HCC_LTC(p) ((p) & (1 << 6))
+/* true: no secondary Stream ID Support */
+#define HCC_NSS(p) ((p) & (1 << 7))
+/* Max size for Primary Stream Arrays - 2^(n+1), where n is bits 12:15 */
+#define HCC_MAX_PSA(p) (1 << ((((p) >> 12) & 0xf) + 1))
+/* Extended Capabilities pointer from PCI base - section 5.3.6 */
+#define HCC_EXT_CAPS(p) XHCI_HCC_EXT_CAPS(p)
+
+/* db_off bitmask - bits 0:1 reserved */
+#define DBOFF_MASK (~0x3)
+
+/* run_regs_off bitmask - bits 0:4 reserved */
+#define RTSOFF_MASK (~0x1f)
+
+};
+
+struct xhci_hcor_port_regs {
+ volatile uint32_t or_portsc;
+ volatile uint32_t or_portpmsc;
+ volatile uint32_t or_portli;
+ volatile uint32_t reserved_3;
+};
+
+struct xhci_hcor {
+ volatile uint32_t or_usbcmd;
+ volatile uint32_t or_usbsts;
+ volatile uint32_t or_pagesize;
+ volatile uint32_t reserved_0[2];
+ volatile uint32_t or_dnctrl;
+ volatile uint64_t or_crcr;
+ volatile uint32_t reserved_1[4];
+ volatile uint64_t or_dcbaap;
+ volatile uint32_t or_config;
+ volatile uint32_t reserved_2[241];
+ struct xhci_hcor_port_regs portregs[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS];
+
+ uint32_t reserved_4[CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS * 254];
+};
+
+/* USBCMD - USB command - command bitmasks */
+/* start/stop HC execution - do not write unless HC is halted*/
+#define CMD_RUN XHCI_CMD_RUN
+/* Reset HC - resets internal HC state machine and all registers (except
+ * PCI config regs). HC does NOT drive a USB reset on the downstream ports.
+ * The xHCI driver must reinitialize the xHC after setting this bit.
+ */
+#define CMD_RESET (1 << 1)
+/* Event Interrupt Enable - a '1' allows interrupts from the host controller */
+#define CMD_EIE XHCI_CMD_EIE
+/* Host System Error Interrupt Enable - get out-of-band signal for HC errors */
+#define CMD_HSEIE XHCI_CMD_HSEIE
+/* bits 4:6 are reserved (and should be preserved on writes). */
+/* light reset (port status stays unchanged) - reset completed when this is 0 */
+#define CMD_LRESET (1 << 7)
+/* host controller save/restore state. */
+#define CMD_CSS (1 << 8)
+#define CMD_CRS (1 << 9)
+/* Enable Wrap Event - '1' means xHC generates an event when MFINDEX wraps. */
+#define CMD_EWE XHCI_CMD_EWE
+/* MFINDEX power management - '1' means xHC can stop MFINDEX counter if all root
+ * hubs are in U3 (selective suspend), disconnect, disabled, or powered-off.
+ * '0' means the xHC can power it off if all ports are in the disconnect,
+ * disabled, or powered-off state.
+ */
+#define CMD_PM_INDEX (1 << 11)
+/* bits 12:31 are reserved (and should be preserved on writes). */
+
+/* USBSTS - USB status - status bitmasks */
+/* HC not running - set to 1 when run/stop bit is cleared. */
+#define STS_HALT XHCI_STS_HALT
+/* serious error, e.g. PCI parity error. The HC will clear the run/stop bit. */
+#define STS_FATAL (1 << 2)
+/* event interrupt - clear this prior to clearing any IP flags in IR set*/
+#define STS_EINT (1 << 3)
+/* port change detect */
+#define STS_PORT (1 << 4)
+/* bits 5:7 reserved and zeroed */
+/* save state status - '1' means xHC is saving state */
+#define STS_SAVE (1 << 8)
+/* restore state status - '1' means xHC is restoring state */
+#define STS_RESTORE (1 << 9)
+/* true: save or restore error */
+#define STS_SRE (1 << 10)
+/* true: Controller Not Ready to accept doorbell or op reg writes after reset */
+#define STS_CNR XHCI_STS_CNR
+/* true: internal Host Controller Error - SW needs to reset and reinitialize */
+#define STS_HCE (1 << 12)
+/* bits 13:31 reserved and should be preserved */
+
+/*
+ * DNCTRL - Device Notification Control Register - dev_notification bitmasks
+ * Generate a device notification event when the HC sees a transaction with a
+ * notification type that matches a bit set in this bit field.
+ */
+#define DEV_NOTE_MASK (0xffff)
+#define ENABLE_DEV_NOTE(x) (1 << (x))
+/* Most of the device notification types should only be used for debug.
+ * SW does need to pay attention to function wake notifications.
+ */
+#define DEV_NOTE_FWAKE ENABLE_DEV_NOTE(1)
+
+/* CRCR - Command Ring Control Register - cmd_ring bitmasks */
+/* bit 0 is the command ring cycle state */
+/* stop ring operation after completion of the currently executing command */
+#define CMD_RING_PAUSE (1 << 1)
+/* stop ring immediately - abort the currently executing command */
+#define CMD_RING_ABORT (1 << 2)
+/* true: command ring is running */
+#define CMD_RING_RUNNING (1 << 3)
+/* bits 4:5 reserved and should be preserved */
+/* Command Ring pointer - bit mask for the lower 32 bits. */
+#define CMD_RING_RSVD_BITS (0x3f)
+
+/* CONFIG - Configure Register - config_reg bitmasks */
+/* bits 0:7 - maximum number of device slots enabled (NumSlotsEn) */
+#define MAX_DEVS(p) ((p) & 0xff)
+/* bits 8:31 - reserved and should be preserved */
+
+/* PORTSC - Port Status and Control Register - port_status_base bitmasks */
+/* true: device connected */
+#define PORT_CONNECT (1 << 0)
+/* true: port enabled */
+#define PORT_PE (1 << 1)
+/* bit 2 reserved and zeroed */
+/* true: port has an over-current condition */
+#define PORT_OC (1 << 3)
+/* true: port reset signaling asserted */
+#define PORT_RESET (1 << 4)
+/* Port Link State - bits 5:8
+ * A read gives the current link PM state of the port,
+ * a write with Link State Write Strobe set sets the link state.
+ */
+#define PORT_PLS_MASK (0xf << 5)
+#define XDEV_U0 (0x0 << 5)
+#define XDEV_U2 (0x2 << 5)
+#define XDEV_U3 (0x3 << 5)
+#define XDEV_RESUME (0xf << 5)
+/* true: port has power (see HCC_PPC) */
+#define PORT_POWER (1 << 9)
+/* bits 10:13 indicate device speed:
+ * 0 - undefined speed - port hasn't be initialized by a reset yet
+ * 1 - full speed
+ * 2 - low speed
+ * 3 - high speed
+ * 4 - super speed
+ * 5-15 reserved
+ */
+#define DEV_SPEED_MASK (0xf << 10)
+#define XDEV_FS (0x1 << 10)
+#define XDEV_LS (0x2 << 10)
+#define XDEV_HS (0x3 << 10)
+#define XDEV_SS (0x4 << 10)
+#define DEV_UNDEFSPEED(p) (((p) & DEV_SPEED_MASK) == (0x0<<10))
+#define DEV_FULLSPEED(p) (((p) & DEV_SPEED_MASK) == XDEV_FS)
+#define DEV_LOWSPEED(p) (((p) & DEV_SPEED_MASK) == XDEV_LS)
+#define DEV_HIGHSPEED(p) (((p) & DEV_SPEED_MASK) == XDEV_HS)
+#define DEV_SUPERSPEED(p) (((p) & DEV_SPEED_MASK) == XDEV_SS)
+/* Bits 20:23 in the Slot Context are the speed for the device */
+#define SLOT_SPEED_FS (XDEV_FS << 10)
+#define SLOT_SPEED_LS (XDEV_LS << 10)
+#define SLOT_SPEED_HS (XDEV_HS << 10)
+#define SLOT_SPEED_SS (XDEV_SS << 10)
+/* Port Indicator Control */
+#define PORT_LED_OFF (0 << 14)
+#define PORT_LED_AMBER (1 << 14)
+#define PORT_LED_GREEN (2 << 14)
+#define PORT_LED_MASK (3 << 14)
+/* Port Link State Write Strobe - set this when changing link state */
+#define PORT_LINK_STROBE (1 << 16)
+/* true: connect status change */
+#define PORT_CSC (1 << 17)
+/* true: port enable change */
+#define PORT_PEC (1 << 18)
+/* true: warm reset for a USB 3.0 device is done. A "hot" reset puts the port
+ * into an enabled state, and the device into the default state. A "warm" reset
+ * also resets the link, forcing the device through the link training sequence.
+ * SW can also look at the Port Reset register to see when warm reset is done.
+ */
+#define PORT_WRC (1 << 19)
+/* true: over-current change */
+#define PORT_OCC (1 << 20)
+/* true: reset change - 1 to 0 transition of PORT_RESET */
+#define PORT_RC (1 << 21)
+/* port link status change - set on some port link state transitions:
+ * Transition Reason
+ * --------------------------------------------------------------------------
+ * - U3 to Resume Wakeup signaling from a device
+ * - Resume to Recovery to U0 USB 3.0 device resume
+ * - Resume to U0 USB 2.0 device resume
+ * - U3 to Recovery to U0 Software resume of USB 3.0 device complete
+ * - U3 to U0 Software resume of USB 2.0 device complete
+ * - U2 to U0 L1 resume of USB 2.1 device complete
+ * - U0 to U0 (???) L1 entry rejection by USB 2.1 device
+ * - U0 to disabled L1 entry error with USB 2.1 device
+ * - Any state to inactive Error on USB 3.0 port
+ */
+#define PORT_PLC (1 << 22)
+/* port configure error change - port failed to configure its link partner */
+#define PORT_CEC (1 << 23)
+/* bit 24 reserved */
+/* wake on connect (enable) */
+#define PORT_WKCONN_E (1 << 25)
+/* wake on disconnect (enable) */
+#define PORT_WKDISC_E (1 << 26)
+/* wake on over-current (enable) */
+#define PORT_WKOC_E (1 << 27)
+/* bits 28:29 reserved */
+/* true: device is removable - for USB 3.0 roothub emulation */
+#define PORT_DEV_REMOVE (1 << 30)
+/* Initiate a warm port reset - complete when PORT_WRC is '1' */
+#define PORT_WR (1 << 31)
+
+/* We mark duplicate entries with -1 */
+#define DUPLICATE_ENTRY ((u8)(-1))
+
+/* Port Power Management Status and Control - port_power_base bitmasks */
+/* Inactivity timer value for transitions into U1, in microseconds.
+ * Timeout can be up to 127us. 0xFF means an infinite timeout.
+ */
+#define PORT_U1_TIMEOUT(p) ((p) & 0xff)
+/* Inactivity timer value for transitions into U2 */
+#define PORT_U2_TIMEOUT(p) (((p) & 0xff) << 8)
+/* Bits 24:31 for port testing */
+
+/* USB2 Protocol PORTSPMSC */
+#define PORT_L1S_MASK 7
+#define PORT_L1S_SUCCESS 1
+#define PORT_RWE (1 << 3)
+#define PORT_HIRD(p) (((p) & 0xf) << 4)
+#define PORT_HIRD_MASK (0xf << 4)
+#define PORT_L1DS(p) (((p) & 0xff) << 8)
+#define PORT_HLE (1 << 16)
+
+/**
+* struct xhci_intr_reg - Interrupt Register Set
+* @irq_pending: IMAN - Interrupt Management Register. Used to enable
+* interrupts and check for pending interrupts.
+* @irq_control: IMOD - Interrupt Moderation Register.
+* Used to throttle interrupts.
+* @erst_size: Number of segments in the
+ Event Ring Segment Table (ERST).
+* @erst_base: ERST base address.
+* @erst_dequeue: Event ring dequeue pointer.
+*
+* Each interrupter (defined by a MSI-X vector) has an event ring and an Event
+* Ring Segment Table (ERST) associated with it.
+* The event ring is comprised of multiple segments of the same size.
+* The HC places events on the ring and "updates the Cycle bit in the TRBs to
+* indicate to software the current position of the Enqueue Pointer."
+* The HCD (Linux) processes those events and updates the dequeue pointer.
+*/
+struct xhci_intr_reg {
+ volatile __le32 irq_pending;
+ volatile __le32 irq_control;
+ volatile __le32 erst_size;
+ volatile __le32 rsvd;
+ volatile __le64 erst_base;
+ volatile __le64 erst_dequeue;
+};
+
+/* irq_pending bitmasks */
+#define ER_IRQ_PENDING(p) ((p) & 0x1)
+/* bits 2:31 need to be preserved */
+/* THIS IS BUGGY - FIXME - IP IS WRITE 1 TO CLEAR */
+#define ER_IRQ_CLEAR(p) ((p) & 0xfffffffe)
+#define ER_IRQ_ENABLE(p) ((ER_IRQ_CLEAR(p)) | 0x2)
+#define ER_IRQ_DISABLE(p) ((ER_IRQ_CLEAR(p)) & ~(0x2))
+
+/* irq_control bitmasks */
+/* Minimum interval between interrupts (in 250ns intervals). The interval
+ * between interrupts will be longer if there are no events on the event ring.
+ * Default is 4000 (1 ms).
+ */
+#define ER_IRQ_INTERVAL_MASK (0xffff)
+/* Counter used to count down the time to the next interrupt - HW use only */
+#define ER_IRQ_COUNTER_MASK (0xffff << 16)
+
+/* erst_size bitmasks */
+/* Preserve bits 16:31 of erst_size */
+#define ERST_SIZE_MASK (0xffff << 16)
+
+/* erst_dequeue bitmasks */
+/* Dequeue ERST Segment Index (DESI) - Segment number (or alias)
+ * where the current dequeue pointer lies. This is an optional HW hint.
+ */
+#define ERST_DESI_MASK (0x7)
+/* Event Handler Busy (EHB) - is the event ring scheduled to be serviced by
+ * a work queue (or delayed service routine)?
+ */
+#define ERST_EHB (1 << 3)
+#define ERST_PTR_MASK (0xf)
+
+/**
+ * struct xhci_run_regs
+ * @microframe_index: MFINDEX - current microframe number
+ *
+ * Section 5.5 Host Controller Runtime Registers:
+ * "Software should read and write these registers using only Dword (32 bit)
+ * or larger accesses"
+ */
+struct xhci_run_regs {
+ __le32 microframe_index;
+ __le32 rsvd[7];
+ struct xhci_intr_reg ir_set[128];
+};
+
+/**
+ * struct doorbell_array
+ *
+ * Bits 0 - 7: Endpoint target
+ * Bits 8 - 15: RsvdZ
+ * Bits 16 - 31: Stream ID
+ *
+ * Section 5.6
+ */
+struct xhci_doorbell_array {
+ volatile __le32 doorbell[256];
+};
+
+#define DB_VALUE(ep, stream) ((((ep) + 1) & 0xff) | ((stream) << 16))
+#define DB_VALUE_HOST 0x00000000
+
+/**
+ * struct xhci_protocol_caps
+ * @revision: major revision, minor revision, capability ID,
+ * and next capability pointer.
+ * @name_string: Four ASCII characters to say which spec this xHC
+ * follows, typically "USB ".
+ * @port_info: Port offset, count, and protocol-defined information.
+ */
+struct xhci_protocol_caps {
+ u32 revision;
+ u32 name_string;
+ u32 port_info;
+};
+
+#define XHCI_EXT_PORT_MAJOR(x) (((x) >> 24) & 0xff)
+#define XHCI_EXT_PORT_OFF(x) ((x) & 0xff)
+#define XHCI_EXT_PORT_COUNT(x) (((x) >> 8) & 0xff)
+
+/**
+ * struct xhci_container_ctx
+ * @type: Type of context. Used to calculated offsets to contained contexts.
+ * @size: Size of the context data
+ * @bytes: The raw context data given to HW
+ * @dma: dma address of the bytes
+ *
+ * Represents either a Device or Input context. Holds a pointer to the raw
+ * memory used for the context (bytes) and dma address of it (dma).
+ */
+struct xhci_container_ctx {
+ unsigned type;
+#define XHCI_CTX_TYPE_DEVICE 0x1
+#define XHCI_CTX_TYPE_INPUT 0x2
+
+ int size;
+ u8 *bytes;
+};
+
+/**
+ * struct xhci_slot_ctx
+ * @dev_info: Route string, device speed, hub info, and last valid endpoint
+ * @dev_info2: Max exit latency for device number, root hub port number
+ * @tt_info: tt_info is used to construct split transaction tokens
+ * @dev_state: slot state and device address
+ *
+ * Slot Context - section 6.2.1.1. This assumes the HC uses 32-byte context
+ * structures. If the HC uses 64-byte contexts, there is an additional 32 bytes
+ * reserved at the end of the slot context for HC internal use.
+ */
+struct xhci_slot_ctx {
+ __le32 dev_info;
+ __le32 dev_info2;
+ __le32 tt_info;
+ __le32 dev_state;
+ /* offset 0x10 to 0x1f reserved for HC internal use */
+ __le32 reserved[4];
+};
+
+/* dev_info bitmasks */
+/* Route String - 0:19 */
+#define ROUTE_STRING_MASK (0xfffff)
+/* Device speed - values defined by PORTSC Device Speed field - 20:23 */
+#define DEV_SPEED (0xf << 20)
+/* bit 24 reserved */
+/* Is this LS/FS device connected through a HS hub? - bit 25 */
+#define DEV_MTT (0x1 << 25)
+/* Set if the device is a hub - bit 26 */
+#define DEV_HUB (0x1 << 26)
+/* Index of the last valid endpoint context in this device context - 27:31 */
+#define LAST_CTX_MASK (0x1f << 27)
+#define LAST_CTX(p) ((p) << 27)
+#define LAST_CTX_TO_EP_NUM(p) (((p) >> 27) - 1)
+#define SLOT_FLAG (1 << 0)
+#define EP0_FLAG (1 << 1)
+
+/* dev_info2 bitmasks */
+/* Max Exit Latency (ms) - worst case time to wake up all links in dev path */
+#define MAX_EXIT (0xffff)
+/* Root hub port number that is needed to access the USB device */
+#define ROOT_HUB_PORT(p) (((p) & 0xff) << 16)
+#define ROOT_HUB_PORT_MASK (0xff)
+#define ROOT_HUB_PORT_SHIFT (16)
+#define DEVINFO_TO_ROOT_HUB_PORT(p) (((p) >> 16) & 0xff)
+/* Maximum number of ports under a hub device */
+#define XHCI_MAX_PORTS(p) (((p) & 0xff) << 24)
+
+/* tt_info bitmasks */
+/*
+ * TT Hub Slot ID - for low or full speed devices attached to a high-speed hub
+ * The Slot ID of the hub that isolates the high speed signaling from
+ * this low or full-speed device. '0' if attached to root hub port.
+ */
+#define TT_SLOT (0xff)
+/*
+ * The number of the downstream facing port of the high-speed hub
+ * '0' if the device is not low or full speed.
+ */
+#define TT_PORT (0xff << 8)
+#define TT_THINK_TIME(p) (((p) & 0x3) << 16)
+
+/* dev_state bitmasks */
+/* USB device address - assigned by the HC */
+#define DEV_ADDR_MASK (0xff)
+/* bits 8:26 reserved */
+/* Slot state */
+#define SLOT_STATE (0x1f << 27)
+#define GET_SLOT_STATE(p) (((p) & (0x1f << 27)) >> 27)
+
+#define SLOT_STATE_DISABLED 0
+#define SLOT_STATE_ENABLED SLOT_STATE_DISABLED
+#define SLOT_STATE_DEFAULT 1
+#define SLOT_STATE_ADDRESSED 2
+#define SLOT_STATE_CONFIGURED 3
+
+/**
+ * struct xhci_ep_ctx
+ * @ep_info: endpoint state, streams, mult, and interval information.
+ * @ep_info2: information on endpoint type, max packet size, max burst size,
+ * error count, and whether the HC will force an event for all
+ * transactions.
+ * @deq: 64-bit ring dequeue pointer address. If the endpoint only
+ * defines one stream, this points to the endpoint transfer ring.
+ * Otherwise, it points to a stream context array, which has a
+ * ring pointer for each flow.
+ * @tx_info:
+ * Average TRB lengths for the endpoint ring and
+ * max payload within an Endpoint Service Interval Time (ESIT).
+ *
+ * Endpoint Context - section 6.2.1.2.This assumes the HC uses 32-byte context
+ * structures.If the HC uses 64-byte contexts, there is an additional 32 bytes
+ * reserved at the end of the endpoint context for HC internal use.
+ */
+struct xhci_ep_ctx {
+ __le32 ep_info;
+ __le32 ep_info2;
+ __le64 deq;
+ __le32 tx_info;
+ /* offset 0x14 - 0x1f reserved for HC internal use */
+ __le32 reserved[3];
+};
+
+/* ep_info bitmasks */
+/*
+ * Endpoint State - bits 0:2
+ * 0 - disabled
+ * 1 - running
+ * 2 - halted due to halt condition - ok to manipulate endpoint ring
+ * 3 - stopped
+ * 4 - TRB error
+ * 5-7 - reserved
+ */
+#define EP_STATE_MASK (0xf)
+#define EP_STATE_DISABLED 0
+#define EP_STATE_RUNNING 1
+#define EP_STATE_HALTED 2
+#define EP_STATE_STOPPED 3
+#define EP_STATE_ERROR 4
+/* Mult - Max number of burtst within an interval, in EP companion desc. */
+#define EP_MULT(p) (((p) & 0x3) << 8)
+#define CTX_TO_EP_MULT(p) (((p) >> 8) & 0x3)
+/* bits 10:14 are Max Primary Streams */
+/* bit 15 is Linear Stream Array */
+/* Interval - period between requests to an endpoint - 125u increments. */
+#define EP_INTERVAL(p) (((p) & 0xff) << 16)
+#define EP_INTERVAL_TO_UFRAMES(p) (1 << (((p) >> 16) & 0xff))
+#define CTX_TO_EP_INTERVAL(p) (((p) >> 16) & 0xff)
+#define EP_MAXPSTREAMS_MASK (0x1f << 10)
+#define EP_MAXPSTREAMS(p) (((p) << 10) & EP_MAXPSTREAMS_MASK)
+/* Endpoint is set up with a Linear Stream Array (vs. Secondary Stream Array) */
+#define EP_HAS_LSA (1 << 15)
+
+/* ep_info2 bitmasks */
+/*
+ * Force Event - generate transfer events for all TRBs for this endpoint
+ * This will tell the HC to ignore the IOC and ISP flags (for debugging only).
+ */
+#define FORCE_EVENT (0x1)
+#define ERROR_COUNT(p) (((p) & 0x3) << 1)
+#define ERROR_COUNT_SHIFT (1)
+#define ERROR_COUNT_MASK (0x3)
+#define CTX_TO_EP_TYPE(p) (((p) >> 3) & 0x7)
+#define EP_TYPE(p) ((p) << 3)
+#define EP_TYPE_SHIFT (3)
+#define ISOC_OUT_EP 1
+#define BULK_OUT_EP 2
+#define INT_OUT_EP 3
+#define CTRL_EP 4
+#define ISOC_IN_EP 5
+#define BULK_IN_EP 6
+#define INT_IN_EP 7
+/* bit 6 reserved */
+/* bit 7 is Host Initiate Disable - for disabling stream selection */
+#define MAX_BURST(p) (((p)&0xff) << 8)
+#define MAX_BURST_MASK (0xff)
+#define MAX_BURST_SHIFT (8)
+#define CTX_TO_MAX_BURST(p) (((p) >> 8) & 0xff)
+#define MAX_PACKET(p) (((p)&0xffff) << 16)
+#define MAX_PACKET_MASK (0xffff)
+#define MAX_PACKET_DECODED(p) (((p) >> 16) & 0xffff)
+#define MAX_PACKET_SHIFT (16)
+
+/* Get max packet size from ep desc. Bit 10..0 specify the max packet size.
+ * USB2.0 spec 9.6.6.
+ */
+#define GET_MAX_PACKET(p) ((p) & 0x7ff)
+
+/* tx_info bitmasks */
+#define AVG_TRB_LENGTH_FOR_EP(p) ((p) & 0xffff)
+#define MAX_ESIT_PAYLOAD_FOR_EP(p) (((p) & 0xffff) << 16)
+#define CTX_TO_MAX_ESIT_PAYLOAD(p) (((p) >> 16) & 0xffff)
+
+/* deq bitmasks */
+#define EP_CTX_CYCLE_MASK (1 << 0)
+
+
+/**
+ * struct xhci_input_control_context
+ * Input control context; see section 6.2.5.
+ *
+ * @drop_context: set the bit of the endpoint context you want to disable
+ * @add_context: set the bit of the endpoint context you want to enable
+ */
+struct xhci_input_control_ctx {
+ volatile __le32 drop_flags;
+ volatile __le32 add_flags;
+ __le32 rsvd2[6];
+};
+
+
+/**
+ * struct xhci_device_context_array
+ * @dev_context_ptr array of 64-bit DMA addresses for device contexts
+ */
+struct xhci_device_context_array {
+ /* 64-bit device addresses; we only write 32-bit addresses */
+ __le64 dev_context_ptrs[MAX_HC_SLOTS];
+};
+/* TODO: write function to set the 64-bit device DMA address */
+/*
+ * TODO: change this to be dynamically sized at HC mem init time since the HC
+ * might not be able to handle the maximum number of devices possible.
+ */
+
+
+struct xhci_transfer_event {
+ /* 64-bit buffer address, or immediate data */
+ __le64 buffer;
+ __le32 transfer_len;
+ /* This field is interpreted differently based on the type of TRB */
+ volatile __le32 flags;
+};
+
+/* Transfer event TRB length bit mask */
+/* bits 0:23 */
+#define EVENT_TRB_LEN(p) ((p) & 0xffffff)
+
+/** Transfer Event bit fields **/
+#define TRB_TO_EP_ID(p) (((p) >> 16) & 0x1f)
+
+/* Completion Code - only applicable for some types of TRBs */
+#define COMP_CODE_MASK (0xff << 24)
+#define COMP_CODE_SHIFT (24)
+#define GET_COMP_CODE(p) (((p) & COMP_CODE_MASK) >> 24)
+
+typedef enum {
+ COMP_SUCCESS = 1,
+ /* Data Buffer Error */
+ COMP_DB_ERR, /* 2 */
+ /* Babble Detected Error */
+ COMP_BABBLE, /* 3 */
+ /* USB Transaction Error */
+ COMP_TX_ERR, /* 4 */
+ /* TRB Error - some TRB field is invalid */
+ COMP_TRB_ERR, /* 5 */
+ /* Stall Error - USB device is stalled */
+ COMP_STALL, /* 6 */
+ /* Resource Error - HC doesn't have memory for that device configuration */
+ COMP_ENOMEM, /* 7 */
+ /* Bandwidth Error - not enough room in schedule for this dev config */
+ COMP_BW_ERR, /* 8 */
+ /* No Slots Available Error - HC ran out of device slots */
+ COMP_ENOSLOTS, /* 9 */
+ /* Invalid Stream Type Error */
+ COMP_STREAM_ERR, /* 10 */
+ /* Slot Not Enabled Error - doorbell rung for disabled device slot */
+ COMP_EBADSLT, /* 11 */
+ /* Endpoint Not Enabled Error */
+ COMP_EBADEP,/* 12 */
+ /* Short Packet */
+ COMP_SHORT_TX, /* 13 */
+ /* Ring Underrun - doorbell rung for an empty isoc OUT ep ring */
+ COMP_UNDERRUN, /* 14 */
+ /* Ring Overrun - isoc IN ep ring is empty when ep is scheduled to RX */
+ COMP_OVERRUN, /* 15 */
+ /* Virtual Function Event Ring Full Error */
+ COMP_VF_FULL, /* 16 */
+ /* Parameter Error - Context parameter is invalid */
+ COMP_EINVAL, /* 17 */
+ /* Bandwidth Overrun Error - isoc ep exceeded its allocated bandwidth */
+ COMP_BW_OVER,/* 18 */
+ /* Context State Error - illegal context state transition requested */
+ COMP_CTX_STATE,/* 19 */
+ /* No Ping Response Error - HC didn't get PING_RESPONSE in time to TX */
+ COMP_PING_ERR,/* 20 */
+ /* Event Ring is full */
+ COMP_ER_FULL,/* 21 */
+ /* Incompatible Device Error */
+ COMP_DEV_ERR,/* 22 */
+ /* Missed Service Error - HC couldn't service an isoc ep within interval */
+ COMP_MISSED_INT,/* 23 */
+ /* Successfully stopped command ring */
+ COMP_CMD_STOP, /* 24 */
+ /* Successfully aborted current command and stopped command ring */
+ COMP_CMD_ABORT, /* 25 */
+ /* Stopped - transfer was terminated by a stop endpoint command */
+ COMP_STOP,/* 26 */
+ /* Same as COMP_EP_STOPPED, but the transferred length in the event
+ * is invalid */
+ COMP_STOP_INVAL, /* 27*/
+ /* Control Abort Error - Debug Capability - control pipe aborted */
+ COMP_DBG_ABORT, /* 28 */
+ /* Max Exit Latency Too Large Error */
+ COMP_MEL_ERR,/* 29 */
+ /* TRB type 30 reserved */
+ /* Isoc Buffer Overrun - an isoc IN ep sent more data than could fit in TD */
+ COMP_BUFF_OVER = 31,
+ /* Event Lost Error - xHC has an "internal event overrun condition" */
+ COMP_ISSUES, /* 32 */
+ /* Undefined Error - reported when other error codes don't apply */
+ COMP_UNKNOWN, /* 33 */
+ /* Invalid Stream ID Error */
+ COMP_STRID_ERR, /* 34 */
+ /* Secondary Bandwidth Error - may be returned by a Configure Endpoint cmd */
+ COMP_2ND_BW_ERR, /* 35 */
+ /* Split Transaction Error */
+ COMP_SPLIT_ERR /* 36 */
+
+} xhci_comp_code;
+
+struct xhci_link_trb {
+ /* 64-bit segment pointer*/
+ volatile __le64 segment_ptr;
+ volatile __le32 intr_target;
+ volatile __le32 control;
+};
+
+/* control bitfields */
+#define LINK_TOGGLE (0x1 << 1)
+
+/* Command completion event TRB */
+struct xhci_event_cmd {
+ /* Pointer to command TRB, or the value passed by the event data trb */
+ volatile __le64 cmd_trb;
+ volatile __le32 status;
+ volatile __le32 flags;
+};
+
+/* flags bitmasks */
+/* bits 16:23 are the virtual function ID */
+/* bits 24:31 are the slot ID */
+#define TRB_TO_SLOT_ID(p) (((p) & (0xff << 24)) >> 24)
+#define TRB_TO_SLOT_ID_SHIFT (24)
+#define TRB_TO_SLOT_ID_MASK (0xff << TRB_TO_SLOT_ID_SHIFT)
+#define SLOT_ID_FOR_TRB(p) (((p) & 0xff) << 24)
+#define SLOT_ID_FOR_TRB_MASK (0xff)
+#define SLOT_ID_FOR_TRB_SHIFT (24)
+
+/* Stop Endpoint TRB - ep_index to endpoint ID for this TRB */
+#define TRB_TO_EP_INDEX(p) ((((p) & (0x1f << 16)) >> 16) - 1)
+#define EP_ID_FOR_TRB(p) ((((p) + 1) & 0x1f) << 16)
+
+#define SUSPEND_PORT_FOR_TRB(p) (((p) & 1) << 23)
+#define TRB_TO_SUSPEND_PORT(p) (((p) & (1 << 23)) >> 23)
+#define LAST_EP_INDEX 30
+
+/* Set TR Dequeue Pointer command TRB fields */
+#define TRB_TO_STREAM_ID(p) ((((p) & (0xffff << 16)) >> 16))
+#define STREAM_ID_FOR_TRB(p) ((((p)) & 0xffff) << 16)
+
+
+/* Port Status Change Event TRB fields */
+/* Port ID - bits 31:24 */
+#define GET_PORT_ID(p) (((p) & (0xff << 24)) >> 24)
+#define PORT_ID_SHIFT (24)
+#define PORT_ID_MASK (0xff << PORT_ID_SHIFT)
+
+/* Normal TRB fields */
+/* transfer_len bitmasks - bits 0:16 */
+#define TRB_LEN(p) ((p) & 0x1ffff)
+#define TRB_LEN_MASK (0x1ffff)
+/* Interrupter Target - which MSI-X vector to target the completion event at */
+#define TRB_INTR_TARGET_SHIFT (22)
+#define TRB_INTR_TARGET_MASK (0x3ff)
+#define TRB_INTR_TARGET(p) (((p) & 0x3ff) << 22)
+#define GET_INTR_TARGET(p) (((p) >> 22) & 0x3ff)
+#define TRB_TBC(p) (((p) & 0x3) << 7)
+#define TRB_TLBPC(p) (((p) & 0xf) << 16)
+
+/* Cycle bit - indicates TRB ownership by HC or HCD */
+#define TRB_CYCLE (1<<0)
+/*
+ * Force next event data TRB to be evaluated before task switch.
+ * Used to pass OS data back after a TD completes.
+ */
+#define TRB_ENT (1<<1)
+/* Interrupt on short packet */
+#define TRB_ISP (1<<2)
+/* Set PCIe no snoop attribute */
+#define TRB_NO_SNOOP (1<<3)
+/* Chain multiple TRBs into a TD */
+#define TRB_CHAIN (1<<4)
+/* Interrupt on completion */
+#define TRB_IOC (1<<5)
+/* The buffer pointer contains immediate data */
+#define TRB_IDT (1<<6)
+
+/* Block Event Interrupt */
+#define TRB_BEI (1<<9)
+
+/* Control transfer TRB specific fields */
+#define TRB_DIR_IN (1<<16)
+#define TRB_TX_TYPE(p) ((p) << 16)
+#define TRB_TX_TYPE_SHIFT (16)
+#define TRB_DATA_OUT 2
+#define TRB_DATA_IN 3
+
+/* Isochronous TRB specific fields */
+#define TRB_SIA (1 << 31)
+
+struct xhci_generic_trb {
+ volatile __le32 field[4];
+};
+
+union xhci_trb {
+ struct xhci_link_trb link;
+ struct xhci_transfer_event trans_event;
+ struct xhci_event_cmd event_cmd;
+ struct xhci_generic_trb generic;
+};
+
+/* TRB bit mask */
+#define TRB_TYPE_BITMASK (0xfc00)
+#define TRB_TYPE(p) ((p) << 10)
+#define TRB_TYPE_SHIFT (10)
+#define TRB_FIELD_TO_TYPE(p) (((p) & TRB_TYPE_BITMASK) >> 10)
+
+/* TRB type IDs */
+typedef enum {
+ /* bulk, interrupt, isoc scatter/gather, and control data stage */
+ TRB_NORMAL = 1,
+ /* setup stage for control transfers */
+ TRB_SETUP, /* 2 */
+ /* data stage for control transfers */
+ TRB_DATA, /* 3 */
+ /* status stage for control transfers */
+ TRB_STATUS, /* 4 */
+ /* isoc transfers */
+ TRB_ISOC, /* 5 */
+ /* TRB for linking ring segments */
+ TRB_LINK, /* 6 */
+ /* TRB for EVENT DATA */
+ TRB_EVENT_DATA, /* 7 */
+ /* Transfer Ring No-op (not for the command ring) */
+ TRB_TR_NOOP, /* 8 */
+ /* Command TRBs */
+ /* Enable Slot Command */
+ TRB_ENABLE_SLOT, /* 9 */
+ /* Disable Slot Command */
+ TRB_DISABLE_SLOT, /* 10 */
+ /* Address Device Command */
+ TRB_ADDR_DEV, /* 11 */
+ /* Configure Endpoint Command */
+ TRB_CONFIG_EP, /* 12 */
+ /* Evaluate Context Command */
+ TRB_EVAL_CONTEXT, /* 13 */
+ /* Reset Endpoint Command */
+ TRB_RESET_EP, /* 14 */
+ /* Stop Transfer Ring Command */
+ TRB_STOP_RING, /* 15 */
+ /* Set Transfer Ring Dequeue Pointer Command */
+ TRB_SET_DEQ, /* 16 */
+ /* Reset Device Command */
+ TRB_RESET_DEV, /* 17 */
+ /* Force Event Command (opt) */
+ TRB_FORCE_EVENT, /* 18 */
+ /* Negotiate Bandwidth Command (opt) */
+ TRB_NEG_BANDWIDTH, /* 19 */
+ /* Set Latency Tolerance Value Command (opt) */
+ TRB_SET_LT, /* 20 */
+ /* Get port bandwidth Command */
+ TRB_GET_BW, /* 21 */
+ /* Force Header Command - generate a transaction or link management packet */
+ TRB_FORCE_HEADER, /* 22 */
+ /* No-op Command - not for transfer rings */
+ TRB_CMD_NOOP, /* 23 */
+ /* TRB IDs 24-31 reserved */
+ /* Event TRBS */
+ /* Transfer Event */
+ TRB_TRANSFER = 32,
+ /* Command Completion Event */
+ TRB_COMPLETION, /* 33 */
+ /* Port Status Change Event */
+ TRB_PORT_STATUS, /* 34 */
+ /* Bandwidth Request Event (opt) */
+ TRB_BANDWIDTH_EVENT, /* 35 */
+ /* Doorbell Event (opt) */
+ TRB_DOORBELL, /* 36 */
+ /* Host Controller Event */
+ TRB_HC_EVENT, /* 37 */
+ /* Device Notification Event - device sent function wake notification */
+ TRB_DEV_NOTE, /* 38 */
+ /* MFINDEX Wrap Event - microframe counter wrapped */
+ TRB_MFINDEX_WRAP, /* 39 */
+ /* TRB IDs 40-47 reserved, 48-63 is vendor-defined */
+ /* Nec vendor-specific command completion event. */
+ TRB_NEC_CMD_COMP = 48, /* 48 */
+ /* Get NEC firmware revision. */
+ TRB_NEC_GET_FW, /* 49 */
+} trb_type;
+
+#define TRB_TYPE_LINK(x) (((x) & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
+/* Above, but for __le32 types -- can avoid work by swapping constants: */
+#define TRB_TYPE_LINK_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \
+ cpu_to_le32(TRB_TYPE(TRB_LINK)))
+#define TRB_TYPE_NOOP_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \
+ cpu_to_le32(TRB_TYPE(TRB_TR_NOOP)))
+
+/*
+ * TRBS_PER_SEGMENT must be a multiple of 4,
+ * since the command ring is 64-byte aligned.
+ * It must also be greater than 16.
+ */
+#define TRBS_PER_SEGMENT 64
+/* Allow two commands + a link TRB, along with any reserved command TRBs */
+#define MAX_RSVD_CMD_TRBS (TRBS_PER_SEGMENT - 3)
+#define SEGMENT_SIZE (TRBS_PER_SEGMENT*16)
+/* SEGMENT_SHIFT should be log2(SEGMENT_SIZE).
+ * Change this if you change TRBS_PER_SEGMENT!
+ */
+#define SEGMENT_SHIFT 10
+/* TRB buffer pointers can't cross 64KB boundaries */
+#define TRB_MAX_BUFF_SHIFT 16
+#define TRB_MAX_BUFF_SIZE (1 << TRB_MAX_BUFF_SHIFT)
+
+struct xhci_segment {
+ union xhci_trb *trbs;
+ /* private to HCD */
+ struct xhci_segment *next;
+};
+
+struct xhci_ring {
+ struct xhci_segment *first_seg;
+ union xhci_trb *enqueue;
+ struct xhci_segment *enq_seg;
+ union xhci_trb *dequeue;
+ struct xhci_segment *deq_seg;
+ /*
+ * Write the cycle state into the TRB cycle field to give ownership of
+ * the TRB to the host controller (if we are the producer), or to check
+ * if we own the TRB (if we are the consumer). See section 4.9.1.
+ */
+ volatile u32 cycle_state;
+ unsigned int num_segs;
+};
+
+struct xhci_erst_entry {
+ /* 64-bit event ring segment address */
+ __le64 seg_addr;
+ __le32 seg_size;
+ /* Set to zero */
+ __le32 rsvd;
+};
+
+struct xhci_erst {
+ struct xhci_erst_entry *entries;
+ unsigned int num_entries;
+ /* Num entries the ERST can contain */
+ unsigned int erst_size;
+};
+
+/*
+ * Each segment table entry is 4*32bits long. 1K seems like an ok size:
+ * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
+ * meaning 64 ring segments.
+ * Initial allocated size of the ERST, in number of entries */
+#define ERST_NUM_SEGS 3
+/* Initial number of event segment rings allocated */
+#define ERST_ENTRIES 3
+/* Initial allocated size of the ERST, in number of entries */
+#define ERST_SIZE 64
+/* Poll every 60 seconds */
+#define POLL_TIMEOUT 60
+/* Stop endpoint command timeout (secs) for URB cancellation watchdog timer */
+#define XHCI_STOP_EP_CMD_TIMEOUT 5
+/* XXX: Make these module parameters */
+
+struct xhci_virt_ep {
+ struct xhci_ring *ring;
+ unsigned int ep_state;
+#define SET_DEQ_PENDING (1 << 0)
+#define EP_HALTED (1 << 1) /* For stall handling */
+#define EP_HALT_PENDING (1 << 2) /* For URB cancellation */
+/* Transitioning the endpoint to using streams, don't enqueue URBs */
+#define EP_GETTING_STREAMS (1 << 3)
+#define EP_HAS_STREAMS (1 << 4)
+/* Transitioning the endpoint to not using streams, don't enqueue URBs */
+#define EP_GETTING_NO_STREAMS (1 << 5)
+};
+
+#define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32)
+
+struct xhci_virt_device {
+ struct usb_device *udev;
+ /*
+ * Commands to the hardware are passed an "input context" that
+ * tells the hardware what to change in its data structures.
+ * The hardware will return changes in an "output context" that
+ * software must allocate for the hardware. We need to keep
+ * track of input and output contexts separately because
+ * these commands might fail and we don't trust the hardware.
+ */
+ struct xhci_container_ctx *out_ctx;
+ /* Used for addressing devices and configuration changes */
+ struct xhci_container_ctx *in_ctx;
+ /* Rings saved to ensure old alt settings can be re-instated */
+#define XHCI_MAX_RINGS_CACHED 31
+ struct xhci_virt_ep eps[31];
+};
+
+/* TODO: copied from ehci.h - can be refactored? */
+/* xHCI spec says all registers are little endian */
+static inline unsigned int xhci_readl(uint32_t volatile *regs)
+{
+ return readl(regs);
+}
+
+static inline void xhci_writel(uint32_t volatile *regs, const unsigned int val)
+{
+ writel(val, regs);
+}
+
+/*
+ * Registers should always be accessed with double word or quad word accesses.
+ * Some xHCI implementations may support 64-bit address pointers. Registers
+ * with 64-bit address pointers should be written to with dword accesses by
+ * writing the low dword first (ptr[0]), then the high dword (ptr[1]) second.
+ * xHCI implementations that do not support 64-bit address pointers will ignore
+ * the high dword, and write order is irrelevant.
+ */
+static inline u64 xhci_readq(__le64 volatile *regs)
+{
+ __u32 *ptr = (__u32 *)regs;
+ u64 val_lo = readl(ptr);
+ u64 val_hi = readl(ptr + 1);
+ return val_lo + (val_hi << 32);
+}
+
+static inline void xhci_writeq(__le64 volatile *regs, const u64 val)
+{
+ __u32 *ptr = (__u32 *)regs;
+ u32 val_lo = lower_32_bits(val);
+ /* FIXME */
+ u32 val_hi = 0;
+ writel(val_lo, ptr);
+ writel(val_hi, ptr + 1);
+}
+
+int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr,
+ struct xhci_hcor **ret_hcor);
+void xhci_hcd_stop(int index);
+
+
+/*************************************************************
+ EXTENDED CAPABILITY DEFINITIONS
+*************************************************************/
+/* Up to 16 ms to halt an HC */
+#define XHCI_MAX_HALT_USEC (16*1000)
+/* HC not running - set to 1 when run/stop bit is cleared. */
+#define XHCI_STS_HALT (1 << 0)
+
+/* HCCPARAMS offset from PCI base address */
+#define XHCI_HCC_PARAMS_OFFSET 0x10
+/* HCCPARAMS contains the first extended capability pointer */
+#define XHCI_HCC_EXT_CAPS(p) (((p)>>16)&0xffff)
+
+/* Command and Status registers offset from the Operational Registers address */
+#define XHCI_CMD_OFFSET 0x00
+#define XHCI_STS_OFFSET 0x04
+
+#define XHCI_MAX_EXT_CAPS 50
+
+/* Capability Register */
+/* bits 7:0 - how long is the Capabilities register */
+#define XHCI_HC_LENGTH(p) (((p) >> 00) & 0x00ff)
+
+/* Extended capability register fields */
+#define XHCI_EXT_CAPS_ID(p) (((p) >> 0) & 0xff)
+#define XHCI_EXT_CAPS_NEXT(p) (((p) >> 8) & 0xff)
+#define XHCI_EXT_CAPS_VAL(p) ((p) >> 16)
+/* Extended capability IDs - ID 0 reserved */
+#define XHCI_EXT_CAPS_LEGACY 1
+#define XHCI_EXT_CAPS_PROTOCOL 2
+#define XHCI_EXT_CAPS_PM 3
+#define XHCI_EXT_CAPS_VIRT 4
+#define XHCI_EXT_CAPS_ROUTE 5
+/* IDs 6-9 reserved */
+#define XHCI_EXT_CAPS_DEBUG 10
+/* USB Legacy Support Capability - section 7.1.1 */
+#define XHCI_HC_BIOS_OWNED (1 << 16)
+#define XHCI_HC_OS_OWNED (1 << 24)
+
+/* USB Legacy Support Capability - section 7.1.1 */
+/* Add this offset, plus the value of xECP in HCCPARAMS to the base address */
+#define XHCI_LEGACY_SUPPORT_OFFSET (0x00)
+
+/* USB Legacy Support Control and Status Register - section 7.1.2 */
+/* Add this offset, plus the value of xECP in HCCPARAMS to the base address */
+#define XHCI_LEGACY_CONTROL_OFFSET (0x04)
+/* bits 1:2, 5:12, and 17:19 need to be preserved; bits 21:28 should be zero */
+#define XHCI_LEGACY_DISABLE_SMI ((0x3 << 1) + (0xff << 5) + (0x7 << 17))
+
+/* USB 2.0 xHCI 0.96 L1C capability - section 7.2.2.1.3.2 */
+#define XHCI_L1C (1 << 16)
+
+/* USB 2.0 xHCI 1.0 hardware LMP capability - section 7.2.2.1.3.2 */
+#define XHCI_HLC (1 << 19)
+
+/* command register values to disable interrupts and halt the HC */
+/* start/stop HC execution - do not write unless HC is halted*/
+#define XHCI_CMD_RUN (1 << 0)
+/* Event Interrupt Enable - get irq when EINT bit is set in USBSTS register */
+#define XHCI_CMD_EIE (1 << 2)
+/* Host System Error Interrupt Enable - get irq when HSEIE bit set in USBSTS */
+#define XHCI_CMD_HSEIE (1 << 3)
+/* Enable Wrap Event - '1' means xHC generates an event when MFINDEX wraps. */
+#define XHCI_CMD_EWE (1 << 10)
+
+#define XHCI_IRQS (XHCI_CMD_EIE | XHCI_CMD_HSEIE | XHCI_CMD_EWE)
+
+/* true: Controller Not Ready to accept doorbell or op reg writes after reset */
+#define XHCI_STS_CNR (1 << 11)
+
+struct xhci_ctrl {
+ struct xhci_hccr *hccr; /* R/O registers, not need for volatile */
+ struct xhci_hcor *hcor;
+ struct xhci_doorbell_array *dba;
+ struct xhci_run_regs *run_regs;
+ struct xhci_device_context_array *dcbaa \
+ __attribute__ ((aligned(ARCH_DMA_MINALIGN)));
+ struct xhci_ring *event_ring;
+ struct xhci_ring *cmd_ring;
+ struct xhci_ring *transfer_ring;
+ struct xhci_segment *seg;
+ struct xhci_intr_reg *ir_set;
+ struct xhci_erst erst;
+ struct xhci_erst_entry entry[ERST_NUM_SEGS];
+ struct xhci_virt_device *devs[MAX_HC_SLOTS];
+ int rootdev;
+};
+
+unsigned long trb_addr(struct xhci_segment *seg, union xhci_trb *trb);
+struct xhci_input_control_ctx
+ *xhci_get_input_control_ctx(struct xhci_container_ctx *ctx);
+struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_ctrl *ctrl,
+ struct xhci_container_ctx *ctx);
+struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_ctrl *ctrl,
+ struct xhci_container_ctx *ctx,
+ unsigned int ep_index);
+void xhci_endpoint_copy(struct xhci_ctrl *ctrl,
+ struct xhci_container_ctx *in_ctx,
+ struct xhci_container_ctx *out_ctx,
+ unsigned int ep_index);
+void xhci_slot_copy(struct xhci_ctrl *ctrl,
+ struct xhci_container_ctx *in_ctx,
+ struct xhci_container_ctx *out_ctx);
+void xhci_setup_addressable_virt_dev(struct usb_device *udev);
+void xhci_queue_command(struct xhci_ctrl *ctrl, u8 *ptr,
+ u32 slot_id, u32 ep_index, trb_type cmd);
+void xhci_acknowledge_event(struct xhci_ctrl *ctrl);
+union xhci_trb *xhci_wait_for_event(struct xhci_ctrl *ctrl, trb_type expected);
+int xhci_bulk_tx(struct usb_device *udev, unsigned long pipe,
+ int length, void *buffer);
+int xhci_ctrl_tx(struct usb_device *udev, unsigned long pipe,
+ struct devrequest *req, int length, void *buffer);
+int xhci_check_maxpacket(struct usb_device *udev);
+void xhci_flush_cache(uint32_t addr, u32 type_len);
+void xhci_inval_cache(uint32_t addr, u32 type_len);
+void xhci_cleanup(struct xhci_ctrl *ctrl);
+struct xhci_ring *xhci_ring_alloc(unsigned int num_segs, bool link_trbs);
+int xhci_alloc_virt_device(struct usb_device *udev);
+int xhci_mem_init(struct xhci_ctrl *ctrl, struct xhci_hccr *hccr,
+ struct xhci_hcor *hcor);
+
+#endif /* HOST_XHCI_H_ */
# for USB OTG silicon based on Mentor Graphics INVENTRA designs
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libusb_musb-new.o
-
-COBJS-$(CONFIG_MUSB_GADGET) += musb_gadget.o musb_gadget_ep0.o musb_core.o
-COBJS-$(CONFIG_MUSB_GADGET) += musb_uboot.o
-COBJS-$(CONFIG_MUSB_HOST) += musb_host.o musb_core.o musb_uboot.o
-COBJS-$(CONFIG_USB_MUSB_DSPS) += musb_dsps.o
-COBJS-$(CONFIG_USB_MUSB_AM35X) += am35x.o
-COBJS-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o
+obj-$(CONFIG_MUSB_GADGET) += musb_gadget.o musb_gadget_ep0.o musb_core.o
+obj-$(CONFIG_MUSB_GADGET) += musb_uboot.o
+obj-$(CONFIG_MUSB_HOST) += musb_host.o musb_core.o musb_uboot.o
+obj-$(CONFIG_USB_MUSB_DSPS) += musb_dsps.o
+obj-$(CONFIG_USB_MUSB_AM35X) += am35x.o
+obj-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o
CFLAGS_NO_WARN := $(call cc-option,-Wno-unused-variable) \
$(call cc-option,-Wno-unused-but-set-variable) \
$(call cc-option,-Wno-unused-label)
CFLAGS += $(CFLAGS_NO_WARN)
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-#$(LIB): $(OBJS)
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
return submit_urb(&hcd, urb);
}
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
u8 power;
void *mbase;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libusb_musb.o
-
-COBJS-$(CONFIG_MUSB_HCD) += musb_hcd.o musb_core.o
-COBJS-$(CONFIG_MUSB_UDC) += musb_udc.o musb_core.o
-COBJS-$(CONFIG_USB_BLACKFIN) += blackfin_usb.o
-COBJS-$(CONFIG_USB_DAVINCI) += davinci.o
-COBJS-$(CONFIG_USB_OMAP3) += omap3.o
-COBJS-$(CONFIG_USB_DA8XX) += da8xx.o
-COBJS-$(CONFIG_USB_AM35X) += am35x.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_MUSB_HCD) += musb_hcd.o musb_core.o
+obj-$(CONFIG_MUSB_UDC) += musb_udc.o musb_core.o
+obj-$(CONFIG_USB_BLACKFIN) += blackfin_usb.o
+obj-$(CONFIG_USB_DAVINCI) += davinci.o
+obj-$(CONFIG_USB_OMAP3) += omap3.o
+obj-$(CONFIG_USB_DA8XX) += da8xx.o
+obj-$(CONFIG_USB_AM35X) += am35x.o
/*
* This function initializes the usb controller module.
*/
-int usb_lowlevel_init(int index, void **controller)
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
u8 power;
u32 timeout;
*/
#include <common.h>
-#include <usb/musb_udc.h>
+#include <usbdevice.h>
+#include <usb/udc.h>
#include "../gadget/ep0.h"
#include "musb_core.h"
#if defined(CONFIG_USB_OMAP3)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libusb_phy.o
-
-COBJS-$(CONFIG_TWL4030_USB) += twl4030.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_TWL4030_USB) += twl4030.o
+obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o
--- /dev/null
+/*
+ * OMAP USB PHY Support
+ *
+ * (C) Copyright 2013
+ * Texas Instruments, <www.ti.com>
+ *
+ * Author: Dan Murphy <dmurphy@ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <asm-generic/errno.h>
+#include <asm/omap_common.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/sys_proto.h>
+
+#include <linux/compat.h>
+#include <linux/usb/dwc3.h>
+#include <linux/usb/xhci-omap.h>
+
+#include "../host/xhci.h"
+
+#ifdef CONFIG_OMAP_USB3PHY1_HOST
+struct usb_dpll_params {
+ u16 m;
+ u8 n;
+ u8 freq:3;
+ u8 sd;
+ u32 mf;
+};
+
+#define NUM_USB_CLKS 6
+
+static struct usb_dpll_params omap_usb3_dpll_params[NUM_USB_CLKS] = {
+ {1250, 5, 4, 20, 0}, /* 12 MHz */
+ {3125, 20, 4, 20, 0}, /* 16.8 MHz */
+ {1172, 8, 4, 20, 65537}, /* 19.2 MHz */
+ {1250, 12, 4, 20, 0}, /* 26 MHz */
+ {3125, 47, 4, 20, 92843}, /* 38.4 MHz */
+ {1000, 7, 4, 10, 0}, /* 20 MHz */
+};
+
+static void omap_usb_dpll_relock(struct omap_usb3_phy *phy_regs)
+{
+ u32 val;
+
+ writel(SET_PLL_GO, &phy_regs->pll_go);
+ do {
+ val = readl(&phy_regs->pll_status);
+ if (val & PLL_LOCK)
+ break;
+ } while (1);
+}
+
+static void omap_usb_dpll_lock(struct omap_usb3_phy *phy_regs)
+{
+ u32 clk_index = get_sys_clk_index();
+ u32 val;
+
+ val = readl(&phy_regs->pll_config_1);
+ val &= ~PLL_REGN_MASK;
+ val |= omap_usb3_dpll_params[clk_index].n << PLL_REGN_SHIFT;
+ writel(val, &phy_regs->pll_config_1);
+
+ val = readl(&phy_regs->pll_config_2);
+ val &= ~PLL_SELFREQDCO_MASK;
+ val |= omap_usb3_dpll_params[clk_index].freq << PLL_SELFREQDCO_SHIFT;
+ writel(val, &phy_regs->pll_config_2);
+
+ val = readl(&phy_regs->pll_config_1);
+ val &= ~PLL_REGM_MASK;
+ val |= omap_usb3_dpll_params[clk_index].m << PLL_REGM_SHIFT;
+ writel(val, &phy_regs->pll_config_1);
+
+ val = readl(&phy_regs->pll_config_4);
+ val &= ~PLL_REGM_F_MASK;
+ val |= omap_usb3_dpll_params[clk_index].mf << PLL_REGM_F_SHIFT;
+ writel(val, &phy_regs->pll_config_4);
+
+ val = readl(&phy_regs->pll_config_3);
+ val &= ~PLL_SD_MASK;
+ val |= omap_usb3_dpll_params[clk_index].sd << PLL_SD_SHIFT;
+ writel(val, &phy_regs->pll_config_3);
+
+ omap_usb_dpll_relock(phy_regs);
+}
+
+static void usb3_phy_partial_powerup(struct omap_usb3_phy *phy_regs)
+{
+ u32 rate = get_sys_clk_freq()/1000000;
+ u32 val;
+
+ val = readl((*ctrl)->control_phy_power_usb);
+ val &= ~(USB3_PWRCTL_CLK_CMD_MASK | USB3_PWRCTL_CLK_FREQ_MASK);
+ val |= (USB3_PHY_PARTIAL_RX_POWERON | USB3_PHY_TX_RX_POWERON);
+ val |= rate << USB3_PWRCTL_CLK_FREQ_SHIFT;
+
+ writel(val, (*ctrl)->control_phy_power_usb);
+}
+
+void usb_phy_power(int on)
+{
+ u32 val;
+
+ val = readl((*ctrl)->control_phy_power_usb);
+ if (on) {
+ val &= ~USB3_PWRCTL_CLK_CMD_MASK;
+ val |= USB3_PHY_TX_RX_POWERON;
+ } else {
+ val &= (~USB3_PWRCTL_CLK_CMD_MASK & ~USB3_PHY_TX_RX_POWERON);
+ }
+
+ writel(val, (*ctrl)->control_phy_power_usb);
+}
+
+void omap_usb3_phy_init(struct omap_usb3_phy *phy_regs)
+{
+ omap_usb_dpll_lock(phy_regs);
+
+ usb3_phy_partial_powerup(phy_regs);
+ /*
+ * Give enough time for the PHY to partially power-up before
+ * powering it up completely. delay value suggested by the HW
+ * team.
+ */
+ mdelay(100);
+ usb3_phy_power(1);
+}
+
+static void omap_enable_usb3_phy(struct omap_xhci *omap)
+{
+ u32 val;
+
+ /* Setting OCP2SCP1 register */
+ setbits_le32((*prcm)->cm_l3init_ocp2scp1_clkctrl,
+ OCP2SCP1_CLKCTRL_MODULEMODE_HW);
+
+ /* Turn on 32K AON clk */
+ setbits_le32((*prcm)->cm_coreaon_usb_phy_core_clkctrl,
+ USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K);
+
+ /* Setting CM_L3INIT_CLKSTCTRL to 0x0 i.e NO sleep */
+ writel(0x0, (*prcm)->cm_l3init_clkstctrl);
+
+ val = (USBOTGSS_DMADISABLE |
+ USBOTGSS_STANDBYMODE_SMRT_WKUP |
+ USBOTGSS_IDLEMODE_NOIDLE);
+ writel(val, &omap->otg_wrapper->sysconfig);
+
+ /* Clear the utmi OTG status */
+ val = readl(&omap->otg_wrapper->utmi_otg_status);
+ writel(val, &omap->otg_wrapper->utmi_otg_status);
+
+ /* Enable interrupts */
+ writel(USBOTGSS_COREIRQ_EN, &omap->otg_wrapper->irqenable_set_0);
+ val = (USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN |
+ USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN |
+ USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN |
+ USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN |
+ USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN |
+ USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN |
+ USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN |
+ USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN |
+ USBOTGSS_IRQ_SET_1_OEVT_EN);
+ writel(val, &omap->otg_wrapper->irqenable_set_1);
+
+ /* Clear the IRQ status */
+ val = readl(&omap->otg_wrapper->irqstatus_1);
+ writel(val, &omap->otg_wrapper->irqstatus_1);
+ val = readl(&omap->otg_wrapper->irqstatus_0);
+ writel(val, &omap->otg_wrapper->irqstatus_0);
+
+ /* Enable the USB OTG Super speed clocks */
+ val = (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW);
+ setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl, val);
+
+};
+#endif /* CONFIG_OMAP_USB3PHY1_HOST */
+
+#ifdef CONFIG_OMAP_USB2PHY2_HOST
+static void omap_enable_usb2_phy2(struct omap_xhci *omap)
+{
+ u32 reg, val;
+
+ val = (~USB2PHY_AUTORESUME_EN & USB2PHY_DISCHGDET);
+ writel(val, (*ctrl)->control_srcomp_north_side);
+
+ setbits_le32((*prcm)->cm_coreaon_usb_phy2_core_clkctrl,
+ USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K);
+
+ setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl,
+ (USBPHY_CORE_CLKCTRL_OPTFCLKEN_CLK32K |
+ OTG_SS_CLKCTRL_MODULEMODE_HW));
+
+ /* This is an undocumented Reserved register */
+ reg = 0x4a0086c0;
+ val = readl(reg);
+ val |= 0x100;
+ setbits_le32(reg, val);
+}
+
+void usb_phy_power(int on)
+{
+ return;
+}
+#endif /* CONFIG_OMAP_USB2PHY2_HOST */
+
+#ifdef CONFIG_AM437X_USB2PHY2_HOST
+static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
+{
+ const u32 usb_otg_ss_clk_val = (USBOTGSSX_CLKCTRL_MODULE_EN |
+ USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960);
+
+ writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS0_CLKCTRL);
+ writel(usb_otg_ss_clk_val, PRM_PER_USB_OTG_SS1_CLKCTRL);
+
+ writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP0_CLKCTRL);
+ writel(USBPHYOCPSCP_MODULE_EN, PRM_PER_USBPHYOCP2SCP1_CLKCTRL);
+}
+
+void usb_phy_power(int on)
+{
+ return;
+}
+#endif /* CONFIG_AM437X_USB2PHY2_HOST */
+
+void omap_reset_usb_phy(struct dwc3 *dwc3_reg)
+{
+ /* Assert USB3 PHY reset */
+ setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST);
+
+ /* Assert USB2 PHY reset */
+ setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST);
+
+ mdelay(100);
+
+ /* Clear USB3 PHY reset */
+ clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST);
+
+ /* Clear USB2 PHY reset */
+ clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST);
+
+}
+
+void omap_enable_phy(struct omap_xhci *omap)
+{
+#ifdef CONFIG_OMAP_USB2PHY2_HOST
+ omap_enable_usb2_phy2(omap);
+#endif
+
+#ifdef CONFIG_AM437X_USB2PHY2_HOST
+ am437x_enable_usb2_phy2(omap);
+#endif
+
+#ifdef CONFIG_OMAP_USB3PHY1_HOST
+ omap_enable_usb3_phy(omap);
+ omap_usb3_phy_init(omap->usb3_phy);
+#endif
+}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libusb_ulpi.o
-
-COBJS-$(CONFIG_USB_ULPI) += ulpi.o
-COBJS-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi-viewport.o
-COBJS-$(CONFIG_USB_ULPI_VIEWPORT_OMAP) += omap-ulpi-viewport.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_USB_ULPI) += ulpi.o
+obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi-viewport.o
+obj-$(CONFIG_USB_ULPI_VIEWPORT_OMAP) += omap-ulpi-viewport.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libvideo.o
-
-COBJS-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
-COBJS-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
-COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
-COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o
-COBJS-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o
-COBJS-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o
-COBJS-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \
+obj-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
+obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
+obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
+obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
+obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o
+obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o
+obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \
exynos_mipi_dsi_lowlevel.o
-COBJS-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o
-COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
-COBJS-$(CONFIG_L5F31188) += l5f31188.o
-COBJS-$(CONFIG_MPC8XX_LCD) += mpc8xx_lcd.o
-COBJS-$(CONFIG_PXA_LCD) += pxa_lcd.o
-COBJS-$(CONFIG_S6E8AX0) += s6e8ax0.o
-COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
-COBJS-$(CONFIG_LD9040) += ld9040.o
-COBJS-$(CONFIG_SED156X) += sed156x.o
-COBJS-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
-COBJS-$(CONFIG_VIDEO_COREBOOT) += coreboot_fb.o
-COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
-COBJS-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
-COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
-COBJS-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o
-COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
-COBJS-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o
-COBJS-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
-COBJS-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
-COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
-COBJS-$(CONFIG_VIDEO_SM501) += sm501.o
-COBJS-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
-COBJS-$(CONFIG_VIDEO_TEGRA) += tegra.o
-COBJS-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
-COBJS-$(CONFIG_FORMIKE) += formike.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o
+obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
+obj-$(CONFIG_L5F31188) += l5f31188.o
+obj-$(CONFIG_MPC8XX_LCD) += mpc8xx_lcd.o
+obj-$(CONFIG_PXA_LCD) += pxa_lcd.o
+obj-$(CONFIG_S6E8AX0) += s6e8ax0.o
+obj-$(CONFIG_S6E63D6) += s6e63d6.o
+obj-$(CONFIG_LD9040) += ld9040.o
+obj-$(CONFIG_SED156X) += sed156x.o
+obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o
+obj-$(CONFIG_VIDEO_COREBOOT) += coreboot_fb.o
+obj-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
+obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
+obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
+obj-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o
+obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
+obj-$(CONFIG_VIDEO_IPUV3) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o
+obj-$(CONFIG_VIDEO_MXS) += mxsfb.o videomodes.o
+obj-$(CONFIG_VIDEO_OMAP3) += omap3_dss.o
+obj-$(CONFIG_VIDEO_SED13806) += sed13806.o
+obj-$(CONFIG_VIDEO_SM501) += sm501.o
+obj-$(CONFIG_VIDEO_SMI_LYNXEM) += smiLynxEM.o videomodes.o
+obj-$(CONFIG_VIDEO_TEGRA) += tegra.o
+obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
+obj-$(CONFIG_FORMIKE) += formike.o
return 0;
}
+void video_clear(void)
+{
+ if (!video_fb_address)
+ return;
+#ifdef VIDEO_HW_RECTFILL
+ video_hw_rectfill(VIDEO_PIXEL_SIZE, /* bytes per pixel */
+ 0, /* dest pos x */
+ 0, /* dest pos y */
+ VIDEO_VISIBLE_COLS, /* frame width */
+ VIDEO_VISIBLE_ROWS, /* frame height */
+ bgx /* fill color */
+ );
+#else
+ memsetl(video_fb_address,
+ (VIDEO_VISIBLE_ROWS * VIDEO_LINE_LEN) / sizeof(int), bgx);
+#endif
+}
+
static int video_init(void)
{
unsigned char color8;
}
eorx = fgx ^ bgx;
+ video_clear();
+
#ifdef CONFIG_VIDEO_LOGO
/* Plot the logo and get start point of console */
debug("Video: Drawing the logo ...\n");
{
return CONSOLE_COLS;
}
-
-void video_clear(void)
-{
- if (!video_fb_address)
- return;
-#ifdef VIDEO_HW_RECTFILL
- video_hw_rectfill(VIDEO_PIXEL_SIZE, /* bytes per pixel */
- 0, /* dest pos x */
- 0, /* dest pos y */
- VIDEO_VISIBLE_COLS, /* frame width */
- VIDEO_VISIBLE_ROWS, /* frame height */
- bgx /* fill color */
- );
-#else
- memsetl(video_fb_address,
- (VIDEO_VISIBLE_ROWS * VIDEO_LINE_LEN) / sizeof(int), bgx);
-#endif
-}
int ret;
buf[0] = tag;
- buf[1] = val;
- flags |= SPI_XFER_END;
+ ret = spi_xfer(spi, 8, buf, NULL, flags);
+ buf[0] = val;
+ flags = SPI_XFER_END;
+ ret = spi_xfer(spi, 8, buf, NULL, flags);
- ret = spi_xfer(spi, 16, buf, NULL, flags);
#ifdef KWH043ST20_F01_SPI_DEBUG
printf("spi_write_tag_val: tag=%02X, val=%02X ret: %d\n",
tag, val, ret);
if (sig.Vsync_pol)
di_gen |= DI_GEN_POLARITY_3;
- if (sig.clk_pol)
+ if (!sig.clk_pol)
di_gen |= DI_GEN_POL_CLK;
}
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libwatchdog.o
-
-COBJS-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
-COBJS-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
+obj-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
+obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 vf610))
-COBJS-y += imx_watchdog.o
+obj-y += imx_watchdog.o
endif
-COBJS-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
-COBJS-$(CONFIG_S5P) += s5p_wdt.o
-COBJS-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
-COBJS-$(CONFIG_BFIN_WATCHDOG) += bfin_wdt.o
-COBJS-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
+obj-$(CONFIG_S5P) += s5p_wdt.o
+obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
+obj-$(CONFIG_BFIN_WATCHDOG) += bfin_wdt.o
+obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
#define WCR_WDBG 0x02
#define WCR_WDE 0x04 /* WDOG enable */
#define WCR_WDT 0x08
+#define WCR_SRS 0x10
#define WCR_WDW 0x80
#define SET_WCR_WT(x) (x << 8)
#define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
#endif
timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
- writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT |
+ writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS |
WCR_WDW | SET_WCR_WT(timeout), &wdog->wcr);
hw_watchdog_reset();
}
# This Makefile builds the internal U-Boot fdt if CONFIG_OF_CONTROL is
# enabled. See doc/README.fdt-control for more details.
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libdts.o
-
ifeq ($(DEVICE_TREE),)
$(if $(CONFIG_DEFAULT_DEVICE_TREE),,\
$(error Please define CONFIG_DEFAULT_DEVICE_TREE in your board header file))
DTC_FLAGS := -R 4 -p 0x1000 \
$(addprefix -i ,$(DTS_INCDIRS))
-all: $(obj).depend $(LIB)
-
# Use a constant name for this so we can access it from C code.
# objcopy doesn't seem to allow us to set the symbol name independently of
# the filename.
$(notdir ${DT_BIN}) $@
rm $(DT_BIN)
-OBJS-$(CONFIG_OF_EMBED) := dt.o
-
-COBJS := $(OBJS-y)
-
-OBJS := $(addprefix $(obj),$(COBJS))
+obj-$(CONFIG_OF_EMBED) := dt.o
binary: $(DT_BIN)
-
-$(LIB): $(OBJS) $(DTB)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#########################################################################
$(OUTPUT): $(OBJS)
- $(LD) -Ttext $(LOAD_ADDR) -o $@ $^ $(PLATFORM_LIBS)
+ $(LD) --gc-sections -Ttext $(LOAD_ADDR) -o $@ $^ $(PLATFORM_LIBS)
$(OBJCOPY) -O binary $@ $(OUTPUT).bin 2>/dev/null
# Rule to build generic library C files
-
/*
* Copyright 1998-2001 by Donald Becker.
* This software may be used and distributed according to the terms of
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libfs.o
-
-COBJS-y += fs.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-y += fs.o
+
+obj-y += cbfs/
+obj-y += cramfs/
+obj-y += ext4/
+obj-y += fdos/
+obj-y += jffs2/
+obj-y += reiserfs/
+obj-y += sandbox/
+obj-y += ubifs/
+obj-y += yaffs2/
+obj-y += zfs/
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libcbfs.o
-
-COBJS-$(CONFIG_CMD_CBFS) := cbfs.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_CMD_CBFS) := cbfs.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libcramfs.o
-
-AOBJS =
-COBJS-$(CONFIG_CMD_CRAMFS) := cramfs.o
-COBJS-$(CONFIG_CMD_CRAMFS) += uncompress.o
-
-SRCS := $(AOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y))
-
-#CPPFLAGS +=
-
-all: $(LIB) $(AOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_CMD_CRAMFS) := cramfs.o
+obj-$(CONFIG_CMD_CRAMFS) += uncompress.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libext4fs.o
-
-AOBJS =
-COBJS-$(CONFIG_FS_EXT4) := ext4fs.o ext4_common.o dev.o
-COBJS-$(CONFIG_EXT4_WRITE) += ext4_write.o ext4_journal.o crc16.o
-
-SRCS := $(AOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y))
-
-
-all: $(LIB) $(AOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_FS_EXT4) := ext4fs.o ext4_common.o dev.o
+obj-$(CONFIG_EXT4_WRITE) += ext4_write.o ext4_journal.o crc16.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libfat.o
-
-AOBJS =
-COBJS-$(CONFIG_FS_FAT) := fat.o
-COBJS-$(CONFIG_FAT_WRITE):= fat_write.o
+obj-$(CONFIG_FS_FAT) := fat.o
+obj-$(CONFIG_FAT_WRITE):= fat_write.o
ifndef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_FS_FAT) += file.o
+obj-$(CONFIG_FS_FAT) += file.o
endif
-
-SRCS := $(AOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y))
-
-all: $(LIB) $(AOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-# SEE README.arm-unaligned-accesses
-$(obj)file.o: CFLAGS += $(PLATFORM_NO_UNALIGNED)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
if (len == 0)
return;
- memcpy(s_name, filename, len);
+ strcpy(s_name, filename);
uppercase(s_name, len);
period = strchr(s_name, '.');
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libfdos.o
-
-AOBJS =
-COBJS-$(CONFIG_CMD_FDOS) := fat.o vfat.o dev.o fdos.o fs.o subdir.o
-
-SRCS := $(AOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y))
-
-#CPPFLAGS +=
-
-all: $(LIB) $(AOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_CMD_FDOS) := fat.o vfat.o dev.o fdos.o fs.o subdir.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libjffs2.o
-
-AOBJS =
ifdef CONFIG_CMD_JFFS2
-COBJS-$(CONFIG_JFFS2_LZO) += compr_lzo.o
-COBJS-y += compr_rtime.o
-COBJS-y += compr_rubin.o
-COBJS-y += compr_zlib.o
-COBJS-y += jffs2_1pass.o
-COBJS-y += mini_inflate.o
+obj-$(CONFIG_JFFS2_LZO) += compr_lzo.o
+obj-y += compr_rtime.o
+obj-y += compr_rubin.o
+obj-y += compr_zlib.o
+obj-y += jffs2_1pass.o
+obj-y += mini_inflate.o
endif
-
-COBJS := $(COBJS-y)
-SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS))
-
-#CPPFLAGS +=
-
-all: $(LIB) $(AOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libreiserfs.o
-
-AOBJS =
-COBJS-$(CONFIG_CMD_REISER) := reiserfs.o dev.o mode_string.o
-
-SRCS := $(AOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y))
-
-#CPPFLAGS +=
-
-all: $(LIB) $(AOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_CMD_REISER) := reiserfs.o dev.o mode_string.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libsandboxfs.o
-
-COBJS-$(CONFIG_SANDBOX) := sandboxfs.o
-
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y))
-
-all: $(LIB) $(AOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_SANDBOX) := sandboxfs.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libubifs.o
-
-COBJS-$(CONFIG_CMD_UBIFS) := ubifs.o io.o super.o sb.o master.o lpt.o
-COBJS-$(CONFIG_CMD_UBIFS) += lpt_commit.o scan.o lprops.o
-COBJS-$(CONFIG_CMD_UBIFS) += tnc.o tnc_misc.o debug.o crc16.o budget.o
-COBJS-$(CONFIG_CMD_UBIFS) += log.o orphan.o recovery.o replay.o
-
-SRCS := $(AOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y))
-
-all: $(LIB) $(AOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
+obj-$(CONFIG_CMD_UBIFS) := ubifs.o io.o super.o sb.o master.o lpt.o
+obj-$(CONFIG_CMD_UBIFS) += lpt_commit.o scan.o lprops.o
+obj-$(CONFIG_CMD_UBIFS) += tnc.o tnc_misc.o debug.o crc16.o budget.o
+obj-$(CONFIG_CMD_UBIFS) += log.o orphan.o recovery.o replay.o
# SEE README.arm-unaligned-accesses
$(obj)super.o: CFLAGS += $(PLATFORM_NO_UNALIGNED)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#
# $Id: Makefile,v 1.15 2007/07/18 19:40:38 charles Exp $
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libyaffs2.o
-
-COBJS-$(CONFIG_YAFFS2) := \
+obj-$(CONFIG_YAFFS2) := \
yaffs_allocator.o yaffs_attribs.o yaffs_bitmap.o yaffs_uboot_glue.o\
yaffs_checkptrw.o yaffs_ecc.o yaffs_error.o \
yaffsfs.o yaffs_guts.o yaffs_nameval.o yaffs_nand.o\
yaffs_summary.o yaffs_tagscompat.o yaffs_verify.o yaffs_yaffs1.o \
yaffs_yaffs2.o yaffs_mtdif.o yaffs_mtdif2.o
-SRCS := $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS-y))
-
YCFLAGS = -DCONFIG_YAFFS_DIRECT -DCONFIG_YAFFS_SHORT_NAMES_IN_RAM
YCFLAGS += -DCONFIG_YAFFS_YAFFS2 -DNO_Y_INLINE
YCFLAGS += -DCONFIG_YAFFS_PROVIDE_DEFS -DCONFIG_YAFFSFS_PROVIDE_VALUES
CFLAGS += $(YCFLAGS)
CPPFLAGS += $(YCFLAGS)
-
-all: $(LIB)
-
-$(obj)libyaffs2.a: $(obj).depend $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
-
-$(obj)libyaffs2.o: $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-.PHONY: clean distclean
-clean:
- rm -f $(OBJS)
-
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libzfs.o
-
-AOBJS =
-COBJS-$(CONFIG_CMD_ZFS) := dev.o zfs.o zfs_fletcher.o zfs_sha256.o zfs_lzjb.o
-
-SRCS := $(AOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS-y))
-
-
-all: $(LIB) $(AOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_CMD_ZFS) := dev.o zfs.o zfs_fletcher.o zfs_sha256.o zfs_lzjb.o
#if defined(CONFIG_SYS_I2C)
int cur_i2c_bus; /* current used i2c bus */
#endif
+ unsigned long timebase_h;
+ unsigned long timebase_l;
struct arch_global_data arch; /* architecture-specific data */
} gd_t;
#endif
-
#ifndef _AT45_H_
#define _AT45_H_
#ifdef CONFIG_DATAFLASH_MMC_SELECT
#ifndef __CPM_8XX__
#define __CPM_8XX__
-#include <linux/config.h>
#include <asm/8xx_immap.h>
/* CPM Command register.
defined(CONFIG_CMD_SCSI) || \
defined(CONFIG_CMD_USB) || \
defined(CONFIG_CMD_PART) || \
+ defined(CONFIG_CMD_GPT) || \
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE)
#define HAVE_BLOCK_DEVICE
#endif
+#ifndef CONFIG_SYS_PROMPT
+#define CONFIG_SYS_PROMPT "=> "
+#endif
+
+#ifndef CONFIG_SYS_HZ
+#define CONFIG_SYS_HZ 1000
+#endif
+
#endif /* __CONFIG_FALLBACKS_H */
*/
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
-#define CONFIG_SYS_HZ 1000
/* Bit-field values for MCCR1.
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/* Only interrupt boot if space is pressed */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* #undef to save memory */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* Default load address */
-#define CONFIG_SYS_HZ 1000 /* Decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero)
*/
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
+#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg
+#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg
#endif
#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/
/*
* For booting Linux, the board info and command line data
#define CONFIG_BOOTCOMMAND CONFIG_LINUX
-#ifdef CONFIG_SECURE_BOOT
#include <asm/fsl_secure_boot.h>
-#endif
#endif /* __CONFIG_H */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* dec freq: 1ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
| CSOR_NAND_PB(64)) /*Pages Per Block = 64*/
/* NAND Flash Timing Params */
-#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x08) \
- | FTIM0_NAND_TWP(0x06) \
- | FTIM0_NAND_TWCHT(0x03) \
+#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x03) \
+ | FTIM0_NAND_TWP(0x05) \
+ | FTIM0_NAND_TWCHT(0x02) \
| FTIM0_NAND_TWH(0x04))
-#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x18) \
- | FTIM1_NAND_TWBE(0x23) \
- | FTIM1_NAND_TRR(0x08) \
+#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x1C) \
+ | FTIM1_NAND_TWBE(0x1E) \
+ | FTIM1_NAND_TRR(0x07) \
| FTIM1_NAND_TRP(0x05))
#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x08) \
| FTIM2_NAND_TREH(0x04) \
- | FTIM2_NAND_TWHRE(0x3f))
-#define CONFIG_SYS_NAND_FTIM3 FTIM3_NAND_TWW(0x22)
+ | FTIM2_NAND_TWHRE(0x11))
+#define CONFIG_SYS_NAND_FTIM3 FTIM3_NAND_TWW(0x04)
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq:1ms ticks */
/*
CSPR_V)
#define CONFIG_SYS_NOR_AMASK IFC_AMASK(64*1024*1024)
#define CONFIG_SYS_NOR_CSOR CSOR_NOR_ADM_SHIFT(4)
+
#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \
FTIM0_NOR_TEADC(0x5) | \
FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x1e) | \
- FTIM1_NOR_TRAD_NOR(0x0f) | \
- FTIM1_NOR_TSEQRAD_NOR(0x0f))
+#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
+ FTIM1_NOR_TRAD_NOR(0x1A) |\
+ FTIM1_NOR_TSEQRAD_NOR(0x13))
#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \
FTIM2_NOR_TCH(0x4) | \
+ FTIM2_NOR_TWPH(0x0E) | \
FTIM2_NOR_TWP(0x1c))
#define CONFIG_SYS_NOR_FTIM3 0x0
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* dec freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_BAUDRATE 115200
+#define CONFIG_DEF_HWCONFIG fsl_ddr:ecc=on
+
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=" __stringify(CONFIG_DEF_HWCONFIG) "\0" \
"netdev=eth0\0" \
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#if 1
*/
#define CONFIG_SYS_CLK_FREQ 33000000
-#define CONFIG_SYS_HZ 1000
/* Bit-field values for MCCR1.
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING /* add command line history */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_SYS_GT_DUAL_CPU /* also for JTAG even with one cpu */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 /* "bad" address */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 /* "bad" address */
#define CONFIG_LOOPW
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_IDENT_STRING "Cray L1"
#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_SYS_HUSH_PARSER 1
#define CONFIG_SOURCE 1
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#if 1
*/
#define CONFIG_SYS_CLK_FREQ 33000000
-#define CONFIG_SYS_HZ 1000
/* Bit-field values for MCCR1.
*/
/* #define CONFIG_SYS_GT_DUAL_CPU also for JTAG even with one cpu */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x00400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
/*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */
#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
/* #define CONFIG_SYS_GT_DUAL_CPU also for JTAG even with one cpu */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x00400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
/*ronen - this the Sys clock (cpu bus,internal dram and SDRAM) */
#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz (CPU = 5*Bus = 666MHz) */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
/*
* choose between COM1 and COM2 as serial console
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* dec. freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
/*
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Environment Variables and Storages
*/
+++ /dev/null
-/*
- * Copyright (C) 2005 Arabella Software Ltd.
- * Yuli Barcohen <yuli@arabellasw.com>
- *
- * Support for Embedded Planet EP88x boards.
- * Tested on EP88xC with MPC885 CPU, 64MB SDRAM and 16MB flash.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_MPC885
-
-#define CONFIG_EP88X /* Embedded Planet EP88x board */
-
-#define CONFIG_SYS_TEXT_BASE 0xFC000000
-
-#define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */
-
-/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
-#define CONFIG_BAUDRATE 38400
-
-#define CONFIG_ETHER_ON_FEC1 /* Enable Ethernet on FEC1 */
-#define CONFIG_ETHER_ON_FEC2 /* Enable Ethernet on FEC2 */
-#if defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2)
-#define CONFIG_SYS_DISCOVER_PHY
-#define CONFIG_MII_INIT 1
-#define FEC_ENET
-#endif /* CONFIG_FEC_ENET */
-
-#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */
-#define CONFIG_8xx_CPUCLK_DEFAULT 100000000
-#define CONFIG_SYS_8xx_CPUCLK_MIN 40000000
-#define CONFIG_SYS_8xx_CPUCLK_MAX 133000000
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-
-
-#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds */
-#define CONFIG_BOOTCOMMAND "bootm fe060000" /* Autoboot command */
-#define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw mtdparts=phys:2M(ROM)ro,-(root)"
-
-#define CONFIG_BZIP2 /* Include support for bzip2 compressed images */
-#undef CONFIG_WATCHDOG /* Disable platform specific watchdog */
-
-/*-----------------------------------------------------------------------
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_LONGHELP /* #undef to save memory */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_LOAD_ADDR 0x400000 /* Default load address */
-
-#define CONFIG_SYS_HZ 1000 /* Decrementer freq: 1 ms ticks */
-
-/*-----------------------------------------------------------------------
- * RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero)
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* Up to 128 Mbyte */
-
-#define CONFIG_SYS_MAMR 0x00805000
-
-/*
- * 4096 Up to 4096 SDRAM rows
- * 1000 factor s -> ms
- * 32 PTP (pre-divider from MPTPR)
- * 4 Number of refresh cycles per period
- * 64 Refresh cycle in ms per number of rows
- */
-#define CONFIG_SYS_PTA_PER_CLK ((4096 * 32 * 1000) / (4 * 64))
-
-#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x00500000 /* 1 ... 5 MB in SDRAM */
-
-#define CONFIG_SYS_RESET_ADDRESS 0x09900000
-
-/*-----------------------------------------------------------------------
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */
-#ifdef CONFIG_BZIP2
-#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */
-#else
-#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 KB for malloc() */
-#endif /* CONFIG_BZIP2 */
-
-/*-----------------------------------------------------------------------
- * Flash organisation
- */
-#define CONFIG_SYS_FLASH_BASE 0xFC000000
-#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
-#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 512 /* Max num of sects on one chip */
-
-/* Environment is in flash */
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_SECT_SIZE 0x20000 /* We use one complete sector */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-
-#define CONFIG_SYS_OR0_PRELIM 0xFC000160
-#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | BR_PS_32 | BR_MS_GPCM | BR_V)
-
-#define CONFIG_SYS_DIRECT_FLASH_TFTP
-
-/*-----------------------------------------------------------------------
- * BCSR
- */
-#define CONFIG_SYS_OR3_PRELIM 0xFF0005B0
-#define CONFIG_SYS_BR3_PRELIM (0xFA000000 |BR_PS_16 | BR_MS_GPCM | BR_V)
-
-#define CONFIG_SYS_BCSR 0xFA400000
-
-/*-----------------------------------------------------------------------
- * Internal Memory Map Register
- */
-#define CONFIG_SYS_IMMR 0xF0000000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_SIZE 0x2F00 /* Size of used area in DPRAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Configuration registers
- */
-#ifdef CONFIG_WATCHDOG
-#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \
- SYPCR_SWF | SYPCR_SWE | SYPCR_SWRI | \
- SYPCR_SWP)
-#else
-#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \
- SYPCR_SWF | SYPCR_SWP)
-#endif /* CONFIG_WATCHDOG */
-
-#define CONFIG_SYS_SIUMCR (SIUMCR_MLRC01 | SIUMCR_DBGC11)
-
-/* TBSCR - Time Base Status and Control Register */
-#define CONFIG_SYS_TBSCR (TBSCR_TBF | TBSCR_TBE)
-
-/* PISCR - Periodic Interrupt Status and Control */
-#define CONFIG_SYS_PISCR PISCR_PS
-
-/* SCCR - System Clock and reset Control Register */
-#define SCCR_MASK SCCR_EBDF11
-#define CONFIG_SYS_SCCR SCCR_RTSEL
-
-#define CONFIG_SYS_DER 0
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */
-
-#endif /* __CONFIG_H */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */
-
-#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
#define CONFIG_SYS_BUS_CLK 100000000 /* 100 MHz */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_LOAD_ADDR 0x40040000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
*/
#define CONFIG_SYS_LOAD_ADDR 0x01000000
-/*
- * Set decrementer frequency (1 ms ticks)
- */
-#define CONFIG_SYS_HZ 1000
-
/*
* Device memory map (after SDRAM remap to 0x0):
*
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/*-----------------------------------------------------------------------
* PCI stuff
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
/* Enable IRQs and watchdog with a 1000Hz system decrementer */
#define CONFIG_CMD_IRQ
-#define CONFIG_SYS_HZ 1000
-
/* -------------------------------------------------------------------- */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x00100000
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PIO_MODE 0 /* IDE interface in PIO Mode 0 */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0x04400000
#define CONFIG_MISC_INIT_R 1 /* We need misc_init_r() */
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* #undef to save memory */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* Default load address */
-#define CONFIG_SYS_HZ 1000 /* Decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0x09900000
#define CONFIG_MISC_INIT_R /* We need misc_init_r() */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PC_ETH_RESET ((ushort)0x0010) /* PC 11 */
#define CONFIG_SYS_PC_IDE_RESET ((ushort)0x0020) /* PC 10 */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PC_ETH_RESET ((ushort)0x0010) /* PC 11 */
#define CONFIG_SYS_PC_IDE_RESET ((ushort)0x0020) /* PC 10 */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_PPC4XX
#define CONFIG_SYS_I2C_PPC4XX_CH0
#define CONFIG_SYS_LOAD_ADDR 0x8000000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info */
-#define CONFIG_SYS_HZ 100 /* decr freq: 1 ms ticks */
-
-
#endif /* __CONFIG_H */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 115200 }
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_MEMTEST_END 0x003C00000 /* 4 ... 60 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 115200 }
#define CONFIG_SYS_CONSOLE_INFO_QUIET 1
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */
#define CONFIG_SYS_LOAD_ADDR 0x40010000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */
#define CONFIG_SYS_PLL_ODR 0x36
#define CONFIG_SYS_PLL_FDR 0x7D
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_MBAR 0xFC000000
/*
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE+0x20000)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 75000000
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
#define CONFIG_CMD_CACHE
#undef CONFIG_CMD_NET
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_MEMTEST_START 0x400
#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CONFIG_SYS_HZ 1000
-
/*
* Clock configuration: enable only one of the following options
*/
-TABILITY or FITNESS FO04-2007 Freescale Semiconductor, Inc.
+/* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
* Hayden Fraser (Hayden.Fraser@freescale.com)
*
* SPDX-License-Identifier: GPL-2.0+
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF)
#define CONFIG_SYS_I2C_PINMUX_SET (0)
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_MEMTEST_START 0x400
#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CONFIG_SYS_HZ 1000
-
#undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */
#define CONFIG_SYS_FAST_CLK
#ifdef CONFIG_SYS_FAST_CLK
#define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
#define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_MEMTEST_START 0x400
#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CONFIG_SYS_HZ 1000
-
#undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */
#define CONFIG_SYS_FAST_CLK
#ifdef CONFIG_SYS_FAST_CLK
"save\0" \
""
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_LOAD_ADDR 0x20000
#define CONFIG_SYS_MEMTEST_START 0x400
#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 66000000
/*
"save\0" \
""
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 150000000
/*
#define CONFIG_SYS_MEMTEST_START 0x400
#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 64000000
/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */
#define CONFIG_SYS_LOAD_ADDR 0x40010000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 80000000
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x40010000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 80000000
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x40010000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 80000000
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_MBAR 0xFC000000
/*
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_MBAR 0xFC000000
/*
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED 80000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSLI2C_OFFSET 0x58000
+#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_MBAR 0xFC000000
/*
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK
#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* Hush parse for U-Boot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_LOAD_ADDR 0x2000000
#define CONFIG_LOADADDR 0x4000000
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000
#define CONFIG_LOADS_ECHO 1
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
#define CONFIG_SYS_LOAD_ADDR 0x8000000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info */
-#define CONFIG_SYS_HZ 100 /* decr freq: 1 ms ticks */
-
-
#endif /* __CONFIG_H */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x300000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
**********************************************************/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
#undef CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=>" /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 8 /* Max number of command args */
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER 2
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_ETH_DEV_FN 0x00
#define CONFIG_SYS_ETH_IOBASE 0x00104000
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_FLASH_BASE 0xff800000
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_FLASH_BASE 0xFE000000
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if (CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
+ sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
* Miscellaneous configurable options
*/
#undef CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
/* Print Buffer Size
*/
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
-#define CONFIG_SYS_HZ 1000
/* Bit-field values for MCCR1.
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_CMDLINE_EDITING
#undef CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024
#else
#define CONFIG_SYS_MEMTEST_START 0x00800000
#define CONFIG_SYS_MEMTEST_END 0x02f00000
-#define CONFIG_SYS_HZ 1000
-
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x02000000
/* default location for tftp and bootm */
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000
/*
* For booting Linux, the board info and command line data
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
*/
#define CONFIG_SYS_CLK_FREQ 33000000
-#define CONFIG_SYS_HZ 10000
/* Bit-field values for MCCR1. */
#define CONFIG_SYS_ROMNAL 7
* Miscellaneous configurable options
*/
#undef CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* Hush parse for U-Boot ?? */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_CMDLINE_EDITING
#undef CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024
#else
#define CONFIG_SYS_MEMTEST_START 0x00800000
#define CONFIG_SYS_MEMTEST_END 0x02f00000
-#define CONFIG_SYS_HZ 1000
-
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x02000000
/* default location for tftp and bootm */
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ 1000
#endif /* __MIGO_R_H */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER 1
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER 1
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER 1
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history
*/
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/*-----------------------------------------------------------------------
#endif
/* controller 2, Slot 2, tgtid 2, Base address 9000 */
+#if defined(CONFIG_P1010RDB_PA)
#define CONFIG_SYS_PCIE2_NAME "PCIe Slot"
+#elif defined(CONFIG_P1010RDB_PB)
+#define CONFIG_SYS_PCIE2_NAME "mini PCIe Slot"
+#endif
#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000
#define CONFIG_DDR_CLK_FREQ 66666666 /* DDRCLK on P1010 RDB */
#define CONFIG_SYS_CLK_FREQ 66666666 /* SYSCLK for P1010 RDB */
-#ifndef CONFIG_SDCARD
#define CONFIG_MISC_INIT_R
-#endif
-
#define CONFIG_HWCONFIG
/*
* These can be toggled for performance analysis, otherwise use default.
#define CONFIG_SYS_DDR_INIT_ADDR 0x00000000
#define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x00000000
#define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000
-
#define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600
#define CONFIG_SYS_DDR_SR_CNTR 0x00000000
#define CONFIG_SYS_DDR_RCW_1 0x00000000
#define CONFIG_SYS_DDR_RCW_2 0x00000000
-#define CONFIG_SYS_DDR_CONTROL 0x470C0000 /* Type = DDR3 */
-#define CONFIG_SYS_DDR_CONTROL_2 0x04401010
+#define CONFIG_SYS_DDR_CONTROL 0xc70c0008 /* Type = DDR3 */
+#define CONFIG_SYS_DDR_CONTROL_2 0x24401000
#define CONFIG_SYS_DDR_TIMING_4 0x00000001
#define CONFIG_SYS_DDR_TIMING_5 0x03402400
-#define CONFIG_SYS_DDR_TIMING_3_800 0x00020000
-#define CONFIG_SYS_DDR_TIMING_0_800 0x00330004
-#define CONFIG_SYS_DDR_TIMING_1_800 0x6f6B4644
+#define CONFIG_SYS_DDR_TIMING_3_800 0x00030000
+#define CONFIG_SYS_DDR_TIMING_0_800 0x00110104
+#define CONFIG_SYS_DDR_TIMING_1_800 0x6f6b8644
#define CONFIG_SYS_DDR_TIMING_2_800 0x0FA888CF
#define CONFIG_SYS_DDR_CLK_CTRL_800 0x03000000
-#define CONFIG_SYS_DDR_MODE_1_800 0x40461520
-#define CONFIG_SYS_DDR_MODE_2_800 0x8000c000
+#define CONFIG_SYS_DDR_MODE_1_800 0x00441420
+#define CONFIG_SYS_DDR_MODE_2_800 0x00000000
#define CONFIG_SYS_DDR_INTERVAL_800 0x0C300100
-#define CONFIG_SYS_DDR_WRLVL_CONTROL_800 0x8655A608
+#define CONFIG_SYS_DDR_WRLVL_CONTROL_800 0x8675f608
/* settings for DDR3 at 667MT/s */
#define CONFIG_SYS_DDR_TIMING_3_667 0x00010000
* 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable
*/
-/* In case of SD card boot, IFC interface is not available because of muxing */
-#ifdef CONFIG_SDCARD
-#define CONFIG_SYS_NO_FLASH
-#else
/*
* IFC Definitions
*/
| CSPR_MSEL_NAND \
| CSPR_V)
#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024)
+
+#if defined(CONFIG_P1010RDB_PA)
#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \
| CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
| CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
| CSOR_NAND_PGS_512 /* Page Size = 512b */ \
| CSOR_NAND_SPRZ_16 /* Spare size = 16 */ \
| CSOR_NAND_PB(32)) /* 32 Pages Per Block */
+#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024)
+
+#elif defined(CONFIG_P1010RDB_PB)
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \
+ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
+ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
+ | CSOR_NAND_RAL_3 /* RAL = 3Byes */ \
+ | CSOR_NAND_PGS_4K /* Page Size = 4K */ \
+ | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \
+ | CSOR_NAND_PB(128)) /*Pages Per Block = 128 */
+#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
+#endif
#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE
#define CONFIG_CMD_NAND
-#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024)
+#if defined(CONFIG_P1010RDB_PA)
/* NAND Flash Timing Params */
#define CONFIG_SYS_NAND_FTIM0 FTIM0_NAND_TCCST(0x01) | \
FTIM0_NAND_TWP(0x0C) | \
FTIM2_NAND_TWHRE(0x0f)
#define CONFIG_SYS_NAND_FTIM3 FTIM3_NAND_TWW(0x04)
+#elif defined(CONFIG_P1010RDB_PB)
+/* support MT29F16G08ABABAWP 4k-pagesize 2G-bytes NAND */
+/* ONFI NAND Flash mode0 Timing Params */
+#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07)| \
+ FTIM0_NAND_TWP(0x18) | \
+ FTIM0_NAND_TWCHT(0x07) | \
+ FTIM0_NAND_TWH(0x0a))
+#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32)| \
+ FTIM1_NAND_TWBE(0x39) | \
+ FTIM1_NAND_TRR(0x0e) | \
+ FTIM1_NAND_TRP(0x18))
+#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \
+ FTIM2_NAND_TREH(0x0a) | \
+ FTIM2_NAND_TWHRE(0x1e))
+#define CONFIG_SYS_NAND_FTIM3 0x0
+#endif
+
#define CONFIG_SYS_NAND_DDR_LAW 11
/* Set up IFC registers for boot location NOR/NAND */
FTIM2_GPCM_TCH(0x0) | \
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS3_FTIM3 0x0
-#endif /* CONFIG_SDCARD */
#if defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
#define CONFIG_SYS_RAMBOOT
#define CONFIG_SYS_FSL_I2C2_SPEED 400000
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
+#define I2C_PCA9557_ADDR1 0x18
+#define I2C_PCA9557_ADDR2 0x19
+#define I2C_PCA9557_BUS_NUM 0
/* I2C EEPROM */
-#undef CONFIG_ID_EEPROM
+#if defined(CONFIG_P1010RDB_PB)
+#define CONFIG_ID_EEPROM
+#ifdef CONFIG_ID_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_NXID
+#endif
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
+#define CONFIG_SYS_EEPROM_BUS_NUM 0
+#define MAX_NUM_PORTS 9 /* for 128Bytes EEPROM */
+#endif
/* enable read and write access to EEPROM */
#define CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_LBA48
#endif /* #ifdef CONFIG_FSL_SATA */
-/* SD interface will only be available in case of SD boot */
-#ifdef CONFIG_SDCARD
#define CONFIG_MMC
-#define CONFIG_DEF_HWCONFIG esdhc
-#endif
-
#ifdef CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_ENV_SIZE 0x2000
#elif defined(CONFIG_NAND)
#define CONFIG_ENV_IS_IN_NAND
+#if defined(CONFIG_P1010RDB_PA)
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
+#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) /* 3*16=48K for env */
+#elif defined(CONFIG_P1010RDB_PB)
+#define CONFIG_ENV_SIZE (16 * 1024)
+#define CONFIG_ENV_RANGE (32 * CONFIG_ENV_SIZE) /* new block size 512K */
+#endif
#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
-#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE)
#elif defined(CONFIG_SYS_RAMBOOT)
#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* dec freq: 1ms ticks */
/*
* Internal Definitions
#define CONFIG_HAS_ETH2
#endif
-#define CONFIG_HOSTNAME P1010RDB
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */
"ext2load usb 0:4 $loadaddr $bootfile;" \
"ext2load usb 0:4 $fdtaddr $fdtfile;" \
"ext2load usb 0:4 $ramdiskaddr $ramdiskfile;" \
- "bootm $loadaddr $ramdiskaddr $fdtaddr\0" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr\0" \
+ CONFIG_BOOTMODE
+
+#if defined(CONFIG_P1010RDB_PA)
+#define CONFIG_BOOTMODE \
+ "boot_bank0=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \
+ "mw.b ffb00011 0; mw.b ffb00009 0; reset\0" \
+ "boot_bank1=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \
+ "mw.b ffb00011 0; mw.b ffb00009 1; reset\0" \
+ "boot_nand=i2c dev 0; i2c mw 18 1 f9; i2c mw 18 3 f0;" \
+ "mw.b ffb00011 0; mw.b ffb00017 1; reset\0"
+
+#elif defined(CONFIG_P1010RDB_PB)
+#define CONFIG_BOOTMODE \
+ "boot_bank0=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \
+ "i2c mw 19 1 2; i2c mw 19 3 e1; reset\0" \
+ "boot_bank1=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \
+ "i2c mw 19 1 12; i2c mw 19 3 e1; reset\0" \
+ "boot_nand=i2c dev 0; i2c mw 18 1 fc; i2c mw 18 3 0;" \
+ "i2c mw 19 1 8; i2c mw 19 3 f7; reset\0" \
+ "boot_spi=i2c dev 0; i2c mw 18 1 fa; i2c mw 18 3 0;" \
+ "i2c mw 19 1 0; i2c mw 19 3 f7; reset\0" \
+ "boot_sd=i2c dev 0; i2c mw 18 1 f8; i2c mw 18 3 0;" \
+ "i2c mw 19 1 4; i2c mw 19 3 f3; reset\0"
+#endif
#define CONFIG_RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
-#ifdef CONFIG_SECURE_BOOT
#include <asm/fsl_secure_boot.h>
-#endif
#endif /* __CONFIG_H */
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms tick */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_BOOTCOMMAND CONFIG_HDBOOT
-#ifdef CONFIG_SECURE_BOOT
#include <asm/fsl_secure_boot.h>
-#endif
#endif /* __CONFIG_H */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_MEMTEST_END 0x00C00000 /* 4 ... 12 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */
-
-#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* Decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 1250000 }
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#undef CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
* If the default period is acceptable, TMRCNT can be left undefined.
* TMRMS represents the desired mecs per tick (msecs per interrupt).
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_HZ 1000 /* Always 1000 */
#define CONFIG_SYS_LOW_RES_TIMER
#define CONFIG_SYS_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */
#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */
* MISC
*----------------------------------------------------------------------*/
#define CONFIG_SYS_LONGHELP /* Provide extended help*/
-#define CONFIG_SYS_PROMPT "==> " /* Command prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
#define CONFIG_SYS_MAXARGS 16 /* Max command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */
* Miscellaneous configurable options
**********************************************************/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
* If the default period is acceptable, TMRCNT can be left undefined.
* TMRMS represents the desired mecs per tick (msecs per interrupt).
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_HZ 1000 /* Always 1000 */
#define CONFIG_SYS_LOW_RES_TIMER
#define CONFIG_SYS_NIOS_TMRBASE 0x02120820 /* Tick timer base addr */
#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */
* MISC
*----------------------------------------------------------------------*/
#define CONFIG_SYS_LONGHELP /* Provide extended help*/
-#define CONFIG_SYS_PROMPT "==> " /* Command prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
#define CONFIG_SYS_MAXARGS 16 /* Max command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg buf size */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
* Miscellaneous configurable options
*----------------------------------------------------------------------*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_PRAM 1024 /* reserve 1 MB protected RAM */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 /* must set console from env */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* JFFS2 partitions
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x0100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
*/
#define CONFIG_SYS_RESET_ADDRESS 0x80000000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_MEMTEST_END 0x00C0000 /* 4 ... 12 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "=> "
/*
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
* Low Level Configuration Settings
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_FLASH_BASE 0xFE000000
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB) && defined(KGDB_DEBUG)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PC_IDE_RESET ((ushort)0x0008) /* PC 12 */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save a little memory */
-#define CONFIG_SYS_PROMPT "=>" /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x00100000
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/*-----------------------------------------------------------------------
* PCI stuff
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/*-----------------------------------------------------------------------
* PCI stuff
--- /dev/null
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * T1040 QDS board configuration file
+ */
+#define CONFIG_T1040QDS
+#define CONFIG_PHYS_64BIT
+
+#ifdef CONFIG_RAMBOOT_PBL
+#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
+#endif
+
+/* High Level Configuration Options */
+#define CONFIG_BOOKE
+#define CONFIG_E500 /* BOOKE e500 family */
+#define CONFIG_E500MC /* BOOKE e500mc family */
+#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
+#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
+#define CONFIG_MP /* support multiple processors */
+
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE 0xeff80000
+#endif
+
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
+#endif
+
+#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
+#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
+#define CONFIG_FSL_IFC /* Enable IFC Support */
+#define CONFIG_PCI /* Enable PCI/PCIE */
+#define CONFIG_PCI_INDIRECT_BRIDGE
+#define CONFIG_PCIE1 /* PCIE controler 1 */
+#define CONFIG_PCIE2 /* PCIE controler 2 */
+#define CONFIG_PCIE3 /* PCIE controler 3 */
+#define CONFIG_PCIE4 /* PCIE controler 4 */
+
+#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
+#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
+
+#define CONFIG_FSL_LAW /* Use common FSL init code */
+
+#define CONFIG_ENV_OVERWRITE
+
+#ifdef CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_IS_NOWHERE
+#else
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#endif
+
+#ifndef CONFIG_SYS_NO_FLASH
+#if defined(CONFIG_SPIFLASH)
+#define CONFIG_SYS_EXTRA_ENV_RELOC
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_BUS 0
+#define CONFIG_ENV_SPI_CS 0
+#define CONFIG_ENV_SPI_MAX_HZ 10000000
+#define CONFIG_ENV_SPI_MODE 0
+#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
+#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
+#define CONFIG_ENV_SECT_SIZE 0x10000
+#elif defined(CONFIG_SDCARD)
+#define CONFIG_SYS_EXTRA_ENV_RELOC
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_OFFSET (512 * 1105)
+#elif defined(CONFIG_NAND)
+#define CONFIG_SYS_EXTRA_ENV_RELOC
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
+#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#else
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
+#endif
+#else /* CONFIG_SYS_NO_FLASH */
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
+#endif
+
+#ifndef __ASSEMBLY__
+unsigned long get_board_sys_clk(void);
+unsigned long get_board_ddr_clk(void);
+#endif
+
+#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() /* sysclk for MPC85xx */
+#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
+
+/*
+ * These can be toggled for performance analysis, otherwise use default.
+ */
+#define CONFIG_SYS_CACHE_STASHING
+#define CONFIG_BACKSIDE_L2_CACHE
+#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
+#define CONFIG_BTB /* toggle branch predition */
+#define CONFIG_DDR_ECC
+#ifdef CONFIG_DDR_ECC
+#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
+#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
+#endif
+
+#define CONFIG_ENABLE_36BIT_PHYS
+
+#define CONFIG_ADDR_MAP
+#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
+
+#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0x00400000
+#define CONFIG_SYS_ALT_MEMTEST
+#define CONFIG_PANIC_HANG /* do not reset board on panic */
+
+/*
+ * Config the L3 Cache as L3 SRAM
+ */
+#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000
+
+#define CONFIG_SYS_DCSRBAR 0xf0000000
+#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
+
+/* EEPROM */
+#define CONFIG_ID_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_NXID
+#define CONFIG_SYS_EEPROM_BUS_NUM 0
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
+
+/*
+ * DDR Setup
+ */
+#define CONFIG_VERY_BIG_RAM
+#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
+
+/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
+#define CONFIG_DIMM_SLOTS_PER_CTLR 1
+#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
+
+#define CONFIG_DDR_SPD
+#define CONFIG_FSL_DDR3
+#define CONFIG_FSL_DDR_INTERACTIVE
+
+#define CONFIG_SYS_SPD_BUS_NUM 0
+#define SPD_EEPROM_ADDRESS 0x51
+
+#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
+
+/*
+ * IFC Definitions
+ */
+#define CONFIG_SYS_FLASH_BASE 0xe0000000
+#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE)
+
+#define CONFIG_SYS_NOR0_CSPR_EXT (0xf)
+#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \
+ + 0x8000000) | \
+ CSPR_PORT_SIZE_16 | \
+ CSPR_MSEL_NOR | \
+ CSPR_V)
+#define CONFIG_SYS_NOR1_CSPR_EXT (0xf)
+#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \
+ CSPR_PORT_SIZE_16 | \
+ CSPR_MSEL_NOR | \
+ CSPR_V)
+#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024)
+/* NOR Flash Timing Params */
+#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80
+#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \
+ FTIM0_NOR_TEADC(0x5) | \
+ FTIM0_NOR_TEAHC(0x5))
+#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
+ FTIM1_NOR_TRAD_NOR(0x1A) |\
+ FTIM1_NOR_TSEQRAD_NOR(0x13))
+#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \
+ FTIM2_NOR_TCH(0x4) | \
+ FTIM2_NOR_TWPH(0x0E) | \
+ FTIM2_NOR_TWP(0x1c))
+#define CONFIG_SYS_NOR_FTIM3 0x0
+
+#define CONFIG_SYS_FLASH_QUIET_TEST
+#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
+
+#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */
+#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
+
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS \
+ + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS}
+#define CONFIG_FSL_QIXIS /* use common QIXIS code */
+#define QIXIS_BASE 0xffdf0000
+#define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE)
+#define QIXIS_LBMAP_SWITCH 0x06
+#define QIXIS_LBMAP_MASK 0x0f
+#define QIXIS_LBMAP_SHIFT 0
+#define QIXIS_LBMAP_DFLTBANK 0x00
+#define QIXIS_LBMAP_ALTBANK 0x04
+#define QIXIS_RST_CTL_RESET 0x31
+#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
+#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
+#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
+
+#define CONFIG_SYS_CSPR3_EXT (0xf)
+#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
+ | CSPR_PORT_SIZE_8 \
+ | CSPR_MSEL_GPCM \
+ | CSPR_V)
+#define CONFIG_SYS_AMASK3 IFC_AMASK(4*1024)
+#define CONFIG_SYS_CSOR3 0x0
+/* QIXIS Timing parameters for IFC CS3 */
+#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \
+ FTIM0_GPCM_TEADC(0x0e) | \
+ FTIM0_GPCM_TEAHC(0x0e))
+#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \
+ FTIM1_GPCM_TRAD(0x3f))
+#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \
+ FTIM2_GPCM_TCH(0x0) | \
+ FTIM2_GPCM_TWP(0x1f))
+#define CONFIG_SYS_CS3_FTIM3 0x0
+
+#define CONFIG_NAND_FSL_IFC
+#define CONFIG_SYS_NAND_BASE 0xff800000
+#define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE)
+
+#define CONFIG_SYS_NAND_CSPR_EXT (0xf)
+#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
+ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \
+ | CSPR_MSEL_NAND /* MSEL = NAND */ \
+ | CSPR_V)
+#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024)
+
+#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \
+ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
+ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
+ | CSOR_NAND_RAL_3 /* RAL = 3Byes */ \
+ | CSOR_NAND_PGS_2K /* Page Size = 2K */ \
+ | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \
+ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/
+
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+/* ONFI NAND Flash mode0 Timing Params */
+#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \
+ FTIM0_NAND_TWP(0x18) | \
+ FTIM0_NAND_TWCHT(0x07) | \
+ FTIM0_NAND_TWH(0x0a))
+#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \
+ FTIM1_NAND_TWBE(0x39) | \
+ FTIM1_NAND_TRR(0x0e) | \
+ FTIM1_NAND_TRP(0x18))
+#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \
+ FTIM2_NAND_TREH(0x0a) | \
+ FTIM2_NAND_TWHRE(0x1e))
+#define CONFIG_SYS_NAND_FTIM3 0x0
+
+#define CONFIG_SYS_NAND_DDR_LAW 11
+#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_MTD_NAND_VERIFY_WRITE
+#define CONFIG_CMD_NAND
+
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
+
+#if defined(CONFIG_NAND)
+#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT
+#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR
+#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK
+#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR
+#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0
+#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1
+#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2
+#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3
+#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT
+#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR
+#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR1_CSPR_EXT
+#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR1_CSPR
+#define CONFIG_SYS_AMASK2 CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR2 CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NOR_FTIM3
+#else
+#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
+#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR
+#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT
+#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR
+#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT
+#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR
+#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK
+#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR
+#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0
+#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1
+#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2
+#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
+#endif
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+
+#if defined(CONFIG_RAMBOOT_PBL)
+#define CONFIG_SYS_RAMBOOT
+#endif
+
+#define CONFIG_BOARD_EARLY_INIT_R
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_HWCONFIG
+
+/* define to use L1 as initial stack */
+#define CONFIG_L1_INIT_RAM
+#define CONFIG_SYS_INIT_RAM_LOCK
+#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000
+/* The assembler doesn't like typecast */
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
+ ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
+
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
+
+/* Serial Port - controlled on board with jumper J8
+ * open - index 2
+ * shorted - index 1
+ */
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
+
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
+#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
+#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
+#define CONFIG_SERIAL_MULTI /* Enable both serial ports */
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */
+
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT
+#define CONFIG_OF_BOARD_SETUP
+#define CONFIG_OF_STDOUT_VIA_ALIAS
+
+/* new uImage format support */
+#define CONFIG_FIT
+#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
+
+/* I2C */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
+#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
+#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C2_SPEED 400000 /* I2C speed in Hz */
+#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
+#define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000
+
+#define I2C_MUX_PCA_ADDR 0x77
+#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
+
+
+/* I2C bus multiplexer */
+#define I2C_MUX_CH_DEFAULT 0x8
+
+/*
+ * RTC configuration
+ */
+#define RTC
+#define CONFIG_RTC_DS3231 1
+#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+
+/*
+ * eSPI - Enhanced SPI
+ */
+#define CONFIG_FSL_ESPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_FLASH_EON
+#define CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_SPEED 10000000
+#define CONFIG_SF_DEFAULT_MODE 0
+
+/*
+ * General PCI
+ * Memory space is mapped 1-1, but I/O space must start from 0.
+ */
+
+#ifdef CONFIG_PCI
+/* controller 1, direct to uli, tgtid 3, Base address 20000 */
+#ifdef CONFIG_PCIE1
+#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
+#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
+#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000
+#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull
+#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
+#endif
+
+/* controller 2, Slot 2, tgtid 2, Base address 201000 */
+#ifdef CONFIG_PCIE2
+#define CONFIG_SYS_PCIE2_MEM_VIRT 0x90000000
+#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000
+#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc10000000ull
+#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000
+#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull
+#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
+#endif
+
+/* controller 3, Slot 1, tgtid 1, Base address 202000 */
+#ifdef CONFIG_PCIE3
+#define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000
+#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000
+#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull
+#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000
+#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull
+#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
+#endif
+
+/* controller 4, Base address 203000 */
+#ifdef CONFIG_PCIE4
+#define CONFIG_SYS_PCIE4_MEM_VIRT 0xb0000000
+#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000
+#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc30000000ull
+#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */
+#define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000
+#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull
+#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */
+#endif
+
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_E1000
+
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CONFIG_DOS_PARTITION
+#endif /* CONFIG_PCI */
+
+/* SATA */
+#define CONFIG_FSL_SATA_V2
+#ifdef CONFIG_FSL_SATA_V2
+#define CONFIG_LIBATA
+#define CONFIG_FSL_SATA
+
+#define CONFIG_SYS_SATA_MAX_DEVICE 2
+#define CONFIG_SATA1
+#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
+#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
+#define CONFIG_SATA2
+#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
+#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
+
+#define CONFIG_LBA48
+#define CONFIG_CMD_SATA
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT2
+#endif
+
+/*
+* USB
+*/
+#define CONFIG_HAS_FSL_DR_USB
+
+#ifdef CONFIG_HAS_FSL_DR_USB
+#define CONFIG_USB_EHCI
+
+#ifdef CONFIG_USB_EHCI
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_EHCI_FSL
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_CMD_EXT2
+#endif
+#endif
+
+#define CONFIG_MMC
+
+#ifdef CONFIG_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+#endif
+
+/* Qman/Bman */
+#ifndef CONFIG_NOBQFMAN
+#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
+#define CONFIG_SYS_BMAN_NUM_PORTALS 25
+#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000
+#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull
+#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000
+#define CONFIG_SYS_QMAN_NUM_PORTALS 25
+#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000
+#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull
+#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000
+
+#define CONFIG_SYS_DPAA_FMAN
+#define CONFIG_SYS_DPAA_PME
+
+/* Default address of microcode for the Linux Fman driver */
+#if defined(CONFIG_SPIFLASH)
+/*
+ * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
+ * env, so we got 0x110000.
+ */
+#define CONFIG_SYS_QE_FW_IN_SPIFLASH
+#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000
+#elif defined(CONFIG_SDCARD)
+/*
+ * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
+ * about 545KB (1089 blocks), Env is stored after the image, and the env size is
+ * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
+ */
+#define CONFIG_SYS_QE_FMAN_FW_IN_MMC
+#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1130)
+#elif defined(CONFIG_NAND)
+#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
+#define CONFIG_SYS_QE_FMAN_FW_ADDR (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#else
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF40000
+#endif
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
+#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
+#endif /* CONFIG_NOBQFMAN */
+
+#ifdef CONFIG_SYS_DPAA_FMAN
+#define CONFIG_FMAN_ENET
+#define CONFIG_PHYLIB_10G
+#define CONFIG_PHY_VITESSE
+#define CONFIG_PHY_REALTEK
+#define CONFIG_PHY_TERANETICS
+#define SGMII_CARD_PORT1_PHY_ADDR 0x1C
+#define SGMII_CARD_PORT2_PHY_ADDR 0x10
+#define SGMII_CARD_PORT3_PHY_ADDR 0x1E
+#define SGMII_CARD_PORT4_PHY_ADDR 0x11
+#endif
+
+#ifdef CONFIG_FMAN_ENET
+#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x10
+#define CONFIG_SYS_FM1_DTSEC6_PHY_ADDR 0x11
+#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4
+
+#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c
+#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d
+#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e
+#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR 0x1f
+
+#define CONFIG_MII /* MII PHY management */
+#define CONFIG_ETHPRIME "FM1@DTSEC1"
+#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
+#endif
+
+/*
+ * Environment
+ */
+#define CONFIG_LOADS_ECHO /* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_ERRATA
+#define CONFIG_CMD_GREPENV
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SETEXPR
+
+#ifdef CONFIG_PCI
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_NET
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_CMDLINE_EDITING /* Command-line editing */
+#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
+#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
+#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
+#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 64 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/
+#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
+
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ROOTPATH "/opt/nfsroot"
+#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/
+
+/* default location for tftp and bootm */
+#define CONFIG_LOADADDR 1000000
+
+#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
+
+#define CONFIG_BAUDRATE 115200
+
+#define __USB_PHY_TYPE utmi
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \
+ "bank_intlv=cs0_cs1;" \
+ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
+ "netdev=eth0\0" \
+ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
+ "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
+ "tftpflash=tftpboot $loadaddr $uboot && " \
+ "protect off $ubootaddr +$filesize && " \
+ "erase $ubootaddr +$filesize && " \
+ "cp.b $loadaddr $ubootaddr $filesize && " \
+ "protect on $ubootaddr +$filesize && " \
+ "cmp.b $loadaddr $ubootaddr $filesize\0" \
+ "consoledev=ttyS0\0" \
+ "ramdiskaddr=2000000\0" \
+ "ramdiskfile=t1040qds/ramdisk.uboot\0" \
+ "fdtaddr=c00000\0" \
+ "fdtfile=t1040qds/t1040qds.dtb\0" \
+ "bdev=sda3\0" \
+ "c=ffe\0"
+
+#define CONFIG_LINUX \
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "setenv ramdiskaddr 0x02000000;" \
+ "setenv fdtaddr 0x00c00000;" \
+ "setenv loadaddr 0x1000000;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
+#define CONFIG_HDBOOT \
+ "setenv bootargs root=/dev/$bdev rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
+#define CONFIG_BOOTCOMMAND CONFIG_LINUX
+
+#ifdef CONFIG_SECURE_BOOT
+#include <asm/fsl_secure_boot.h>
+#endif
+
+#endif /* __CONFIG_H */
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
#define CONFIG_BOOTCOMMAND CONFIG_LINUX
-#ifdef CONFIG_SECURE_BOOT
#include <asm/fsl_secure_boot.h>
-#endif
#endif /* __CONFIG_H */
#define CONFIG_BOOTDELAY 3
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_MEMTEST_START 0x400
#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CONFIG_SYS_HZ 1000
-
/*
* Clock configuration: enable only one of the following options
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Enable loopw command.
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Enable loopw command.
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#define CONFIG_SYS_CPUCLOCK CONFIG_SYSCLK
#define CONFIG_SYS_BRGCLOCK CONFIG_SYSCLK
#define CONFIG_SYS_BUSCLOCK (CONFIG_SYSCLK >> CONFIG_EBDF)
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_8xx_GCLK_FREQ CONFIG_SYSCLK
/*-----------------------------------------------------------------------
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* Hush parse for U-Boot */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Enable loopw command.
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0xFFFFFFFC /* "bad" address */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if 0
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_LOAD_ADDR 0x300000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0x40000104 /* "bad" address */
/*
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
#undef CONFIG_WATCHDOG /* watchdog disabled */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Enable loopw command.
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#define CONFIG_SYS_LOAD_ADDR 0x30800000
/* we configure PWM Timer 4 to 1ms 1000Hz */
-#define CONFIG_SYS_HZ 1000
/* support additional compression methods */
#define CONFIG_BZIP2
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_SYS_LONGHELP
/* monitor command prompt */
-#define CONFIG_SYS_PROMPT "=> "
/* console i/o buffer size */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_LOAD_ADDR 0x00100000
/* decrementer freq: 1 ms ticks */
-#define CONFIG_SYS_HZ 1000
/* configure flash */
#define CONFIG_SYS_FLASH_BASE 0xff800000
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_SDRAM_BASE 0x00000000
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x00300000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
-
#define CONFIG_SYS_BUS_CLK 133000000 /* 133 MHz */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
/*
* Timer
*/
-#define CONFIG_SYS_HZ 1000 /* timer ticks per second */
/*
* Real Time Clock
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LOAD_ADDR 0x00100000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_LOOPW
#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-/* decrementer freq: 1ms ticks */
-#define CONFIG_SYS_HZ 1000
-
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 256
/* Print Buffer Size */
/* timer clock - 2* OSC_IN system clock */
#define CONFIG_IXP425_TIMER_CLK 66666666
-#define CONFIG_SYS_HZ 1000
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 256
/* Print Buffer Size */
/* timer clock - 2* OSC_IN system clock */
#define CONFIG_IXP425_TIMER_CLK 66666666
-#define CONFIG_SYS_HZ 1000
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 256
/* Print Buffer Size */
/* timer clock - 2* OSC_IN system clock */
#define CONFIG_IXP425_TIMER_CLK 66666666
-#define CONFIG_SYS_HZ 1000
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 256
/* Print Buffer Size */
/* timer clock - 2* OSC_IN system clock */
#define CONFIG_IXP425_TIMER_CLK 66000000
-#define CONFIG_SYS_HZ 1000
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
/*
* Timer
*/
-
-/*
- * According to the discussion in u-boot mailing list before,
- * CONFIG_SYS_HZ at 1000 is mandatory.
- */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK_FREQ 48000000
#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ
/*
* Timer
*/
-
-/*
- * According to the discussion in u-boot mailing list before,
- * CONFIG_SYS_HZ at 1000 is mandatory.
- */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK_FREQ 39062500
#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ
/*
* Timer
*/
-
-/*
- * According to the discussion in u-boot mailing list before,
- * CONFIG_SYS_HZ at 1000 is mandatory.
- */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK_FREQ (66000000 * 2)
#define VERSION_CLOCK CONFIG_SYS_CLK_FREQ
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
-#define CONFIG_SYS_HZ 1000
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_YMODEM_SUPPORT
+/* Bootcount using the RTC block */
+#define CONFIG_BOOTCOUNT_LIMIT
+#define CONFIG_BOOTCOUNT_AM33XX
+
/* CPSW support */
#define CONFIG_SPL_ETH_SUPPORT
/* Platform/Board specific defs */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000 /* 1ms clock */
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550
*/
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT "U-Boot# "
#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550
/* Unsupported features */
#undef CONFIG_USE_IRQ
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_XHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
+
+#define CONFIG_OMAP_USB_PHY
+#define CONFIG_AM437X_USB2PHY2_HOST
+
#endif /* __CONFIG_AM43XX_EVM_H */
*/
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_LOOPW /* enable loopw command */
/* undef to save memory */
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "=> "
/* Buffer size for input from the Console */
#define CONFIG_SYS_CBSIZE 256
/* Buffer size for Console output */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ 1000
#endif /* __AP325RXA_H */
/* undef to save memory */
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "=> "
/* Buffer size for input from the Console */
#define CONFIG_SYS_CBSIZE 256
/* Buffer size for Console output */
#else
#define CONFIG_SYS_CLK_FREQ 44444444
#endif
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
#endif /* __AP_SH4A_4A_H */
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE IMX_I2C1_BASE
-#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
+#define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
+#define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES { }
#ifdef CONFIG_CMD_EEPROM
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000
-
/*
* For booting Linux, the board info and command line data
* have to be in the first 256 MB of memory, since this is
#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MAXARGS 16
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 50000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
#endif /* __ARMADILLO_800EVA_H */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_RD_LVL
#define CONFIG_NR_DRAM_BANKS 8
/*
* Defines processor clock - important for correct timings concerning serial
* interface etc.
- * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
*/
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 80000000
#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
#define AT91C_MAIN_CLOCK ((AT91C_XTAL_CLOCK / 4) * 39)
#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3 )
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
-#define CONFIG_SYS_HZ 1000
/* CPU configuration */
#define CONFIG_AT91RM9200
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
-#define CONFIG_SYS_HZ 1000
/* Define actual evaluation board type from used processor type */
#ifdef CONFIG_AT91SAM9G20
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ 1000
#ifdef CONFIG_AT91SAM9G10
#define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
-#define CONFIG_SYS_HZ 1000
#define CONFIG_AT91SAM9263EK 1 /* It's an AT91SAM9263EK Board */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_AT91SAM9M10G45EK
#define CONFIG_AT91FAMILY
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
-#define CONFIG_SYS_HZ 1000
/* Misc CPU related */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_AT91SAM9X5EK
#define CONFIG_AT91FAMILY
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PIO_MODE 0 /* IDE interface in PIO Mode 0 */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 /* "bad" address */
#define CONFIG_SYS_ALLOC_DPRAM
#define CONFIG_AT32AP7000
#define CONFIG_ATNGW100
-#define CONFIG_SYS_HZ 1000
-
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
#define CONFIG_AT32AP7000
#define CONFIG_ATNGW100MKII
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ 1000
-
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
#define CONFIG_ATSTK1002
#define CONFIG_ATSTK1000
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ 1000
-
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
#define CONFIG_ATSTK1003
#define CONFIG_ATSTK1000
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ 1000
-
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
#define CONFIG_ATSTK1004
#define CONFIG_ATSTK1000
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ 1000
-
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
#define CONFIG_ATSTK1006
#define CONFIG_ATSTK1000
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ 1000
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ "
#else
-#define CONFIG_SYS_PROMPT "=> "
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE \
--- /dev/null
+/*
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef __CONFIGS_BG0900_H__
+#define __CONFIGS_BG0900_H__
+
+/* System configurations */
+#define CONFIG_MX28 /* i.MX28 SoC */
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
+#include <config_cmd_default.h>
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NAND_TRIMFFS
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_SETEXPR
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+
+/* Memory configuration */
+#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x40000000 /* Base address */
+#define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+
+/* Environment */
+#define CONFIG_ENV_SIZE (16 * 1024)
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_ENV_IS_NOWHERE
+
+/* FEC Ethernet on SoC */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_FEC_MXC
+#define CONFIG_NET_MULTI
+#endif
+
+/* SPI */
+#ifdef CONFIG_CMD_SPI
+#define CONFIG_DEFAULT_SPI_BUS 2
+#define CONFIG_DEFAULT_SPI_CS 0
+#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
+
+/* SPI FLASH */
+#ifdef CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_BAR
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SF_DEFAULT_BUS 2
+#define CONFIG_SF_DEFAULT_CS 0
+#define CONFIG_SF_DEFAULT_SPEED 40000000
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+
+#define CONFIG_ENV_SPI_BUS 2
+#define CONFIG_ENV_SPI_CS 0
+#define CONFIG_ENV_SPI_MAX_HZ 40000000
+#define CONFIG_ENV_SPI_MODE SPI_MODE_0
+#endif
+
+#endif
+
+/* Boot Linux */
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_BOOTARGS "console=ttyAMA0,115200"
+#define CONFIG_BOOTCOMMAND "bootm"
+#define CONFIG_LOADADDR 0x42000000
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+/* Extra Environment */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "update_spi_firmware_filename=u-boot.sb\0" \
+ "update_spi_firmware_maxsz=0x80000\0" \
+ "update_spi_firmware=" /* Update the SPI flash firmware */ \
+ "if sf probe 2:0 ; then " \
+ "if tftp ${update_spi_firmware_filename} ; then " \
+ "sf erase 0x0 +${filesize} ; " \
+ "sf write ${loadaddr} 0x0 ${filesize} ; " \
+ "fi ; " \
+ "fi\0"
+
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* __CONFIGS_BG0900_H__ */
#define CONFIG_SYS_OSCIN_FREQ calimain_get_osc_freq()
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TEXT_BASE 0x60000000
#define CONFIG_DA850_LOWLEVEL
#define CONFIG_SYS_DA850_PLL_INIT
#define CONFIG_ARM926EJS /* arm926ejs CPU */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM365
#define CONFIG_MACH_TYPE MACH_TYPE_DAVINCI_DM365_EVM
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */
-#define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */
-#define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_LOOPW 1
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
* Various low-level settings
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
/* Status LED */
#define CONFIG_STATUS_LED /* Status LED enabled */
#define CONFIG_BOARD_SPECIFIC_LED
-#define STATUS_LED_GREEN 0
-#define STATUS_LED_BIT STATUS_LED_GREEN
+#define CONFIG_GPIO_LED
+#define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */
+#define GREEN_LED_DEV 0
+#define STATUS_LED_BIT GREEN_LED_GPIO
#define STATUS_LED_STATE STATUS_LED_ON
#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
-#define STATUS_LED_BOOT STATUS_LED_BIT
-#define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */
+#define STATUS_LED_BOOT GREEN_LED_DEV
#define CONFIG_SPLASHIMAGE_GUARD
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* Decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 1250000 }
/* ---
* Defines processor clock - important for correct timings concerning serial
* interface etc.
- * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
* ---
*/
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 66000000
#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_ALLOC_DPRAM
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ "
#else
-#define CONFIG_SYS_PROMPT "=> "
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE \
/*
* Clock Configuration
*/
-#define CONFIG_SYS_HZ 1000 /* Timer @ 3250000 Hz */
#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
/*
#endif /* CONFIG_TRAILBLAZER */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_HZ 1000
#define CONFIG_HW_WATCHDOG
#define CONFIG_LOADS_ECHO
#define CONFIG_SYS_LOADS_BAUD_CHANGE
#define CONFIG_SYS_MEMTEST_START 0x00100000
#define CONFIG_SYS_MEMTEST_END 0x01000000
#define CONFIG_SYS_LOAD_ADDR 0x100000
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* SDRAM Configuration
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:ctlr_intlv=cacheline," \
"bank_intlv=cs0_cs1;" \
- "usb2:dr_mode=peripheral,phy_type=" __stringify(__USB_PHY_TYPE) ";"\
- "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
+ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\
+ "usb2:dr_mode=peripheral,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
"netdev=eth0\0" \
"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
"ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
#define CONFIG_BOOTCOMMAND CONFIG_HDBOOT
-#ifdef CONFIG_SECURE_BOOT
#include <asm/fsl_secure_boot.h>
-#endif
#endif /* __CONFIG_H */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS)
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#if defined(CONFIG_CPU9G20)
#define AT91C_MAIN_CLOCK ((AT91C_XTAL_CLOCK / 4) * 39)
#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3)
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_ARM920T
#define CONFIG_AT91RM9200
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
-
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_TEXT_BASE 0xc1080000
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_DA850_PLL_INIT
#define CONFIG_SYS_DA850_DDR_INIT
#define CONFIG_ARM926EJS /* arm926ejs CPU */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM355
/* Memory Info */
#define CONFIG_ARM926EJS /* arm926ejs CPU */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM355 /* DM355 based board */
/* Memory Info */
#define CONFIG_ARM926EJS /* arm926ejs CPU */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM365
/* Memory Info */
/* Timer Input clock freq */
#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2)
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM646X
/* EEPROM definitions for EEPROM */
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM644X
/*====================================================*/
/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM644X
/*=============*/
/* Memory Info */
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM644X
/* EEPROM definitions for Atmel 24LC64 EEPROM chip */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM644X
/*====================================================*/
/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/*-----------------------------------------------------------------------
* PCI stuff
* U-Boot General Configurations
*/
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE 1
#define CONFIG_CMDLINE_EDITING 1
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_SYS_LOAD_ADDR 0x00100000
-#define CONFIG_SYS_HZ 1000
-
/*
* Various low-level settings
*/
/* Remove or override few declarations from mv-common.h */
#undef CONFIG_SYS_PROMPT
-#define CONFIG_SYS_PROMPT "=> "
/*
* Ethernet Driver configuration
#define CONFIG_SPL_SPI_CS 0
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
+/* USB xHCI HOST */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_HOST
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_XHCI_OMAP
+#define CONFIG_USB_STORAGE
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
+
+#define CONFIG_OMAP_USB_PHY
+#define CONFIG_OMAP_USB2PHY2_HOST
+
#endif /* __CONFIG_DRA7XX_EVM_H */
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 256
/* Print Buffer Size */
/* timer clock - 2* OSC_IN system clock */
#define CONFIG_IXP425_TIMER_CLK 66666666
-#define CONFIG_SYS_HZ 1000
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
#define CONFIG_SYS_MPUCLK 275
#define DXR2_IOCTRL_VAL 0x18b
-#define DDR_PLL_FREQ 266
-#define CONFIG_SPL_AM33XX_DO_NOT_ENABLE_RTC32K
+#define DDR_PLL_FREQ 303
+#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#define BOARD_DFU_BUTTON_GPIO 27
#define BOARD_DFU_BUTTON_LED 64
/* Default env settings */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hostname=dxr2\0" \
- "nand_img_size=0x300000\0" \
+ "nand_img_size=0x400000\0" \
"optargs=\0" \
CONFIG_COMMON_ENV_SETTINGS
"run dfu_start; " \
"reset; " \
"fi;" \
-"if ping ${serverip}; then " \
- "run net_nfs; " \
-"fi;" \
-"run nand_boot;"
+"run nand_boot;" \
+"reset;"
+
#else
#define CONFIG_BOOTDELAY 0
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 8 /* max number of command args */
* (address mappings, register initial values, etc.)
* You should know what you are doing if you make changes here.
*/
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER 2 /* for MPC8240 only */
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_TEXT_BASE 0xc1080000
#define CONFIG_DA8XX_GPIO
/*----------------------------------------------------------------------*
* Clock and PLL Configuration *
*----------------------------------------------------------------------*/
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CLK 80000000 /* 8MHz * 8 */
/* PLL Configuration: Ext Clock * 8 (see table 9-4 of MCF user manual) */
#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0
#define CONFIG_SYS_MONITOR_LEN 0x20000
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
/*
#define AT91C_MAIN_CLOCK 179404800 /* from 12.288 MHz * 73 / 5 */
#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock */
/* undef to save memory */
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "=> "
/* Buffer size for input from the Console */
#define CONFIG_SYS_CBSIZE 256
/* Buffer size for Console output */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 41666666
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
#endif /* __ECOVEC_H */
* CLKs configurations
*/
-#define CONFIG_SYS_HZ 1000
-
/*
* Board-specific values for Orion5x MPP low level init:
* - MPPs 12 to 15 are SATA LEDs (mode 5)
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_DA850_LOWLEVEL
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_DA850_PLL_INIT
* U-Boot general configuration
*/
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
-#define CONFIG_SYS_PROMPT "=> " /* Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_FLASH_BASE 0xFF800000
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "=> "
/* Define this variable to enable the "hush" shell (from
Busybox) as command line interpreter, thus enabling
#define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
/*-----------------------------------------------------------------------
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
/* Clock */
#define CONFIG_SYS_CLK_FREQ 66666666
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
/* Ether */
#define CONFIG_SH_ETHER 1
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ 1000
/* 32kB internal SRAM */
#define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */
/* Keep L2 Cache Disabled */
#define CONFIG_SYS_DCACHE_OFF
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
/* Enable ACE acceleration for SHA1 and SHA256 */
#define CONFIG_EXYNOS_ACE_SHA
#define CONFIG_SHA_HW_ACCEL
/* USB */
#define CONFIG_CMD_USB
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_EXYNOS
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_XHCI_EXYNOS
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE
/* USB boot mode */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_RD_LVL
#define CONFIG_NR_DRAM_BANKS 8
#define CONFIG_FAVR32_EZKIT_EXT_FLASH
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ 1000
-
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 0xfe
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
+#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
-
/*
* Physical Memory Map
*/
#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_DISPLAY_BOARDINFO 1
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Various low-level settings
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* USB stuff
*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Various low-level settings
*/
#define CONFIG_AT32AP
#define CONFIG_AT32AP7000
-/*
- * Timer clock frequency. We're using the CPU-internal COUNT register
- * for this, so this is equivalent to the CPU core clock frequency
- */
-#define CONFIG_SYS_HZ 1000
-
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/***** Gaisler GRLIB IP-Cores Config ********/
/* AMBA Plug & Play info display on startup */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/***** Gaisler GRLIB IP-Cores Config ********/
#define CONFIG_SYS_GRLIB_SDRAM 0
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "=> "
/*
#define CONFIG_CLOCKS_IN_MHZ
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/* memtest works from the end of the exception vector table
#define CONFIG_SYS_NO_FLASH
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+++ /dev/null
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * TI H2 and P2 Debug Board hardware map
- *
- * Copyright (C) 2004 MPC-Data Limited. (http://www.mpc-data.co.uk)
- * Author: MPC-Data Limited
- * Dave Peverley
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __INCLUDED_H2_P2_DBH_BOARD_H
-#define __INCLUDED_H2_P2_DBH_BOARD_H
-
-#include <asm/sizes.h>
-
-/*
- * The Debug board is designed to function with the P2 Sample, H2
- * Sample and 1610 Innovator boards. The main difference AFAICT is
- * the chip selects used with each system ;
- *
- * P2 Sample : CS1 of OMAP730 is used to select the CPLD & LAN regs
- * H2 Sample : CS1a is used to select the CPLD registers.
- *
- */
-
-/***************************************************************************
- * CPLD Registers
- **************************************************************************/
-
-#define H2DBG_CPLD_REVISION 0x04000010
-#define H2DBG_BOARD_REVISION 0x04000012
-#define H2DBG_GPIO_REGISTER 0x04000014
-#define H2DBG_LED_CONTROL 0x04000016
-#define H2DBG_MISC_INPUT 0x04000018
-#define H2DBG_LAN_STATUS 0x0400001A
-#define H2DBG_LAN_RESET 0x0400001C
-#define H2DBG_ETH_REG_BASE 0x04000300
-
-/***************************************************************************
- * Ethernet Control Registers
- * These are for the LAN91C96 on the debug board
- **************************************************************************/
-
-/* Bank 0 in IO space */
-
-#define ETH_TCR (H2DBG_ETH_REG_BASE + 0x00) /* Transmit Control Register */
-#define ETH_EPH_STATUS (H2DBG_ETH_REG_BASE + 0x02) /* EPH Status Register */
-#define ETH_RCR (H2DBG_ETH_REG_BASE + 0x04) /* Receive Control Register */
-#define ETH_COUNTER (H2DBG_ETH_REG_BASE + 0x06) /* Counter Register */
-#define ETH_MIR (H2DBG_ETH_REG_BASE + 0x08) /* Memory Information Register */
-#define ETH_MCR (H2DBG_ETH_REG_BASE + 0x0A) /* Memory Configuration Register */
-
-/* Bank 1 in IO space */
-
-#define ETH_CONFIG (H2DBG_ETH_REG_BASE + 0x00) /* Configuration Register */
-#define ETH_BASE (H2DBG_ETH_REG_BASE + 0x02) /* Base Address Register */
-#define ETH_IA0 (H2DBG_ETH_REG_BASE + 0x04) /* Individual Address Register - 0 */
-#define ETH_IA1 (H2DBG_ETH_REG_BASE + 0x05) /* Individual Address Register - 1 */
-#define ETH_IA2 (H2DBG_ETH_REG_BASE + 0x06) /* Individual Address Register - 2 */
-#define ETH_IA3 (H2DBG_ETH_REG_BASE + 0x07) /* Individual Address Register - 3 */
-#define ETH_IA4 (H2DBG_ETH_REG_BASE + 0x08) /* Individual Address Register - 4 */
-#define ETH_IA5 (H2DBG_ETH_REG_BASE + 0x09) /* Individual Address Register - 5 */
-#define ETH_GEN_PURPOSE (H2DBG_ETH_REG_BASE + 0x0A) /* General Address Registers */
-#define ETH_CONTROL (H2DBG_ETH_REG_BASE + 0x0B) /* Control Register */
-
-/* Bank 2 in IO space */
-
-#define ETH_MMU (H2DBG_ETH_REG_BASE + 0x00) /* MMU Command Register */
-#define ETH_AUTO_TX_START (H2DBG_ETH_REG_BASE + 0x01) /* Auto Tx Start Register */
-#define ETH_PNR (H2DBG_ETH_REG_BASE + 0x02) /* Packet Number Register */
-#define ETH_ARR (H2DBG_ETH_REG_BASE + 0x03) /* Allocation Result Register */
-#define ETH_FIFO (H2DBG_ETH_REG_BASE + 0x04) /* FIFO Ports Register */
-#define ETH_POINTER (H2DBG_ETH_REG_BASE + 0x06) /* Pointer Register */
-#define ETH_DATA_HIGH (H2DBG_ETH_REG_BASE + 0x08) /* Data High Register */
-#define ETH_DATA_LOW (H2DBG_ETH_REG_BASE + 0x0A) /* Data Low Register */
-#define ETH_INT_STATS (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Status Register - RO */
-#define ETH_INT_ACK (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Acknowledge Register -WO */
-#define ETH_INT_MASK (H2DBG_ETH_REG_BASE + 0x0D) /* Interrupt Mask Register */
-
-
-#ifndef __ASSEMBLY__
-
-/*
- * A couple of utility inlines to aid debugging using the LED's on the
- * debug board.
- */
-
-static inline void set_led_state(int state)
-{
- static unsigned long hw_led_state = 0;
- volatile unsigned short *led_address = (volatile unsigned short *)0x04000016;
-
- hw_led_state = ((unsigned long)state);
- *((unsigned short *) (led_address)) = (unsigned short) (~hw_led_state & 0xFFFF);
-}
-
-
-static inline void spin_up_leds(void)
-{
- volatile int i, j, k;
-
- for (k = 0; k < 2; k++) {
- for (i = 0; i < 16; i++) {
- for (j = 0; j < 5000; j++) {
- set_led_state(1 << i);
- }
- }
- for (i = 15; i >= 0; i--) {
- for (j = 0; j < 5000; j++) {
- set_led_state(1 << i);
- }
- }
- }
-}
-
-#endif /* ! __ASSEMBLY__ */
-
-#endif /* ! __INCLUDED_H2_P2_DBH_BOARD_H */
#define CONFIG_AT32AP7000
#define CONFIG_HAMMERHEAD
-#define CONFIG_SYS_HZ 1000
-
/*
* Set up the PLL to run at 125 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_AIS_CONFIG_FILE "board/$(BOARDDIR)/hawkboard-ais-nand.cfg"
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PIO_MODE 0 /* IDE interface in PIO Mode 0 */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_ALLOC_DPRAM 1 /* use allocation routines */
/*
* Low Level Configuration Settings
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_SYS_NO_FLASH
-#define CFG_HZ 1000
-#define CONFIG_SYS_HZ CFG_HZ
#define CONFIG_OF_LIBFDT
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_SUPPORT_RAW_INITRD
#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
+#define CONFIG_SYS_TIMER_RATE (150000000/256)
+#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4)
+#define CONFIG_SYS_TIMER_COUNTS_DOWN
+
/*
* Size of malloc() pool
*/
#define CONFIG_RESET_TO_RETRY
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n", bootdelay
-
+#define CONFIG_AUTOBOOT_KEYED_CTRLC
/*
* Miscellaneous configurable options
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Enable loopw command.
*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_I2C_SPEED 50000
#define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/* Physical Memory Map */
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_MX27
#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_DISPLAY_CPUINFO
/*
* U-Boot general configuration
*/
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Print buffer sz */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
#define CONFIG_SYS_LOAD_ADDR 0 /* default load address */
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_CMDLINE_EDITING 1
/*-----------------------------------------------------------------------
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
-#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_SYS_LOAD_ADDR 0 /* default load address */
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_CMDLINE_EDITING
/*
#define CONFIG_SYS_MIPS_TIMER_FREQ (incaip_get_cpuclk() / 2)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_LOAD_ADDR 0x80100000 /* default load address */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Enable loopw command.
*/
#define CONFIG_SYS_TEXT_BASE 0x01000000
#define CONFIG_SYS_MEMTEST_START 0x100000
#define CONFIG_SYS_MEMTEST_END 0x10000000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_DA850_PLL_INIT
#define CONFIG_SYS_DA850_DDR_INIT
#define CONFIG_SYS_TEXT_BASE 0xc1080000
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_LOOPW
/*
#define CONFIG_MB86R0x
#define CONFIG_MB86R0x_IOCLK get_bus_freq(0)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TEXT_BASE 0x10000000
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
#define CONFIG_SYS_BARGSIZE 256 /* Boot Argument Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0xc0040000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc2000000 /* 4..128 MB */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x0a /* core clock 206MHz */
#define CONFIG_SYS_BAUDRATE_TABLE { 19200, 38400, 57600, 115200 }
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_ALT_MEMTEST /* memory test, takes time */
-#define CONFIG_SYS_HZ 1000 /* decr. freq: 1 ms ticks */
-
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_LOADS_ECHO
#define CONFIG_SYS_LOADS_BAUD_CHANGE
-#define CONFIG_SYS_I2C_INIT_BOARD
-
/* Support the IVM EEprom */
#define CONFIG_SYS_IVM_EEPROM_ADR 0x50
#define CONFIG_SYS_IVM_EEPROM_MAX_LEN 0x400
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-
/* UBI Support for all Keymile boards */
#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
"add_default=" \
"setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
- ":${hostname}:${netdev}:off3" \
+ ":${hostname}:${netdev}:off:" \
" console=" CONFIG_KM_CONSOLE_TTY ",${baudrate}" \
" mem=${kernelmem} init=${init}" \
CONFIG_KM_ECC_MODE \
#define CONFIG_CMD_DTT
#define CONFIG_JFFS2_CMDLINE
+/* standard km ethernet_present for piggy */
+#define CONFIG_KM_COMMON_ETH_INIT
+
/* EEprom support 24C08, 24C16, 24C64 */
#define CONFIG_SYS_I2C_MULTI_EEPROMS
#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
+/* Reserve 4 MB for malloc */
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
+
/******************************************************************************
* (PRAM usage)
* ... -------------------------------------------------------
#define CONFIG_ENV_SPI_MODE SPI_MODE_3
#endif
+/* Reserve 4 MB for malloc */
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
+
#include "asm/arch/config.h"
#define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 0
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
+#define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */
/*
* UBI related stuff
#undef CONFIG_I2C_MVTWSI
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
-#if defined(CONFIG_SYS_I2C_SOFT)
-
#define CONFIG_SYS_NUM_I2C_BUSES 6
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
#define CONFIG_SYS_I2C_SOFT_SLAVE 0x0
#define CONFIG_SYS_I2C_SOFT_SPEED 100000
-#endif
/* EEprom support 24C128, 24C256 valid for environment eeprom */
#define CONFIG_SYS_I2C_MULTI_EEPROMS
--- /dev/null
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp@keymile.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _CONFIG_KMP204X_H
+#define _CONFIG_KMP204X_H
+
+#define CONFIG_PHYS_64BIT
+#define CONFIG_PPC_P2041
+
+#define CONFIG_SYS_TEXT_BASE 0xfff80000
+
+#define CONFIG_KM_DEF_NETDEV "netdev=eth0\0"
+
+#define CONFIG_NAND_ECC_BCH
+
+/* common KM defines */
+#include "keymile-common.h"
+
+#define CONFIG_SYS_RAMBOOT
+#define CONFIG_RAMBOOT_PBL
+#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
+#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/keymile/kmp204x/pbi.cfg
+#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/keymile/kmp204x/rcw_kmp204x.cfg
+
+/* High Level Configuration Options */
+#define CONFIG_BOOKE
+#define CONFIG_E500 /* BOOKE e500 family */
+#define CONFIG_E500MC /* BOOKE e500mc family */
+#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
+#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
+#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
+#define CONFIG_MP /* support multiple processors */
+
+#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
+#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS
+#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
+#define CONFIG_PCI /* Enable PCI/PCIE */
+#define CONFIG_PCIE1 /* PCIE controler 1 */
+#define CONFIG_PCIE3 /* PCIE controler 3 */
+#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
+#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
+
+#define CONFIG_SYS_DPAA_RMAN /* RMan */
+
+#define CONFIG_FSL_LAW /* Use common FSL init code */
+
+/* Environment in SPI Flash */
+#define CONFIG_SYS_EXTRA_ENV_RELOC
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_BUS 0
+#define CONFIG_ENV_SPI_CS 0
+#define CONFIG_ENV_SPI_MAX_HZ 20000000
+#define CONFIG_ENV_SPI_MODE 0
+#define CONFIG_ENV_OFFSET 0x100000 /* 1MB for u-boot */
+#define CONFIG_ENV_SIZE 0x004000 /* 16K env */
+#define CONFIG_ENV_SECT_SIZE 0x010000
+#define CONFIG_ENV_OFFSET_REDUND 0x110000
+#define CONFIG_ENV_TOTAL_SIZE 0x020000
+
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+
+#ifndef __ASSEMBLY__
+unsigned long get_board_sys_clk(unsigned long dummy);
+#endif
+#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0)
+
+/*
+ * These can be toggled for performance analysis, otherwise use default.
+ */
+#define CONFIG_SYS_CACHE_STASHING
+#define CONFIG_BACKSIDE_L2_CACHE
+#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
+#define CONFIG_BTB /* toggle branch predition */
+
+#define CONFIG_ENABLE_36BIT_PHYS
+
+#define CONFIG_ADDR_MAP
+#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */
+
+#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */
+#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0x00800000
+#define CONFIG_SYS_ALT_MEMTEST
+#define CONFIG_PANIC_HANG /* do not reset board on panic */
+
+/*
+ * Config the L3 Cache as L3 SRAM
+ */
+#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE
+#define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | \
+ CONFIG_RAMBOOT_TEXT_BASE)
+#define CONFIG_SYS_L3_SIZE (1024 << 10)
+#define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE)
+
+#define CONFIG_SYS_DCSRBAR 0xf0000000
+#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
+
+/*
+ * DDR Setup
+ */
+#define CONFIG_VERY_BIG_RAM
+#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
+#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
+
+#define CONFIG_DIMM_SLOTS_PER_CTLR 1
+#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
+
+#define CONFIG_DDR_SPD
+#define CONFIG_FSL_DDR3
+#define CONFIG_FSL_DDR_INTERACTIVE
+
+#define CONFIG_SYS_SPD_BUS_NUM 0
+#define SPD_EEPROM_ADDRESS 0x54
+#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
+
+#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
+
+/******************************************************************************
+ * (PRAM usage)
+ * ... -------------------------------------------------------
+ * ... |ROOTFSSIZE | PNVRAM |PHRAM |RESERVED_PRAM | END_OF_RAM
+ * ... |<------------------- pram -------------------------->|
+ * ... -------------------------------------------------------
+ * @END_OF_RAM:
+ * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose
+ * @CONFIG_KM_PHRAM: address for /var
+ * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application)
+ * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM
+ */
+
+/* size of rootfs in RAM */
+#define CONFIG_KM_ROOTFSSIZE 0x0
+/* pseudo-non volatile RAM [hex] */
+#define CONFIG_KM_PNVRAM 0x80000
+/* physical RAM MTD size [hex] */
+#define CONFIG_KM_PHRAM 0x100000
+/* resereved pram area at the end of memroy [hex] */
+#define CONFIG_KM_RESERVED_PRAM 0x0
+/* enable protected RAM */
+#define CONFIG_PRAM 0
+
+#define CONFIG_KM_CRAMFS_ADDR 0x2000000
+#define CONFIG_KM_KERNEL_ADDR 0x1000000 /* max kernel size 15.5Mbytes */
+#define CONFIG_KM_FDT_ADDR 0x1F80000 /* max dtb size 0.5Mbytes */
+
+#define CONFIG_BOOTCOUNT_LIMIT
+
+/*
+ * Local Bus Definitions
+ */
+
+/* Set the local bus clock 1/8 of plat clk, 2 clk delay LALE */
+#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_8 | LCRR_EADC_2)
+
+/* Nand Flash */
+#define CONFIG_NAND_FSL_ELBC
+#define CONFIG_SYS_NAND_BASE 0xffa00000
+#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull
+
+#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_MTD_NAND_VERIFY_WRITE
+#define CONFIG_CMD_NAND
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
+
+#define CONFIG_BCH
+
+/* NAND flash config */
+#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
+ | BR_PS_8 /* Port Size = 8 bit */ \
+ | BR_MS_FCM /* MSEL = FCM */ \
+ | BR_V) /* valid */
+
+#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_256KB /* length 256K */ \
+ | OR_FCM_BCTLD /* LBCTL not ass */ \
+ | OR_FCM_SCY_1 /* 1 clk wait cycle */ \
+ | OR_FCM_RST /* 1 clk read setup */ \
+ | OR_FCM_PGS /* Large page size */ \
+ | OR_FCM_CST) /* 0.25 command setup */
+
+#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */
+#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
+
+/* QRIO FPGA */
+#define CONFIG_SYS_QRIO_BASE 0xfb000000
+#define CONFIG_SYS_QRIO_BASE_PHYS 0xffb000000ull
+
+#define CONFIG_SYS_QRIO_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_QRIO_BASE_PHYS) \
+ | BR_PS_8 /* Port Size 8 bits */ \
+ | BR_DECC_OFF /* no error corr */ \
+ | BR_MS_GPCM /* MSEL = GPCM */ \
+ | BR_V) /* valid */
+
+#define CONFIG_SYS_QRIO_OR_PRELIM (OR_AM_64KB /* length 64K */ \
+ | OR_GPCM_BCTLD /* no LCTL assert */ \
+ | OR_GPCM_ACS_DIV4 /* LCS 1/4 clk after */ \
+ | OR_GPCM_SCY_2 /* 2 clk wait cycles */ \
+ | OR_GPCM_TRLX /* relaxed tmgs */ \
+ | OR_GPCM_EAD) /* extra bus clk cycles */
+
+#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_QRIO_BR_PRELIM /* QRIO Base Address */
+#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_QRIO_OR_PRELIM /* QRIO Options */
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
+#define CONFIG_MISC_INIT_R
+#define CONFIG_LAST_STAGE_INIT
+
+#define CONFIG_HWCONFIG
+
+/* define to use L1 as initial stack */
+#define CONFIG_L1_INIT_RAM
+#define CONFIG_SYS_INIT_RAM_LOCK
+#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR
+/* The assembler doesn't like typecast */
+#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
+ ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
+ CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
+
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
+
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
+
+/* Serial Port - controlled on board with jumper J8
+ * open - index 2
+ * shorted - index 1
+ */
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2)
+
+#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500)
+#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600)
+#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500)
+#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600)
+
+#define CONFIG_KM_CONSOLE_TTY "ttyS0"
+
+/* Use the HUSH parser */
+#define CONFIG_SYS_HUSH_PARSER
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT
+#define CONFIG_OF_BOARD_SETUP
+#define CONFIG_OF_STDOUT_VIA_ALIAS
+
+/* new uImage format support */
+#define CONFIG_FIT
+#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
+
+/* I2C */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_NUM_I2C_BUSES 3
+#define CONFIG_SYS_I2C_MAX_HOPS 1
+#define CONFIG_SYS_I2C_FSL /* Use FSL I2C driver */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
+#define CONFIG_SYS_FSL_I2C_SPEED 400000
+#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
+#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \
+ {0, {{I2C_MUX_PCA9547, 0x70, 2 } } }, \
+ }
+
+#define CONFIG_KM_IVM_BUS 1 /* I2C1 (Mux-Port 1)*/
+
+/*
+ * eSPI - Enhanced SPI
+ */
+#define CONFIG_FSL_ESPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_BAR /* 4 byte-addressing */
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_SPEED 20000000
+#define CONFIG_SF_DEFAULT_MODE 0
+
+/*
+ * General PCI
+ * Memory space is mapped 1-1, but I/O space must start from 0.
+ */
+
+/* controller 1, direct to uli, tgtid 3, Base address 20000 */
+#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000
+#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull
+#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
+#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000
+#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull
+#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
+
+/* controller 3, Slot 1, tgtid 1, Base address 202000 */
+#define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000
+#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000
+#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull
+#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */
+#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8010000
+#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
+#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8010000ull
+#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
+
+/* Qman/Bman */
+#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
+#define CONFIG_SYS_BMAN_NUM_PORTALS 10
+#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000
+#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull
+#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000
+#define CONFIG_SYS_QMAN_NUM_PORTALS 10
+#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000
+#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull
+#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000
+
+#define CONFIG_SYS_DPAA_FMAN
+#define CONFIG_SYS_DPAA_PME
+/* Default address of microcode for the Linux Fman driver
+ * env is stored at 0x100000, sector size is 0x10000, x2 (redundant)
+ * ucode is stored after env, so we got 0x120000.
+ */
+#define CONFIG_SYS_QE_FW_IN_SPIFLASH
+#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x120000
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
+#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
+
+#define CONFIG_FMAN_ENET
+#define CONFIG_PHYLIB_10G
+#define CONFIG_PHY_MARVELL /* there is a marvell phy */
+
+#define CONFIG_PCI_INDIRECT_BRIDGE
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_E1000
+
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CONFIG_DOS_PARTITION
+
+/* RGMII (FM1@DTESC5) is used as debug itf, it's the only one configured */
+#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x11
+#define CONFIG_SYS_TBIPA_VALUE 8
+#define CONFIG_PHYLIB /* recommended PHY management */
+#define CONFIG_ETHPRIME "FM1@DTSEC5"
+#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
+
+/*
+ * Environment
+ */
+#define CONFIG_LOADS_ECHO /* echo on for serial download */
+#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
+
+/*
+ * additionnal command line configuration.
+ */
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_NET
+
+/* we don't need flash support */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_FLASH_CFI_MTD
+#undef CONFIG_JFFS2_CMDLINE
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 64 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux */
+#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
+
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+#define __USB_PHY_TYPE utmi
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ENV_OVERWRITE
+#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */
+#define CONFIG_KM_DEF_ENV "km-common=empty\0"
+#endif
+
+#ifndef MTDIDS_DEFAULT
+# define MTDIDS_DEFAULT "nand0=fsl_elbc_nand"
+#endif /* MTDIDS_DEFAULT */
+
+#ifndef MTDPARTS_DEFAULT
+# define MTDPARTS_DEFAULT "mtdparts=" \
+ "fsl_elbc_nand:" \
+ "-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
+#endif /* MTDPARTS_DEFAULT */
+
+/* architecture specific default bootargs */
+#define CONFIG_KM_DEF_BOOT_ARGS_CPU ""
+
+/* FIXME: FDT_ADDR is unspecified */
+#define CONFIG_KM_DEF_ENV_CPU \
+ "boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \
+ "cramfsloadfdt=" \
+ "cramfsload ${fdt_addr_r} " \
+ "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \
+ "fdt_addr_r=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \
+ "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.pbl\0" \
+ "update=" \
+ "sf probe 0;sf erase 0 +${filesize};" \
+ "sf write ${load_addr_r} 0 ${filesize};\0" \
+ ""
+
+#define CONFIG_HW_ENV_SETTINGS \
+ "hwconfig=fsl_ddr:ctlr_intlv=cacheline\0" \
+ "usb_phy_type=" __stringify(__USB_PHY_TYPE) "\0" \
+ "usb_dr_mode=host\0"
+
+#define CONFIG_KM_NEW_ENV \
+ "newenv=sf probe 0;" \
+ "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \
+ __stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
+
+/* ppc_82xx is the equivalent to ppc_6xx, the generic ppc toolchain */
+#ifndef CONFIG_KM_DEF_ARCH
+#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0"
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_KM_DEF_ENV \
+ CONFIG_KM_DEF_ARCH \
+ CONFIG_KM_NEW_ENV \
+ CONFIG_HW_ENV_SETTINGS \
+ "EEprom_ivm=pca9547:70:9\0" \
+ ""
+
+#endif /* _CONFIG_KMP204X_H */
/* enable I2C and select the hardware/software driver */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
+#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_NUM_I2C_BUSES 3
#define CONFIG_SYS_I2C_MAX_HOPS 1
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
{0, {{I2C_MUX_PCA9542, 0x70, 1} } } }
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
+#define CONFIG_KM_I2C_ABORT
/*
* Software (bit-bang) I2C driver configuration
--- /dev/null
+/*
+ * (C) Copyright 2013 Keymile AG
+ * Valentin Longchamp <valentin.longchamp@keymile.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* KMLION1 */
+#if defined(CONFIG_KMLION1)
+#define CONFIG_HOSTNAME kmlion1
+#define CONFIG_KM_BOARD_NAME "kmlion1"
+
+#else
+#error ("Board not supported")
+#endif
+
+#define CONFIG_KMP204X
+
+#include "km/kmp204x-common.h"
+
+#if defined(CONFIG_KMLION1)
+/* App1 Local bus */
+#define CONFIG_SYS_LBAPP1_BASE 0xD0000000
+#define CONFIG_SYS_LBAPP1_BASE_PHYS 0xFD0000000ull
+
+#define CONFIG_SYS_LBAPP1_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBAPP1_BASE_PHYS) \
+ | BR_PS_8 /* Port Size 8 bits */ \
+ | BR_DECC_OFF /* no error corr */ \
+ | BR_MS_GPCM /* MSEL = GPCM */ \
+ | BR_V) /* valid */
+
+#define CONFIG_SYS_LBAPP1_OR_PRELIM (OR_AM_256MB /* length 256MB */ \
+ | OR_GPCM_ACS_DIV2 /* LCS 1/2 clk after */ \
+ | OR_GPCM_CSNT /* LCS 1/4 clk before */ \
+ | OR_GPCM_SCY_2 /* 2 clk wait cycles */ \
+ | OR_GPCM_TRLX /* relaxed tmgs */ \
+ | OR_GPCM_EAD) /* extra bus clk cycles */
+/* Local bus app1 Base Address */
+#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_LBAPP1_BR_PRELIM
+/* Local bus app1 Options */
+#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_LBAPP1_OR_PRELIM
+
+/* App2 Local bus */
+#define CONFIG_SYS_LBAPP2_BASE 0xE0000000
+#define CONFIG_SYS_LBAPP2_BASE_PHYS 0xFE0000000ull
+
+#define CONFIG_SYS_LBAPP2_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBAPP2_BASE_PHYS) \
+ | BR_PS_8 /* Port Size 8 bits */ \
+ | BR_DECC_OFF /* no error corr */ \
+ | BR_MS_GPCM /* MSEL = GPCM */ \
+ | BR_V) /* valid */
+
+#define CONFIG_SYS_LBAPP2_OR_PRELIM (OR_AM_256MB /* length 256MB */ \
+ | OR_GPCM_ACS_DIV2 /* LCS 1/2 clk after */ \
+ | OR_GPCM_CSNT /* LCS 1/4 clk before */ \
+ | OR_GPCM_SCY_2 /* 2 clk wait cycles */ \
+ | OR_GPCM_TRLX /* relaxed tmgs */ \
+ | OR_GPCM_EAD) /* extra bus clk cycles */
+/* Local bus app2 Base Address */
+#define CONFIG_SYS_BR3_PRELIM CONFIG_SYS_LBAPP2_BR_PRELIM
+/* Local bus app2 Options */
+#define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_LBAPP2_OR_PRELIM
+#endif
+
+#endif /* __CONFIG_H */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
#define CONFIG_NETCONSOLE
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_MEMTEST_END 0x07C00000
#define CONFIG_SYS_LOAD_ADDR 0x00100000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
#define CONFIG_GLOBAL_TIMER
#define CONFIG_SYS_CLK_FREQ (48000000)
#define CONFIG_SYS_CPU_CLK (1196000000)
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
-#define CFG_HZ (1000)
-#define CONFIG_SYS_HZ CFG_HZ
/* Ether */
#define CONFIG_NET_MULTI
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
/* FIXME: 32.768 MHz is the crystal frequency but */
/* the real frequency is lower by about 0.75% */
#define CONFIG_SYS_CLK_FREQ 32768000
-#define CONFIG_SYS_HZ 1000
/* Bit-field values for MCCR1. */
#define CONFIG_SYS_ROMNAL 0
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ "
#else
-#define CONFIG_SYS_PROMPT "=> "
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE \
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_AUTO_COMPLETE 1
-/*
- * Clock Configuration
- */
-#define CONFIG_SYS_HZ 1000 /* Timer @ 3250000 Hz */
-
/*
* DRAM Map
*/
#undef CONFIG_SYS_PROMPT
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/*
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
#else
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#endif
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */
#ifdef CONFIG_MMC
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
#define CONFIG_SYS_PIO_MODE 0 /* IDE interface in PIO Mode 0 */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* When the watchdog is enabled, output must be fast enough in Linux.
*/
#define CONFIG_SUPPORT_VFAT
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
#define CONFIG_MX53
#define CONFIG_MXC_GPIO
-#define CONFIG_SYS_HZ 1000
#include <asm/arch/imx-regs.h>
* U-Boot general configurations
*/
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
* I2C
*/
#ifdef CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
#endif
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
/*use Hardware WDT */
#define CONFIG_HW_WATCHDOG
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value*/
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
*/
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*
* Physical Memory Map
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000
-
/*
* For booting Linux, the board info and command line data
* have to be in the first 256 MB of memory, since this is
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq */
/* Misc CPU related */
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
/* architecture dependent code */
#define CONFIG_SYS_USR_EXCEP /* user exception */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo"
#define CONFIG_MIMC200_EXT_FLASH
-#define CONFIG_SYS_HZ 1000
-
/*
* Set up the PLL to run at 140 MHz, the CPU to run at the PLL
* frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default kernel load addr */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Various low-level settings
*/
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x00400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
/* U-Boot internals */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
/* Clocks */
#define CONFIG_SYS_CLK_FREQ 24000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ 1000
/* UART */
#define CONFIG_SCIF_CONSOLE 1
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ 1000
/* PCMCIA */
#define CONFIG_IDE_PCMCIA 1
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ 1000
#endif /* __MS7722SE_H */
#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MAXARGS 16
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
#endif /* __MS7750SE_H */
*/
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
#define CONFIG_SYS_SDRAM_BASE 0x00000000
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_DISPLAY_BOARDINFO 1
#define CONFIG_CMDLINE_EDITING 1
/*
* CLKs configurations
*/
-#define CONFIG_SYS_HZ 1000
/*
* NS16550 Configuration
#define CONFIG_SYS_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x08800000 /* default load address */
-/*#define CONFIG_SYS_HZ 1000 */
#define CONFIG_SYS_HZ 3686400
#define CONFIG_SYS_CPUSPEED 0x141
/* High Level Configuration Options */
#define CONFIG_MX25
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TEXT_BASE 0x81200000
#define CONFIG_MXC_GPIO
+#define CONFIG_SYS_TIMER_RATE 32768
+#define CONFIG_SYS_TIMER_COUNTER \
+ (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
+
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE IMX_I2C_BASE
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
/* RTC */
#define CONFIG_RTC_IMXDI
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_CMDLINE_EDITING 1
/*-----------------------------------------------------------------------
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x81000000
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_CMDLINE_EDITING
/*-----------------------------------------------------------------------
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
-
/*
* Physical Memory Map
*/
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/*-----------------------------------------------------------------------
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/*-----------------------------------------------------------------------
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/* Physical Memory Map */
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
/* PMIC Configs */
#define CONFIG_POWER
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/* Physical Memory Map */
#define CONFIG_MXC_USB_FLAGS 0
/* I2C Configs */
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
/* PMIC Controller */
#define CONFIG_POWER
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/* Physical Memory Map */
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/* Physical Memory Map */
#define CONFIG_SYS_MEMTEST_END 0x10010000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_MXC_USB_PORT 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
#endif /* __MX6QSABREAUTO_CONFIG_H */
#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
#define CONFIG_STACKSIZE (128 * 1024)
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
#define CONFIG_STACKSIZE SZ_128K
* CPU specifics
*/
-/* Ticks per second */
-#define CONFIG_SYS_HZ 1000
-
/* MXS uses FDT */
#define CONFIG_OF_LIBFDT
/* U-Boot general configuration */
#define CONFIG_SYS_LONGHELP
#ifndef CONFIG_SYS_PROMPT
-#define CONFIG_SYS_PROMPT "=> "
#endif
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE \
#define CONFIG_BOARD_LATE_INIT /* call board_late_init during start up */
/* timing informazion */
-#define CONFIG_SYS_HZ 1000 /* Mandatory... */
#define CONFIG_SYS_TIMERBASE 0x101E2000
/* serial port (PL011) configuration */
#define CONFIG_SYS_LOW_RES_TIMER
#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_TIMER_BASE
#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_TIMER_IRQ
-#define CONFIG_SYS_HZ 1000 /* Always 1000 */
#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/
#define CONFIG_SYS_NIOS_TMRCNT \
(CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_TIMER_FREQ / 1000) - 1)
* MISC
*/
#define CONFIG_SYS_LONGHELP /* Provide extended help */
-#define CONFIG_SYS_PROMPT "==> " /* Command prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
#define CONFIG_SYS_MAXARGS 16 /* Max command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Bootarg buf size */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_GPIO
+#define CONFIG_MV_UDC
+#define CONFIG_USBD_HS
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_CDC
+#define CONFIG_NETCONSOLE
#define CONFIG_CMD_FUSE
#ifdef CONFIG_CMD_FUSE
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
/* OCOTP Configs */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
-#define CONFIG_MXC_USB_PORT 1
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*
* Stack sizes
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LOAD_ADDR 0x100000
/* decrementer freq: 1 ms ticks */
-#define CONFIG_SYS_HZ 1000
/*
* Various low-level settings
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/* Size of environment - 128KB */
#define CONFIG_ENV_SIZE (128 << 10)
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*
* Physical Memory Map
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*
* Physical Memory Map
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
*/
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
-#define CONFIG_SYS_HZ 1000
/*-----------------------------------------------------------------------
* Physical Memory Map
+++ /dev/null
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * OMAP730 hardware map
- *
- * Copyright (C) 2004 MPC-Data Limited. (http://www.mpc-data.co.uk)
- * Author: MPC-Data Limited
- * Dave Peverley
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __INCLUDED_OMAP730_H
-#define __INCLUDED_OMAP730_H
-
-#include <asm/sizes.h>
-
-/***************************************************************************
- * OMAP730 Configuration Registers
- **************************************************************************/
-
-#define PERSEUS2_MPU_DEV_ID ((unsigned int)(0xFFFE1000))
-#define PERSEUS2_GSM_DEV_ID0 ((unsigned int)(0xFFFE1000))
-#define PERSEUS2_GDM_DEV_ID1 ((unsigned int)(0xFFFE1002))
-#define DSP_CONF ((unsigned int)(0xFFFE1004))
-#define PERSEUS2_MPU_DIE_ID0 ((unsigned int)(0xFFFE1008))
-#define GSM_ASIC_CONF ((unsigned int)(0xFFFE1008))
-#define PERSEUS2_MPU_DIE_ID1 ((unsigned int)(0xFFFE100C))
-#define PERSEUS2_MODE1 ((unsigned int)(0xFFFE1010))
-#define PERSEUS2_GSM_DIE_ID0 ((unsigned int)(0xFFFE1010))
-#define PERSEUS2_GSM_DIE_ID1 ((unsigned int)(0xFFFE1012))
-#define PERSEUS2_MODE2 ((unsigned int)(0xFFFE1014))
-#define PERSEUS2_GSM_DIE_ID2 ((unsigned int)(0xFFFE1014))
-#define PERSEUS2_GSM_DIE_ID3 ((unsigned int)(0xFFFE1016))
-#define PERSEUS2_ANALOG_CELLS_CONF ((unsigned int)(0xFFFE1018))
-#define SPECCTL ((unsigned int)(0xFFFE101C))
-#define SPARE1 ((unsigned int)(0xFFFE1020))
-#define SPARE2 ((unsigned int)(0xFFFE1024))
-#define GSM_PBG_IRQ ((unsigned int)(0xFFFE1028))
-#define DMA_REQ_CONF ((unsigned int)(0xFFFE1030))
-#define PE_CONF_NO_DUAL ((unsigned int)(0xFFFE1060))
-#define PERSEUS2_IO_CONF0 ((unsigned int)(0xFFFE1070))
-#define PERSEUS2_IO_CONF1 ((unsigned int)(0xFFFE1074))
-#define PERSEUS2_IO_CONF2 ((unsigned int)(0xFFFE1078))
-#define PERSEUS2_IO_CONF3 ((unsigned int)(0xFFFE107C))
-#define PERSEUS2_IO_CONF4 ((unsigned int)(0xFFFE1080))
-#define PERSEUS2_IO_CONF5 ((unsigned int)(0xFFFE1084))
-#define PERSEUS2_IO_CONF6 ((unsigned int)(0xFFFE1088))
-#define PERSEUS2_IO_CONF7 ((unsigned int)(0xFFFE108C))
-#define PERSEUS2_IO_CONF8 ((unsigned int)(0xFFFE1090))
-#define PERSEUS2_IO_CONF9 ((unsigned int)(0xFFFE1094))
-#define PERSEUS2_IO_CONF10 ((unsigned int)(0xFFFE1098))
-#define PERSEUS2_IO_CONF11 ((unsigned int)(0xFFFE109C))
-#define PERSEUS2_IO_CONF12 ((unsigned int)(0xFFFE10A0))
-#define PERSEUS2_IO_CONF13 ((unsigned int)(0xFFFE10A4))
-#define PERSEUS_PCC_CONF_REG ((unsigned int)(0xFFFE10B4))
-#define BIST_STATUS_INTERNAL ((unsigned int)(0xFFFE10B8))
-#define BIST_CONTROL ((unsigned int)(0xFFFE10C0))
-#define BOOT_ROM_REG ((unsigned int)(0xFFFE10C4))
-#define PRODUCTION_ID_REG ((unsigned int)(0xFFFE10C8))
-#define BIST_SECROM_SIGNATURE1_INTERNAL ((unsigned int)(0xFFFE10D0))
-#define BIST_SECROM_SIGNATURE2_INTERNAL ((unsigned int)(0xFFFE10D4))
-#define BIST_CONTROL_2 ((unsigned int)(0xFFFE10D8))
-#define DEBUG1 ((unsigned int)(0xFFFE10E0))
-#define DEBUG2 ((unsigned int)(0xFFFE10E4))
-#define DEBUG_DMA_IRQ ((unsigned int)(0xFFFE10E8))
-
-/***************************************************************************
- * OMAP730 EMIFS Registers (TRM 2.5.7)
- **************************************************************************/
-
-#define TCMIF_BASE 0xFFFECC00
-
-#define EMIFS_LRUREG (TCMIF_BASE + 0x04)
-#define EMIFS_CONFIG (TCMIF_BASE + 0x0C)
-#define FLASH_CFG_0 (TCMIF_BASE + 0x10)
-#define FLASH_CFG_1 (TCMIF_BASE + 0x14)
-#define FLASH_CFG_2 (TCMIF_BASE + 0x18)
-#define FLASH_CFG_3 (TCMIF_BASE + 0x1C)
-#define FL_CFG_DYN_WAIT (TCMIF_BASE + 0x40)
-#define EMIFS_TIMEOUT1_REG (TCMIF_BASE + 0x28)
-#define EMIFS_TIMEOUT2_REG (TCMIF_BASE + 0x2C)
-#define EMIFS_TIMEOUT3_REG (TCMIF_BASE + 0x30)
-#define EMIFS_ABORT_ADDR (TCMIF_BASE + 0x44)
-#define EMIFS_ABORT_TYPE (TCMIF_BASE + 0x48)
-#define EMIFS_ABORT_TOUT (TCMIF_BASE + 0x4C)
-#define FLASH_ACFG_0_1 (TCMIF_BASE + 0x50)
-#define FLASH_ACFG_1_1 (TCMIF_BASE + 0x54)
-#define FLASH_ACFG_2_1 (TCMIF_BASE + 0x58)
-#define FLASH_ACFG_3_1 (TCMIF_BASE + 0x5C)
-
-/***************************************************************************
- * OMAP730 Interrupt handlers
- **************************************************************************/
-
-#define OMAP_IH1_BASE 0xFFFECB00 /* MPU Level 1 IRQ handler */
-#define OMAP_IH2_BASE 0xfffe0000
-
-/***************************************************************************
- * OMAP730 Timers
- *
- * There are three general purpose OS timers in the 730 that can be
- * configured in autoreload or one-shot modes.
- **************************************************************************/
-
-#define OMAP730_32kHz_TIMER_BASE 0xFFFB9000
-
-/* 32k Timer Registers */
-#define TIMER32k_CR 0x08
-#define TIMER32k_TVR 0x00
-#define TIMER32k_TCR 0x04
-
-/* 32k Timer Control Register definition */
-#define TIMER32k_TSS (1<<0)
-#define TIMER32k_TRB (1<<1)
-#define TIMER32k_INT (1<<2)
-#define TIMER32k_ARL (1<<3)
-
-/* MPU Timer base addresses */
-#define OMAP730_MPUTIMER_BASE 0xfffec500
-#define OMAP730_MPUTIMER_OFF 0x00000100
-
-#define OMAP730_TIMER1_BASE 0xFFFEC500
-#define OMAP730_TIMER2_BASE 0xFFFEC600
-#define OMAP730_TIMER3_BASE 0xFFFEC700
-
-/* MPU Timer Register offsets */
-#define CNTL_TIMER 0x00 /* MPU_CNTL_TIMER */
-#define LOAD_TIM 0x04 /* MPU_LOAD_TIMER */
-#define READ_TIM 0x08 /* MPU_READ_TIMER */
-
-/* MPU_CNTL_TIMER register bits */
-#define MPUTIM_FREE (1<<6)
-#define MPUTIM_CLOCK_ENABLE (1<<5)
-#define MPUTIM_PTV_MASK (0x7<<MPUTIM_PTV_BIT)
-#define MPUTIM_PTV_BIT 2
-#define MPUTIM_AR (1<<1)
-#define MPUTIM_ST (1<<0)
-
-/***************************************************************************
- * OMAP730 GPIO
- *
- * The GPIO control is split over 6 register bases in the OMAP730 to allow
- * access to all the (6 x 32) GPIO pins!
- **************************************************************************/
-
-#define OMAP730_GPIO_BASE_1 0xFFFBC000
-#define OMAP730_GPIO_BASE_2 0xFFFBC800
-#define OMAP730_GPIO_BASE_3 0xFFFBD000
-#define OMAP730_GPIO_BASE_4 0xFFFBD800
-#define OMAP730_GPIO_BASE_5 0xFFFBE000
-#define OMAP730_GPIO_BASE_6 0xFFFBE800
-
-#define GPIO_DATA_INPUT 0x00
-#define GPIO_DATA_OUTPUT 0x04
-#define GPIO_DIRECTION_CONTROL 0x08
-#define GPIO_INTERRUPT_CONTROL 0x0C
-#define GPIO_INTERRUPT_MASK 0x10
-#define GPIO_INTERRUPT_STATUS 0x14
-
-#define GPIO_DATA_INPUT_1 ((unsigned int)(OMAP730_GPIO_BASE_1 + GPIO_DATA_INPUT))
-#define GPIO_DATA_OUTPUT_1 ((unsigned int)(OMAP730_GPIO_BASE_1 + GPIO_DATA_OUTPUT))
-#define GPIO_DIRECTION_CONTROL_1 ((unsigned int)(OMAP730_GPIO_BASE_1 + GPIO_DIRECTION_CONTROL))
-#define GPIO_INTERRUPT_CONTROL_1 ((unsigned int)(OMAP730_GPIO_BASE_1 + GPIO_INTERRUPT_CONTROL))
-#define GPIO_INTERRUPT_MASK_1 ((unsigned int)(OMAP730_GPIO_BASE_1 + GPIO_INTERRUPT_MASK))
-#define GPIO_INTERRUPT_STATUS_1 ((unsigned int)(OMAP730_GPIO_BASE_1 + GPIO_INTERRUPT_STATUS))
-
-#define GPIO_DATA_INPUT_2 ((unsigned int)(OMAP730_GPIO_BASE_2 + GPIO_DATA_INPUT))
-#define GPIO_DATA_OUTPUT_2 ((unsigned int)(OMAP730_GPIO_BASE_2 + GPIO_DATA_OUTPUT))
-#define GPIO_DIRECTION_CONTROL_2 ((unsigned int)(OMAP730_GPIO_BASE_2 + GPIO_DIRECTION_CONTROL))
-#define GPIO_INTERRUPT_CONTROL_2 ((unsigned int)(OMAP730_GPIO_BASE_2 + GPIO_INTERRUPT_CONTROL))
-#define GPIO_INTERRUPT_MASK_2 ((unsigned int)(OMAP730_GPIO_BASE_2 + GPIO_INTERRUPT_MASK))
-#define GPIO_INTERRUPT_STATUS_2 ((unsigned int)(OMAP730_GPIO_BASE_2 + GPIO_INTERRUPT_STATUS))
-
-#define GPIO_DATA_INPUT_3 ((unsigned int)(OMAP730_GPIO_BASE_3 + GPIO_DATA_INPUT))
-#define GPIO_DATA_OUTPUT_3 ((unsigned int)(OMAP730_GPIO_BASE_3 + GPIO_DATA_OUTPUT))
-#define GPIO_DIRECTION_CONTROL_3 ((unsigned int)(OMAP730_GPIO_BASE_3 + GPIO_DIRECTION_CONTROL))
-#define GPIO_INTERRUPT_CONTROL_3 ((unsigned int)(OMAP730_GPIO_BASE_3 + GPIO_INTERRUPT_CONTROL))
-#define GPIO_INTERRUPT_MASK_3 ((unsigned int)(OMAP730_GPIO_BASE_3 + GPIO_INTERRUPT_MASK))
-#define GPIO_INTERRUPT_STATUS_3 ((unsigned int)(OMAP730_GPIO_BASE_3 + GPIO_INTERRUPT_STATUS))
-
-#define GPIO_DATA_INPUT_4 ((unsigned int)(OMAP730_GPIO_BASE_4 + GPIO_DATA_INPUT))
-#define GPIO_DATA_OUTPUT_4 ((unsigned int)(OMAP730_GPIO_BASE_4 + GPIO_DATA_OUTPUT))
-#define GPIO_DIRECTION_CONTROL_4 ((unsigned int)(OMAP730_GPIO_BASE_4 + GPIO_DIRECTION_CONTROL))
-#define GPIO_INTERRUPT_CONTROL_4 ((unsigned int)(OMAP730_GPIO_BASE_4 + GPIO_INTERRUPT_CONTROL))
-#define GPIO_INTERRUPT_MASK_4 ((unsigned int)(OMAP730_GPIO_BASE_4 + GPIO_INTERRUPT_MASK))
-#define GPIO_INTERRUPT_STATUS_4 ((unsigned int)(OMAP730_GPIO_BASE_4 + GPIO_INTERRUPT_STATUS))
-
-#define GPIO_DATA_INPUT_5 ((unsigned int)(OMAP730_GPIO_BASE_5 + GPIO_DATA_INPUT))
-#define GPIO_DATA_OUTPUT_5 ((unsigned int)(OMAP730_GPIO_BASE_5 + GPIO_DATA_OUTPUT))
-#define GPIO_DIRECTION_CONTROL_5 ((unsigned int)(OMAP730_GPIO_BASE_5 + GPIO_DIRECTION_CONTROL))
-#define GPIO_INTERRUPT_CONTROL_5 ((unsigned int)(OMAP730_GPIO_BASE_5 + GPIO_INTERRUPT_CONTROL))
-#define GPIO_INTERRUPT_MASK_5 ((unsigned int)(OMAP730_GPIO_BASE_5 + GPIO_INTERRUPT_MASK))
-#define GPIO_INTERRUPT_STATUS_5 ((unsigned int)(OMAP730_GPIO_BASE_5 + GPIO_INTERRUPT_STATUS))
-
-#define GPIO_DATA_INPUT_6 ((unsigned int)(OMAP730_GPIO_BASE_6 + GPIO_DATA_INPUT))
-#define GPIO_DATA_OUTPUT_6 ((unsigned int)(OMAP730_GPIO_BASE_6 + GPIO_DATA_OUTPUT))
-#define GPIO_DIRECTION_CONTROL_6 ((unsigned int)(OMAP730_GPIO_BASE_6 + GPIO_DIRECTION_CONTROL))
-#define GPIO_INTERRUPT_CONTROL_6 ((unsigned int)(OMAP730_GPIO_BASE_6 + GPIO_INTERRUPT_CONTROL))
-#define GPIO_INTERRUPT_MASK_6 ((unsigned int)(OMAP730_GPIO_BASE_6 + GPIO_INTERRUPT_MASK))
-#define GPIO_INTERRUPT_STATUS_6 ((unsigned int)(OMAP730_GPIO_BASE_6 + GPIO_INTERRUPT_STATUS))
-
-/***************************************************************************
- * OMAP730 Watchdog timers
- **************************************************************************/
-
-#define WDTIM_BASE 0xFFFEC800
-#define WDTIM_CONTROL (WDTIM_BASE + 0x00) /* MPU_CNTL_TIMER */
-#define WDTIM_LOAD (WDTIM_BASE + 0x04) /* MPU_LOAD_TIMER */
-#define WDTIM_READ (WDTIM_BASE + 0x04) /* MPU_READ_TIMER */
-#define WDTIM_MODE (WDTIM_BASE + 0x08) /* MPU_TIMER_MODE */
-
-/***************************************************************************
- * OMAP730 Interrupt Registers
- **************************************************************************/
-
-/* Interrupt Register offsets */
-
-#define IRQ_ITR 0x00
-#define IRQ_MIR 0x04
-#define IRQ_SIR_IRQ 0x10
-#define IRQ_SIR_FIQ 0x14
-#define IRQ_CONTROL_REG 0x18
-#define IRQ_ILR0 0x1C /* ILRx == ILR0 + (0x4 * x) */
-#define IRQ_SIR 0x9C /* a.k.a.IRQ_ISR */
-#define IRQ_GMIR 0xA0
-
-#define REG_IHL1_MIR (OMAP_IH1_BASE + IRQ_MIR)
-#define REG_IHL2_MIR (OMAP_IH2_BASE + IRQ_MIR)
-
-/***************************************************************************
- * OMAP730 Intersystem Communication Register (TRM 4.5)
- **************************************************************************/
-
-#define ICR_BASE 0xFFFBB800
-
-#define M_ICR (ICR_BASE + 0x00)
-#define G_ICR (ICR_BASE + 0x02)
-#define M_CTL (ICR_BASE + 0x04)
-#define G_CTL (ICR_BASE + 0x06)
-#define PM_BA (ICR_BASE + 0x0A)
-#define DM_BA (ICR_BASE + 0x0C)
-#define RM_BA (ICR_BASE + 0x0E)
-#define SSPI_TAS (ICR_BASE + 0x12)
-
-#endif /* ! __INCLUDED_OMAP730_H */
+++ /dev/null
-/*
- * (C) Copyright 2003-2004
- * MPC Data Limited (http://www.mpc-data.co.uk)
- * Dave Peverley <dpeverley at mpc-data.co.uk>
- *
- * Configuation settings for the TI OMAP Perseus 2 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
-#define CONFIG_OMAP 1 /* in a TI OMAP core */
-#define CONFIG_OMAP730 1 /* which is in a 730 */
-#define CONFIG_P2_OMAP730 1 /* a Perseus 2 Board */
-
-/*
- * Input clock of PLL
- * The OMAP730 Perseus 2 has 13MHz input clock
- */
-
-#define CONFIG_SYS_CLK_FREQ 13000000
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-
-/*
- * Size of malloc() pool
- */
-
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-
-/*
- * Hardware drivers
- */
-
-#define CONFIG_LAN91C96
-#define CONFIG_LAN91C96_BASE 0x04000300
-#define CONFIG_LAN91C96_EXT_PHY
-
-/*
- * NS16550 Configuration
- */
-
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (1)
-#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
-#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart
- * on perseus */
-
-/*
- * select serial console configuration
- */
-
-#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP730 Perseus 2 */
-
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 115200
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DHCP
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_BOOTPATH
-
-
-#include <configs/omap730.h>
-#include <configs/h2_p2_dbg_board.h>
-
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw ip=bootp"
-
-#define CONFIG_LOADADDR 0x10000000
-
-#define CONFIG_ETHADDR
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 192.168.0.23
-#define CONFIG_SERVERIP 192.150.0.100
-#define CONFIG_BOOTFILE "uImage" /* File to load */
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 115200 /* Speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 1 /* Which serial port to use */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "OMAP730 P2 # " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
-
-/* The OMAP730 has 3 general purpose MPU timers, they can be driven by
- * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a
- * local divisor.
- */
-#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
-#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
-
-#if defined(CONFIG_CS0_BOOT)
-#define PHYS_FLASH_1 0x0C000000
-#elif defined(CONFIG_CS3_BOOT)
-#define PHYS_FLASH_1 0x00000000
-#else
-#error Unknown Boot Chip-Select number
-#endif
-
-#define PHYS_SRAM 0x20000000
-
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
-#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
-/* addr of environment */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
-#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
-
-#endif /* ! __CONFIG_H */
/*
* TIMER
*/
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_OPENRISC_TMR_HZ 100
/*
* MISC
*/
#define CONFIG_SYS_LONGHELP /* Provide extended help */
-#define CONFIG_SYS_PROMPT "==> " /* Command prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
#define CONFIG_SYS_MAXARGS 16 /* Max command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Bootarg buf size */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-#define CONFIG_SYS_HZ 1000
-
/* ORIGEN has 4 bank of DRAM */
#define CONFIG_NR_DRAM_BANKS 4
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq */
/* Misc CPU related */
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
#define CONFIG_SYS_L2_SIZE (512 << 10)
#endif
-#if CONFIG_SYS_L2_SIZE >= (512 << 10)
-/* must be 32-bit */
-#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
-#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
-#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
-#endif
-
#ifdef CONFIG_SDCARD
-#define CONFIG_RAMBOOT_SDCARD
-#define CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE 0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_MMC_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE 0x11001000
+#define CONFIG_SPL_TEXT_BASE 0xf8f81000
+#define CONFIG_SPL_PAD_TO 0x18000
+#define CONFIG_SPL_MAX_SIZE (96 * 1024)
+#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_MMC_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
#endif
#ifdef CONFIG_SPIFLASH
-#define CONFIG_RAMBOOT_SPIFLASH
-#define CONFIG_SYS_RAMBOOT
-#define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE 0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
+#define CONFIG_SPL
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_MINIMAL
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_FSL_LAW /* Use common FSL init code */
+#define CONFIG_SYS_TEXT_BASE 0x11001000
+#define CONFIG_SPL_TEXT_BASE 0xf8f81000
+#define CONFIG_SPL_PAD_TO 0x18000
+#define CONFIG_SPL_MAX_SIZE (96 * 1024)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10)
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SPL_SPI_BOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_COMMON_INIT_DDR
+#endif
#endif
#ifdef CONFIG_NAND
#define CONFIG_SPL
+#define CONFIG_TPL
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SPL_NAND_BOOT
+#define CONFIG_SPL_FLUSH_IMAGE
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_NAND_INIT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_COMMON_INIT_DDR
+#define CONFIG_SPL_MAX_SIZE (128 << 10)
+#define CONFIG_SPL_TEXT_BASE 0xf8f81000
+#define CONFIG_SYS_MPC85XX_NO_RESETVEC
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
+#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10)
+#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SPL_INIT_MINIMAL
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_FLUSH_IMAGE
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
-
-#define CONFIG_SPL_TEXT_BASE 0xfffff000
+#define CONFIG_SPL_TEXT_BASE 0xff800000
#define CONFIG_SPL_MAX_SIZE 4096
-
-#ifdef CONFIG_SYS_INIT_L2_ADDR
-/* We multiply CONFIG_SPL_MAX_SIZE by two to leave some room for BSS. */
-#define CONFIG_SYS_TEXT_BASE 0xf8f82000
-#define CONFIG_SPL_RELOC_TEXT_BASE \
- (CONFIG_SYS_INIT_L2_END - CONFIG_SPL_MAX_SIZE * 2)
-#define CONFIG_SPL_RELOC_STACK \
- (CONFIG_SYS_INIT_L2_END - CONFIG_SPL_MAX_SIZE * 2)
-#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR)
-#define CONFIG_SYS_NAND_U_BOOT_START \
- (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SPL_MAX_SIZE)
-#else
-#define CONFIG_SYS_TEXT_BASE 0x00201000
-#define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000
-#define CONFIG_SPL_RELOC_STACK 0x00100000
-#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
-#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
-#endif
-
-#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000)
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
-#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000
+#define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10)
+#endif /* not CONFIG_TPL_BUILD */
+
+#define CONFIG_SPL_PAD_TO 0x20000
+#define CONFIG_TPL_PAD_TO 0x20000
+#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
+#define CONFIG_SYS_TEXT_BASE 0x11001000
+#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
#endif
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_VSC7385_IMAGE_SIZE 8192
#endif
+/*
+ * Config the L2 Cache as L2 SRAM
+*/
+#if defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
+#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
+#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
+#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10)
+#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
+#elif defined(CONFIG_NAND)
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000
+#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10)
+#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024)
+#else
+#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000
+#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
+#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
+#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x2000)
+#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF)
+#endif /* CONFIG_TPL_BUILD */
+#endif
+#endif
+
/* Serial Port - controlled on board with jumper J8
* open - index 2
* shorted - index 1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
#define CONFIG_NS16550_MIN_FUNCTIONS
#endif
/*
* Environment
*/
-#ifdef CONFIG_RAMBOOT_SPIFLASH
+#ifdef CONFIG_SPIFLASH
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */
#define CONFIG_ENV_SECT_SIZE 0x10000
-#elif defined(CONFIG_RAMBOOT_SDCARD)
+#elif defined(CONFIG_SDCARD)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_FSL_FIXED_MMC_LOCATION
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_SYS_MMC_ENV_DEV 0
#elif defined(CONFIG_NAND)
-#define CONFIG_ENV_IS_IN_NAND
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10))
+#else
#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#endif
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET (1024 * 1024)
#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE)
#elif defined(CONFIG_SYS_RAMBOOT)
#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms tick */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms tick */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x08000000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
* Miscellaneous configurable options
*----------------------------------------------------------------------*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_LOOPW 1 /* enable loopw command */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_SYS_LONGHELP
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ "
-#else
-#define CONFIG_SYS_PROMPT "=> "
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE \
#define CONFIG_SYS_LONGHELP
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ "
-#else
-#define CONFIG_SYS_PROMPT "=> "
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE \
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ "
#else
-#define CONFIG_SYS_PROMPT "=> "
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE \
* Clock Configuration
*/
#undef CONFIG_SYS_CLKS_IN_HZ
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */
/*
#define CONFIG_SYS_MIPS_TIMER_FREQ 396000000
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_DISPLAY_BOARDINFO 1
/* Platform/Board specific defs */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000 /* 1ms clock */
#define CONFIG_CONS_INDEX 1
/* NS16550 Configuration */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
#define CONFIG_LYNXKDI 1 /* support kdi files */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* Decrementer freq: 1ms ticks */
-#define CONFIG_SYS_HZ 1000
/*
* For booting Linux, the board info and command line data
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261"
#define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9263"
#define CONFIG_PM9263 1 /* on a Ronetix PM9263 Board */
#define CONFIG_ARCH_CPU_INIT
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TEXT_BASE 0x73f00000
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_MEMTEST_START 0x00040000
#define CONFIG_SYS_MEMTEST_END 0x00040100
#define CONFIG_SYS_PBSIZE 1024
-#define CONFIG_SYS_PROMPT "=> "
/*
*/
#define CONFIG_SYS_BUS_CLK CONFIG_BUS_CLK
-#define CONFIG_SYS_HZ 1000
/*
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "=> "
/*
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x140000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_SYS_MEMTEST_START 0x2000 /* memtest works from the end of */
/* the exception vector table */
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
#else
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#endif
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0xa0800000 /* default load address */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */
#define RTC 1 /* enable 32KHz osc */
"hostname=pxm2\0" \
"nand_img_size=0x500000\0" \
"optargs=\0" \
+ "splashpos=m,m\0" \
CONFIG_COMMON_ENV_SETTINGS \
"mmc_dev=0\0" \
"mmc_root=/dev/mmcblk0p2 rw\0" \
"fi;" \
"fi;" \
"run nand_boot;" \
- "if ping ${serverip}; then " \
- "run net_nfs; " \
- "fi; "
+ "reset;"
#else
#define CONFIG_BOOTDELAY 0
#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
#define PWM_TICKS 0x1388
#define PWM_DUTY 0x200
+#define CONFIG_SYS_CONSOLE_BG_COL 0xff
+#define CONFIG_SYS_CONSOLE_FG_COL 0x00
#endif
#endif /* ! __CONFIG_PXM2_H */
*/
#define CONFIG_SYS_MHZ 250 /* arbitrary value */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_DCACHE_SIZE 16384 /* arbitrary value */
#define CONFIG_SYS_ICACHE_SIZE 16384 /* arbitrary value */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-#define CONFIG_SYS_HZ 1000
-
/* Cached addr */
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
-#define CONFIG_SYS_HZ 1000
-
/* Cached addr */
#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
* Miscellaneous configurable options
*----------------------------------------------------------------------*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
/* undef to save memory */
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "=> "
/* Buffer size for input from the Console */
#define CONFIG_SYS_CBSIZE 256
/* Buffer size for Console output */
#else
#define CONFIG_SYS_CLK_FREQ 44444444
#endif
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
#endif /* __R0P7734_H */
#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MAXARGS 16
* SuperH Clock setting
*/
#define CONFIG_SYS_CLK_FREQ 60000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
/*
#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MAXARGS 16
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
/* PCI Controller */
#if defined(CONFIG_CMD_PCI)
*/
#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708
-/* Timer */
-#define CONFIG_SYS_HZ 1000
-
/* Memory layout */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x00000000
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_TEXT_BASE 0x0C7C0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 36000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Boot Argument Buffer Size */
#define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 66125000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
/* Default env settings */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hostname=rut\0" \
- "splashpos=488,352\0" \
+ "nand_img_size=0x500000\0" \
+ "splashpos=m,m\0" \
"optargs=fixrtc --no-log consoleblank=0 \0" \
CONFIG_COMMON_ENV_SETTINGS \
"mmc_dev=0\0" \
"fi;" \
"fi;" \
"run nand_boot;" \
- "if ping ${serverip}; then " \
- "run net_nfs; " \
- "fi; "
+ "reset;"
#else
#define CONFIG_BOOTDELAY 0
#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_FORMIKE
+#define DISPL_PLL_SPREAD_SPECTRUM
+#define CONFIG_SYS_CONSOLE_BG_COL 0xff
+#define CONFIG_SYS_CONSOLE_FG_COL 0x00
#endif
#endif /* ! __CONFIG_RUT_H */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000)
-#define CONFIG_SYS_HZ 1000
-
/* Goni has 3 banks of DRAM, but swap the bank */
#define CONFIG_NR_DRAM_BANKS 3
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
-#define CONFIG_SYS_HZ 1000
-
/* Universal has 2 banks of DRAM */
#define CONFIG_NR_DRAM_BANKS 2
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "=> "
#undef CONFIG_SYS_HUSH_PARSER
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_SYS_ALT_MEMTEST /* Select full-featured memory test */
#define CONFIG_SYS_MEMTEST_START 0x2000 /* memtest works from the end of */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_AT91FAMILY
#define CONFIG_ARCH_CPU_INIT
#endif
+#define CONFIG_SYS_TIMER_RATE 1000000
+
#define CONFIG_BOOTSTAGE
#define CONFIG_BOOTSTAGE_REPORT
#define CONFIG_SANDBOX_GPIO
#define CONFIG_SANDBOX_GPIO_COUNT 20
+#define CONFIG_CMD_GPT
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_EFI_PARTITION
+
/*
* Size of malloc() pool, although we don't actually use this yet.
*/
#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
-#define CONFIG_SYS_PROMPT "=>" /* Command Prompt */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* #undef to save memory */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_ENV_SIZE 8192
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SYS_HZ 1000
-
/* Memory things - we don't really want a memory test */
#define CONFIG_SYS_LOAD_ADDR 0x00000000
#define CONFIG_SYS_MEMTEST_START 0x00100000
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_ARCH_CPU_INIT
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
#define CONFIG_SYS_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* IIC stuff
*-----------------------------------------------------------------------
#define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024)
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MAXARGS 16
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 48000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
#endif /* __SH7752EVB_H */
#define SH7757LCR_SDRAM_DVC_SIZE (16 * 1024 * 1024)
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MAXARGS 16
/* Board Clock */
#define CONFIG_SYS_CLK_FREQ 48000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
#endif /* __SH7757LCR_H */
#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
/* Clock */
#define CONFIG_SYS_CLK_FREQ 66666666
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
-#define CONFIG_SYS_HZ 1000
/* Ether */
#define CONFIG_SH_ETHER 1
#endif
#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_MAXARGS 16
/* Board Clock */
/* The SCIF used external clock. system clock only used timer. */
#define CONFIG_SYS_CLK_FREQ 50000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
#endif /* __SH7785LCR_H */
#define CONFIG_SYS_TEXT_BASE 0x8DFB0000
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
#define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
#else
#define CONFIG_SYS_CLK_FREQ 33333333
#endif /* CONFIG_T_SH7706LSR */
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV 4
-#define CONFIG_SYS_HZ 1000
/* Network device */
#define CONFIG_DRIVER_NE2000
+ (8 * 1024 * 1024))
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
-#define CONFIG_SYS_HZ 1000 /* 1ms clock */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
/* Platform/Board specific defs */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550
#define CONFIG_USB_GADGET
#define CONFIG_USBDOWNLOAD_GADGET
-/* USB TI's IDs */
+/* USB DRACO ID as default */
#define CONFIG_USBD_HS
-#define CONFIG_G_DNL_VENDOR_NUM 0x0525
-#define CONFIG_G_DNL_PRODUCT_NUM 0x4a47
-#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
+#define CONFIG_G_DNL_VENDOR_NUM 0x0908
+#define CONFIG_G_DNL_PRODUCT_NUM 0x02d2
+#define CONFIG_G_DNL_MANUFACTURER "Siemens AG"
/* USB Device Firmware Update support */
#define CONFIG_DFU_FUNCTION
#define CONFIG_COMMON_ENV_SETTINGS \
"verify=no \0" \
"project_dir=systemone\0" \
+ "upgrade_available=0\0" \
+ "altbootcmd=run bootcmd\0" \
+ "bootlimit=3\0" \
+ "partitionset_active=A\0" \
"loadaddr=0x82000000\0" \
"kloadaddr=0x81000000\0" \
"script_addr=0x81900000\0" \
- "console=console=ttyMTD,mtdoops console=ttyO0,115200n8\0" \
- "active_set=a\0" \
+ "console=console=ttyMTD,mtdoops console=ttyO0,115200n8 panic=5\0" \
"nand_active_ubi_vol=rootfs_a\0" \
+ "nand_active_ubi_vol_A=rootfs_a\0" \
+ "nand_active_ubi_vol_B=rootfs_b\0" \
"nand_root_fs_type=ubifs rootwait=1\0" \
"nand_src_addr=0x280000\0" \
- "nand_src_addr_a=0x280000\0" \
- "nand_src_addr_b=0x780000\0" \
+ "nand_src_addr_A=0x280000\0" \
+ "nand_src_addr_B=0x780000\0" \
"nfsopts=nolock rw mem=128M\0" \
"ip_method=none\0" \
"bootenv=uEnv.txt\0" \
"bootargs_defaults=setenv bootargs " \
"console=${console} " \
+ "${testargs} " \
"${optargs}\0" \
"nand_args=run bootargs_defaults;" \
"mtdparts default;" \
- "setenv nand_active_ubi_vol rootfs_${active_set};" \
- "setenv ${active_set} true;" \
- "if test -n ${a}; then " \
- "setenv nand_src_addr ${nand_src_addr_a};" \
+ "setenv ${partitionset_active} true;" \
+ "if test -n ${A}; then " \
+ "setenv nand_active_ubi_vol ${nand_active_ubi_vol_A};" \
+ "setenv nand_src_addr ${nand_src_addr_A};" \
"fi;" \
- "if test -n ${b}; then " \
- "setenv nand_src_addr ${nand_src_addr_b};" \
+ "if test -n ${B}; then " \
+ "setenv nand_active_ubi_vol ${nand_active_ubi_vol_B};" \
+ "setenv nand_src_addr ${nand_src_addr_B};" \
"fi;" \
"setenv nand_root ubi0:${nand_active_ubi_vol} rw " \
"ubi.mtd=9,2048;" \
"setenv bootargs ${bootargs} " \
"root=/dev/nfs ${mtdparts} " \
"nfsroot=${serverip}:${rootpath},${nfsopts} " \
- "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
+ "ip=${ipaddr}:${serverip}:" \
"${gatewayip}:${netmask}:${hostname}:eth0:off\0" \
- "nand_boot=echo Booting from nand, active set ${active_set} ...; " \
+ "nand_boot=echo Booting from nand; " \
+ "if test ${upgrade_available} -eq 1; then " \
+ "if test ${bootcount} -gt ${bootlimit}; " \
+ "then " \
+ "setenv upgrade_available 0;" \
+ "setenv ${partitionset_active} true;" \
+ "if test -n ${A}; then " \
+ "setenv partitionset_active B; " \
+ "env delete A; " \
+ "fi;" \
+ "if test -n ${B}; then " \
+ "setenv partitionset_active A; " \
+ "env delete B; " \
+ "fi;" \
+ "saveenv; " \
+ "fi;" \
+ "fi;" \
+ "echo set ${partitionset_active}...;" \
"run nand_args; " \
"nand read.i ${kloadaddr} ${nand_src_addr} " \
"${nand_img_size}; bootm ${kloadaddr}\0" \
"tftpboot ${kloadaddr} ${serverip}:${bootfile}; " \
"bootm ${kloadaddr}\0" \
"flash_self=run nand_boot\0" \
- "flash_self_test=setenv bootargs_defaults ${bootargs_defaults} test; " \
+ "flash_self_test=setenv testargs test; " \
"run nand_boot\0" \
"dfu_start=echo Preparing for dfu mode ...; " \
"run dfu_args; \0" \
"mode; echo Not ready yet: 'run flash_nfs' to use kernel " \
"from memory and root filesystem over NFS; echo Type " \
"'run net_nfs' to get Kernel over TFTP and mount root " \
- "filesystem over NFS; echo Set active_set variable to 'a' " \
- "or 'b' to select kernel and rootfs partition; " \
+ "filesystem over NFS; " \
+ "echo Set partitionset_active variable to 'A' " \
+ "or 'B' to select kernel and rootfs partition; " \
"echo" \
"\0"
#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
"press \"<Esc><Esc>\" to stop\n", bootdelay
+/* Reboot after 60 sec if bootcmd fails */
+#define CONFIG_RESET_TO_RETRY
+#define CONFIG_BOOT_RETRY_TIME 60
+
+#define CONFIG_BOOTCOUNT_LIMIT
+#define CONFIG_BOOTCOUNT_ENV
#endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */
#define CONFIG_SYS_LOAD_ADDR 0x30800000
-#define CONFIG_SYS_HZ 1000
-
/* support additional compression methods */
#define CONFIG_BZIP2
#define CONFIG_LZO
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5e00000)
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_HZ 1000
-
/* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
-#define CONFIG_SYS_HZ 1000
-
/* SMDKV310 has 4 bank of DRAM */
#define CONFIG_NR_DRAM_BANKS 4
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
-#define CONFIG_SYS_HZ 1000
/* CPU */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_MEMTEST_START 0x00000000
#define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF
-#define CONFIG_SYS_HZ 1000 /* must be 1000 */
/*-----------------------------------------------------------------------
* Size of environment and malloc() pool
/* reload value when timer count to zero */
#define TIMER_LOAD_VAL 0xFFFFFFFF
/* Timer info */
-#define CONFIG_SYS_HZ 1000
#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
-#define CONFIG_TIMER_CLOCK_KHZ 2400
+#define CONFIG_SYS_TIMER_RATE 2400000
#else
-#define CONFIG_TIMER_CLOCK_KHZ 25000
+#define CONFIG_SYS_TIMER_RATE 25000000
#endif
+#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
#define CONFIG_ENV_IS_NOWHERE
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buf Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=>" /* Monitor Command Prompt */
#define CONFIG_SYS_HUSH_PARSER
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_LOAD_ADDR 0x00100000
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_BAUDRATE_TABLE { 2400, 4800, 9600, 19200 }
/*
#define CONFIG_I2C_CHIPADDRESS 0x50
/* Timer, HZ specific defines */
-#define CONFIG_SYS_HZ 1000
/* Flash configuration */
#if defined(CONFIG_FLASH_PNOR)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
-#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
/* misc settings */
#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_SYS_HUSH_PARSER
#endif
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_CMDLINE_EDITING /* Command-line editing */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/
/*
* For booting Linux, the board info and command line data
*/
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/*
* Physical Memory Map
#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_TCLOCK_RATE/4)
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
#include <asm/arch/tegra.h> /* get chip and board defs */
+#define CONFIG_SYS_TIMER_RATE 1000000
+#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
+
/*
* Display CPU and Board information
*/
#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
-#define CONFIG_SYS_HZ 1000
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
+ PHYS_DRAM_1_SIZE - (8 << 12))
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default */
-#define CONFIG_SYS_HZ 1000 /* 1ms clock */
#define CONFIG_OMAP_GPIO
#define CONFIG_MMC
*/
#define CONFIG_SYS_TIMERBASE 0x4802E000
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550
#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
-#define CONFIG_SYS_HZ 1000 /* 1ms clock */
#define CONFIG_CMD_ASKEN
#define CONFIG_CMD_ECHO
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
+#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#include <asm/arch/omap.h>
/*
* RTC related defines. To use bootcount you must set bootlimit in the
- * environment to a non-zero value.
+ * environment to a non-zero value and enable CONFIG_BOOTCOUNT_LIMIT
+ * in the board config.
*/
-#define CONFIG_BOOTCOUNT_LIMIT
#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000
/* Enable the HW watchdog, since we can use this with bootcount */
/* Timer information. */
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000 /* 1ms clock */
/* I2C IP block */
#define CONFIG_I2C
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_TIMERBASE TNETV107X_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get_rate(TNETV107X_LPSC_TIMER0)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_PLL_SYS_EXT_FREQ 25000000
#define CONFIG_PLL_TDM_EXT_FREQ 19200000
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
-#define CONFIG_SYS_HZ 1000
/* Misc CPU related */
#define CONFIG_ARCH_CPU_INIT
#define MACH_TYPE_TRATS 3928
#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
+#include <asm/sizes.h>
/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (16 << 20))
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
/* select serial console configuration */
#define CONFIG_SERIAL2 /* use SERIAL 2 */
/* USB Composite download gadget - g_dnl */
#define CONFIG_USBDOWNLOAD_GADGET
+
+/* TIZEN THOR downloader support */
+#define CONFIG_CMD_THOR_DOWNLOAD
+#define CONFIG_THOR_FUNCTION
+
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
#define CONFIG_DFU_FUNCTION
#define CONFIG_DFU_MMC
/* USB Samsung's IDs */
#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
+#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
#define CONFIG_G_DNL_MANUFACTURER "Samsung"
#define CONFIG_BOOTDELAY 1
#define CONFIG_DFU_ALT \
"u-boot mmc 80 400;" \
"uImage ext4 0 2;" \
- "exynos4210-trats.dtb ext4 0 2\0"
+ "exynos4210-trats.dtb ext4 0 2;" \
+ ""PARTS_ROOT" part 0 5\0"
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
-#define CONFIG_SYS_HZ 1000
-
/* TRATS has 4 banks of DRAM */
#define CONFIG_NR_DRAM_BANKS 4
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12))
#define CONFIG_CMD_USB_MASS_STORAGE
-#if defined(CONFIG_CMD_USB_MASS_STORAGE)
#define CONFIG_USB_GADGET_MASS_STORAGE
-#endif
/* Pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
#else
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#endif
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
#ifdef CONFIG_MMC
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_HZ 1000
-
#define CONFIG_CMDLINE_EDITING
/* MMC boot support */
*/
#define CONFIG_MX25
#define CONFIG_MX25_CLK32 32000 /* OSC32K frequency */
-#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_TIMER_RATE CONFIG_MX25_CLK32
+#define CONFIG_SYS_TIMER_COUNTER \
+ (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
#define CONFIG_SYS_NAND_LARGEPAGE
/* U-Boot general configuration */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
/* Print buffer sz */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
#define CONFIG_SYS_MEMTEST_START 0x00000000
#define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF
-#define CONFIG_SYS_HZ 1000 /* must be 1000 */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_LATE_INIT
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if 0
#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
/*
--- /dev/null
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for Udoo board.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
+#include <asm/sizes.h>
+
+#define CONFIG_MX6
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define MACH_TYPE_UDOO 4800
+#define CONFIG_MACH_TYPE MACH_TYPE_UDOO
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MXC_GPIO
+
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART2_BASE
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+
+/* Command definition */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_CMD_BMODE
+#define CONFIG_CMD_SETEXPR
+
+#define CONFIG_BOOTDELAY 3
+
+#define CONFIG_SYS_MEMTEST_START 0x10000000
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
+#define CONFIG_LOADADDR 0x12000000
+#define CONFIG_SYS_TEXT_BASE 0x17800000
+
+/* MMC Configuration */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_DEFAULT_FDT_FILE "imx6q-udoo.dtb"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "uimage=uImage\0" \
+ "console=ttymxc1\0" \
+ "splashpos=m,m\0" \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0" \
+ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "fdt_addr=0x11000000\0" \
+ "boot_fdt=try\0" \
+ "ip_dyn=yes\0" \
+ "mmcdev=0\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
+ "update_sd_firmware_filename=u-boot.imx\0" \
+ "update_sd_firmware=" \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "if mmc dev ${mmcdev}; then " \
+ "if ${get_cmd} ${update_sd_firmware_filename}; then " \
+ "setexpr fw_sz ${filesize} / 0x200; " \
+ "setexpr fw_sz ${fw_sz} + 1; " \
+ "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
+ "fi; " \
+ "fi\0" \
+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
+ "root=${mmcroot}\0" \
+ "loadbootscript=" \
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0" \
+ "netargs=setenv bootargs console=${console},${baudrate} " \
+ "root=/dev/nfs " \
+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "netboot=echo Booting from net ...; " \
+ "run netargs; " \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "${get_cmd} ${uimage}; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0"
+
+#define CONFIG_BOOTCOMMAND \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loaduimage; then " \
+ "run mmcboot; " \
+ "else run netboot; " \
+ "fi; " \
+ "fi; " \
+ "else run netboot; fi"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT "=> "
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE 256
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_CMDLINE_EDITING
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ENV_SIZE (8 * 1024)
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV 0
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+#define CONFIG_CMD_CACHE
+#endif
+
+#endif /* __CONFIG_H * */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
/* Print Buffer Size */
*------------------------------------------------------------------*/
#define CONFIG_SYS_CLK_FREQ 33000000
-#define CONFIG_SYS_HZ 1000
/*#define CONFIG_SYS_ETH_DEV_FN 0x7800 */
/*#define CONFIG_SYS_ETH_IOBASE 0x00104000 */
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#define CONFIG_MIPS32 /* MIPS 4Kc CPU core */
#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot arg Buffer size */
-#define CONFIG_SYS_HZ 1000 /* 1ms ticks */
/*
* For booting Linux, the board info and command line data
#define CONFIG_SYS_MEMTEST_START 0x100000
#define CONFIG_SYS_MEMTEST_END 0x10000000
-#define CONFIG_SYS_HZ (1000000 / 256)
-#define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */
-#define CONFIG_SYS_TIMER_INTERVAL 10000
-#define CONFIG_SYS_TIMER_RELOAD (CONFIG_SYS_TIMER_INTERVAL >> 4)
-#define CONFIG_SYS_TIMER_CTRL 0x84 /* Enable, Clock / 16 */
+#define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */
+#define CONFIG_SYS_TIMER_RATE (1000000 / 256)
+#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
+#define CONFIG_SYS_TIMER_COUNTS_DOWN
/*
* control registers
#define CONFIG_SYS_MEMTEST_START V2M_BASE
#define CONFIG_SYS_MEMTEST_END 0x20000000
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define SCTL_BASE V2M_SYSCTL
#define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0)
+#define CONFIG_SYS_TIMER_RATE 1000000
+#define CONFIG_SYS_TIMER_COUNTER (0x10011000 + 0x4)
+#define CONFIG_SYS_TIMER_COUNTS_DOWN
+
/* SMSC9115 Ethernet from SMSC9118 family */
#define CONFIG_SMC911X 1
#define CONFIG_SMC911X_32_BIT 1
/* I2C Configs */
#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C0_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_BOOTDELAY 3
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#define CONFIG_SYS_PROMPT "=> "
#undef CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE \
#define CONFIG_SYS_MEMTEST_END 0x87C00000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
/*
* Stack sizes
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_HUSH_PARSER
/* clocks */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock */
#define MHZ180
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16 /* max num of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buf Size */
-#define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
/*
* For booting Linux, the board info and command line data
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ "
#else
-#define CONFIG_SYS_PROMPT "=> "
#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE \
/*
* Clock Configuration
*/
-#define CONFIG_SYS_HZ 1000 /* Timer @ 3250000 Hz */
#define CONFIG_SYS_CPUSPEED 0x190 /* 312MHz */
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
#define CONFIG_CMDLINE_EDITING
/*
* Hardware drivers
*/
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
-#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
-#define CONFIG_SYS_HZ 1000
-
-
/*
* Stack sizes
*
#include <asm/arch/hardware.h>
/* Timer, HZ specific defines */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_HZ_CLOCK 8300000
#define CONFIG_SYS_TEXT_BASE 0x00800040
#define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 400/200/100 MHz */
/*
/* default load address */
#define CONFIG_SYS_EXTBDINFO 1
/* Extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000
/* decrementer freq: 1 ms ticks */
#define CONFIG_CMDLINE_EDITING /* add command line history */
#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
#define CONFIG_PANIC_HANG /* do not reset board on panic */
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */
* Miscellaneous configurable options
*----------------------------------------------------------------------*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ " /* Monitor Command Prompt */
-#else
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#endif
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#ifndef __CONFIG_H
#define __CONFIG_H
+#include <asm/arch/imx-regs.h>
+
#define CONFIG_ARM926EJS /* arm926ejs CPU core */
#define CONFIG_MX25
-#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_TEXT_BASE 0xA0000000
+#define CONFIG_SYS_TIMER_RATE 32768
+#define CONFIG_SYS_TIMER_COUNTER \
+ (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
+
#define CONFIG_MACH_TYPE MACH_TYPE_ZMX25
/*
* Environment settings
/* CPU clock */
#define CONFIG_CPU_FREQ_HZ 800000000
-#define CONFIG_SYS_HZ 1000
/* Ram */
#define CONFIG_NR_DRAM_BANKS 1
unsigned char tdqsq; /* 44 Max DQS to DQ skew (tDQSQ max) */
unsigned char tqhs; /* 45 Max Read DataHold skew (tQHS) */
unsigned char pll_relock; /* 46 PLL Relock time */
- unsigned char Tcasemax; /* 47 Tcasemax */
- unsigned char psiTAdram; /* 48 Thermal Resistance of DRAM Package from
+ unsigned char t_casemax; /* 47 Tcasemax */
+ unsigned char psi_ta_dram; /* 48 Thermal Resistance of DRAM Package from
Top (Case) to Ambient (Psi T-A DRAM) */
unsigned char dt0_mode; /* 49 DRAM Case Temperature Rise from Ambient
due to Activate-Precharge/Mode Bits
unsigned char dt7; /* 57 DRAM Case Temperature Rise from Ambient
due to Bank Interleave Reads with
Auto-Precharge (DT7) */
- unsigned char psiTApll; /* 58 Thermal Resistance of PLL Package form
+ unsigned char psi_ta_pll; /* 58 Thermal Resistance of PLL Package form
Top (Case) to Ambient (Psi T-A PLL) */
- unsigned char psiTAreg; /* 59 Thermal Reisitance of Register Package
+ unsigned char psi_ta_reg; /* 59 Thermal Reisitance of Register Package
from Top (Case) to Ambient
(Psi T-A Register) */
unsigned char dtpllactive; /* 60 PLL Case Temperature Rise from Ambient
Dividend / Divisor */
unsigned char mtb_dividend; /* 10 Medium Timebase (MTB) Dividend */
unsigned char mtb_divisor; /* 11 Medium Timebase (MTB) Divisor */
- unsigned char tCK_min; /* 12 SDRAM Minimum Cycle Time */
+ unsigned char tck_min; /* 12 SDRAM Minimum Cycle Time */
unsigned char res_13; /* 13 Reserved */
unsigned char caslat_lsb; /* 14 CAS Latencies Supported,
Least Significant Byte */
unsigned char caslat_msb; /* 15 CAS Latencies Supported,
Most Significant Byte */
- unsigned char tAA_min; /* 16 Min CAS Latency Time */
- unsigned char tWR_min; /* 17 Min Write REcovery Time */
- unsigned char tRCD_min; /* 18 Min RAS# to CAS# Delay Time */
- unsigned char tRRD_min; /* 19 Min Row Active to
+ unsigned char taa_min; /* 16 Min CAS Latency Time */
+ unsigned char twr_min; /* 17 Min Write REcovery Time */
+ unsigned char trcd_min; /* 18 Min RAS# to CAS# Delay Time */
+ unsigned char trrd_min; /* 19 Min Row Active to
Row Active Delay Time */
- unsigned char tRP_min; /* 20 Min Row Precharge Delay Time */
- unsigned char tRAS_tRC_ext; /* 21 Upper Nibbles for tRAS and tRC */
- unsigned char tRAS_min_lsb; /* 22 Min Active to Precharge
+ unsigned char trp_min; /* 20 Min Row Precharge Delay Time */
+ unsigned char tras_trc_ext; /* 21 Upper Nibbles for tRAS and tRC */
+ unsigned char tras_min_lsb; /* 22 Min Active to Precharge
Delay Time */
- unsigned char tRC_min_lsb; /* 23 Min Active to Active/Refresh
+ unsigned char trc_min_lsb; /* 23 Min Active to Active/Refresh
Delay Time, LSB */
- unsigned char tRFC_min_lsb; /* 24 Min Refresh Recovery Delay Time */
- unsigned char tRFC_min_msb; /* 25 Min Refresh Recovery Delay Time */
- unsigned char tWTR_min; /* 26 Min Internal Write to
+ unsigned char trfc_min_lsb; /* 24 Min Refresh Recovery Delay Time */
+ unsigned char trfc_min_msb; /* 25 Min Refresh Recovery Delay Time */
+ unsigned char twtr_min; /* 26 Min Internal Write to
Read Command Delay Time */
- unsigned char tRTP_min; /* 27 Min Internal Read to Precharge
+ unsigned char trtp_min; /* 27 Min Internal Read to Precharge
Command Delay Time */
- unsigned char tFAW_msb; /* 28 Upper Nibble for tFAW */
- unsigned char tFAW_min; /* 29 Min Four Activate Window
+ unsigned char tfaw_msb; /* 28 Upper Nibble for tFAW */
+ unsigned char tfaw_min; /* 29 Min Four Activate Window
Delay Time*/
unsigned char opt_features; /* 30 SDRAM Optional Features */
unsigned char therm_ref_opt; /* 31 SDRAM Thermal and Refresh Opts */
unsigned char therm_sensor; /* 32 Module Thermal Sensor */
unsigned char device_type; /* 33 SDRAM device type */
- int8_t fine_tCK_min; /* 34 Fine offset for tCKmin */
- int8_t fine_tAA_min; /* 35 Fine offset for tAAmin */
- int8_t fine_tRCD_min; /* 36 Fine offset for tRCDmin */
- int8_t fine_tRP_min; /* 37 Fine offset for tRPmin */
- int8_t fine_tRC_min; /* 38 Fine offset for tRCmin */
+ int8_t fine_tck_min; /* 34 Fine offset for tCKmin */
+ int8_t fine_taa_min; /* 35 Fine offset for tAAmin */
+ int8_t fine_trcd_min; /* 36 Fine offset for tRCDmin */
+ int8_t fine_trp_min; /* 37 Fine offset for tRPmin */
+ int8_t fine_trc_min; /* 38 Fine offset for tRCmin */
unsigned char res_39_59[21]; /* 39-59 Reserved, General Section */
/* Module-Specific Section: Bytes 60-116 */
struct dfu_entity *dfu_get_entity(int alt);
char *dfu_extract_token(char** e, int *n);
void dfu_trigger_reset(void);
+int dfu_get_alt(char *name);
bool dfu_reset(void);
int dfu_init_env_entities(char *interface, int dev);
+unsigned char *dfu_get_buf(void);
+unsigned char *dfu_free_buf(void);
int dfu_read(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
int dfu_write(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
#define DWMCI_BMOD_IDMAC_FB (1 << 1)
#define DWMCI_BMOD_IDMAC_EN (1 << 7)
+/* quirks */
+#define DWMCI_QUIRK_DISABLE_SMU (1 << 0)
+
struct dwmci_host {
char *name;
void *ioaddr;
struct mmc *mmc;
void (*clksel)(struct dwmci_host *host);
- unsigned int (*mmc_clk)(int dev_index);
+ unsigned int (*get_mmc_clk)(int dev_index);
};
struct dwmci_idmac {
COMPAT_GOOGLE_CROS_EC, /* Google CROS_EC Protocol */
COMPAT_GOOGLE_CROS_EC_KEYB, /* Google CROS_EC Keyboard */
COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
+ COMPAT_SAMSUNG_EXYNOS5_XHCI, /* Exynos5 XHCI controller */
COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
+ COMPAT_SAMSUNG_EXYNOS5_USB3_PHY,/* Exynos phy controller for usb3.0 */
COMPAT_SAMSUNG_EXYNOS_TMU, /* Exynos TMU */
COMPAT_SAMSUNG_EXYNOS_FIMD, /* Exynos Display controller */
COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */
int fm_info_get_phy_address(enum fm_port port);
void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus);
void fm_disable_port(enum fm_port port);
+void fm_enable_port(enum fm_port port);
+void set_sgmii_phy(struct mii_dev *bus, enum fm_port base_port,
+ unsigned int port_num, int phy_base_addr);
+int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr,
+ unsigned int port_num, unsigned regnum);
#endif
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
-int g_dnl_bind_fixup(struct usb_device_descriptor *);
+int g_dnl_bind_fixup(struct usb_device_descriptor *, const char *);
int g_dnl_register(const char *s);
void g_dnl_unregister(void);
+void g_dnl_set_serialnumber(char *);
-/* USB initialization declaration - board specific */
-void board_usb_init(void);
#endif /* __G_DOWNLOAD_H_ */
#define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
#define I2C_MUX_PCA9547_ID 4
#define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
+#define I2C_MUX_PCA9548_ID 5
+#define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
#endif
#ifndef I2C_SOFT_DECLARATIONS
+++ /dev/null
-#ifndef _LINUX_CONFIG_H
-#define _LINUX_CONFIG_H
-
-/* #include <linux/autoconf.h> */
-
-#endif
#define _LINUX_LINKAGE_H
#include <asm/linkage.h>
-#include <linux/config.h>
#ifdef __cplusplus
#define CPP_ASMLINKAGE extern "C"
#ifndef _LINUX_TYPES_H
#define _LINUX_TYPES_H
-#ifdef __KERNEL__
-#include <linux/config.h>
-#endif
-
#include <linux/posix_types.h>
#include <asm/types.h>
#include <stdbool.h>
--- /dev/null
+/* include/linux/usb/dwc3.h
+ *
+ * Copyright (c) 2012 Samsung Electronics Co. Ltd
+ *
+ * Designware SuperSpeed USB 3.0 DRD Controller global and OTG registers
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DWC3_H_
+#define __DWC3_H_
+
+/* Global constants */
+#define DWC3_ENDPOINTS_NUM 32
+
+#define DWC3_EVENT_BUFFERS_SIZE PAGE_SIZE
+#define DWC3_EVENT_TYPE_MASK 0xfe
+
+#define DWC3_EVENT_TYPE_DEV 0
+#define DWC3_EVENT_TYPE_CARKIT 3
+#define DWC3_EVENT_TYPE_I2C 4
+
+#define DWC3_DEVICE_EVENT_DISCONNECT 0
+#define DWC3_DEVICE_EVENT_RESET 1
+#define DWC3_DEVICE_EVENT_CONNECT_DONE 2
+#define DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE 3
+#define DWC3_DEVICE_EVENT_WAKEUP 4
+#define DWC3_DEVICE_EVENT_EOPF 6
+#define DWC3_DEVICE_EVENT_SOF 7
+#define DWC3_DEVICE_EVENT_ERRATIC_ERROR 9
+#define DWC3_DEVICE_EVENT_CMD_CMPL 10
+#define DWC3_DEVICE_EVENT_OVERFLOW 11
+
+#define DWC3_GEVNTCOUNT_MASK 0xfffc
+#define DWC3_GSNPSID_MASK 0xffff0000
+#define DWC3_GSNPSID_SHIFT 16
+#define DWC3_GSNPSREV_MASK 0xffff
+
+#define DWC3_REVISION_MASK 0xffff
+
+#define DWC3_REG_OFFSET 0xC100
+
+struct g_event_buffer {
+ u64 g_evntadr;
+ u32 g_evntsiz;
+ u32 g_evntcount;
+};
+
+struct d_physical_endpoint {
+ u32 d_depcmdpar2;
+ u32 d_depcmdpar1;
+ u32 d_depcmdpar0;
+ u32 d_depcmd;
+};
+
+struct dwc3 { /* offset: 0xC100 */
+ u32 g_sbuscfg0;
+ u32 g_sbuscfg1;
+ u32 g_txthrcfg;
+ u32 g_rxthrcfg;
+ u32 g_ctl;
+
+ u32 reserved1;
+
+ u32 g_sts;
+
+ u32 reserved2;
+
+ u32 g_snpsid;
+ u32 g_gpio;
+ u32 g_uid;
+ u32 g_uctl;
+ u64 g_buserraddr;
+ u64 g_prtbimap;
+
+ u32 g_hwparams0;
+ u32 g_hwparams1;
+ u32 g_hwparams2;
+ u32 g_hwparams3;
+ u32 g_hwparams4;
+ u32 g_hwparams5;
+ u32 g_hwparams6;
+ u32 g_hwparams7;
+
+ u32 g_dbgfifospace;
+ u32 g_dbgltssm;
+ u32 g_dbglnmcc;
+ u32 g_dbgbmu;
+ u32 g_dbglspmux;
+ u32 g_dbglsp;
+ u32 g_dbgepinfo0;
+ u32 g_dbgepinfo1;
+
+ u64 g_prtbimap_hs;
+ u64 g_prtbimap_fs;
+
+ u32 reserved3[28];
+
+ u32 g_usb2phycfg[16];
+ u32 g_usb2i2cctl[16];
+ u32 g_usb2phyacc[16];
+ u32 g_usb3pipectl[16];
+
+ u32 g_txfifosiz[32];
+ u32 g_rxfifosiz[32];
+
+ struct g_event_buffer g_evnt_buf[32];
+
+ u32 g_hwparams8;
+
+ u32 reserved4[63];
+
+ u32 d_cfg;
+ u32 d_ctl;
+ u32 d_evten;
+ u32 d_sts;
+ u32 d_gcmdpar;
+ u32 d_gcmd;
+
+ u32 reserved5[2];
+
+ u32 d_alepena;
+
+ u32 reserved6[55];
+
+ struct d_physical_endpoint d_phy_ep_cmd[32];
+
+ u32 reserved7[128];
+
+ u32 o_cfg;
+ u32 o_ctl;
+ u32 o_evt;
+ u32 o_evten;
+ u32 o_sts;
+
+ u32 reserved8[3];
+
+ u32 adp_cfg;
+ u32 adp_ctl;
+ u32 adp_evt;
+ u32 adp_evten;
+
+ u32 bc_cfg;
+
+ u32 reserved9;
+
+ u32 bc_evt;
+ u32 bc_evten;
+};
+
+/* Global Configuration Register */
+#define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19)
+#define DWC3_GCTL_U2RSTECN (1 << 16)
+#define DWC3_GCTL_RAMCLKSEL(x) \
+ (((x) & DWC3_GCTL_CLK_MASK) << 6)
+#define DWC3_GCTL_CLK_BUS (0)
+#define DWC3_GCTL_CLK_PIPE (1)
+#define DWC3_GCTL_CLK_PIPEHALF (2)
+#define DWC3_GCTL_CLK_MASK (3)
+#define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12)
+#define DWC3_GCTL_PRTCAPDIR(n) ((n) << 12)
+#define DWC3_GCTL_PRTCAP_HOST 1
+#define DWC3_GCTL_PRTCAP_DEVICE 2
+#define DWC3_GCTL_PRTCAP_OTG 3
+#define DWC3_GCTL_CORESOFTRESET (1 << 11)
+#define DWC3_GCTL_SCALEDOWN(n) ((n) << 4)
+#define DWC3_GCTL_SCALEDOWN_MASK DWC3_GCTL_SCALEDOWN(3)
+#define DWC3_GCTL_DISSCRAMBLE (1 << 3)
+#define DWC3_GCTL_DSBLCLKGTNG (1 << 0)
+
+/* Global HWPARAMS1 Register */
+#define DWC3_GHWPARAMS1_EN_PWROPT(n) (((n) & (3 << 24)) >> 24)
+#define DWC3_GHWPARAMS1_EN_PWROPT_NO 0
+#define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1
+
+/* Global USB2 PHY Configuration Register */
+#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6)
+
+/* Global USB3 PIPE Control Register */
+#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
+
+/* Global TX Fifo Size Register */
+#define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff)
+#define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000)
+
+#endif /* __DWC3_H_ */
--- /dev/null
+/*
+ * (C) Copyright 2013
+ * Texas Instruments Inc, <www.ti.com>
+ *
+ * Author: Dan Murphy <dmurphy@ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_XHCI_OMAP_H_
+#define _ASM_ARCH_XHCI_OMAP_H_
+
+#ifdef CONFIG_DRA7XX
+#define OMAP_XHCI_BASE 0x488d0000
+#define OMAP_OCP1_SCP_BASE 0x4A081000
+#define OMAP_OTG_WRAPPER_BASE 0x488c0000
+#elif defined CONFIG_AM43XX
+#define OMAP_XHCI_BASE 0x483d0000
+#define OMAP_OCP1_SCP_BASE 0x483E8000
+#define OMAP_OTG_WRAPPER_BASE 0x483dc100
+#else
+/* Default to the OMAP5 XHCI defines */
+#define OMAP_XHCI_BASE 0x4a030000
+#define OMAP_OCP1_SCP_BASE 0x4a084c00
+#define OMAP_OTG_WRAPPER_BASE 0x4A020000
+#endif
+
+/* Phy register MACRO definitions */
+#define PLL_REGM_MASK 0x001FFE00
+#define PLL_REGM_SHIFT 0x9
+#define PLL_REGM_F_MASK 0x0003FFFF
+#define PLL_REGM_F_SHIFT 0x0
+#define PLL_REGN_MASK 0x000001FE
+#define PLL_REGN_SHIFT 0x1
+#define PLL_SELFREQDCO_MASK 0x0000000E
+#define PLL_SELFREQDCO_SHIFT 0x1
+#define PLL_SD_MASK 0x0003FC00
+#define PLL_SD_SHIFT 0x9
+#define SET_PLL_GO 0x1
+#define PLL_TICOPWDN 0x10000
+#define PLL_LOCK 0x2
+#define PLL_IDLE 0x1
+
+#define USB3_PWRCTL_CLK_CMD_MASK 0x3FE000
+#define USB3_PWRCTL_CLK_FREQ_MASK 0xFFC
+#define USB3_PHY_PARTIAL_RX_POWERON (1 << 6)
+#define USB3_PHY_RX_POWERON (1 << 14)
+#define USB3_PHY_TX_POWERON (1 << 15)
+#define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON | USB3_PHY_TX_POWERON)
+#define USB3_PWRCTL_CLK_CMD_SHIFT 14
+#define USB3_PWRCTL_CLK_FREQ_SHIFT 22
+
+/* USBOTGSS_WRAPPER definitions */
+#define USBOTGSS_WRAPRESET (1 << 17)
+#define USBOTGSS_DMADISABLE (1 << 16)
+#define USBOTGSS_STANDBYMODE_NO_STANDBY (1 << 4)
+#define USBOTGSS_STANDBYMODE_SMRT (1 << 5)
+#define USBOTGSS_STANDBYMODE_SMRT_WKUP (0x3 << 4)
+#define USBOTGSS_IDLEMODE_NOIDLE (1 << 2)
+#define USBOTGSS_IDLEMODE_SMRT (1 << 3)
+#define USBOTGSS_IDLEMODE_SMRT_WKUP (0x3 << 2)
+
+/* USBOTGSS_IRQENABLE_SET_0 bit */
+#define USBOTGSS_COREIRQ_EN (1 << 0)
+
+/* USBOTGSS_IRQENABLE_SET_1 bits */
+#define USBOTGSS_IRQ_SET_1_IDPULLUP_FALL_EN (1 << 0)
+#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_FALL_EN (1 << 3)
+#define USBOTGSS_IRQ_SET_1_CHRGVBUS_FALL_EN (1 << 4)
+#define USBOTGSS_IRQ_SET_1_DRVVBUS_FALL_EN (1 << 5)
+#define USBOTGSS_IRQ_SET_1_IDPULLUP_RISE_EN (1 << 8)
+#define USBOTGSS_IRQ_SET_1_DISCHRGVBUS_RISE_EN (1 << 11)
+#define USBOTGSS_IRQ_SET_1_CHRGVBUS_RISE_EN (1 << 12)
+#define USBOTGSS_IRQ_SET_1_DRVVBUS_RISE_EN (1 << 13)
+#define USBOTGSS_IRQ_SET_1_OEVT_EN (1 << 16)
+#define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN (1 << 17)
+
+/*
+ * USBOTGSS_WRAPPER registers
+ */
+struct omap_dwc_wrapper {
+ u32 revision;
+
+ u32 reserve_1[3];
+
+ u32 sysconfig; /* offset of 0x10 */
+
+ u32 reserve_2[3];
+ u16 reserve_3;
+
+ u32 irqstatus_raw_0; /* offset of 0x24 */
+ u32 irqstatus_0;
+ u32 irqenable_set_0;
+ u32 irqenable_clr_0;
+
+ u32 irqstatus_raw_1; /* offset of 0x34 */
+ u32 irqstatus_1;
+ u32 irqenable_set_1;
+ u32 irqenable_clr_1;
+
+ u32 reserve_4[15];
+
+ u32 utmi_otg_ctrl; /* offset of 0x80 */
+ u32 utmi_otg_status;
+
+ u32 reserve_5[30];
+
+ u32 mram_offset; /* offset of 0x100 */
+ u32 fladj;
+ u32 dbg_config;
+ u32 dbg_data;
+ u32 dev_ebc_en;
+};
+
+/* XHCI PHY register structure */
+struct omap_usb3_phy {
+ u32 reserve1;
+ u32 pll_status;
+ u32 pll_go;
+ u32 pll_config_1;
+ u32 pll_config_2;
+ u32 pll_config_3;
+ u32 pll_ssc_config_1;
+ u32 pll_ssc_config_2;
+ u32 pll_config_4;
+};
+
+struct omap_xhci {
+ struct omap_dwc_wrapper *otg_wrapper;
+ struct omap_usb3_phy *usb3_phy;
+ struct xhci_hccr *hcd;
+ struct dwc3 *dwc3_reg;
+};
+
+/* USB PHY functions */
+void omap_enable_phy(struct omap_xhci *omap);
+void omap_reset_usb_phy(struct dwc3 *dwc3_reg);
+void usb_phy_power(int on);
+
+#endif /* _ASM_ARCH_XHCI_OMAP_H_ */
* EXT_CSD fields
*/
#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
+#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
#define EXT_CSD_RPMB_MULT 168 /* RO */
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
#define MMCPART_NOAVAILABLE (0xff)
#define PART_ACCESS_MASK (0x7)
#define PART_SUPPORT (0x1)
+#define PART_ENH_ATTRIB (0x1f)
/* Maximum block size for MMC */
#define MMC_MAX_BLOCK_LEN 512
/* LDOUSB control/voltage */
#define LDOUSB_CTRL 0x64
#define LDOUSB_VOLTAGE 0x65
+#define LDO_CTRL 0x6a
/* Control of 32 kHz audio clock */
#define CLK32KGAUDIO_CTRL 0xd5
#define SMPS9_CTRL 0x38
#define SMPS9_VOLTAGE 0x3b
+/* SMPS10_CTRL */
+#define SMPS10_CTRL 0x3c
+#define SMPS10_MODE_ACTIVE_D 0x0d
+
/* Bit field definitions for SMPSx_CTRL */
#define SMPS_MODE_ACT_AUTO 1
#define SMPS_MODE_ACT_ECO 2
int twl603x_mmc1_set_ldo9(u8 vsel);
int twl603x_audio_power(u8 on);
int twl603x_enable_bb_charge(u8 bb_fields);
+int palmas_enable_ss_ldo(void);
#endif /* PALMAS_H */
#define PCI_MAX_PCI_DEVICES 32
#define PCI_MAX_PCI_FUNCTIONS 8
+#define PCI_FIND_CAP_TTL 0x48
+#define CAP_START_POS 0x40
+
/* Include the ID list */
#include <pci_ids.h>
pci_addr_t mem,
unsigned long command);
+extern int pci_hose_find_capability(struct pci_controller *hose, pci_dev_t dev,
+ int cap);
+extern int pci_hose_find_cap_start(struct pci_controller *hose, pci_dev_t dev,
+ u8 hdr_type);
+extern int pci_find_cap(struct pci_controller *hose, pci_dev_t dev, int pos,
+ int cap);
+
const char * pci_class_str(u8 class);
int pci_last_busno(void);
static inline unsigned long get_tmu0_clk_rate(void)
{
- return CONFIG_SYS_CLK_FREQ;
+ return CONFIG_SH_TMU_CLK_FREQ;
}
#endif /* __SH_TMU_H */
--- /dev/null
+/*
+ * (C) Copyright 2013
+ * Viktar Palstsiuk, Promwad, viktar.palstsiuk@promwad.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __SX151X_H_
+#define __SX151X_H_
+
+int sx151x_get_value(int chip, int gpio);
+int sx151x_set_value(int chip, int gpio, int val);
+int sx151x_direction_input(int chip, int gpio);
+int sx151x_direction_output(int chip, int gpio);
+int sx151x_reset(int chip);
+
+#endif /* __SX151X_H_ */
--- /dev/null
+/*
+ * thor.h -- USB THOR Downloader protocol
+ *
+ * Copyright (C) 2013 Samsung Electronics
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ */
+
+#ifndef __THOR_H_
+#define __THOR_H_
+
+#include <linux/usb/composite.h>
+
+int thor_handle(void);
+int thor_init(void);
+
+#ifdef CONFIG_THOR_FUNCTION
+int thor_add(struct usb_configuration *c);
+#else
+int thor_add(struct usb_configuration *c)
+{
+ return 0;
+}
+#endif
+#endif /* __THOR_H_ */
struct usb_device *children[USB_MAXCHILDREN];
void *controller; /* hardware controller private data */
+ /* slot_id - for xHCI enabled devices */
+ unsigned int slot_id;
+};
+
+/*
+ * You can initialize platform's USB host or device
+ * ports by passing this enum as an argument to
+ * board_usb_init().
+ */
+enum usb_init_type {
+ USB_INIT_HOST,
+ USB_INIT_DEVICE
};
/**********************************************************************
defined(CONFIG_USB_OMAP3) || defined(CONFIG_USB_DA8XX) || \
defined(CONFIG_USB_BLACKFIN) || defined(CONFIG_USB_AM35X) || \
defined(CONFIG_USB_MUSB_DSPS) || defined(CONFIG_USB_MUSB_AM35X) || \
- defined(CONFIG_USB_MUSB_OMAP2PLUS)
+ defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined(CONFIG_USB_XHCI)
-int usb_lowlevel_init(int index, void **controller);
+int usb_lowlevel_init(int index, enum usb_init_type init, void **controller);
int usb_lowlevel_stop(int index);
int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
extern void udc_disconnect(void);
-#else
-#error USB Lowlevel not defined
+#endif
+
+/*
+ * board-specific hardware initialization, called by
+ * usb drivers and u-boot commands
+ *
+ * @param index USB controller number
+ * @param init initializes controller as USB host or device
+ */
+int board_usb_init(int index, enum usb_init_type init);
+
+/*
+ * can be used to clean up after failed USB initialization attempt
+ * vide: board_usb_init()
+ *
+ * @param index USB controller number for selective cleanup
+ * @param init usb_init_type passed to board_usb_init()
+ */
+int board_usb_cleanup(int index, enum usb_init_type init);
+
+/*
+ * If CONFIG_USB_CABLE_CHECK is set then this function
+ * should be defined in board file.
+ *
+ * @return 1 if cable is connected and 0 otherwise.
+ */
+#ifdef CONFIG_USB_CABLE_CHECK
+int usb_cable_connected(void);
#endif
#ifdef CONFIG_USB_STORAGE
#define usb_pipecontrol(pipe) (usb_pipetype((pipe)) == PIPE_CONTROL)
#define usb_pipebulk(pipe) (usb_pipetype((pipe)) == PIPE_BULK)
+#define usb_pipe_ep_index(pipe) \
+ usb_pipecontrol(pipe) ? (usb_pipeendpoint(pipe) * 2) : \
+ ((usb_pipeendpoint(pipe) * 2) - \
+ (usb_pipein(pipe) ? 0 : 1))
/*************************************************************************
* Hub Stuff
int usb_new_device(struct usb_device *dev);
void usb_free_device(void);
+int usb_alloc_device(struct usb_device *dev);
#endif /*_USB_H_ */
u32 *fifo_p;
};
-/*
- * USBTTY definitions
- */
-#define EP0_MAX_PACKET_SIZE 64
-#define UDC_INT_ENDPOINT 1
-#define UDC_INT_PACKET_SIZE 64
-#define UDC_OUT_ENDPOINT 2
-#define UDC_BULK_PACKET_SIZE 64
-#define UDC_BULK_HS_PACKET_SIZE 512
-#define UDC_IN_ENDPOINT 3
-#define UDC_OUT_PACKET_SIZE 64
-#define UDC_IN_PACKET_SIZE 64
-
/*
* UDC endpoint definitions
*/
#define UDC_EP2 2
#define UDC_EP3 3
-/*
- * Function declarations
- */
-
-void udc_irq(void);
-
-void udc_set_nak(int epid);
-void udc_unset_nak(int epid);
-int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
-int udc_init(void);
-void udc_enable(struct usb_device_instance *device);
-void udc_disable(void);
-void udc_connect(void);
-void udc_disconnect(void);
-void udc_startup_events(struct usb_device_instance *device);
-void udc_setup_ep(struct usb_device_instance *device, unsigned int ep,
- struct usb_endpoint_instance *endpoint);
-
#endif /* __DW_UDC_H */
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
#if defined(CONFIG_MPC83xx)
-#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC83xx_USB_ADDR
+#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_ADDR
+#if defined(CONFIG_MPC834x)
+#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC83xx_USB2_ADDR
+#else
+#define CONFIG_SYS_FSL_USB2_ADDR 0
+#endif
#elif defined(CONFIG_MPC85xx)
-#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC85xx_USB_ADDR
+#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR
+#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR
#elif defined(CONFIG_MPC512X)
-#define CONFIG_SYS_FSL_USB_ADDR CONFIG_SYS_MPC512x_USB_ADDR
+#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR
+#define CONFIG_SYS_FSL_USB2_ADDR 0
#endif
/*
/* UDC device defines */
#define EP0_MAX_PACKET_SIZE EP_MAX_PKT
-#define UDC_OUT_ENDPOINT 0x02
+
#define UDC_OUT_PACKET_SIZE EP_MIN_PACKET_SIZE
-#define UDC_IN_ENDPOINT 0x03
#define UDC_IN_PACKET_SIZE EP_MIN_PACKET_SIZE
-#define UDC_INT_ENDPOINT 0x01
#define UDC_INT_PACKET_SIZE UDC_IN_PACKET_SIZE
#define UDC_BULK_PACKET_SIZE EP_MIN_PACKET_SIZE
STATE_READY,
}mpc8xx_udc_state_t;
-/* Declarations */
-int udc_init(void);
-void udc_irq(void);
-int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
-void udc_setup_ep(struct usb_device_instance *device, unsigned int ep,
- struct usb_endpoint_instance *endpoint);
-void udc_connect(void);
-void udc_disconnect(void);
-void udc_enable(struct usb_device_instance *device);
-void udc_disable(void);
-void udc_startup_events(struct usb_device_instance *device);
-
-/* Flow control */
-void udc_set_nak(int epid);
-void udc_unset_nak (int epid);
+++ /dev/null
-/*
- * Copyright (c) 2009 Wind River Systems, Inc.
- * Tom Rix <Tom.Rix@windriver.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-#ifndef __MUSB_UDC_H__
-#define __MUSB_UDC_H__
-
-#include <usbdevice.h>
-
-/* UDC level routines */
-void udc_irq(void);
-void udc_set_nak(int ep_num);
-void udc_unset_nak(int ep_num);
-int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
-void udc_setup_ep(struct usb_device_instance *device, unsigned int id,
- struct usb_endpoint_instance *endpoint);
-void udc_connect(void);
-void udc_disconnect(void);
-void udc_enable(struct usb_device_instance *device);
-void udc_disable(void);
-void udc_startup_events(struct usb_device_instance *device);
-int udc_init(void);
-
-/* usbtty */
-#ifdef CONFIG_USB_TTY
-
-#define EP0_MAX_PACKET_SIZE 64 /* MUSB_EP0_FIFOSIZE */
-#define UDC_INT_ENDPOINT 1
-#define UDC_INT_PACKET_SIZE 64
-#define UDC_OUT_ENDPOINT 2
-#define UDC_OUT_PACKET_SIZE 64
-#define UDC_IN_ENDPOINT 3
-#define UDC_IN_PACKET_SIZE 64
-#define UDC_BULK_PACKET_SIZE 64
-
-#endif /* CONFIG_USB_TTY */
-
-#endif /* __MUSB_UDC_H__ */
#ifndef __MV_UDC_H__
#define __MV_UDC_H__
-#include <asm/byteorder.h>
-#include <asm/errno.h>
-#include <linux/usb/ch9.h>
-#include <linux/usb/gadget.h>
-
-#include "../../drivers/usb/host/ehci.h"
-
-#define NUM_ENDPOINTS 6
-
-/* Endpoint parameters */
-#define MAX_ENDPOINTS 4
-
#define EP_MAX_PACKET_SIZE 0x200
#define EP0_MAX_PACKET_SIZE 64
-
-struct mv_udc {
-#define MICRO_8FRAME 0x8
-#define USBCMD_ITC(x) ((((x) > 0xff) ? 0xff : x) << 16)
-#define USBCMD_FS2 (1 << 15)
-#define USBCMD_RST (1 << 1)
-#define USBCMD_RUN (1)
- u32 usbcmd; /* 0x140 */
-#define STS_SLI (1 << 8)
-#define STS_URI (1 << 6)
-#define STS_PCI (1 << 2)
-#define STS_UEI (1 << 1)
-#define STS_UI (1 << 0)
- u32 usbsts; /* 0x144 */
- u32 pad1[3];
- u32 devaddr; /* 0x154 */
- u32 epinitaddr; /* 0x158 */
- u32 pad2[10];
-#define PTS_ENABLE 2
-#define PTS(x) (((x) & 0x3) << 30)
-#define PFSC (1 << 24)
- u32 portsc; /* 0x184 */
- u32 pad3[8];
-#define USBMODE_DEVICE 2
- u32 usbmode; /* 0x1a8 */
- u32 epstat; /* 0x1ac */
-#define EPT_TX(x) (1 << (((x) & 0xffff) + 16))
-#define EPT_RX(x) (1 << ((x) & 0xffff))
- u32 epprime; /* 0x1b0 */
- u32 epflush; /* 0x1b4 */
- u32 pad4;
- u32 epcomp; /* 0x1bc */
-#define CTRL_TXE (1 << 23)
-#define CTRL_TXR (1 << 22)
-#define CTRL_RXE (1 << 7)
-#define CTRL_RXR (1 << 6)
-#define CTRL_TXT_BULK (2 << 18)
-#define CTRL_RXT_BULK (2 << 2)
- u32 epctrl[16]; /* 0x1c0 */
-};
-
-struct mv_ep {
- struct usb_ep ep;
- struct list_head queue;
- const struct usb_endpoint_descriptor *desc;
-
- struct usb_request req;
- uint8_t *b_buf;
- uint32_t b_len;
- uint8_t b_fast[64] __aligned(ARCH_DMA_MINALIGN);
-};
-
-struct mv_drv {
- struct usb_gadget gadget;
- struct usb_gadget_driver *driver;
- struct ehci_ctrl *ctrl;
- struct ept_queue_head *epts;
- struct ept_queue_item *items[2 * NUM_ENDPOINTS];
- uint8_t *items_mem;
- struct mv_ep ep[NUM_ENDPOINTS];
-};
-
-struct ept_queue_head {
- unsigned config;
- unsigned current; /* read-only */
-
- unsigned next;
- unsigned info;
- unsigned page0;
- unsigned page1;
- unsigned page2;
- unsigned page3;
- unsigned page4;
- unsigned reserved_0;
-
- unsigned char setup_data[8];
-
- unsigned reserved_1;
- unsigned reserved_2;
- unsigned reserved_3;
- unsigned reserved_4;
-};
-
-#define CONFIG_MAX_PKT(n) ((n) << 16)
-#define CONFIG_ZLT (1 << 29) /* stop on zero-len xfer */
-#define CONFIG_IOS (1 << 15) /* IRQ on setup */
-
-struct ept_queue_item {
- unsigned next;
- unsigned info;
- unsigned page0;
- unsigned page1;
- unsigned page2;
- unsigned page3;
- unsigned page4;
- unsigned reserved;
-};
-
-#define TERMINATE 1
-#define INFO_BYTES(n) ((n) << 16)
-#define INFO_IOC (1 << 15)
-#define INFO_ACTIVE (1 << 7)
-#define INFO_HALTED (1 << 6)
-#define INFO_BUFFER_ERROR (1 << 5)
-#define INFO_TX_ERROR (1 << 3)
-
#endif /* __MV_UDC_H__ */
#define UDC_VBUS_MODE (1 << 18)
/* OMAP Endpoint parameters */
-#define EP0_MAX_PACKET_SIZE 64
-#define UDC_OUT_ENDPOINT 2
-#define UDC_OUT_PACKET_SIZE 64
-#define UDC_IN_ENDPOINT 1
-#define UDC_IN_PACKET_SIZE 64
-#define UDC_INT_ENDPOINT 5
+#define UDC_OUT_PACKET_SIZE 64
+#define UDC_IN_PACKET_SIZE 64
#define UDC_INT_PACKET_SIZE 16
-#define UDC_BULK_PACKET_SIZE 16
-
-void udc_irq (void);
-/* Flow control */
-void udc_set_nak(int epid);
-void udc_unset_nak (int epid);
-
-/* Higher level functions for abstracting away from specific device */
-int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
-
-int udc_init (void);
+#define UDC_BULK_PACKET_SIZE 16
-void udc_enable(struct usb_device_instance *device);
-void udc_disable(void);
-
-void udc_connect(void);
-void udc_disconnect(void);
-
-void udc_startup_events(struct usb_device_instance *device);
-void udc_setup_ep(struct usb_device_instance *device, unsigned int ep, struct usb_endpoint_instance *endpoint);
+#define UDC_INT_ENDPOINT 5
+#define UDC_OUT_ENDPOINT 2
+#define UDC_IN_ENDPOINT 1
#endif
/* Endpoint parameters */
#define MAX_ENDPOINTS 4
-#define EP_MAX_PACKET_SIZE 64
#define EP0_MAX_PACKET_SIZE 16
+
#define UDC_OUT_ENDPOINT 0x02
-#define UDC_OUT_PACKET_SIZE EP_MAX_PACKET_SIZE
#define UDC_IN_ENDPOINT 0x01
-#define UDC_IN_PACKET_SIZE EP_MAX_PACKET_SIZE
#define UDC_INT_ENDPOINT 0x05
-#define UDC_INT_PACKET_SIZE EP_MAX_PACKET_SIZE
-#define UDC_BULK_PACKET_SIZE EP_MAX_PACKET_SIZE
-
-void udc_irq(void);
-/* Flow control */
-void udc_set_nak(int epid);
-void udc_unset_nak(int epid);
-
-/* Higher level functions for abstracting away from specific device */
-int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
-
-int udc_init(void);
-
-void udc_enable(struct usb_device_instance *device);
-void udc_disable(void);
-
-void udc_connect(void);
-void udc_disconnect(void);
-
-void udc_startup_events(struct usb_device_instance *device);
-void udc_setup_ep(struct usb_device_instance *device,
- unsigned int ep, struct usb_endpoint_instance *endpoint);
#endif
--- /dev/null
+/*
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef USB_UDC_H
+#define USB_UDC_H
+
+#ifndef EP0_MAX_PACKET_SIZE
+#define EP0_MAX_PACKET_SIZE 64
+#endif
+
+#ifndef EP_MAX_PACKET_SIZE
+#define EP_MAX_PACKET_SIZE 64
+#endif
+
+#if !defined(CONFIG_PPC) && !defined(CONFIG_OMAP1510)
+/* omap1510_udc.h and mpc8xx_udc.h will set these values */
+#define UDC_OUT_PACKET_SIZE EP_MAX_PACKET_SIZE
+#define UDC_IN_PACKET_SIZE EP_MAX_PACKET_SIZE
+#define UDC_INT_PACKET_SIZE EP_MAX_PACKET_SIZE
+#define UDC_BULK_PACKET_SIZE EP_MAX_PACKET_SIZE
+#endif
+
+#define UDC_BULK_HS_PACKET_SIZE 512
+
+#ifndef UDC_INT_ENDPOINT
+#define UDC_INT_ENDPOINT 1
+#endif
+
+#ifndef UDC_OUT_ENDPOINT
+#define UDC_OUT_ENDPOINT 2
+#endif
+
+#ifndef UDC_IN_ENDPOINT
+#define UDC_IN_ENDPOINT 3
+#endif
+
+/* function declarations */
+int udc_init(void);
+void udc_irq(void);
+int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
+void udc_setup_ep(struct usb_device_instance *device, unsigned int ep,
+ struct usb_endpoint_instance *endpoint);
+void udc_connect(void);
+void udc_disconnect(void);
+void udc_enable(struct usb_device_instance *device);
+void udc_disable(void);
+void udc_startup_events(struct usb_device_instance *device);
+
+/* Flow control */
+void udc_set_nak(int epid);
+void udc_unset_nak(int epid);
+
+#endif
#define USB_DIR_OUT 0
#define USB_DIR_IN 0x80
+/*
+ * bmRequestType: USB Device Requests, table 9.2 USB 2.0 spec.
+ * (shifted) direction/type/recipient.
+ */
+#define DeviceRequest \
+ ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
+
+#define DeviceOutRequest \
+ ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
+
+#define InterfaceRequest \
+ ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+
+#define EndpointRequest \
+ ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+
+#define EndpointOutRequest \
+ ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+
/* Descriptor types */
#define USB_DT_DEVICE 0x01
#define USB_DT_CONFIG 0x02
#define __USB_MASS_STORAGE_H__
#define SECTOR_SIZE 0x200
-
#include <mmc.h>
#include <linux/usb/composite.h>
-struct ums_device {
- struct mmc *mmc;
- int dev_num;
- int offset;
- int part_size;
-};
+#ifndef UMS_START_SECTOR
+#define UMS_START_SECTOR 0
+#endif
-struct ums_board_info {
- int (*read_sector)(struct ums_device *ums_dev,
+#ifndef UMS_NUM_SECTORS
+#define UMS_NUM_SECTORS 0
+#endif
+
+struct ums {
+ int (*read_sector)(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, void *buf);
- int (*write_sector)(struct ums_device *ums_dev,
+ int (*write_sector)(struct ums *ums_dev,
ulong start, lbaint_t blkcnt, const void *buf);
- void (*get_capacity)(struct ums_device *ums_dev,
- long long int *capacity);
+ unsigned int start_sector;
+ unsigned int num_sectors;
const char *name;
- struct ums_device ums_dev;
+ struct mmc *mmc;
};
-extern void board_usb_init(void);
+extern struct ums *ums;
-extern int fsg_init(struct ums_board_info *);
-extern void fsg_cleanup(void);
-extern struct ums_board_info *board_ums_init(unsigned int,
- unsigned int, unsigned int);
-extern int usb_gadget_handle_interrupts(void);
-extern int fsg_main_thread(void *);
+int fsg_init(struct ums *);
+void fsg_cleanup(void);
+struct ums *ums_init(unsigned int);
+int fsg_main_thread(void *);
#ifdef CONFIG_USB_GADGET_MASS_STORAGE
int fsg_add(struct usb_configuration *c);
#ifndef _VIDEO_FB_H_
#define _VIDEO_FB_H_
+#if defined(CONFIG_SYS_CONSOLE_FG_COL) && defined(CONFIG_SYS_CONSOLE_BG_COL)
+#define CONSOLE_BG_COL CONFIG_SYS_CONSOLE_BG_COL
+#define CONSOLE_FG_COL CONFIG_SYS_CONSOLE_FG_COL
+#else
#define CONSOLE_BG_COL 0x00
#define CONSOLE_FG_COL 0xa0
+#endif
/*
* Graphic Data Format (GDF) bits for VIDEO_DATA_FORMAT
-
/* Hand composed "Minuscule" 4x6 font, with binary data generated using
* Perl stub.
*
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libgeneric.o
-
ifndef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_AES) += aes.o
-COBJS-$(CONFIG_BZIP2) += bzlib.o
-COBJS-$(CONFIG_BZIP2) += bzlib_crctable.o
-COBJS-$(CONFIG_BZIP2) += bzlib_decompress.o
-COBJS-$(CONFIG_BZIP2) += bzlib_randtable.o
-COBJS-$(CONFIG_BZIP2) += bzlib_huffman.o
-COBJS-$(CONFIG_USB_TTY) += circbuf.o
-COBJS-y += crc7.o
-COBJS-y += crc16.o
-COBJS-$(CONFIG_OF_CONTROL) += fdtdec.o
-COBJS-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
-COBJS-$(CONFIG_GZIP) += gunzip.o
-COBJS-$(CONFIG_GZIP_COMPRESSED) += gzip.o
-COBJS-y += initcall.o
-COBJS-$(CONFIG_LMB) += lmb.o
-COBJS-y += ldiv.o
-COBJS-$(CONFIG_MD5) += md5.o
-COBJS-y += net_utils.o
-COBJS-$(CONFIG_PHYSMEM) += physmem.o
-COBJS-y += qsort.o
-COBJS-$(CONFIG_SHA1) += sha1.o
-COBJS-$(CONFIG_SHA256) += sha256.o
-COBJS-y += strmhz.o
-COBJS-$(CONFIG_TPM) += tpm.o
-COBJS-$(CONFIG_RBTREE) += rbtree.o
-COBJS-$(CONFIG_BITREVERSE) += bitrev.o
+obj-$(CONFIG_AES) += aes.o
+obj-$(CONFIG_BZIP2) += bzlib.o
+obj-$(CONFIG_BZIP2) += bzlib_crctable.o
+obj-$(CONFIG_BZIP2) += bzlib_decompress.o
+obj-$(CONFIG_BZIP2) += bzlib_randtable.o
+obj-$(CONFIG_BZIP2) += bzlib_huffman.o
+obj-$(CONFIG_USB_TTY) += circbuf.o
+obj-y += crc7.o
+obj-y += crc16.o
+obj-$(CONFIG_OF_CONTROL) += fdtdec.o
+obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
+obj-$(CONFIG_GZIP) += gunzip.o
+obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
+obj-y += initcall.o
+obj-$(CONFIG_LMB) += lmb.o
+obj-y += ldiv.o
+obj-$(CONFIG_MD5) += md5.o
+obj-y += net_utils.o
+obj-$(CONFIG_PHYSMEM) += physmem.o
+obj-y += qsort.o
+obj-$(CONFIG_SHA1) += sha1.o
+obj-$(CONFIG_SHA256) += sha256.o
+obj-y += strmhz.o
+obj-$(CONFIG_TPM) += tpm.o
+obj-$(CONFIG_RBTREE) += rbtree.o
+obj-$(CONFIG_BITREVERSE) += bitrev.o
endif
ifdef CONFIG_SPL_BUILD
-COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o
-COBJS-$(CONFIG_SPL_NET_SUPPORT) += net_utils.o
+obj-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o
+obj-$(CONFIG_SPL_NET_SUPPORT) += net_utils.o
endif
-COBJS-$(CONFIG_ADDR_MAP) += addr_map.o
-COBJS-y += hashtable.o
-COBJS-y += errno.o
-COBJS-y += display_options.o
-COBJS-$(CONFIG_BCH) += bch.o
-COBJS-y += crc32.o
-COBJS-y += ctype.o
-COBJS-y += div64.o
-COBJS-y += hang.o
-COBJS-y += linux_string.o
-COBJS-$(CONFIG_REGEX) += slre.o
-COBJS-y += string.o
-COBJS-y += time.o
-COBJS-$(CONFIG_TRACE) += trace.o
-COBJS-$(CONFIG_BOOTP_PXE) += uuid.o
-COBJS-y += vsprintf.o
-COBJS-$(CONFIG_RANDOM_MACADDR) += rand.o
-COBJS-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
-COBJS-$(CONFIG_CMD_LINK_LOCAL) += rand.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
+obj-$(CONFIG_ADDR_MAP) += addr_map.o
+obj-y += hashtable.o
+obj-y += errno.o
+obj-y += display_options.o
+obj-$(CONFIG_BCH) += bch.o
+obj-y += crc32.o
+obj-y += ctype.o
+obj-y += div64.o
+obj-y += hang.o
+obj-y += linux_string.o
+obj-$(CONFIG_REGEX) += slre.o
+obj-y += string.o
+obj-y += time.o
+obj-$(CONFIG_TRACE) += trace.o
+obj-$(CONFIG_BOOTP_PXE) += uuid.o
+obj-y += vsprintf.o
+obj-$(CONFIG_RANDOM_MACADDR) += rand.o
+obj-$(CONFIG_BOOTP_RANDOM_DELAY) += rand.o
+obj-$(CONFIG_CMD_LINK_LOCAL) += rand.o
# SEE README.arm-unaligned-accesses
$(obj)bzlib.o: CFLAGS += $(PLATFORM_NO_UNALIGNED)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
COMPAT(GOOGLE_CROS_EC, "google,cros-ec"),
COMPAT(GOOGLE_CROS_EC_KEYB, "google,cros-ec-keyb"),
COMPAT(SAMSUNG_EXYNOS_EHCI, "samsung,exynos-ehci"),
+ COMPAT(SAMSUNG_EXYNOS5_XHCI, "samsung,exynos5250-xhci"),
COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
+ COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
COMPAT(SAMSUNG_EXYNOS_FIMD, "samsung,exynos-fimd"),
COMPAT(SAMSUNG_EXYNOS5_DP, "samsung,exynos5-dp"),
int arg;
void *priv = NULL;
- for (arg = 1; arg < argc; ++arg) {
+ for (arg = 0; arg < argc; ++arg) {
#ifdef CONFIG_REGEX
struct slre slre;
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libfdt.o
-
-SOBJS =
-
COBJS-libfdt += fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_sw.o fdt_wip.o fdt_empty_tree.o
-COBJS-$(CONFIG_OF_LIBFDT) += $(COBJS-libfdt)
-COBJS-$(CONFIG_FIT) += $(COBJS-libfdt)
-
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_OF_LIBFDT) += $(COBJS-libfdt)
+obj-$(CONFIG_FIT) += $(COBJS-libfdt)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)liblzma.o
-
-SOBJS =
-
CFLAGS += -D_LZMA_PROB32
-COBJS-$(CONFIG_LZMA) += LzmaDec.o LzmaTools.o
-
-COBJS = $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_LZMA) += LzmaDec.o LzmaTools.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)liblzo.o
-
-SOBJS =
-
-COBJS-$(CONFIG_LZO) += lzo1x_decompress.o
-
-COBJS = $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_LZO) += lzo1x_decompress.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)librsa.o
-
ifdef CONFIG_FIT_SIGNATURE
-COBJS-$(CONFIG_RSA) += rsa-verify.o
+obj-$(CONFIG_RSA) += rsa-verify.o
endif
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
#include <common.h>
#include <watchdog.h>
+#include <div64.h>
+#include <asm/io.h>
+
+#if CONFIG_SYS_HZ != 1000
+#warning "CONFIG_SYS_HZ must be 1000 and should not be defined by platforms"
+#endif
#ifndef CONFIG_WD_PERIOD
# define CONFIG_WD_PERIOD (10 * 1000 * 1000) /* 10 seconds default*/
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_SYS_TIMER_RATE
+ulong notrace get_tbclk(void)
+{
+ return CONFIG_SYS_TIMER_RATE;
+}
+#endif
+
+#ifdef CONFIG_SYS_TIMER_COUNTER
+unsigned long notrace timer_read_counter(void)
+{
+#ifdef CONFIG_SYS_TIMER_COUNTS_DOWN
+ return ~readl(CONFIG_SYS_TIMER_COUNTER);
+#else
+ return readl(CONFIG_SYS_TIMER_COUNTER);
+#endif
+}
+#else
+extern unsigned long __weak timer_read_counter(void);
+#endif
+
+unsigned long long __weak notrace get_ticks(void)
+{
+ unsigned long now = timer_read_counter();
+
+ /* increment tbu if tbl has rolled over */
+ if (now < gd->timebase_l)
+ gd->timebase_h++;
+ gd->timebase_l = now;
+ return ((unsigned long long)gd->timebase_h << 32) | gd->timebase_l;
+}
+
+static unsigned long long notrace tick_to_time(unsigned long long tick)
+{
+ unsigned int div = get_tbclk();
+
+ tick *= CONFIG_SYS_HZ;
+ do_div(tick, div);
+ return tick;
+}
+
+ulong __weak get_timer(ulong base)
+{
+ return tick_to_time(get_ticks()) - base;
+}
+
+unsigned long __weak notrace timer_get_us(void)
+{
+ return tick_to_time(get_ticks() * 1000);
+}
+static unsigned long long usec_to_tick(unsigned long usec)
+{
+ unsigned long long tick = usec * get_tbclk();
+ usec *= get_tbclk();
+ do_div(tick, 1000000);
+ return tick;
+}
+
+void __weak __udelay(unsigned long usec)
+{
+ unsigned long long tmp;
+ ulong tmo;
+
+ tmo = usec_to_tick(usec);
+ tmp = get_ticks() + tmo; /* get current timestamp */
+
+ while (get_ticks() < tmp) /* loop till event */
+ /*NOP*/;
+}
+
/* ------------------------------------------------------------------------- */
void udelay(unsigned long usec)
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libtizen.o
-
-SOBJS =
-
-COBJS-$(CONFIG_TIZEN) += tizen.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_TIZEN) += tizen.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libz.o
-
-COBJS-$(CONFIG_ZLIB) += zlib.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_ZLIB) += zlib.o
#
if [ "$SRCTREE" != "$OBJTREE" ] ; then
mkdir -p ${OBJTREE}/include
- mkdir -p ${OBJTREE}/include2
- cd ${OBJTREE}/include2
- rm -f asm
- ln -s ${SRCTREE}/arch/${arch}/include/asm asm
LNPREFIX=${SRCTREE}/arch/${arch}/include/asm/
- cd ../include
+ cd ${OBJTREE}/include
mkdir -p asm
else
- cd ./include
- rm -f asm
- ln -s ../arch/${arch}/include/asm asm
+ cd arch/${arch}/include
fi
rm -f asm/arch
ln -s ${LNPREFIX}proc-armv asm/proc
fi
+if [ "$SRCTREE" = "$OBJTREE" ] ; then
+ cd ${SRCTREE}/include
+fi
+
#
# Create include file for Make
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
# CFLAGS += -DDEBUG
-LIB = $(obj)libnet.o
-
-COBJS-$(CONFIG_CMD_NET) += arp.o
-COBJS-$(CONFIG_CMD_NET) += bootp.o
-COBJS-$(CONFIG_CMD_CDP) += cdp.o
-COBJS-$(CONFIG_CMD_DNS) += dns.o
-COBJS-$(CONFIG_CMD_NET) += eth.o
-COBJS-$(CONFIG_CMD_LINK_LOCAL) += link_local.o
-COBJS-$(CONFIG_CMD_NET) += net.o
-COBJS-$(CONFIG_CMD_NFS) += nfs.o
-COBJS-$(CONFIG_CMD_PING) += ping.o
-COBJS-$(CONFIG_CMD_RARP) += rarp.o
-COBJS-$(CONFIG_CMD_SNTP) += sntp.o
-COBJS-$(CONFIG_CMD_NET) += tftp.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_CMD_NET) += arp.o
+obj-$(CONFIG_CMD_NET) += bootp.o
+obj-$(CONFIG_CMD_CDP) += cdp.o
+obj-$(CONFIG_CMD_DNS) += dns.o
+obj-$(CONFIG_CMD_NET) += eth.o
+obj-$(CONFIG_CMD_LINK_LOCAL) += link_local.o
+obj-$(CONFIG_CMD_NET) += net.o
+obj-$(CONFIG_CMD_NFS) += nfs.o
+obj-$(CONFIG_CMD_PING) += ping.o
+obj-$(CONFIG_CMD_RARP) += rarp.o
+obj-$(CONFIG_CMD_SNTP) += sntp.o
+obj-$(CONFIG_CMD_NET) += tftp.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-include $(OBJTREE)/include/autoconf.mk
-
-LIB = libpost.o
-GPLIB-$(CONFIG_HAS_POST) += libgenpost.o
-COBJS-$(CONFIG_HAS_POST) += post.o
-COBJS-$(CONFIG_POST_STD_LIST) += tests.o
-
-SPLIB-$(CONFIG_HAS_POST) = drivers/libpostdrivers.o
-SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH) ]; then echo \
- "lib_$(ARCH)/libpost$(ARCH).o"; fi)
-SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH)/fpu ]; then echo \
- "lib_$(ARCH)/fpu/libpost$(ARCH)fpu.o"; fi)
-SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d cpu/$(CPU) ]; then echo \
- "cpu/$(CPU)/libpost$(CPU).o"; fi)
-SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d board/$(BOARD) ]; then echo \
- "board/$(BOARD)/libpost$(BOARD).o"; fi)
-
-GPLIB := $(addprefix $(obj),$(GPLIB-y))
-SPLIB := $(addprefix $(obj),$(SPLIB-y))
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-LIB := $(obj)$(LIB)
-
-all: $(LIB)
-
-postdeps:
- @for lib in $(SPLIB-y) ; do \
- $(MAKE) -C `dirname $$lib` all ; \
- done
-
-# generic POST library
-$(GPLIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-# specific POST libraries
-$(SPLIB): $(obj).depend postdeps
- $(MAKE) -C $(dir $(subst $(obj),,$@))
-
-# the POST lib archive
-$(LIB): $(GPLIB) $(SPLIB)
- $(call cmd_link_o_target, $^)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_HAS_POST) += post.o
+obj-$(CONFIG_POST_STD_LIST) += tests.o
+
+obj-$(CONFIG_HAS_POST) += drivers/
+ifeq ($(ARCH),powerpc)
+obj-$(CONFIG_HAS_POST) += lib_powerpc/
+endif
+ifneq ($(filter mpc83xx mpc8xx ppc4xx,$(CPU)),)
+obj-$(CONFIG_HAS_POST) += cpu/$(CPU)/
+endif
+ifneq ($(filter lwmon lwmon5 netta pdm360ng,$(BOARD)),)
+obj-$(CONFIG_HAS_POST) += board/$(BOARD)/
+endif
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(OBJTREE)/include/autoconf.mk
-LIB = libpostlwmon.o
+CPPFLAGS += -I$(TOPDIR)
-COBJS-$(CONFIG_HAS_POST) += sysmon.o
-
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += sysmon.o
# Developed for DENX Software Engineering GmbH
#
# SPDX-License-Identifier: GPL-2.0+
-include $(OBJTREE)/include/autoconf.mk
-LIB = libpostlwmon5.o
+CPPFLAGS += -I$(TOPDIR)
-COBJS-$(CONFIG_HAS_POST) += sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o
-
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(OBJTREE)/include/autoconf.mk
-LIB = libpostnetta.o
+CPPFLAGS += -I$(TOPDIR)
-COBJS-$(CONFIG_HAS_POST) += codec.o dsp.o
-
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += codec.o dsp.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(OBJTREE)/include/autoconf.mk
-LIB = libpostpdm360ng.o
+CPPFLAGS += -I$(TOPDIR)
-COBJS-$(CONFIG_HAS_POST) += coproc_com.o
-
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += coproc_com.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(OBJTREE)/include/autoconf.mk
-LIB = libpostmpc83xx.o
+CPPFLAGS += -I$(TOPDIR)
-AOBJS-$(CONFIG_HAS_POST) +=
-COBJS-$(CONFIG_HAS_POST) += ecc.o
-
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += ecc.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(OBJTREE)/include/autoconf.mk
-LIB = libpostmpc8xx.o
+CPPFLAGS += -I$(TOPDIR)
-AOBJS-$(CONFIG_HAS_POST) += cache_8xx.o
-COBJS-$(CONFIG_HAS_POST) += cache.o ether.o spr.o uart.o usb.o watchdog.o
-
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += cache_8xx.o
+obj-$(CONFIG_HAS_POST) += cache.o ether.o spr.o uart.o usb.o watchdog.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(OBJTREE)/include/autoconf.mk
-LIB = libpostppc4xx.o
+CPPFLAGS += -I$(TOPDIR)
-AOBJS-$(CONFIG_HAS_POST) += cache_4xx.o
-COBJS-$(CONFIG_HAS_POST) += cache.o
-COBJS-$(CONFIG_HAS_POST) += denali_ecc.o
-COBJS-$(CONFIG_HAS_POST) += ether.o
-COBJS-$(CONFIG_HAS_POST) += fpu.o
-COBJS-$(CONFIG_HAS_POST) += ocm.o
-COBJS-$(CONFIG_HAS_POST) += spr.o
-COBJS-$(CONFIG_HAS_POST) += uart.o
-COBJS-$(CONFIG_HAS_POST) += watchdog.o
-
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += cache_4xx.o
+obj-$(CONFIG_HAS_POST) += cache.o
+obj-$(CONFIG_HAS_POST) += denali_ecc.o
+obj-$(CONFIG_HAS_POST) += ether.o
+obj-$(CONFIG_HAS_POST) += fpu.o
+obj-$(CONFIG_HAS_POST) += ocm.o
+obj-$(CONFIG_HAS_POST) += spr.o
+obj-$(CONFIG_HAS_POST) += uart.o
+obj-$(CONFIG_HAS_POST) += watchdog.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-LIB = libpostdrivers.o
+CPPFLAGS += -I$(TOPDIR)
-COBJS-$(CONFIG_HAS_POST) += flash.o i2c.o memory.o rtc.o
-
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += flash.o i2c.o memory.o rtc.o
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-LIB = libpost$(ARCH).o
+CPPFLAGS += -I$(TOPDIR)
-AOBJS-$(CONFIG_HAS_POST) += asm.o
-COBJS-$(CONFIG_HAS_POST) += cpu.o cmp.o cmpi.o two.o twox.o three.o threex.o
-COBJS-$(CONFIG_HAS_POST) += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o
-COBJS-$(CONFIG_HAS_POST) += store.o load.o cr.o b.o multi.o string.o complex.o
+obj-$(CONFIG_HAS_POST) += asm.o
+obj-$(CONFIG_HAS_POST) += cpu.o cmp.o cmpi.o two.o twox.o three.o threex.o
+obj-$(CONFIG_HAS_POST) += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o
+obj-$(CONFIG_HAS_POST) += store.o load.o cr.o b.o multi.o string.o complex.o
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += fpu/
#
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-LIB = libpost$(ARCH)fpu.o
+CPPFLAGS += -I$(TOPDIR)
-COBJS-$(CONFIG_HAS_POST) += 20001122-1.o
-COBJS-$(CONFIG_HAS_POST) += 20010114-2.o
-COBJS-$(CONFIG_HAS_POST) += 20010226-1.o
-COBJS-$(CONFIG_HAS_POST) += 980619-1.o
-COBJS-$(CONFIG_HAS_POST) += acc1.o
-COBJS-$(CONFIG_HAS_POST) += compare-fp-1.o
-COBJS-$(CONFIG_HAS_POST) += fpu.o
-COBJS-$(CONFIG_HAS_POST) += mul-subnormal-single-1.o
-
-COBJS-$(CONFIG_HAS_POST) += darwin-ldouble.o
-
-include $(TOPDIR)/post/rules.mk
+obj-$(CONFIG_HAS_POST) += 20001122-1.o
+obj-$(CONFIG_HAS_POST) += 20010114-2.o
+obj-$(CONFIG_HAS_POST) += 20010226-1.o
+obj-$(CONFIG_HAS_POST) += 980619-1.o
+obj-$(CONFIG_HAS_POST) += acc1.o
+obj-$(CONFIG_HAS_POST) += compare-fp-1.o
+obj-$(CONFIG_HAS_POST) += fpu.o
+obj-$(CONFIG_HAS_POST) += mul-subnormal-single-1.o
+obj-$(CONFIG_HAS_POST) += darwin-ldouble.o
CFLAGS := $(shell echo $(CFLAGS) | sed s/-msoft-float//)
CFLAGS += -mhard-float -fkeep-inline-functions
+++ /dev/null
-#
-# (C) Copyright 2002-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-include $(TOPDIR)/config.mk
-
-COBJS := $(COBJS-y)
-AOBJS := $(AOBJS-y)
-SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS))
-LIB := $(obj)$(LIB)
-
-CPPFLAGS += -I$(TOPDIR)
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
--- /dev/null
+# our default target
+.PHONY: all
+all:
+
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)built-in.o
+LIBGCC = $(obj)libgcc.o
+SRCS :=
+
+include Makefile
+
+# Backward compatible: obj-y is preferable
+COBJS := $(sort $(COBJS) $(COBJS-y))
+SOBJS := $(sort $(SOBJS) $(SOBJS-y))
+
+# Going forward use the following
+obj-y := $(sort $(obj-y))
+extra-y := $(sort $(extra-y))
+lib-y := $(sort $(lib-y))
+
+subdir-y := $(patsubst %/,%,$(filter %/, $(obj-y)))
+obj-y := $(patsubst %/, %/built-in.o, $(obj-y))
+subdir-obj-y := $(filter %/built-in.o, $(obj-y))
+subdir-obj-y := $(addprefix $(obj),$(subdir-obj-y))
+
+SRCS += $(COBJS:.o=.c) $(SOBJS:.o=.S) \
+ $(wildcard $(obj-y:.o=.c) $(obj-y:.o=.S) $(lib-y:.o=.c) $(lib-y:.o=.S) $(extra-y:.o=.c) $(extra-y:.o=.S))
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS) $(obj-y))
+
+LGOBJS := $(addprefix $(obj),$(sort $(GLSOBJS) $(GLCOBJS)) $(lib-y))
+
+all: $(LIB) $(addprefix $(obj),$(extra-y))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+ifneq ($(strip $(lib-y)),)
+all: $(LIBGCC)
+
+$(LIBGCC): $(obj).depend $(LGOBJS)
+ $(call cmd_link_o_target, $(LGOBJS))
+endif
+
+ifneq ($(subdir-obj-y),)
+# Descending
+$(subdir-obj-y): $(subdir-y)
+
+$(subdir-y): FORCE
+ $(MAKE) -C $@ -f $(TOPDIR)/scripts/Makefile.build
+endif
+
+#########################################################################
+
+# defines $(obj).depend target
+
+include $(TOPDIR)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
+
+.PHONY: FORCE
LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/libusb_gadget.o
LIBS-$(CONFIG_SPL_WATCHDOG_SUPPORT) += drivers/watchdog/libwatchdog.o
-ifneq ($(CONFIG_OMAP_COMMON),)
-LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
-endif
-
ifneq (,$(CONFIG_MX23)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35))
LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o
endif
-ifneq ($(CONFIG_TEGRA),)
-LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o
-LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o
-LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o
-endif
+LIBS-$(CONFIG_ARM) += arch/arm/cpu/libcpu.o
ifneq ($(CONFIG_MX23)$(CONFIG_MX35),)
LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o
endif
-ifeq ($(SOC),exynos)
-LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o
-endif
-
# Add GCC lib
ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o
$(error could not find linker script)
endif
+build := -f $(TOPDIR)/scripts/Makefile.build -C
+
# Special flags for CPP when processing the linker script.
# Pass the version down so we can handle backwards compatibility
# on the fly.
-a $(CONFIG_SPL_TEXT_BASE) -d $< $@
$(OBJTREE)/SPL : $(obj)u-boot-spl.bin depend
- $(MAKE) -C $(SRCTREE)/arch/arm/imx-common $@
+ $(MAKE) $(build) $(SRCTREE)/arch/arm/imx-common $@
ALL-y += $(obj)$(SPL_BIN).bin
$(obj)$(SPL_BIN): depend $(START) $(LIBS) $(obj)u-boot-spl.lds
$(GEN_UBOOT)
-$(START): depend
- $(MAKE) -C $(SRCTREE)/$(START_PATH) $@
+$(START):
+ @:
$(LIBS): depend
- $(MAKE) -C $(SRCTREE)$(dir $(subst $(SPLTREE),,$@))
+ $(MAKE) $(build) $(SRCTREE)$(dir $(subst $(SPLTREE),,$@))
+ mv $(dir $@)built-in.o $@
$(obj)u-boot-spl.lds: $(LDSCRIPT) depend
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(obj). -ansi -D__ASSEMBLY__ -P - < $< > $@
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)libtest.o
-
-COBJS-$(CONFIG_SANDBOX) += command_ut.o
-COBJS-$(CONFIG_SANDBOX) += compression.o
-
-COBJS := $(sort $(COBJS-y))
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-all: $(LIB) $(XOBJS)
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+obj-$(CONFIG_SANDBOX) += command_ut.o
+obj-$(CONFIG_SANDBOX) += compression.o
#
HOSTCPPFLAGS = -include $(SRCTREE)/include/libfdt_env.h \
-idirafter $(SRCTREE)/include \
- -idirafter $(OBJTREE)/include2 \
+ -idirafter $(SRCTREE)/arch/$(ARCH)/include \
-idirafter $(OBJTREE)/include \
-I $(SRCTREE)/lib/libfdt \
-I $(SRCTREE)/tools \
# Compile for a hosted environment on the target
HOSTCPPFLAGS = -idirafter $(SRCTREE)/include \
- -idirafter $(OBJTREE)/include2 \
+ -idirafter $(SRCTREE)/arch/$(ARCH)/include \
-idirafter $(OBJTREE)/include \
-idirafter $(SRCTREE)/tools/env \
-DUSE_HOSTCC \
# Define __KERNEL_STRICT_NAMES to prevent typedef overlaps
#
HOSTCPPFLAGS = -idirafter $(SRCTREE)/include \
- -idirafter $(OBJTREE)/include2 \
+ -idirafter $(SRCTREE)/arch/$(ARCH)/include \
-idirafter $(OBJTREE)/include \
-I $(SRCTREE)/lib/libfdt \
-I $(SRCTREE)/tools \
projects / karo-tx-uboot.git / commitdiff