PPC4xx: Reduce NAND TLB window size on Canyonlands

16MiB NAND TLB window is way too big. Reduce it to 1KiB.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S
index 680feaa6a9671707422be623ea0654b79d4a77ff..8b7bfce6390b9ab02f8d36ee171e1c7182c62f83 100644 (file)
--- a/board/amcc/canyonlands/init.S
+++ b/board/amcc/canyonlands/init.S
@@ -80,7 +80,7 @@ tlbtab:
 
 #if !defined(CONFIG_ARCHES)
        /* TLB-entry for NAND */
-       tlbentry(CONFIG_SYS_NAND_ADDR, SZ_16M, CONFIG_SYS_NAND_ADDR, 4, AC_RWX | SA_IG)
+       tlbentry(CONFIG_SYS_NAND_ADDR, SZ_1K, CONFIG_SYS_NAND_ADDR, 4, AC_RWX | SA_IG)
 
        /* TLB-entry for CPLD */
        tlbentry(CONFIG_SYS_BCSR_BASE, SZ_1K, CONFIG_SYS_BCSR_BASE, 4, AC_RW | SA_IG)