if TARGET_TX6
-config MX6
- bool
- default y
-
-config MX6Q
- bool
-
-config MX6DL
- bool
-
-config MX6QDL
- bool
-
-config MX6S
- bool
-
-config MX6SL
- bool
-
-config MX6SX
- bool
-
config SYS_BOARD
default "tx6"
config SYS_CONFIG_NAME
default "tx6"
-config CMD_ROMUPDATE
- bool
-
config TX6
bool
default y
- select MX6
select CMD_BMP if LCD
select CMD_BOOTCE
select CMD_BOOTZ
select CMD_CACHE
select CMD_I2C if I2C
select CMD_MEMTEST
+ select CMD_MMC
select CMD_TIME
select DM
select DM_GPIO
+ select LIB_RAND
+ select PHYLIB
select SYS_I2C
select SYS_I2C_MXC
select GET_FEC_MAC_ADDR_FROM_IIM
+ select OF_BOARD_SETUP
select OF_LIBFDT
config TX6_NAND
select CMD_ROMUPDATE
select FDT_FIXUP_PARTITIONS if OF_LIBFDT
select MTD_PARTITIONS
- select NAND_MXS_NO_BBM_SWAP if NAND_MXS
- select SYS_NAND_USE_FLASH_BBT if NAND_MXS
+ select NAND
+ select NAND_MXS
+ select NAND_MXS_NO_BBM_SWAP
+ select SYS_NAND_USE_FLASH_BBT
select APBH_DMA
select APBH_DMA_BURST
select APBH_DMA_BURST8
config TARGET_TX6Q_10X0
bool "TX6Q-1010 and TX6Q-1030"
- select MX6Q
+ select SOC_MX6Q
config TARGET_TX6Q_1020
bool "TX6Q-1020"
- select MX6Q
+ select SOC_MX6Q
select TX6_EMMC
- select TX6_REV_2
config TARGET_TX6Q_11X0
bool "TX6Q-1110 and TX6Q-1130"
- select MX6Q
+ select SOC_MX6Q
select SYS_LVDS_IF
config TARGET_TX6S_8034
bool "TX6S-8034"
- select MX6S
+ select SOC_MX6S
select SYS_SDRAM_BUS_WIDTH_16
config TARGET_TX6S_8035
bool "TX6S-8035"
- select MX6S
+ select SOC_MX6S
select TX6_EMMC
select SYS_SDRAM_BUS_WIDTH_32
-config TARGET_TX6U_8010
+config TARGET_TX6U_80X0
bool "TX6U-8010 and TX6U-8030"
- select MX6DL
+ select SOC_MX6DL
config TARGET_TX6U_8011
bool "TX6U-8011"
- select MX6DL
+ select SOC_MX6DL
select SYS_SDRAM_BUS_WIDTH_32
- select TX6_REV_1
config TARGET_TX6U_8012
bool "TX6U-8012"
- select MX6DL
- select TX6_REV_1
+ select SOC_MX6DL
config TARGET_TX6U_81X0
bool "TX6U-8110 and TX6U-8130"
- select MX6DL
+ select SOC_MX6DL
select SYS_LVDS_IF
config TARGET_TX6U_8111
bool "TX6U-8111"
- select MX6DL
+ select SOC_MX6DL
select SYS_SDRAM_BUS_WIDTH_32
select SYS_LVDS_IF
- select TX6_REV_1
config TARGET_TX6U_8033
bool "TX6U-8033"
- select MX6DL
+ select SOC_MX6DL
select TX6_EMMC
- select TX6_REV_3
endchoice
};
static const iomux_v3_cfg_t const tx6qdl_pads[] = {
- MX6_PAD_GARBAGE,
-#ifdef CONFIG_TX6_NAND_
- /* NAND flash pads */
- MX6_PAD_NANDF_CLE__NAND_CLE,
- MX6_PAD_NANDF_ALE__NAND_ALE,
- MX6_PAD_NANDF_WP_B__NAND_RESETN,
- MX6_PAD_NANDF_RB0__NAND_READY0,
- MX6_PAD_NANDF_CS0__NAND_CE0N,
- MX6_PAD_SD4_CMD__NAND_RDN,
- MX6_PAD_SD4_CLK__NAND_WRN,
- MX6_PAD_NANDF_D0__NAND_D0,
- MX6_PAD_NANDF_D1__NAND_D1,
- MX6_PAD_NANDF_D2__NAND_D2,
- MX6_PAD_NANDF_D3__NAND_D3,
- MX6_PAD_NANDF_D4__NAND_D4,
- MX6_PAD_NANDF_D5__NAND_D5,
- MX6_PAD_NANDF_D6__NAND_D6,
- MX6_PAD_NANDF_D7__NAND_D7,
-#endif
/* RESET_OUT */
MX6_PAD_GPIO_17__GPIO7_IO12,
int board_early_init_f(void)
{
- gpio_request_array(tx6qdl_gpios, ARRAY_SIZE(tx6qdl_gpios));
- imx_iomux_v3_setup_multiple_pads(tx6qdl_pads, ARRAY_SIZE(tx6qdl_pads));
-
return 0;
}
{
int ret;
+ ret = gpio_request_array(tx6qdl_gpios, ARRAY_SIZE(tx6qdl_gpios));
+ if (ret < 0) {
+ printf("Failed to request tx6qdl_gpios: %d\n", ret);
+ }
+ imx_iomux_v3_setup_multiple_pads(tx6qdl_pads, ARRAY_SIZE(tx6qdl_pads));
+
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
gd->bd->bi_arch_number = -1;
#ifndef CONFIG_MX6_TEMPERATURE_HOT
tx6_temp_check_enabled = false;
#endif
- return 1;
+ return 0;
}
ret = tx6_pmic_init();
if (ret) {
- printf("Failed to setup PMIC voltages\n");
+ printf("Failed to setup PMIC voltages: %d\n", ret);
hang();
}
return 0;
{
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
- PHYS_SDRAM_1_SIZE);
+ PHYS_SDRAM_1_SIZE * CONFIG_NR_DRAM_BANKS);
return 0;
}
#endif
}
-#ifdef CONFIG_CMD_MMC
-#define SD_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+#ifdef CONFIG_FSL_ESDHC
+#define SD_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
PAD_CTL_SRE_FAST)
MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(SD_PAD_CTRL),
MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(SD_PAD_CTRL),
/* eMMC RESET */
- MX6_PAD_NANDF_ALE__SD4_RESET,
+ MX6_PAD_NANDF_ALE__SD4_RESET | MUX_PAD_CTRL(PAD_CTL_PUS_47K_UP |
+ PAD_CTL_DSE_40ohm),
};
#endif
.upper_margin = 2,
.vsync_len = 10,
.lower_margin = 2,
- .sync = FB_SYNC_CLK_LAT_FALL,
},
{
/* Emerging ET0500G0DH6 800 x 480 display.
*/
lcd_is_enabled = 0;
- karo_load_splashimage(1);
-
if (lcd_enabled) {
+ karo_load_splashimage(1);
+
debug("Switching LCD on\n");
gpio_set_value(TX6_LCD_PWR_GPIO, 1);
udelay(100);
static void stk5_board_init(void)
{
- gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
+ int ret;
+
+ ret = gpio_request_array(stk5_gpios, ARRAY_SIZE(stk5_gpios));
+ if (ret < 0) {
+ printf("Failed to request stk5_gpios: %d\n", ret);
+ return;
+ }
imx_iomux_v3_setup_multiple_pads(stk5_pads, ARRAY_SIZE(stk5_pads));
}
static void stk5v5_board_init(void)
{
+ int ret;
+
stk5_board_init();
- gpio_request_one(IMX_GPIO_NR(4, 21), GPIOFLAG_OUTPUT_INIT_HIGH,
+ ret = gpio_request_one(IMX_GPIO_NR(4, 21), GPIOFLAG_OUTPUT_INIT_HIGH,
"Flexcan Transceiver");
+ if (ret) {
+ printf("Failed to request Flexcan Transceiver GPIO: %d\n", ret);
+ return;
+ }
+
imx_iomux_v3_setup_pad(MX6_PAD_DISP0_DAT0__GPIO4_IO21);
}
#define CONFIG_SYS_SDRAM_CLK 400
#endif
#define CONFIG_STACKSIZE SZ_128K
+#define CONFIG_SPL_STACK (IRAM_BASE_ADDR + SZ_16K)
#define CONFIG_SYS_MALLOC_LEN SZ_8M
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 /* Memtest start address */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_4M)
"cpu_clk=800\0" \
"default_bootargs=set bootargs " CONFIG_BOOTARGS \
" ${append_bootargs}\0" \
+ EMMC_BOOT_PART_STR \
+ EMMC_BOOT_ACK_STR \
"fdtaddr=" xstr(CONFIG_FDTADDR) "\0" \
CONFIG_SYS_FDTSAVE_CMD \
"mtdids=" MTDIDS_DEFAULT "\0" \
#endif /* CONFIG_TX6_UBOOT_MFG */
#ifdef CONFIG_TX6_NAND
-#define CONFIG_SYS_DEFAULT_BOOT_MODE "nand"
+#define CONFIG_SYS_DEFAULT_BOOT_MODE "nand"
#define CONFIG_SYS_BOOT_CMD_NAND \
"bootcmd_nand=set autostart no;run bootargs_ubifs;nboot linux\0"
#define CONFIG_SYS_FDTSAVE_CMD \
#define MTDIDS_DEFAULT "nand0=" MTD_NAME
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define MMC_ROOT_STR " root=/dev/mmcblk0p2 rootwait\0"
-#define ROOTPART_UUID_STR ""
+#define ROOTPART_UUID_STR ""
+#define EMMC_BOOT_ACK_STR ""
+#define EMMC_BOOT_PART_STR ""
#else
-#define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc"
-#define CONFIG_SYS_BOOT_CMD_NAND ""
+#define CONFIG_SYS_DEFAULT_BOOT_MODE "mmc"
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
+#define CONFIG_SYS_BOOT_CMD_NAND ""
#define CONFIG_SYS_FDTSAVE_CMD \
- "fdtsave=mmc open 0 1;mmc write ${fdtaddr} " \
- xstr(CONFIG_SYS_DTB_BLKNO) " 80;mmc close 0 1\0"
-#define MMC_ROOT_STR " root=PARTUUID=${rootpart_uuid} rootwait\0"
-#define ROOTPART_UUID_STR "rootpart_uuid=0cc66cc0-02\0"
+ "fdtsave=mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} 1" \
+ ";mmc write ${fdtaddr} " xstr(CONFIG_SYS_DTB_BLKNO) " 80" \
+ ";mmc partconf 0 ${emmc_boot_ack} ${emmc_boot_part} 0\0"
#define MTD_NAME ""
#define MTDIDS_DEFAULT ""
-#ifdef CONFIG_SUPPORT_EMMC_BOOT
-#endif
+#define MMC_ROOT_STR " root=PARTUUID=${rootpart_uuid} rootwait\0"
+#define ROOTPART_UUID_STR "rootpart_uuid=0cc66cc0-02\0"
+#define EMMC_BOOT_ACK_STR "emmc_boot_ack=1\0"
+#define EMMC_BOOT_PART_STR "emmc_boot_part=" \
+ xstr(CONFIG_SYS_MMCSD_FS_BOOT_PARTITION) "\0"
#endif /* CONFIG_TX6_NAND */
/*
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#endif
#ifdef CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
#define CONFIG_CMD_EXT2
projects / karo-tx-uboot.git / commitdiff