mxs: introduce macro to define register banks with arbitrary pitch and use it for...

diff --git a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
index d3beb3a79d91dbe7a4e2152327f8688a94b5593f..1b6b8fb6cef445bfe4aba34cac07ea275f951473 100644 (file)
--- a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
+++ b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
@@ -31,11 +31,9 @@
 #ifndef        __ASSEMBLY__
 struct mxs_clkctrl_regs {
        mxs_reg_32(hw_clkctrl_pll0ctrl0);       /* 0x00 */
-       uint32_t        hw_clkctrl_pll0ctrl1;   /* 0x10 */
-       uint32_t        reserved_pll0ctrl1[3];  /* 0x14-0x1c */
+       reg_32(hw_clkctrl_pll0ctrl1, 4);        /* 0x10 */
        mxs_reg_32(hw_clkctrl_pll1ctrl0);       /* 0x20 */
-       uint32_t        hw_clkctrl_pll1ctrl1;   /* 0x30 */
-       uint32_t        reserved_pll1ctrl1[3];  /* 0x34-0x3c */
+       reg_32(hw_clkctrl_pll1ctrl1, 4);        /* 0x30 */
        mxs_reg_32(hw_clkctrl_pll2ctrl0);       /* 0x40 */
        mxs_reg_32(hw_clkctrl_cpu);             /* 0x50 */
        mxs_reg_32(hw_clkctrl_hbus);            /* 0x60 */
@@ -56,7 +54,7 @@ struct mxs_clkctrl_regs {
        mxs_reg_32(hw_clkctrl_hsadc);           /* 0x150 */
        mxs_reg_32(hw_clkctrl_flexcan);         /* 0x160 */
 
-       uint32_t        reserved[16];
+       reg_32(reserved[4], 4);
 
        mxs_reg_8(hw_clkctrl_frac0);            /* 0x1b0 */
        mxs_reg_8(hw_clkctrl_frac1);            /* 0x1c0 */

diff --git a/arch/arm/include/asm/arch-mxs/regs-common.h b/arch/arm/include/asm/arch-mxs/regs-common.h
index eaaad6c14964eff79467faa0b9eda50315e5795b..7d152406a46938b6dd12dd9c247a4c03f1ef0a50 100644 (file)
--- a/arch/arm/include/asm/arch-mxs/regs-common.h
+++ b/arch/arm/include/asm/arch-mxs/regs-common.h
@@ -59,6 +59,10 @@
        uint32_t name##_clr;            \
        uint32_t name##_tog
 
+#define __reg_32(name, pitch)                  \
+       uint32_t name;                          \
+       uint32_t reserved_##name[(pitch) - 1]
+
 struct mxs_register_8 {
        __mxs_reg_8(reg);
 };
@@ -79,4 +83,7 @@ struct mxs_register_32 {
                struct mxs_register_32 name##_reg;      \
        }
 
+#define        reg_32(name, pitch)                             \
+       struct { __reg_32(name, pitch); }
+
 #endif /* __MXS_REGS_COMMON_H__ */

diff --git a/arch/arm/include/asm/arch-mxs/regs-power-mx28.h b/arch/arm/include/asm/arch-mxs/regs-power-mx28.h
index bcbe9984cfe55b9869a6d3954730c9b934b40744..fdd5520fc6138cdb182c70c227f1cfc49c4ff623 100644 (file)
--- a/arch/arm/include/asm/arch-mxs/regs-power-mx28.h
+++ b/arch/arm/include/asm/arch-mxs/regs-power-mx28.h
@@ -30,28 +30,19 @@ struct mxs_power_regs {
        mxs_reg_32(hw_power_5vctrl);
        mxs_reg_32(hw_power_minpwr);
        mxs_reg_32(hw_power_charge);
-       uint32_t        hw_power_vdddctrl;
-       uint32_t        reserved_vddd[3];
-       uint32_t        hw_power_vddactrl;
-       uint32_t        reserved_vdda[3];
-       uint32_t        hw_power_vddioctrl;
-       uint32_t        reserved_vddio[3];
-       uint32_t        hw_power_vddmemctrl;
-       uint32_t        reserved_vddmem[3];
-       uint32_t        hw_power_dcdc4p2;
-       uint32_t        reserved_dcdc4p2[3];
-       uint32_t        hw_power_misc;
-       uint32_t        reserved_misc[3];
-       uint32_t        hw_power_dclimits;
-       uint32_t        reserved_dclimits[3];
+       reg_32(hw_power_vdddctrl, 4);
+       reg_32(hw_power_vddactrl, 4);
+       reg_32(hw_power_vddioctrl, 4);
+       reg_32(hw_power_vddmemctrl, 4);
+       reg_32(hw_power_dcdc4p2, 4);
+       reg_32(hw_power_misc, 4);
+       reg_32(hw_power_dclimits, 4);
        mxs_reg_32(hw_power_loopctrl);
-       uint32_t        hw_power_sts;
-       uint32_t        reserved_sts[3];
+       reg_32(hw_power_sts, 4);
        mxs_reg_32(hw_power_speed);
-       uint32_t        hw_power_battmonitor;
-       uint32_t        reserved_battmonitor[3];
+       reg_32(hw_power_battmonitor, 4);
 
-       uint32_t        reserved[4];
+       reg_32(reserved, 4);
 
        mxs_reg_32(hw_power_reset);
        mxs_reg_32(hw_power_debug);