]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
authorAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tue, 1 Jul 2014 13:11:18 +0000 (15:11 +0200)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tue, 1 Jul 2014 13:11:18 +0000 (15:11 +0200)
45 files changed:
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c
arch/arm/cpu/armv7/am33xx/ddr.c
arch/arm/cpu/armv7/keystone/Makefile
arch/arm/cpu/armv7/omap-common/mem-common.c
arch/arm/cpu/armv7/omap3/board.c
arch/arm/include/asm/arch-davinci/emif_defs.h [deleted file]
arch/arm/include/asm/arch-davinci/hardware.h
arch/arm/include/asm/arch-davinci/nand_defs.h [deleted file]
arch/arm/include/asm/arch-keystone/hardware-k2hk.h
arch/arm/include/asm/arch-keystone/hardware.h
arch/arm/include/asm/arch-keystone/nand_defs.h [deleted file]
arch/arm/include/asm/arch-tnetv107x/emif_defs.h [deleted file]
arch/arm/include/asm/arch-tnetv107x/hardware.h
arch/arm/include/asm/arch-tnetv107x/nand_defs.h [deleted file]
arch/arm/include/asm/ti-common/davinci_nand.h [moved from arch/arm/include/asm/arch-keystone/emif_defs.h with 56% similarity]
arch/arm/include/asm/ti-common/ti-aemif.h [new file with mode: 0644]
board/Barix/ipam390/ipam390.c
board/ait/cam_enc_4xx/cam_enc_4xx.c
board/davinci/da8xxevm/da830evm.c
board/davinci/da8xxevm/da850evm.c
board/davinci/dm355evm/dm355evm.c
board/davinci/dm355leopard/dm355leopard.c
board/davinci/dm365evm/dm365evm.c
board/davinci/dm6467evm/dm6467evm.c
board/davinci/ea20/ea20.c
board/davinci/sonata/sonata.c
board/enbw/enbw_cmc/enbw_cmc.c
board/omicron/calimain/calimain.c
board/overo/overo.c
board/ti/am43xx/board.c
board/ti/am43xx/board.h
board/ti/am43xx/mux.c
board/ti/k2hk_evm/board.c
board/ti/tnetv107xevm/sdb_board.c
drivers/Makefile
drivers/memory/Makefile [new file with mode: 0644]
drivers/memory/ti-aemif.c [moved from arch/arm/cpu/armv7/keystone/aemif.c with 63% similarity]
drivers/mtd/nand/davinci_nand.c
drivers/spi/davinci_spi.c
include/configs/am43xx_evm.h
include/configs/davinci_dm6467evm.h
include/configs/k2hk_evm.h
include/configs/omap3_overo.h
include/configs/ti_omap4_common.h

index b91e948ce3e1450cdf6e8129e2aa1132abcea200..19730cef8c08768ea861597786ada2951a781914 100644 (file)
@@ -14,7 +14,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/davinci_misc.h>
 #include <asm/arch/ddr2_defs.h>
-#include <asm/arch/emif_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/pll_defs.h>
 
 void davinci_enable_uart0(void)
index ee096fe7219afbeb0f26571164105f4c1c15c254..c8b44988d3c1aa0d90bd90b0e7127fd40e5582aa 100644 (file)
@@ -11,6 +11,7 @@
 #include <nand.h>
 #include <ns16550.h>
 #include <post.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/dm365_lowlevel.h>
 #include <asm/arch/hardware.h>
 
index 9a625c46613d4376e2f224863b531c9601823e06..bbe9d1a8deaabaf3020b7c240f5cac60501d57e0 100644 (file)
@@ -95,6 +95,7 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
               &emif_reg[nr]->emif_rd_wr_exec_thresh);
 
        writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
+       writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
        writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
        writel(regs->sdram_config, &cstat->secure_emif_sdram_config);
 
index b1bd0224eae39d29f11ed5e7de0d8e0577e0228f..c4af25211027a56f1adb332e3b71dc999b1c1c60 100644 (file)
@@ -5,7 +5,6 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y  += aemif.o
 obj-y  += init.o
 obj-y  += psc.o
 obj-y  += clock.o
index 944ef840a16178ec0e513eec501c99cdc57a167a..5bc7e1f19b3a7655dceedac811f53ec2aeae8723 100644 (file)
@@ -121,7 +121,8 @@ void gpmc_init(void)
        writel(0x00000008, &gpmc_cfg->sysconfig);
        writel(0x00000000, &gpmc_cfg->irqstatus);
        writel(0x00000000, &gpmc_cfg->irqenable);
-       writel(0x00000000, &gpmc_cfg->timeout_control);
+       /* disable timeout, set a safe reset value */
+       writel(0x00001ff0, &gpmc_cfg->timeout_control);
 #ifdef CONFIG_NOR
        writel(0x00000200, &gpmc_cfg->config);
 #else
@@ -133,5 +134,6 @@ void gpmc_init(void)
        writel(0, &gpmc_cfg->cs[0].config7);
        sdelay(1000);
        /* enable chip-select specific configurations */
-       enable_gpmc_cs_config(gpmc_regs, &gpmc_cfg->cs[0], base, size);
+       if (base != 0)
+               enable_gpmc_cs_config(gpmc_regs, &gpmc_cfg->cs[0], base, size);
 }
index e252e7fd950604375917b9670201fba12d02bcf3..667e77ff05ba22429fdf101e0884856e5eb54e62 100644 (file)
@@ -147,7 +147,7 @@ void secure_unlock_mem(void)
  *             configure secure registers and exit secure world
  *              general use.
  *****************************************************************************/
-void secureworld_exit()
+void secureworld_exit(void)
 {
        unsigned long i;
 
@@ -178,7 +178,7 @@ void secureworld_exit()
  * Description: If chip is GP/EMU(special) type, unlock the SRAM for
  *              general use.
  *****************************************************************************/
-void try_unlock_memory()
+void try_unlock_memory(void)
 {
        int mode;
        int in_sdram = is_running_in_sdram();
diff --git a/arch/arm/include/asm/arch-davinci/emif_defs.h b/arch/arm/include/asm/arch-davinci/emif_defs.h
deleted file mode 100644 (file)
index 7e19cfe..0000000
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-#ifndef _EMIF_DEFS_H_
-#define _EMIF_DEFS_H_
-
-#include <asm/arch/hardware.h>
-
-struct davinci_emif_regs {
-       u_int32_t       ercsr;
-       u_int32_t       awccr;
-       u_int32_t       sdbcr;
-       u_int32_t       sdrcr;
-       u_int32_t       ab1cr;
-       u_int32_t       ab2cr;
-       u_int32_t       ab3cr;
-       u_int32_t       ab4cr;
-       u_int32_t       sdtimr;
-       u_int32_t       ddrsr;
-       u_int32_t       ddrphycr;
-       u_int32_t       ddrphysr;
-       u_int32_t       totar;
-       u_int32_t       totactr;
-       u_int32_t       ddrphyid_rev;
-       u_int32_t       sdsretr;
-       u_int32_t       eirr;
-       u_int32_t       eimr;
-       u_int32_t       eimsr;
-       u_int32_t       eimcr;
-       u_int32_t       ioctrlr;
-       u_int32_t       iostatr;
-       u_int8_t        rsvd0[8];
-       u_int32_t       nandfcr;
-       u_int32_t       nandfsr;
-       u_int8_t        rsvd1[8];
-       u_int32_t       nandfecc[4];
-       u_int8_t        rsvd2[60];
-       u_int32_t       nand4biteccload;
-       u_int32_t       nand4bitecc[4];
-       u_int32_t       nanderradd1;
-       u_int32_t       nanderradd2;
-       u_int32_t       nanderrval1;
-       u_int32_t       nanderrval2;
-};
-
-#define davinci_emif_regs \
-       ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
-
-#define DAVINCI_NANDFCR_NAND_ENABLE(n)                 (1 << (n-2))
-#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK              (3 << 4)
-#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n)                        ((n-2) << 4)
-#define DAVINCI_NANDFCR_1BIT_ECC_START(n)              (1 << (8 + (n-2)))
-#define DAVINCI_NANDFCR_4BIT_ECC_START                 (1 << 12)
-#define DAVINCI_NANDFCR_4BIT_CALC_START                        (1 << 13)
-#define DAVINCI_NANDFCR_CS2NAND                                (1 << 0)
-
-/* Chip Select setup */
-#define DAVINCI_ABCR_STROBE_SELECT                     (1 << 31)
-#define DAVINCI_ABCR_EXT_WAIT                          (1 << 30)
-#define DAVINCI_ABCR_WSETUP(n)                         (n << 26)
-#define DAVINCI_ABCR_WSTROBE(n)                                (n << 20)
-#define DAVINCI_ABCR_WHOLD(n)                          (n << 17)
-#define DAVINCI_ABCR_RSETUP(n)                         (n << 13)
-#define DAVINCI_ABCR_RSTROBE(n)                                (n << 7)
-#define DAVINCI_ABCR_RHOLD(n)                          (n << 4)
-#define DAVINCI_ABCR_TA(n)                             (n << 2)
-#define DAVINCI_ABCR_ASIZE_16BIT                       1
-#define DAVINCI_ABCR_ASIZE_8BIT                                0
-
-#endif
index 98fe56e68653023b4c30695ee4859fee36ac792a..a4eb0bd89b0fe2d2805ffece16a4f15865837791 100644 (file)
@@ -597,7 +597,6 @@ static inline enum davinci_clk_ids get_async3_src(void)
 #if defined(CONFIG_SOC_DM365)
 #include <asm/arch/aintc_defs.h>
 #include <asm/arch/ddr2_defs.h>
-#include <asm/arch/emif_defs.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pll_defs.h>
 #include <asm/arch/psc_defs.h>
diff --git a/arch/arm/include/asm/arch-davinci/nand_defs.h b/arch/arm/include/asm/arch-davinci/nand_defs.h
deleted file mode 100644 (file)
index dee1c6f..0000000
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * Parts shamelesly stolen from Linux Kernel source tree.
- *
- * ------------------------------------------------------------
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-#ifndef _NAND_DEFS_H_
-#define _NAND_DEFS_H_
-
-#include <asm/arch/hardware.h>
-
-#ifdef CONFIG_SOC_DM646X
-#define        MASK_CLE        0x80000
-#define        MASK_ALE        0x40000
-#else
-#define        MASK_CLE        0x10
-#define        MASK_ALE        0x08
-#endif
-
-#ifdef CONFIG_SYS_NAND_MASK_CLE
-#undef MASK_CLE
-#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE
-#endif
-#ifdef CONFIG_SYS_NAND_MASK_ALE
-#undef MASK_ALE
-#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE
-#endif
-
-#define NAND_READ_START                0x00
-#define NAND_READ_END          0x30
-#define NAND_STATUS            0x70
-
-extern void davinci_nand_init(struct nand_chip *nand);
-
-#endif
index 7ac2662f1fb258fca83e873ef336d64d9e10a47b..50ce649d4c006b8b1c58d0831c4bb625f089883c 100644 (file)
@@ -9,13 +9,6 @@
 #ifndef __ASM_ARCH_HARDWARE_K2HK_H
 #define __ASM_ARCH_HARDWARE_K2HK_H
 
-#define K2HK_ASYNC_EMIF_CNTRL_BASE      0x21000a00
-#define DAVINCI_ASYNC_EMIF_CNTRL_BASE   K2HK_ASYNC_EMIF_CNTRL_BASE
-#define K2HK_ASYNC_EMIF_DATA_CE0_BASE   0x30000000
-#define K2HK_ASYNC_EMIF_DATA_CE1_BASE   0x34000000
-#define K2HK_ASYNC_EMIF_DATA_CE2_BASE   0x38000000
-#define K2HK_ASYNC_EMIF_DATA_CE3_BASE   0x3c000000
-
 #define K2HK_PLL_CNTRL_BASE             0x02310000
 #define CLOCK_BASE                      K2HK_PLL_CNTRL_BASE
 #define KS2_RSTCTRL                     (K2HK_PLL_CNTRL_BASE + 0xe8)
index 6c532ca8700bfffad852e90ea1eaf7064ffb1165..ffdecbfcd6d1cea690fd7e14af8521dcc093e283 100644 (file)
 typedef volatile unsigned int   dv_reg;
 typedef volatile unsigned int   *dv_reg_p;
 
-#define ASYNC_EMIF_NUM_CS               4
-#define ASYNC_EMIF_MODE_NOR             0
-#define ASYNC_EMIF_MODE_NAND            1
-#define ASYNC_EMIF_MODE_ONENAND         2
-#define ASYNC_EMIF_PRESERVE             -1
-
-struct async_emif_config {
-       unsigned mode;
-       unsigned select_strobe;
-       unsigned extend_wait;
-       unsigned wr_setup;
-       unsigned wr_strobe;
-       unsigned wr_hold;
-       unsigned rd_setup;
-       unsigned rd_strobe;
-       unsigned rd_hold;
-       unsigned turn_around;
-       enum {
-               ASYNC_EMIF_8    = 0,
-               ASYNC_EMIF_16   = 1,
-               ASYNC_EMIF_32   = 2,
-       } width;
-};
-
-void init_async_emif(int num_cs, struct async_emif_config *config);
-
 struct ddr3_phy_config {
        unsigned int pllcr;
        unsigned int pgcr1_mask;
@@ -145,6 +119,10 @@ struct ddr3_emif_config {
 #define KS2_UART0_BASE                 0x02530c00
 #define KS2_UART1_BASE                 0x02531000
 
+/* AEMIF */
+#define KS2_AEMIF_CNTRL_BASE           0x21000a00
+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE   KS2_AEMIF_CNTRL_BASE
+
 #ifdef CONFIG_SOC_K2HK
 #include <asm/arch/hardware-k2hk.h>
 #endif
diff --git a/arch/arm/include/asm/arch-keystone/nand_defs.h b/arch/arm/include/asm/arch-keystone/nand_defs.h
deleted file mode 100644 (file)
index 58417db..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * nand driver definitions to re-use davinci nand driver on Keystone2
- *
- * (C) Copyright 2012-2014
- *     Texas Instruments Incorporated, <www.ti.com>
- * (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-#ifndef _NAND_DEFS_H_
-#define _NAND_DEFS_H_
-
-#include <asm/arch/hardware.h>
-#include <linux/mtd/nand.h>
-
-#define MASK_CLE         0x4000
-#define        MASK_ALE         0x2000
-
-#define NAND_READ_START  0x00
-#define NAND_READ_END    0x30
-#define NAND_STATUS      0x70
-
-#endif
diff --git a/arch/arm/include/asm/arch-tnetv107x/emif_defs.h b/arch/arm/include/asm/arch-tnetv107x/emif_defs.h
deleted file mode 100644 (file)
index 9969a01..0000000
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm/arch-davinci/emif_defs.h>
index 2a7ca4e00c137872682e7bbfc52cab39e071ce42..d458e0bdf0909654cec8a0fe6682af30802214b4 100644 (file)
@@ -155,4 +155,6 @@ int wdt_kick(void);
 #define INTC_HINT_EN                   (TNETV107X_INTC_BASE + 0x1500)
 #define INTC_EN_CLR0                   (TNETV107X_INTC_BASE + 0x380)
 
+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE  TNETV107X_ASYNC_EMIF_CNTRL_BASE
+
 #endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/arch-tnetv107x/nand_defs.h b/arch/arm/include/asm/arch-tnetv107x/nand_defs.h
deleted file mode 100644 (file)
index b298fba..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * TNETV107X: NAND definitions
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-#ifndef _NAND_DEFS_H_
-#define _NAND_DEFS_H_
-
-#include <asm/arch/hardware.h>
-#include <asm/arch/emif_defs.h>
-
-#define DAVINCI_ASYNC_EMIF_CNTRL_BASE  TNETV107X_ASYNC_EMIF_CNTRL_BASE
-
-#define        MASK_CLE                0x4000
-#define        MASK_ALE                0x2000
-
-#define NAND_READ_START                0x00
-#define NAND_READ_END          0x30
-#define NAND_STATUS            0x70
-
-extern void davinci_nand_init(struct nand_chip *nand);
-
-#endif
similarity index 56%
rename from arch/arm/include/asm/arch-keystone/emif_defs.h
rename to arch/arm/include/asm/ti-common/davinci_nand.h
index a3378aa30e8ee2c5bc29494d3eee942e8cd0655a..11407be14464fdb36e370cb63b6d6f0b9bce9d9b 100644 (file)
@@ -1,23 +1,45 @@
 /*
- * emif definitions to re-use davinci emif driver on Keystone2
+ * NAND Flash Driver
  *
- * (C) Copyright 2012-2014
- *     Texas Instruments Incorporated, <www.ti.com>
- * (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
+ * Copyright (C) 2006-2014 Texas Instruments.
  *
- * SPDX-License-Identifier:     GPL-2.0+
+ * Based on Linux DaVinci NAND driver by TI.
  */
-#ifndef _EMIF_DEFS_H_
-#define _EMIF_DEFS_H_
 
+#ifndef _DAVINCI_NAND_H_
+#define _DAVINCI_NAND_H_
+
+#include <linux/mtd/nand.h>
 #include <asm/arch/hardware.h>
 
+#define NAND_READ_START        0x00
+#define NAND_READ_END          0x30
+#define NAND_STATUS            0x70
+
+#define MASK_CLE               0x10
+#define MASK_ALE               0x08
+
+#ifdef CONFIG_SYS_NAND_MASK_CLE
+#undef MASK_CLE
+#define MASK_CLE CONFIG_SYS_NAND_MASK_CLE
+#endif
+#ifdef CONFIG_SYS_NAND_MASK_ALE
+#undef MASK_ALE
+#define MASK_ALE CONFIG_SYS_NAND_MASK_ALE
+#endif
+
 struct davinci_emif_regs {
        uint32_t        ercsr;
        uint32_t        awccr;
        uint32_t        sdbcr;
        uint32_t        sdrcr;
-       uint32_t        abncr[4];
+       union {
+               uint32_t abncr[4];
+               uint32_t ab1cr;
+               uint32_t ab2cr;
+               uint32_t ab3cr;
+               uint32_t ab4cr;
+       };
        uint32_t        sdtimr;
        uint32_t        ddrsr;
        uint32_t        ddrphycr;
@@ -56,18 +78,21 @@ struct davinci_emif_regs {
 #define DAVINCI_NANDFCR_1BIT_ECC_START(n)              (1 << (8 + ((n) - 2)))
 #define DAVINCI_NANDFCR_4BIT_ECC_START                 (1 << 12)
 #define DAVINCI_NANDFCR_4BIT_CALC_START                        (1 << 13)
+#define DAVINCI_NANDFCR_CS2NAND                                (1 << 0)
 
 /* Chip Select setup */
 #define DAVINCI_ABCR_STROBE_SELECT                     (1 << 31)
 #define DAVINCI_ABCR_EXT_WAIT                          (1 << 30)
-#define DAVINCI_ABCR_WSETUP(n)                         ((n) << 26)
-#define DAVINCI_ABCR_WSTROBE(n)                                ((n) << 20)
-#define DAVINCI_ABCR_WHOLD(n)                          ((n) << 17)
-#define DAVINCI_ABCR_RSETUP(n)                         ((n) << 13)
-#define DAVINCI_ABCR_RSTROBE(n)                                ((n) << 7)
-#define DAVINCI_ABCR_RHOLD(n)                          ((n) << 4)
-#define DAVINCI_ABCR_TA(n)                             ((n) << 2)
+#define DAVINCI_ABCR_WSETUP(n)                         (n << 26)
+#define DAVINCI_ABCR_WSTROBE(n)                                (n << 20)
+#define DAVINCI_ABCR_WHOLD(n)                          (n << 17)
+#define DAVINCI_ABCR_RSETUP(n)                         (n << 13)
+#define DAVINCI_ABCR_RSTROBE(n)                                (n << 7)
+#define DAVINCI_ABCR_RHOLD(n)                          (n << 4)
+#define DAVINCI_ABCR_TA(n)                             (n << 2)
 #define DAVINCI_ABCR_ASIZE_16BIT                       1
 #define DAVINCI_ABCR_ASIZE_8BIT                                0
 
+void davinci_nand_init(struct nand_chip *nand);
+
 #endif
diff --git a/arch/arm/include/asm/ti-common/ti-aemif.h b/arch/arm/include/asm/ti-common/ti-aemif.h
new file mode 100644 (file)
index 0000000..4a311d4
--- /dev/null
@@ -0,0 +1,39 @@
+/*
+ * AEMIF definitions
+ *
+ * (C) Copyright 2012-2014
+ *     Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef _AEMIF_H_
+#define _AEMIF_H_
+
+#define AEMIF_NUM_CS               4
+#define AEMIF_MODE_NOR             0
+#define AEMIF_MODE_NAND            1
+#define AEMIF_MODE_ONENAND         2
+#define AEMIF_PRESERVE             -1
+
+struct aemif_config {
+       unsigned mode;
+       unsigned select_strobe;
+       unsigned extend_wait;
+       unsigned wr_setup;
+       unsigned wr_strobe;
+       unsigned wr_hold;
+       unsigned rd_setup;
+       unsigned rd_strobe;
+       unsigned rd_hold;
+       unsigned turn_around;
+       enum {
+               AEMIF_WIDTH_8   = 0,
+               AEMIF_WIDTH_16  = 1,
+               AEMIF_WIDTH_32  = 2,
+       } width;
+};
+
+void aemif_init(int num_cs, struct aemif_config *config);
+
+#endif
index ae88b4230a2deb384152c8edb36c8e22835a61a3..6ce8960bbd647ca030dae6c0cd18966eb549ef2c 100644 (file)
@@ -20,7 +20,7 @@
 #include <spi.h>
 #include <spi_flash.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/emif_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/emac_defs.h>
 #include <asm/arch/pinmux_defs.h>
 #include <asm/io.h>
index 9aa1d7aece41f56fa1451f18e23274b9a84eaeba..290dc1984ab3a9508e2dc3a2b6c0e393838691c3 100644 (file)
@@ -16,7 +16,7 @@
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/nand_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/davinci_misc.h>
 #ifdef CONFIG_DAVINCI_MMC
 #include <mmc.h>
index 4f5c780e549cb13923eb7dbb064e0096d54f4ea9..c40587ff0981d0b6fc2cce785c465976fe7b36e8 100644 (file)
 #include <net.h>
 #include <netdev.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/emif_defs.h>
 #include <asm/arch/emac_defs.h>
 #include <asm/arch/pinmux_defs.h>
 #include <asm/io.h>
 #include <nand.h>
-#include <asm/arch/nand_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/davinci_misc.h>
 
 #ifdef CONFIG_DAVINCI_MMC
index 85b483096b3b481c07e9509892d66f364896e7e0..b9ca38e9293dd8b2e0c1fbe244833691cc2cc09f 100644 (file)
@@ -16,7 +16,7 @@
 #include <spi.h>
 #include <spi_flash.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/emif_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/emac_defs.h>
 #include <asm/arch/pinmux_defs.h>
 #include <asm/io.h>
index 10422b226b89ee11ef2dfa3c8eba000c2f997d41..e5a958f7e0cb9c077e84117859113dd27c868efc 100644 (file)
@@ -8,8 +8,7 @@
 #include <nand.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/emif_defs.h>
-#include <asm/arch/nand_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/davinci_misc.h>
 #include <net.h>
 #include <netdev.h>
index 534184329cb538e098094a9bffc416c4e2fd90f3..53902f996c769074d01189c7b04e2f651c2c6013 100644 (file)
@@ -9,7 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/nand_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/davinci_misc.h>
 #include <net.h>
 #include <netdev.h>
index ceffd4d6038e0b6b164fb1e5476060a792841628..24bec56d5687e5169cb5508d0cf01052a1601017 100644 (file)
@@ -8,8 +8,7 @@
 #include <nand.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/emif_defs.h>
-#include <asm/arch/nand_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/gpio.h>
 #include <netdev.h>
 #include <asm/arch/davinci_misc.h>
index 469c9bac4b2fc580036315d916252557908576b6..e51cc9e63892bef2f2e30a204715dc83a5e2b43c 100644 (file)
@@ -8,7 +8,8 @@
 #include <netdev.h>
 #include <asm/io.h>
 #include <nand.h>
-#include <asm/arch/nand_defs.h>
+#include <asm/arch/hardware.h>
+#include <asm/ti-common/davinci_nand.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
index c4444c7c7f549cd2cb1f24e8cc3619e3a0c24f00..66804d75bd045d9a01a01f400cabbdc9abc7be5a 100644 (file)
@@ -19,7 +19,7 @@
 #include <net.h>
 #include <netdev.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/emif_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/emac_defs.h>
 #include <asm/io.h>
 #include <asm/arch/davinci_misc.h>
index aa04041246fa8ab37460f0de6a0174266332f3d1..f5c3258de563326bb02a5d8d498d9e2fef87dcc1 100644 (file)
@@ -14,7 +14,7 @@
 
 #include <common.h>
 #include <nand.h>
-#include <asm/arch/nand_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/davinci_misc.h>
 
index 39efe20bfdf49b836edf0f1cce4332db13372157..53b83621473239e2ce5739c7c00ce38099696768 100644 (file)
@@ -29,7 +29,7 @@
 #include <asm/io.h>
 #include <asm/arch/da850_lowlevel.h>
 #include <asm/arch/davinci_misc.h>
-#include <asm/arch/emif_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/emac_defs.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux_defs.h>
index dd28915cdc4c3cfce048c2dff7a6fcc54f96ea93..32f2b20183833b88d464877b5d20aaa6365e5e51 100644 (file)
@@ -18,7 +18,7 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/emif_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/emac_defs.h>
 #include <asm/arch/pinmux_defs.h>
 #include <asm/arch/davinci_misc.h>
index 62b50a8a0bb62a651ab9b61baab00888c263c413..13220c56dd0634dc8a1cee9538fda0dafae2302c 100644 (file)
@@ -267,12 +267,14 @@ int misc_init_r(void)
                        expansion_config.revision,
                        expansion_config.fab_revision);
                setenv("defaultdisplay", "dvi");
+               setenv("expansionname", "summit");
                break;
        case GUMSTIX_TOBI:
                printf("Recognized Tobi expansion board (rev %d %s)\n",
                        expansion_config.revision,
                        expansion_config.fab_revision);
                setenv("defaultdisplay", "dvi");
+               setenv("expansionname", "tobi");
                break;
        case GUMSTIX_TOBI_DUO:
                printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
@@ -293,12 +295,14 @@ int misc_init_r(void)
                        expansion_config.revision,
                        expansion_config.fab_revision);
                setenv("defaultdisplay", "lcd43");
+               setenv("expansionname", "palo43");
                break;
        case GUMSTIX_CHESTNUT43:
                printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
                        expansion_config.revision,
                        expansion_config.fab_revision);
                setenv("defaultdisplay", "lcd43");
+               setenv("expansionname", "chestnut43");
                break;
        case GUMSTIX_PINTO:
                printf("Recognized Pinto expansion board (rev %d %s)\n",
@@ -310,6 +314,7 @@ int misc_init_r(void)
                        expansion_config.revision,
                        expansion_config.fab_revision);
                setenv("defaultdisplay", "lcd43");
+               setenv("expansionname", "gallop43");
                break;
        case GUMSTIX_ALTO35:
                printf("Recognized Alto35 expansion board (rev %d %s)\n",
@@ -317,6 +322,7 @@ int misc_init_r(void)
                        expansion_config.fab_revision);
                MUX_ALTO35();
                setenv("defaultdisplay", "lcd35");
+               setenv("expansionname", "alto35");
                break;
        case GUMSTIX_STAGECOACH:
                printf("Recognized Stagecoach expansion board (rev %d %s)\n",
@@ -349,8 +355,11 @@ int misc_init_r(void)
                break;
        case GUMSTIX_NO_EEPROM:
                puts("No EEPROM on expansion board\n");
+               setenv("expansionname", "tobi");
                break;
        default:
+               if (expansion_id == 0x0)
+                       setenv("expansionname", "tobi");
                printf("Unrecognized expansion board 0x%08x\n", expansion_id);
                break;
        }
@@ -360,6 +369,11 @@ int misc_init_r(void)
 
        dieid_num_r();
 
+       if (get_cpu_family() == CPU_OMAP34XX)
+               setenv("boardname", "overo");
+       else
+               setenv("boardname", "overo-storm");
+
        return 0;
 }
 
index 71af1ae7c8998b781e32f58b4770f950c89bc3d1..054a452eac353e79f11a40fa686bf30a20fa1b60 100644 (file)
@@ -217,6 +217,28 @@ const struct emif_regs ddr3_emif_regs_400Mhz = {
        .emif_rd_wr_exec_thresh         = 0x00000405
 };
 
+static const struct emif_regs ddr3_sk_emif_regs_400Mhz = {
+       .sdram_config                   = 0x638413b2,
+       .sdram_config2                  = 0x00000000,
+       .ref_ctrl                       = 0x00000c30,
+       .sdram_tim1                     = 0xeaaad4db,
+       .sdram_tim2                     = 0x266b7fda,
+       .sdram_tim3                     = 0x107f8678,
+       .read_idle_ctrl                 = 0x00050000,
+       .zq_config                      = 0x50074be4,
+       .temp_alert_config              = 0x0,
+       .emif_ddr_phy_ctlr_1            = 0x0e084008,
+       .emif_ddr_ext_phy_ctrl_1        = 0x08020080,
+       .emif_ddr_ext_phy_ctrl_2        = 0x89,
+       .emif_ddr_ext_phy_ctrl_3        = 0x90,
+       .emif_ddr_ext_phy_ctrl_4        = 0x8e,
+       .emif_ddr_ext_phy_ctrl_5        = 0x8d,
+       .emif_rd_wr_lvl_rmp_win         = 0x0,
+       .emif_rd_wr_lvl_rmp_ctl         = 0x00000000,
+       .emif_rd_wr_lvl_ctl             = 0x00000000,
+       .emif_rd_wr_exec_thresh         = 0x00000000,
+};
+
 const u32 ext_phy_ctrl_const_base_ddr3[] = {
        0x00400040,
        0x00350035,
@@ -240,6 +262,48 @@ const u32 ext_phy_ctrl_const_base_ddr3[] = {
        0x08102040
 };
 
+static const u32 ext_phy_ctrl_const_base_ddr3_sk[] = {
+       /* first 5 are taken care by emif_regs */
+       0x00700070,
+
+       0x00350035,
+       0x00350035,
+       0x00350035,
+       0x00350035,
+       0x00350035,
+
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+
+       0x00150015,
+       0x00150015,
+       0x00150015,
+       0x00150015,
+       0x00150015,
+
+       0x00800080,
+       0x00800080,
+
+       0x40000000,
+
+       0x08102040,
+
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+       0x00000000,
+};
+
 void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size)
 {
        if (board_is_eposevm()) {
@@ -248,6 +312,9 @@ void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size)
        } else if (board_is_gpevm()) {
                *regs = ext_phy_ctrl_const_base_ddr3;
                *size = ARRAY_SIZE(ext_phy_ctrl_const_base_ddr3);
+       } else if (board_is_sk()) {
+               *regs = ext_phy_ctrl_const_base_ddr3_sk;
+               *size = ARRAY_SIZE(ext_phy_ctrl_const_base_ddr3_sk);
        }
 
        return;
@@ -257,10 +324,10 @@ const struct dpll_params *get_dpll_ddr_params(void)
 {
        if (board_is_eposevm())
                return &epos_evm_dpll_ddr;
-       else if (board_is_gpevm())
+       else if (board_is_gpevm() || board_is_sk())
                return &gp_evm_dpll_ddr;
 
-       puts(" Board not supported\n");
+       printf(" Board '%s' not supported\n", am43xx_board_name);
        return NULL;
 }
 
@@ -410,6 +477,9 @@ void sdram_init(void)
                enable_vtt_regulator();
                config_ddr(0, &ioregs_ddr3, NULL, NULL,
                           &ddr3_emif_regs_400Mhz, 0);
+       } else if (board_is_sk()) {
+               config_ddr(400, &ioregs_ddr3, NULL, NULL,
+                          &ddr3_sk_emif_regs_400Mhz, 0);
        }
 }
 #endif
@@ -524,6 +594,11 @@ int board_eth_init(bd_t *bis)
                writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
                cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
                cpsw_slaves[0].phy_addr = 16;
+       } else if (board_is_sk()) {
+               writel(RGMII_MODE_ENABLE, &cdev->miisel);
+               cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
+               cpsw_slaves[0].phy_addr = 4;
+               cpsw_slaves[1].phy_addr = 5;
        } else {
                writel(RGMII_MODE_ENABLE, &cdev->miisel);
                cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
index 091162ee20ff8ff9b49f571e483d43775e300f2a..017047d2d0513ead355869a121d3008bbd40fbf7 100644 (file)
@@ -47,6 +47,11 @@ static inline int board_is_gpevm(void)
        return !strncmp(am43xx_board_name, "AM43__GP", HDR_NAME_LEN);
 }
 
+static inline int board_is_sk(void)
+{
+       return !strncmp(am43xx_board_name, "AM43__SK", HDR_NAME_LEN);
+}
+
 void enable_uart0_pin_mux(void);
 void enable_board_pin_mux(void);
 void enable_i2c0_pin_mux(void);
index 77c53d2e90edc481264dcec44adf6704fb5e3dde..50967e1a82b74ac318be74a60680fd05f90b3ce0 100644 (file)
@@ -97,6 +97,9 @@ void enable_board_pin_mux(void)
        if (board_is_gpevm()) {
                configure_module_pin_mux(gpio5_7_pin_mux);
                configure_module_pin_mux(rgmii1_pin_mux);
+       } else if (board_is_sk()) {
+               configure_module_pin_mux(rgmii1_pin_mux);
+               configure_module_pin_mux(qspi_pin_mux);
        } else if (board_is_eposevm()) {
                configure_module_pin_mux(rmii1_pin_mux);
                configure_module_pin_mux(qspi_pin_mux);
index dc39139565f9bcaa72e129d6cc8bb4a744c2a196..ef90f9d821396c17c7702b39822646e58d9046fb 100644 (file)
@@ -16,9 +16,9 @@
 #include <asm/arch/clock.h>
 #include <asm/io.h>
 #include <asm/mach-types.h>
-#include <asm/arch/nand_defs.h>
 #include <asm/arch/emac_defs.h>
 #include <asm/arch/psc_defs.h>
+#include <asm/ti-common/ti-aemif.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -40,9 +40,9 @@ unsigned int external_clk[ext_clk_count] = {
                                                what is that */
 };
 
-static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = {
+static struct aemif_config aemif_configs[] = {
        {                       /* CS0 */
-               .mode           = ASYNC_EMIF_MODE_NAND,
+               .mode           = AEMIF_MODE_NAND,
                .wr_setup       = 0xf,
                .wr_strobe      = 0x3f,
                .wr_hold        = 7,
@@ -50,7 +50,7 @@ static struct async_emif_config async_emif_config[ASYNC_EMIF_NUM_CS] = {
                .rd_strobe      = 0x3f,
                .rd_hold        = 7,
                .turn_around    = 3,
-               .width          = ASYNC_EMIF_8,
+               .width          = AEMIF_WIDTH_8,
        },
 
 };
@@ -67,7 +67,7 @@ int dram_init(void)
 
        gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
                                    CONFIG_MAX_RAM_BANK_SIZE);
-       init_async_emif(ARRAY_SIZE(async_emif_config), async_emif_config);
+       aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
        return 0;
 }
 
index a95434b5efe391ff90dad18dbca75fbde04e95da..a84ec84baeb0f803f7746107f194435135280691 100644 (file)
@@ -11,7 +11,7 @@
 #include <asm/arch/clock.h>
 #include <asm/io.h>
 #include <asm/mach-types.h>
-#include <asm/arch/nand_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 #include <asm/arch/mux.h>
 
 DECLARE_GLOBAL_DATA_PTR;
index 5d03f37a187b8fb5f112578ff69043ea2d0135ce..b23076f614a0fdac02c17cb19c3dcb45bcd90a68 100644 (file)
@@ -14,3 +14,4 @@ obj-y += twserial/
 obj-y += video/
 obj-y += watchdog/
 obj-$(CONFIG_QE) += qe/
+obj-y += memory/
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
new file mode 100644 (file)
index 0000000..9bfb9c7
--- /dev/null
@@ -0,0 +1 @@
+obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
similarity index 63%
rename from arch/arm/cpu/armv7/keystone/aemif.c
rename to drivers/memory/ti-aemif.c
index 9b26886dba69cfa0c400b3df1018a256dd5446d3..f821daea4e1438f2535126716d67246d3b485e91 100644 (file)
@@ -8,9 +8,13 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/emif_defs.h>
+#include <asm/ti-common/ti-aemif.h>
+
+#define AEMIF_WAITCYCLE_CONFIG         (CONFIG_AEMIF_CNTRL_BASE + 0x4)
+#define AEMIF_NAND_CONTROL             (CONFIG_AEMIF_CNTRL_BASE + 0x60)
+#define AEMIF_ONENAND_CONTROL          (CONFIG_AEMIF_CNTRL_BASE + 0x5c)
+#define AEMIF_CONFIG(cs)               (CONFIG_AEMIF_CNTRL_BASE + 0x10 \
+                                        + (cs * 4))
 
 #define AEMIF_CFG_SELECT_STROBE(v)     ((v) ? 1 << 31 : 0)
 #define AEMIF_CFG_EXTEND_WAIT(v)       ((v) ? 1 << 30 : 0)
                }                                               \
        } while (0)
 
-void configure_async_emif(int cs, struct async_emif_config *cfg)
+static void aemif_configure(int cs, struct aemif_config *cfg)
 {
        unsigned long tmp;
 
-       if (cfg->mode == ASYNC_EMIF_MODE_NAND) {
-               tmp = __raw_readl(&davinci_emif_regs->nandfcr);
+       if (cfg->mode == AEMIF_MODE_NAND) {
+               tmp = __raw_readl(AEMIF_NAND_CONTROL);
                tmp |= (1 << cs);
-               __raw_writel(tmp, &davinci_emif_regs->nandfcr);
+               __raw_writel(tmp, AEMIF_NAND_CONTROL);
 
-       } else if (cfg->mode == ASYNC_EMIF_MODE_ONENAND) {
-               tmp = __raw_readl(&davinci_emif_regs->one_nand_cr);
+       } else if (cfg->mode == AEMIF_MODE_ONENAND) {
+               tmp = __raw_readl(AEMIF_ONENAND_CONTROL);
                tmp |= (1 << cs);
-               __raw_writel(tmp, &davinci_emif_regs->one_nand_cr);
+               __raw_writel(tmp, AEMIF_ONENAND_CONTROL);
        }
 
-       tmp = __raw_readl(&davinci_emif_regs->abncr[cs]);
+       tmp = __raw_readl(AEMIF_CONFIG(cs));
 
        set_config_field(tmp, SELECT_STROBE,    cfg->select_strobe);
        set_config_field(tmp, EXTEND_WAIT,      cfg->extend_wait);
@@ -59,13 +63,18 @@ void configure_async_emif(int cs, struct async_emif_config *cfg)
        set_config_field(tmp, TURN_AROUND,      cfg->turn_around);
        set_config_field(tmp, WIDTH,            cfg->width);
 
-       __raw_writel(tmp, &davinci_emif_regs->abncr[cs]);
+       __raw_writel(tmp, AEMIF_CONFIG(cs));
 }
 
-void init_async_emif(int num_cs, struct async_emif_config *config)
+void aemif_init(int num_cs, struct aemif_config *config)
 {
        int cs;
 
+       if (num_cs > AEMIF_NUM_CS) {
+               num_cs = AEMIF_NUM_CS;
+               printf("AEMIF: csnum has to be <= 5");
+       }
+
        for (cs = 0; cs < num_cs; cs++)
-               configure_async_emif(cs, config + cs);
+               aemif_configure(cs, config + cs);
 }
index 75b03a74b65ab9eb6498bb52022a34cfa95033bb..5d425092f43a1eb2eb84a956db56faa5fce1f7f6 100644 (file)
@@ -32,8 +32,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <nand.h>
-#include <asm/arch/nand_defs.h>
-#include <asm/arch/emif_defs.h>
+#include <asm/ti-common/davinci_nand.h>
 
 /* Definitions for 4-bit hardware ECC */
 #define NAND_TIMEOUT                   10240
index 28fb3a2e9f8f0e0c01214cc669a5383e96688470..0ec5b9d85920d4aca224fc91925925d5ca25703a 100644 (file)
@@ -41,7 +41,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
                break;
 #ifdef CONFIG_SYS_SPI1
        case SPI1_BUS:
-               ds->regs = (struct davinci_spi_regs *)SPI0_BASE;
+               ds->regs = (struct davinci_spi_regs *)SPI1_BASE;
                break;
 #endif
 #ifdef CONFIG_SYS_SPI2
index 823cba6ff43583f0536c026e451d6c30aaceecf5..974ce986e9ce8bef0eea7394c5033f114ae5908e 100644 (file)
                        "setenv fdtfile am43x-epos-evm.dtb; fi; " \
                "if test $board_name = AM43__GP; then " \
                        "setenv fdtfile am437x-gp-evm.dtb; fi; " \
+               "if test $board_name = AM43__SK; then " \
+                       "setenv fdtfile am437x-sk-evm.dtb; fi; " \
                "if test $fdtfile = undefined; then " \
                        "echo WARNING: Could not determine device tree; fi; \0"
 
index 8a3c45334736f66a21c0b93fb2a4382dd4ead799..b1b18ad04127463a2886f5d9a2df9f4f263a0dce 100644 (file)
@@ -78,6 +78,8 @@ extern unsigned int davinci_arm_clk_get(void);
 #define CONFIG_SYS_NO_FLASH
 #ifdef CONFIG_SYS_USE_NAND
 #define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_MASK_CLE       0x80000
+#define CONFIG_SYS_NAND_MASK_ALE       0x40000
 #define CONFIG_SYS_NAND_CS             2
 #undef CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_IS_IN_NAND
index 6ba7e62e5546a63f156361f06274e303300c9707..858329f9586ceb62d9df23864642060baa6fa801 100644 (file)
 #define CONFIG_SYS_SGMII_LINERATE_MHZ          1250
 #define CONFIG_SYS_SGMII_RATESCALE             2
 
+/* AEMIF */
+#define CONFIG_TI_AEMIF
+#define CONFIG_AEMIF_CNTRL_BASE                       KS2_AEMIF_CNTRL_BASE
+
 /* NAND Configuration */
 #define CONFIG_NAND_DAVINCI
 #define CONFIG_CMD_NAND_ECCLAYOUT
 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 #define CONFIG_SYS_NAND_PAGE_2K
+#define CONFIG_SYS_NAND_MASK_CLE               0x4000
+#define CONFIG_SYS_NAND_MASK_ALE               0x2000
 
 #define CONFIG_SYS_NAND_LARGEPAGE
 #define CONFIG_SYS_NAND_BASE_LIST       { 0x30000000, }
index 1a136339493e28556b101249e3b2d93ff8d31cee..f7483a082784b90b8d93320ed3a9df6672e5b553 100644 (file)
@@ -83,7 +83,6 @@
 /* Environment information */
 #define CONFIG_EXTRA_ENV_SETTINGS \
        DEFAULT_LINUX_BOOT_ENV \
-       "fdtfile=overo.dtb\0" \
        "bootdir=/boot\0" \
        "bootfile=zImage\0" \
        "usbtty=cdc_acm\0" \
                        "run mmcboot;" \
                "fi;" \
                "if run loadzimage; then " \
-                       "if test -n $fdtfile; then " \
-                               "if run loadfdt; then " \
-                                       "run mmcbootfdt;" \
-                               "fi;" \
+                       "if test $fdtfile; then " \
+                               "setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
+                       "fi;" \
+                       "if run loadfdt; then " \
+                               "run mmcbootfdt;" \
                        "fi;" \
                "fi;" \
        "fi;" \
index 44b37183b673fbd1f74feb3ede1284a7d1d60bc2..30b02f6b0351513c257d77c4f6ccfeea05c46e4f 100644 (file)
                "if test $board_name = panda-es; then " \
                        "setenv fdtfile omap4-panda-es.dtb; fi;" \
                "if test $board_name = duovero; then " \
-                       "setenv fdtfile omap4-duovero.dtb; fi;" \
+                       "setenv fdtfile omap4-duovero-parlor.dtb; fi;" \
                "if test $fdtfile = undefined; then " \
                        "echo WARNING: Could not determine device tree to use; fi; \0" \
        "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \