]> git.kernelconcepts.de Git - karo-tx-uboot.git/commitdiff
MX5: rename mx51 to mx5
authorJason Liu <r64343@freescale.com>
Mon, 18 Oct 2010 03:09:26 +0000 (11:09 +0800)
committerStefano Babic <sbabic@denx.de>
Mon, 18 Oct 2010 08:43:19 +0000 (10:43 +0200)
Rename mx51 to mx5 in order to support more mx51
like-style SOCs such as MX53 and the followings.

Signed-off-by: Jason Liu <r64343@freescale.com>
20 files changed:
arch/arm/cpu/armv7/mx5/Makefile [moved from arch/arm/cpu/armv7/mx51/Makefile with 100% similarity]
arch/arm/cpu/armv7/mx5/clock.c [moved from arch/arm/cpu/armv7/mx51/clock.c with 85% similarity]
arch/arm/cpu/armv7/mx5/iomux.c [moved from arch/arm/cpu/armv7/mx51/iomux.c with 99% similarity]
arch/arm/cpu/armv7/mx5/lowlevel_init.S [moved from arch/arm/cpu/armv7/mx51/lowlevel_init.S with 100% similarity]
arch/arm/cpu/armv7/mx5/soc.c [moved from arch/arm/cpu/armv7/mx51/soc.c with 81% similarity]
arch/arm/cpu/armv7/mx5/speed.c [moved from arch/arm/cpu/armv7/mx51/speed.c with 100% similarity]
arch/arm/cpu/armv7/mx5/timer.c [moved from arch/arm/cpu/armv7/mx51/timer.c with 92% similarity]
arch/arm/cpu/armv7/mx5/u-boot.lds [moved from arch/arm/cpu/armv7/mx51/u-boot.lds with 100% similarity]
arch/arm/include/asm/arch-mx5/asm-offsets.h [moved from arch/arm/include/asm/arch-mx51/asm-offsets.h with 100% similarity]
arch/arm/include/asm/arch-mx5/clock.h [moved from arch/arm/include/asm/arch-mx51/clock.h with 100% similarity]
arch/arm/include/asm/arch-mx5/crm_regs.h [moved from arch/arm/include/asm/arch-mx51/crm_regs.h with 100% similarity]
arch/arm/include/asm/arch-mx5/imx-regs.h [moved from arch/arm/include/asm/arch-mx51/imx-regs.h with 100% similarity]
arch/arm/include/asm/arch-mx5/iomux.h [moved from arch/arm/include/asm/arch-mx51/iomux.h with 98% similarity]
arch/arm/include/asm/arch-mx5/mx5x_pins.h [moved from arch/arm/include/asm/arch-mx51/mx51_pins.h with 99% similarity]
arch/arm/include/asm/arch-mx5/sys_proto.h [moved from arch/arm/include/asm/arch-mx51/sys_proto.h with 100% similarity]
board/freescale/mx51evk/mx51evk.c
board/ttcontrol/vision2/vision2.c
boards.cfg
include/configs/mx51evk.h
include/configs/vision2.h

similarity index 85%
rename from arch/arm/cpu/armv7/mx51/clock.c
rename to arch/arm/cpu/armv7/mx5/clock.c
index a27227de31356d79a7ffde768d560b67d1147385..00f649cf487dfb2295f9e94fd7d44e3da7404f33 100644 (file)
@@ -71,7 +71,7 @@ u32 get_mcu_main_clk(void)
 
        reg = (__raw_readl(&mxc_ccm->cacrr) & MXC_CCM_CACRR_ARM_PODF_MASK) >>
                MXC_CCM_CACRR_ARM_PODF_OFFSET;
-       freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ);
+       freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
        return freq / (reg + 1);
 }
 
@@ -84,14 +84,14 @@ static u32 get_periph_clk(void)
 
        reg = __raw_readl(&mxc_ccm->cbcdr);
        if (!(reg & MXC_CCM_CBCDR_PERIPH_CLK_SEL))
-               return decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_MX51_HCLK_FREQ);
+               return decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_SYS_MX5_HCLK);
        reg = __raw_readl(&mxc_ccm->cbcmr);
        switch ((reg & MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >>
                MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) {
        case 0:
-               return decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ);
+               return decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
        case 1:
-               return decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_MX51_HCLK_FREQ);
+               return decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_SYS_MX5_HCLK);
        default:
                return 0;
        }
@@ -146,15 +146,15 @@ static u32 get_uart_clk(void)
                MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET) {
        case 0x0:
                freq = decode_pll(mxc_plls[PLL1_CLOCK],
-                                   CONFIG_MX51_HCLK_FREQ);
+                                   CONFIG_SYS_MX5_HCLK);
                break;
        case 0x1:
                freq = decode_pll(mxc_plls[PLL2_CLOCK],
-                                   CONFIG_MX51_HCLK_FREQ);
+                                   CONFIG_SYS_MX5_HCLK);
                break;
        case 0x2:
                freq = decode_pll(mxc_plls[PLL3_CLOCK],
-                                   CONFIG_MX51_HCLK_FREQ);
+                                   CONFIG_SYS_MX5_HCLK);
                break;
        default:
                return 66500000;
@@ -181,7 +181,7 @@ u32 get_lp_apm(void)
        u32 ccsr = __raw_readl(&mxc_ccm->ccsr);
 
        if (((ccsr >> 9) & 1) == 0)
-               ret_val = CONFIG_MX51_HCLK_FREQ;
+               ret_val = CONFIG_SYS_MX5_HCLK;
        else
                ret_val = ((32768 * 1024));
 
@@ -207,17 +207,17 @@ u32 imx_get_cspiclk(void)
        switch (clk_sel) {
        case 0:
                ret_val = decode_pll(mxc_plls[PLL1_CLOCK],
-                                       CONFIG_MX51_HCLK_FREQ) /
+                                       CONFIG_SYS_MX5_HCLK) /
                                        ((pre_pdf + 1) * (pdf + 1));
                break;
        case 1:
                ret_val = decode_pll(mxc_plls[PLL2_CLOCK],
-                                       CONFIG_MX51_HCLK_FREQ) /
+                                       CONFIG_SYS_MX5_HCLK) /
                                        ((pre_pdf + 1) * (pdf + 1));
                break;
        case 2:
                ret_val = decode_pll(mxc_plls[PLL3_CLOCK],
-                                       CONFIG_MX51_HCLK_FREQ) /
+                                       CONFIG_SYS_MX5_HCLK) /
                                        ((pre_pdf + 1) * (pdf + 1));
                break;
        default:
@@ -248,7 +248,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
                return imx_get_cspiclk();
        case MXC_FEC_CLK:
                return decode_pll(mxc_plls[PLL1_CLOCK],
-                                   CONFIG_MX51_HCLK_FREQ);
+                                   CONFIG_SYS_MX5_HCLK);
        default:
                break;
        }
@@ -269,16 +269,16 @@ u32 imx_get_fecclk(void)
 /*
  * Dump some core clockes.
  */
-int do_mx51_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
        u32 freq;
 
-       freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ);
-       printf("mx51 pll1: %dMHz\n", freq / 1000000);
-       freq = decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_MX51_HCLK_FREQ);
-       printf("mx51 pll2: %dMHz\n", freq / 1000000);
-       freq = decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_MX51_HCLK_FREQ);
-       printf("mx51 pll3: %dMHz\n", freq / 1000000);
+       freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
+       printf("pll1: %dMHz\n", freq / 1000000);
+       freq = decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_SYS_MX5_HCLK);
+       printf("pll2: %dMHz\n", freq / 1000000);
+       freq = decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_SYS_MX5_HCLK);
+       printf("pll3: %dMHz\n", freq / 1000000);
        printf("ipg clock     : %dHz\n", mxc_get_clock(MXC_IPG_CLK));
        printf("ipg per clock : %dHz\n", mxc_get_clock(MXC_IPG_PERCLK));
 
@@ -288,7 +288,7 @@ int do_mx51_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]
 /***************************************************/
 
 U_BOOT_CMD(
-       clockinfo,      CONFIG_SYS_MAXARGS,     1,      do_mx51_showclocks,
-       "display mx51 clocks\n",
+       clockinfo,      CONFIG_SYS_MAXARGS,     1,      do_mx5_showclocks,
+       "display clocks\n",
        ""
 );
similarity index 99%
rename from arch/arm/cpu/armv7/mx51/iomux.c
rename to arch/arm/cpu/armv7/mx5/iomux.c
index 62b2954be9985451d3ba727fdd73c069dd19bcd6..e8928d5fde431901dfe7d1e548bc8964ed8c5079 100644 (file)
@@ -23,7 +23,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
-#include <asm/arch/mx51_pins.h>
+#include <asm/arch/mx5x_pins.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/sys_proto.h>
 
similarity index 81%
rename from arch/arm/cpu/armv7/mx51/soc.c
rename to arch/arm/cpu/armv7/mx5/soc.c
index f22ebe96c86d8b37e316789cefea19055957b922..7c7a565665f5c644ee3a2421731a08f526e1b671 100644 (file)
 #include <fsl_esdhc.h>
 #endif
 
+#if defined(CONFIG_MX51)
+#define CPU_TYPE 0x51000
+#else
+#error "CPU_TYPE not defined"
+#endif
+
 u32 get_cpu_rev(void)
 {
-       int reg;
-       int system_rev;
+       int system_rev = CPU_TYPE;
+       int reg = __raw_readl(ROM_SI_REV);
 
-       reg = __raw_readl(ROM_SI_REV);
        switch (reg) {
        case 0x02:
-               system_rev = 0x51000 | CHIP_REV_1_1;
+               system_rev |= CHIP_REV_1_1;
                break;
        case 0x10:
                if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0)
-                       system_rev = 0x51000 | CHIP_REV_2_5;
+                       system_rev |= CHIP_REV_2_5;
                else
-                       system_rev = 0x51000 | CHIP_REV_2_0;
+                       system_rev |= CHIP_REV_2_0;
                break;
        case 0x20:
-               system_rev = 0x51000 | CHIP_REV_3_0;
+               system_rev |= CHIP_REV_3_0;
                break;
        return system_rev;
        default:
-               system_rev = 0x51000 | CHIP_REV_1_0;
+               system_rev |= CHIP_REV_1_0;
                break;
        }
        return system_rev;
@@ -67,9 +72,10 @@ int print_cpuinfo(void)
        u32 cpurev;
 
        cpurev = get_cpu_rev();
-       printf("CPU:   Freescale i.MX51 family rev%d.%d at %d MHz\n",
-               (cpurev & 0xF0) >> 4,
-               (cpurev & 0x0F) >> 4,
+       printf("CPU:   Freescale i.MX%x family rev%d.%d at %d MHz\n",
+               (cpurev & 0xFF000) >> 12,
+               (cpurev & 0x000F0) >> 4,
+               (cpurev & 0x0000F) >> 0,
                mxc_get_clock(MXC_ARM_CLK) / 1000000);
        return 0;
 }
similarity index 92%
rename from arch/arm/cpu/armv7/mx51/timer.c
rename to arch/arm/cpu/armv7/mx5/timer.c
index 110edbfa85e2d48f3fa7de7856ea0ae8ae4a72df..3044fcf1e9bf1d7450e86a3d337a2812ab8fdb5b 100644 (file)
@@ -75,18 +75,18 @@ void reset_timer(void)
 void reset_timer_masked(void)
 {
        ulong val = __raw_readl(&cur_gpt->counter);
-       lastinc = val / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ);
+       lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
        timestamp = 0;
 }
 
 ulong get_timer_masked(void)
 {
        ulong val = __raw_readl(&cur_gpt->counter);
-       val /= (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ);
+       val /= (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
        if (val >= lastinc)
                timestamp += (val - lastinc);
        else
-               timestamp += ((0xFFFFFFFF / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ))
+               timestamp += ((0xFFFFFFFF / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ))
                                - lastinc) + val;
        lastinc = val;
        return timestamp;
@@ -106,7 +106,7 @@ void set_timer(ulong t)
 void __udelay(unsigned long usec)
 {
        unsigned long now, start, tmo;
-       tmo = usec * (CONFIG_MX51_CLK32 / 1000) / 1000;
+       tmo = usec * (CONFIG_SYS_MX5_CLK32 / 1000) / 1000;
 
        if (!tmo)
                tmo = 1;
similarity index 98%
rename from arch/arm/include/asm/arch-mx51/iomux.h
rename to arch/arm/include/asm/arch-mx5/iomux.h
index a41c387c7cd5c95bd53228b4ebf3db8716657d33..0d91a24c84eb62bb0120f6f94a509038a860ebb5 100644 (file)
  * MA 02111-1307 USA
  */
 
-#ifndef __MACH_MX51_IOMUX_H__
-#define __MACH_MX51_IOMUX_H__
+#ifndef __MACH_MX5_IOMUX_H__
+#define __MACH_MX5_IOMUX_H__
 
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
-#include <asm/arch/mx51_pins.h>
+#include <asm/arch/mx5x_pins.h>
 
 typedef unsigned int iomux_pin_name_t;
 
@@ -190,4 +190,4 @@ void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config);
 unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin);
 void mxc_iomux_set_input(iomux_input_select_t input, u32 config);
 
-#endif                         /*  __MACH_MX51_IOMUX_H__ */
+#endif                         /*  __MACH_MX5_IOMUX_H__ */
similarity index 99%
rename from arch/arm/include/asm/arch-mx51/mx51_pins.h
rename to arch/arm/include/asm/arch-mx5/mx5x_pins.h
index b44ff252bfedfaee3eba2de2858d7fcc8245876b..a564fce982bc90f4bf3983ecfed4cd54a8acf528 100644 (file)
@@ -20,8 +20,8 @@
  * MA 02111-1307 USA
  */
 
-#ifndef __ASM_ARCH_MXC_MX51_PINS_H__
-#define __ASM_ARCH_MXC_MX51_PINS_H__
+#ifndef __ASM_ARCH_MX5_MX5X_PINS_H__
+#define __ASM_ARCH_MX5_MX5X_PINS_H__
 
 #ifndef __ASSEMBLY__
 
@@ -415,4 +415,4 @@ enum iomux_pins {
 };
 
 #endif                         /* __ASSEMBLY__ */
-#endif                         /* __ASM_ARCH_MXC_MX51_PINS_H__ */
+#endif                         /* __ASM_ARCH_MX5_MX5X_PINS_H__ */
index 84386e6c8ff7b05586fc1af59e34f7ee8d48c7be..c8d7d3964e3f368ba41e6faa92189c9fca843e88 100644 (file)
@@ -23,7 +23,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
-#include <asm/arch/mx51_pins.h>
+#include <asm/arch/mx5x_pins.h>
 #include <asm/arch/iomux.h>
 #include <asm/errno.h>
 #include <asm/arch/sys_proto.h>
index c991ee271ec29c9f49d4634882ca7c152fa28651..ce4cb78e9811f7e2f276b9dc8f7c3b7c7246f71f 100644 (file)
@@ -26,7 +26,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
-#include <asm/arch/mx51_pins.h>
+#include <asm/arch/mx5x_pins.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/iomux.h>
 #include <mxc_gpio.h>
index 4c7368027600dc8c6728b669354126612963e719..884d9bacb63ec7786b2e2fd478c3a212ca7c4c40 100644 (file)
@@ -46,8 +46,8 @@ pm9263                arm     arm926ejs       -               ronetix         at91
 jadecpu                arm     arm926ejs       jadecpu         syteco          mb86r0x
 suen3          arm     arm926ejs       km_arm          keymile         kirkwood
 rd6281a                arm     arm926ejs       -               Marvell         kirkwood
-mx51evk                arm     armv7           mx51evk         freescale       mx51
-vision2                arm     armv7           vision2         ttcontrol       mx51
+mx51evk                arm     armv7           mx51evk         freescale       mx5
+vision2                arm     armv7           vision2         ttcontrol       mx5
 actux1         arm     ixp
 actux2         arm     ixp
 actux3         arm     ixp
index 8864f3ab780ba2c7b1649383af3dafe00f83586e..61654732706cbf616053f0dccdbc0139aa72cf8f 100644 (file)
@@ -30,8 +30,8 @@
 #define CONFIG_MX51    /* in a mx51 */
 #define CONFIG_SKIP_RELOCATE_UBOOT
 
-#define CONFIG_MX51_HCLK_FREQ          24000000        /* RedBoot says 26MHz */
-#define CONFIG_MX51_CLK32              32768
+#define CONFIG_SYS_MX5_HCLK    24000000
+#define CONFIG_SYS_MX5_CLK32           32768
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
index 44a6f8be696b3541459e4f0fe0c1d8d9ad85617f..a2ecbe50d63f5b524f3d5c4114d5799cfff6eac8 100644 (file)
@@ -29,8 +29,8 @@
 #define CONFIG_MX51    /* in a mx51 */
 #define CONFIG_L2_OFF
 
-#define CONFIG_MX51_HCLK_FREQ          24000000
-#define CONFIG_MX51_CLK32              32768
+#define CONFIG_SYS_MX5_HCLK    24000000
+#define CONFIG_SYS_MX5_CLK32           32768
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO