From: Gabor Juhos Date: Thu, 13 Jun 2013 10:59:36 +0000 (+0200) Subject: MIPS: mips32/cache.S: use v1 register for indirect function calls X-Git-Tag: v2013.10-rc1~65^2 X-Git-Url: https://git.kernelconcepts.de/?p=karo-tx-uboot.git;a=commitdiff_plain;h=db2c86d7d71d1be0ac0fe702493faf9302639235;hp=ee8b1e29597bcf18bfebd6fd8eccc8e245046352 MIPS: mips32/cache.S: use v1 register for indirect function calls Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos Cc: Daniel Schwierzeck --- diff --git a/arch/mips/cpu/mips32/cache.S b/arch/mips/cpu/mips32/cache.S index d3f156e482..12f656cad0 100644 --- a/arch/mips/cpu/mips32/cache.S +++ b/arch/mips/cpu/mips32/cache.S @@ -156,16 +156,16 @@ NESTED(mips_cache_reset, 0, ra) */ move a1, t2 move a2, t8 - PTR_LA t7, mips_init_icache - jalr t7 + PTR_LA v1, mips_init_icache + jalr v1 /* * then initialize D-cache. */ move a1, t3 move a2, t8 - PTR_LA t7, mips_init_dcache - jalr t7 + PTR_LA v1, mips_init_dcache + jalr v1 jr RA END(mips_cache_reset)