]> git.kernelconcepts.de Git - karo-tx-uboot.git/log
karo-tx-uboot.git
9 years agoARM: HYP/non-sec: add the pen address BE mode support.
Xiubo Li [Fri, 21 Nov 2014 09:40:54 +0000 (17:40 +0800)]
ARM: HYP/non-sec: add the pen address BE mode support.

For some SoCs, the pen address register maybe in BE mode and the
CPUs are in LE mode.

This patch adds BE mode support for smp pen address.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agofsl/sleep: updated the deep sleep framework for QorIQ platforms
Tang Yuantian [Fri, 21 Nov 2014 03:17:15 +0000 (11:17 +0800)]
fsl/sleep: updated the deep sleep framework for QorIQ platforms

With the introducing of generic board and ARM-based cores, current
deep sleep framework doesn't work anymore.
This patch will convert the current framework to adapt this change.
Basically it does:
1. Converts all the Freescale's DDR driver to support deep sleep.
2. Added basic framework support for ARM-based and PPC-based
cores separately.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodrivers: usb: fsl: Check USB Erratum A007792 applicability
Nikhil Badola [Thu, 30 Oct 2014 04:41:28 +0000 (10:11 +0530)]
drivers: usb: fsl: Check USB Erratum A007792 applicability

Check USB Erratum A007792 applicability. If applicable, add
corresponding  property in the device tree via device tree fixup

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodrivers: usb: fsl: Add USB device-tree errata framework
Nikhil Badola [Tue, 30 Sep 2014 05:54:07 +0000 (11:24 +0530)]
drivers: usb: fsl: Add USB device-tree errata framework

Add a new framework for fsl usb erratum handling to standardize
erratum checking only inside Uboot. Information to kernel is passed
via a boolean property corresponding to erratum, hence eliminating
need for code duplication inside kernel

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agodrivers: usb: Make usb device-tree fixup code architecture independent
Nikhil Badola [Mon, 20 Oct 2014 11:20:49 +0000 (16:50 +0530)]
drivers: usb: Make usb device-tree fixup code architecture independent

move usb device tree fixup code from "arch/powerpc/" to "drivers/usb/"
so that it works independent of architecture it is running on

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols1021aqds: add hwconfig setting to do pin mux
Yao Yuan [Wed, 26 Nov 2014 06:54:33 +0000 (14:54 +0800)]
ls1021aqds: add hwconfig setting to do pin mux

The Freescale LS1021AQDS share some pins, so Add the hwconfig option
that allows the user to choose which the function he wants.

The main pin mux IP is:
eSDHC, SAI, IIC2, RGMII, CAN, SAI.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add NAND boot support for LS1021AQDS board
Alison Wang [Tue, 9 Dec 2014 09:38:14 +0000 (17:38 +0800)]
arm: ls102xa: Add NAND boot support for LS1021AQDS board

This patch adds NAND boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from NAND flash to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add QSPI boot support for LS1021AQDS/TWR board
Alison Wang [Tue, 9 Dec 2014 09:38:02 +0000 (17:38 +0800)]
arm: ls102xa: Add QSPI boot support for LS1021AQDS/TWR board

This patch adds QSPI boot support for LS1021AQDS/TWR board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then the booting will start from QSPI memory space.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Fix SD/NAND/QSPI boot defination error for QE support
Alison Wang [Tue, 9 Dec 2014 09:37:49 +0000 (17:37 +0800)]
arm: ls102xa: Fix SD/NAND/QSPI boot defination error for QE support

The SD/NAND/QSPI boot definations are wrong for QE support, this
patch is to fix this error.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls1021a: Add CONFIG_DOS_PARTITION and CONFIG_CMD_FAT support
Alison Wang [Tue, 9 Dec 2014 09:37:34 +0000 (17:37 +0800)]
arm: ls1021a: Add CONFIG_DOS_PARTITION and CONFIG_CMD_FAT support

This patch will fix the bug that the partitions on the SD card could
not be accessed and add the support for the FAT fs.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add SD boot support for LS1021ATWR board
Alison Wang [Wed, 3 Dec 2014 07:00:48 +0000 (15:00 +0800)]
arm: ls102xa: Add SD boot support for LS1021ATWR board

This patch adds SD boot support for LS1021ATWR board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Chen Lu <chen.lu@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Add SD boot support for LS1021AQDS board
Alison Wang [Wed, 3 Dec 2014 07:00:47 +0000 (15:00 +0800)]
arm: ls102xa: Add SD boot support for LS1021AQDS board

This patch adds SD boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols102xa: qixis: Add CONFIG_QIXIS_I2C_ACCESS macro
Alison Wang [Wed, 3 Dec 2014 07:00:46 +0000 (15:00 +0800)]
ls102xa: qixis: Add CONFIG_QIXIS_I2C_ACCESS macro

Through adding CONFIG_QIXIS_I2C_ACCESS macro,
QIXIS_READ(reg)/QIXIS_WRITE(reg, value) can be used
for both i2c and ifc access to QIXIS FPGA. This is
more convenient for coding.

Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agokconfig: ls1021a: add SUPPORT_SPL
Alison Wang [Wed, 3 Dec 2014 07:00:45 +0000 (15:00 +0800)]
kconfig: ls1021a: add SUPPORT_SPL

Add SUPPORT_SPL feature for SD and NAND boot on
LS1021AQDS and LS1021ATWR.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: spl: Add I2C linker list in generic .lds
Alison Wang [Wed, 3 Dec 2014 07:00:43 +0000 (15:00 +0800)]
arm: spl: Add I2C linker list in generic .lds

On LS1, DDR is initialized by reading SPD through I2C interface
in SPL code. For I2C, ll_entry_count() is called, and it returns
the number of elements of a linker-generated array placed into
subsection of .u_boot_list section specified by _list argument.
So add I2C linker list in the generic .lds to fix the issue about
using I2C in SPL.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agospl: Use u-boot.img instead of u-boot.bin
Alison Wang [Wed, 3 Dec 2014 07:00:42 +0000 (15:00 +0800)]
spl: Use u-boot.img instead of u-boot.bin

In SD boot, the magic number of u-boot image will be checked.
For LS102xA, u-boot.bin doesn't have the magic number. So use
u-boot.img which includes the magic number instead of u-boot.bin
when producing u-boot-with-spl-pbl.bin.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols102xa: pblimage: Add pblimage tool support for LS102xA
Alison Wang [Wed, 3 Dec 2014 07:00:41 +0000 (15:00 +0800)]
ls102xa: pblimage: Add pblimage tool support for LS102xA

For LS102xA, the size of spl/u-boot-spl.bin is variable.
This patch adds the support to deal with the variable
u-boot size in pblimage tool. It will be padded to 64
byte boundary.

Use pblimage_check_params() to add the specific operations
for ARM, such as PBI CRC and END command and the calculation
of pbl_cmd_initaddr.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agols1021aqds: set the default I2C channel before DDR init
Chenhui Zhao [Thu, 6 Nov 2014 02:51:59 +0000 (10:51 +0800)]
ls1021aqds: set the default I2C channel before DDR init

When resuming from deep sleep, the I2C channel may not be
in the default channel. So, switch to the default channel
before accessing DDR SPD.

Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: Update PCIe dts node status
Minghuan Lian [Fri, 31 Oct 2014 05:43:44 +0000 (13:43 +0800)]
arm: ls102xa: Update PCIe dts node status

The patch changes PCIe dts node status to 'disabled' if the
corresponding controller is disabled according to serdes protocol.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: clear EPU registers for deep sleep
chenhui zhao [Wed, 22 Oct 2014 10:20:22 +0000 (18:20 +0800)]
arm: ls102xa: clear EPU registers for deep sleep

After wakeup from deep sleep, Clear EPU registers as early as possible
to prevent from possible issue. It's also safe to clear at normal boot.

Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoarm: ls102xa: fixed a bus frequency setting error
Tang Yuantian [Tue, 21 Oct 2014 05:51:58 +0000 (13:51 +0800)]
arm: ls102xa: fixed a bus frequency setting error

The bus frequency in SOC node should be clock frequency of platform.
That is not true if it is devided by 2.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Wed, 10 Dec 2014 14:07:25 +0000 (09:07 -0500)]
Merge branch 'master' of git://www.denx.de/git/u-boot-imx

9 years agoMerge branch 'rmobile' of git://git.denx.de/u-boot-sh
Tom Rini [Wed, 10 Dec 2014 14:07:06 +0000 (09:07 -0500)]
Merge branch 'rmobile' of git://git.denx.de/u-boot-sh

9 years agoarm: rmobile: alt: Add support MMC and MMC command
Nobuhiro Iwamatsu [Wed, 3 Dec 2014 06:30:30 +0000 (15:30 +0900)]
arm: rmobile: alt: Add support MMC and MMC command

Alt board has been connected to eMMC of 8GB to MMC port.
This enables MMC port and MMC command.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
9 years agoarm: rmobile: lager: Add support MMC and MMC command
Nobuhiro Iwamatsu [Wed, 3 Dec 2014 06:30:30 +0000 (15:30 +0900)]
arm: rmobile: lager: Add support MMC and MMC command

Lager board has been connected to eMMC of 8GB to MMC1 port.
This enables MMC1 port and MMC command.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
9 years agoarm: rmobile: rcar: Add support ext2 and ext4 file system
Nobuhiro Iwamatsu [Wed, 10 Dec 2014 01:46:04 +0000 (10:46 +0900)]
arm: rmobile: rcar: Add support ext2 and ext4 file system

Board with R-Car SoC has USB and MMC. They might use the EXT2 or EXT4 file system.
This adds support ext2 and ext4 file system

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
9 years agoarm: rmobile: Add mmc.h for sh_mmcif of rmobile
Nobuhiro Iwamatsu [Wed, 10 Dec 2014 05:12:43 +0000 (14:12 +0900)]
arm: rmobile: Add mmc.h for sh_mmcif of rmobile

R-Mobile and R-Car ARM SoCs use sh_mmcif as MMC host driver.
This adds arch-rmobile/mmc.h that defines mmcif_mmc_init().

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
9 years agodm: stv0991: Move serial to driver model
Vikas Manocha [Mon, 1 Dec 2014 20:27:54 +0000 (12:27 -0800)]
dm: stv0991: Move serial to driver model

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
9 years agostv0991: increase the initial ram size config
Vikas Manocha [Mon, 1 Dec 2014 20:27:53 +0000 (12:27 -0800)]
stv0991: increase the initial ram size config

It is done to make space available for driver model memory.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
9 years agostv0991: enable default and misc command configs
Vikas Manocha [Tue, 18 Nov 2014 18:42:24 +0000 (10:42 -0800)]
stv0991: enable default and misc command configs

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
9 years agostv0991: enable ethernet support
Vikas Manocha [Tue, 18 Nov 2014 18:42:23 +0000 (10:42 -0800)]
stv0991: enable ethernet support

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
9 years agostv0991: Add basic stv0991 architecture support
Vikas Manocha [Tue, 18 Nov 2014 18:42:22 +0000 (10:42 -0800)]
stv0991: Add basic stv0991 architecture support

stv0991 architecture support added. It contains the support for
following blocks
- Timer
- uart

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Add arch/arm/cpu/armv7/Makefile hunk]
Signed-off-by: Tom Rini <trini@ti.com>
9 years agoPrepare v2015.01-rc3
Tom Rini [Mon, 8 Dec 2014 21:33:13 +0000 (16:33 -0500)]
Prepare v2015.01-rc3

Signed-off-by: Tom Rini <trini@ti.com>
9 years agoMerge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Mon, 8 Dec 2014 21:35:07 +0000 (16:35 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-ti
Tom Rini [Mon, 8 Dec 2014 21:35:06 +0000 (16:35 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-ti

9 years agoMerge git://git.denx.de/u-boot-i2c
Tom Rini [Mon, 8 Dec 2014 21:35:05 +0000 (16:35 -0500)]
Merge git://git.denx.de/u-boot-i2c

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Mon, 8 Dec 2014 21:35:05 +0000 (16:35 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

9 years agoARM: UniPhier: detect the number of flash banks at run-time
Masahiro Yamada [Fri, 5 Dec 2014 15:03:26 +0000 (00:03 +0900)]
ARM: UniPhier: detect the number of flash banks at run-time

Some UniPhier boards are equipped with an expansion slot that
some optional SRAM/NOR-flash cards can be attached to.  So, run-time
detection of the number of flash banks would be more user-friendly.

Until this commit, UniPhier boards have achieved this by (ab)using
board_flash_wp_on() because the boot failed if flash_size got zero.
Fortunately, this problem was solved by commit 70879a92561a (flash:
do not fail even if flash_size is zero).

Now it is possible to throw away such a tricky workaround.  This
commit also enables CONFIG_SYS_MAX_FLASH_BANKS_DETECT for further
refactoring.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: extend register area of init page table for PH1-sLD3
Masahiro Yamada [Fri, 5 Dec 2014 15:03:25 +0000 (00:03 +0900)]
ARM: UniPhier: extend register area of init page table for PH1-sLD3

0x20000000-0x2fffffff: assigned to ARM mpcore (sLD3 only)
0xf0000000-0xffffffff: assigned to Denali NAND controller (sLD3 only)

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: add device tree sources for PH1-sLD3
Masahiro Yamada [Fri, 5 Dec 2014 15:03:24 +0000 (00:03 +0900)]
ARM: UniPhier: add device tree sources for PH1-sLD3

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: add more device nodes to device tree
Masahiro Yamada [Fri, 5 Dec 2014 15:03:23 +0000 (00:03 +0900)]
ARM: UniPhier: add more device nodes to device tree

Add I2C controller and NAND controller devices.  Fix indentation too.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Mon, 8 Dec 2014 14:36:26 +0000 (09:36 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

9 years agodoc/gitmail-rc: Update m68k alias
Tom Rini [Thu, 4 Dec 2014 16:27:08 +0000 (11:27 -0500)]
doc/gitmail-rc: Update m68k alias

Signed-off-by: Tom Rini <trini@ti.com>
9 years agokconfig: Fix warning "‘jump’ may be used uninitialized"
Peter Kümmel [Sat, 29 Nov 2014 08:26:04 +0000 (17:26 +0900)]
kconfig: Fix warning "‘jump’ may be used uninitialized"

Warning:
In file included from scripts/kconfig/zconf.tab.c:2537:0:
scripts/kconfig/menu.c: In function ‘get_symbol_str’:
scripts/kconfig/menu.c:590:18: warning: ‘jump’ may be used uninitialized in this function [-Wmaybe-uninitialized]
     jump->offset = strlen(r->s);

Simplifies the test logic because (head && local) means (jump != 0)
and makes GCC happy when checking if the jump pointer was initialized.

Signed-off-by: Peter Kümmel <syntheticpp@gmx.net>
Signed-off-by: Michal Marek <mmarek@suse.cz>
[ imported from Linux Kernel, commit 2d5603060967 ]
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agolibfdt: move CONFIG_OF_LIBFDT and CONFIG_FIT to lib/Makefile
Masahiro Yamada [Fri, 28 Nov 2014 02:13:28 +0000 (11:13 +0900)]
libfdt: move CONFIG_OF_LIBFDT and CONFIG_FIT to lib/Makefile

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agolibfdt: descend from lib/ to lib/libfdt/
Masahiro Yamada [Fri, 28 Nov 2014 02:13:27 +0000 (11:13 +0900)]
libfdt: descend from lib/ to lib/libfdt/

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agolib: bzip2: move bzip2 files to lib/bzip2/ directory
Masahiro Yamada [Fri, 28 Nov 2014 02:13:26 +0000 (11:13 +0900)]
lib: bzip2: move bzip2 files to lib/bzip2/ directory

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agofdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined
Suriyan Ramasami [Thu, 27 Nov 2014 21:24:16 +0000 (13:24 -0800)]
fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined

The boot commands - bootz/bootm mandate a third argument which is the
address to the FDT blob. In cases where this argument is not specified,
boot fails with a message indicating a missing FDT.

This causes non-FDT kernels to fail to boot. This patch allows both FDT
and non-FDT kernels to boot by making the third parameter to the bootm/bootz
optional.

Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
[trini: Update again for covering appended DTB case after last revert in
this area]
Signed-off-by: Tom Rini <trini@ti.com>
9 years agoblackfin: include <linux/compiler.h> rather than define __iomem
Masahiro Yamada [Wed, 26 Nov 2014 07:02:54 +0000 (16:02 +0900)]
blackfin: include <linux/compiler.h> rather than define __iomem

The macro __iomem is defined in include/linux/compiler.h.
Let's include it rather than double __iomem defines.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
9 years agolinux/compat.h: remove redundant macro defines
Masahiro Yamada [Wed, 26 Nov 2014 07:02:53 +0000 (16:02 +0900)]
linux/compat.h: remove redundant macro defines

__user and __iomem are defined in include/linux/compiler.h.
MAX_ERRNO is defined in include/linux/err.h.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoReplace <compiler.h> with <linux/compiler.h>
Masahiro Yamada [Wed, 26 Nov 2014 07:00:58 +0000 (16:00 +0900)]
Replace <compiler.h> with <linux/compiler.h>

Including <linux/compiler.h> is enough for general use.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agogit-mailrc: fix mips alias
Daniel Schwierzeck [Wed, 19 Nov 2014 19:20:11 +0000 (20:20 +0100)]
git-mailrc: fix mips alias

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoAdd Alison Wang m68k custodian email/alias
angelo@sysam.it [Tue, 25 Nov 2014 09:05:41 +0000 (10:05 +0100)]
Add Alison Wang m68k custodian email/alias

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
9 years agoAdd custodians to the m68k subsystem.
angelo@sysam.it [Mon, 24 Nov 2014 14:36:57 +0000 (15:36 +0100)]
Add custodians to the m68k subsystem.

9 years agoKbuild: introduce Makefile in arch/$ARCH/
Daniel Schwierzeck [Fri, 21 Nov 2014 22:51:33 +0000 (23:51 +0100)]
Kbuild: introduce Makefile in arch/$ARCH/

Introduce a Makefile under arch/$ARCH/ and include it in the
top Makefile (similar to Linux kernel). This allows further
refactoringi like moving architecture-specific code out of global
makefiles, deprecating config variables (CPU, CPUDIR, SOC) or
deprecating arch/$ARCH/config.mk.

In contrary to Linux kernel, U-Boot defines the ARCH variable by
Kconfig, thus the arch Makefile can only included conditionally
after the top config.mk.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoserial: pl01x: avoid pl01x type check two times
Vikas Manocha [Fri, 21 Nov 2014 18:34:23 +0000 (10:34 -0800)]
serial: pl01x: avoid pl01x type check two times

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoserial: pl01x: disable as per type of pl01x
Vikas Manocha [Fri, 21 Nov 2014 18:34:22 +0000 (10:34 -0800)]
serial: pl01x: disable as per type of pl01x

pl010 & pl011 have different control register offsets, setting it as per
the pl01x type.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoserial: pl01x: move all line control at same place
Vikas Manocha [Fri, 21 Nov 2014 18:34:21 +0000 (10:34 -0800)]
serial: pl01x: move all line control at same place

Receive line control uses same setting as transmit line control, also one lcrh
write is effective for both baud rate & receive line control internal update.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoserial: pl01x: fix pl011 baud rate configuration
Vikas Manocha [Fri, 21 Nov 2014 18:34:20 +0000 (10:34 -0800)]
serial: pl01x: fix pl011 baud rate configuration

UART_IBRD, UART_FBRD, and UART_LCR_H form a single 30-bit wide register which
is updated on a single write strobe generated by a UART_LCR_H write. So, to
internally update the content of UART_IBRD or UART_FBRD, a write to UART_LCR_H
must always be performed at the end.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoserial: pl01x: pass pl01x_type to set baudrate
Vikas Manocha [Fri, 21 Nov 2014 18:34:19 +0000 (10:34 -0800)]
serial: pl01x: pass pl01x_type to set baudrate

Although we were checking the pl01x type, seems like PL010 type was being
passed by mistake.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoimx6: remove redudant CONFIG_SPL_START_S_PATH define
Masahiro Yamada [Fri, 21 Nov 2014 02:50:10 +0000 (11:50 +0900)]
imx6: remove redudant CONFIG_SPL_START_S_PATH define

The CPU directory of IMX6 is arch/arm/cpu/armv7, so setting
CONFIG_SPL_START_S_PATH to arch/arm/cpu/armv7 is totally redundant.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefano Babic <sbabic@denx.de>
9 years agopowerpc: a3m071: remove redundant CONFIG_SPL_* defines
Masahiro Yamada [Fri, 21 Nov 2014 02:50:09 +0000 (11:50 +0900)]
powerpc: a3m071: remove redundant CONFIG_SPL_* defines

The CPU directory of this board is arch/powerpc/cpu/mpc5xxx.
Without the CONFIG_SPL_START_S_PATH and CONFIG_SPL_LDSCRIPT defines,
the same start.o and u-boot-spl.lds are selected by default.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
9 years agopowerpc: lwmon5: remove redundant CONFIG_SPL_* defines
Masahiro Yamada [Fri, 21 Nov 2014 02:50:08 +0000 (11:50 +0900)]
powerpc: lwmon5: remove redundant CONFIG_SPL_* defines

The CPU directory of this board is arch/powerpc/cpu/ppc4xx.
Without the CONFIG_SPL_START_S_PATH and CONFIG_SPL_LDSCRIPT defines,
the same start.o and u-boot-spl.lds are selected by default.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
9 years agopowerpc: mpc8xx: remove hermes board support
Masahiro Yamada [Fri, 21 Nov 2014 02:26:11 +0000 (11:26 +0900)]
powerpc: mpc8xx: remove hermes board support

This board sprinkles #ifdef(CONFIG_HERMES) over various global files
such as include/common.h, common/board_r.c, common/cmd_bdinfo.c.
Let's zap such an ill-behaved board.

It has not been converted to generic board yet and mpc8xx is old
enough.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
9 years agocmd_fuse: return CMD_RET_FAILURE on error
Hector Palacios [Thu, 20 Nov 2014 08:27:42 +0000 (09:27 +0100)]
cmd_fuse: return CMD_RET_FAILURE on error

Fuse drivers, like the mxs_ocotp.c, may return negative error codes but
the commands are only allowed to return CMD_RET_* enum values to the
shell, otherwise the following error appears:

"exit not allowed from main input shell."

Signed-off-by: Hector Palacios <hector.palacios@digi.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
9 years agoARM: rpi: support an environment
Stephen Warren [Thu, 20 Nov 2014 03:41:04 +0000 (20:41 -0700)]
ARM: rpi: support an environment

Enable ENV_IS_IN_FAT so that the environment can be stored persistently.
It's stored in the FAT partition that the RPi firmware requires. On most
RPis, this is on the SD card (which must be present in order for the
system to boot). On the CM this is on the built-in eMMC device.

Since we now have a persistent environment, there's no need to load
uEnv.txt at boot; we only did that to work around the lack of persistent
environment.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
9 years agoARM: rpi: rename rpi_b to rpi
Stephen Warren [Thu, 20 Nov 2014 03:41:03 +0000 (20:41 -0700)]
ARM: rpi: rename rpi_b to rpi

The U-Boot port runs on a variety of RPi models, not just the B. So,
rename the port to something slightly more generic.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
9 years agoARM: rpi_b: detect board revision
Stephen Warren [Wed, 19 Nov 2014 04:40:21 +0000 (21:40 -0700)]
ARM: rpi_b: detect board revision

Detect the board revision early during boot, and print the decoded
model name.

Eventually, this information can be used for tasks such as:
- Allowing/preventing USB device mode; some models have a USB device on-
  board so only host mode makes sense. Others connect the SoC directly
  to the USB connector, so device-mode might make sense.
- The on-board USB hub/Ethernet requires different GPIOs to enable it,
  although luckily the default appears to be fine so far.
- The compute module contains an on-board eMMC device, so we could store
  the environment there. Other models use an SD card and so don't support
  saving the environment (unless we store it in a file on the FAT boot
  partition...)

Set $fdtfile based on this information. At present, the mainline Linux
kernel doesn't contain a separate DTB for most models, but I hope that
will change soon.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
9 years agospl: if MMCSD_MODE_RAW fails, try MMCSD_MODE_FS, if available
Guillaume GARDET [Tue, 18 Nov 2014 09:44:46 +0000 (10:44 +0100)]
spl: if MMCSD_MODE_RAW fails, try MMCSD_MODE_FS, if available

In SPL MMC, boot modes are exclusive. So, if MMCSD_MODE_RAW fails, the board hangs. This patch allows to
try MMCSD_MODE_FS then, if available.

It has been tested on a pandaboard (rev. A3).

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>
9 years agoMAINTAINERS: add me as a maintainer of UBI
Heiko Schocher [Tue, 18 Nov 2014 08:08:45 +0000 (09:08 +0100)]
MAINTAINERS: add me as a maintainer of UBI

Add me for UBI custodian.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
9 years agonet: bootp: as CONFIG_BOOTP_SERVERIP is defined, keep bootfile not changed
Wu, Josh [Tue, 18 Nov 2014 05:07:08 +0000 (13:07 +0800)]
net: bootp: as CONFIG_BOOTP_SERVERIP is defined, keep bootfile not changed

Currenly when CONFIG_BOOTP_SERVERIP is defined, the SERVERIP is not changed
when receive the BOOTP packet. But BOOTFILE is changed via BOOTP packet.

As we will load the BOOTFILE from SERVERIP, if the BOOTFILE is modified
by bootp packet but SERVERIP is not, that is not make sense.

This patch make SERVERIP and BOOTFILE be consistent. If we define the
CONFIG_BOOTP_SERVERIP, then SERVERIP and BOOTFILE will not changed by
BOOTP packet. Only IP address is changed.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
9 years agoget_maintainer.pl: fix source tree detection
Daniel Schwierzeck [Sun, 16 Nov 2014 19:30:11 +0000 (20:30 +0100)]
get_maintainer.pl: fix source tree detection

get_maintainer.pl always fails with following message:
./scripts/get_maintainer.pl: The current directory does not appear to be a linux kernel source tree.

This was caused by commit:

commit 548b310c68ac99a0330d8b56c797c09ff0742d1e
Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
Date:   Thu Oct 30 15:50:15 2014 +0900

    Remove the CREDITS file

    This file is not maintained these days.

    We use MAINTAINERS for the maintainership of the supported boards.
    For dead boards, we have some clues in doc/README.scrapyard and
    also imperishable history in git-log.

Remove CREDITS from source tree detection to fix this.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoFix console functions for U-Boot API
Simon Glass [Fri, 14 Nov 2014 03:51:12 +0000 (20:51 -0700)]
Fix console functions for U-Boot API

Commit 709ea54 made a subtle change to the way the U-Boot API jump table
is set up. So at present putc(), getc(), tstc() and puts() do not work
correctly from functions that use the U-Boot API.

Previously these were set to the stdio functions, but these now take a
parameter specifying which stdio device to use. Instead, we should change
them to use the global functions which do not have a parameter.

This is a slight change in behaviour. The functions will now output to
all selected stdio devices - for example putc() will output a character to
all devices selected by stdout. However in most cases there is only one,
and it isn't necessarily incorrect behaviour anyway.

The API version is not changed since it is compatible with what was there
before.

Reported-by: Martin Dorwig <dorwig@tektronik.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agospl: MMC U-Boot image load from raw partition
Paul Kocialkowski [Sat, 8 Nov 2014 22:14:56 +0000 (23:14 +0100)]
spl: MMC U-Boot image load from raw partition

Raw images of U-Boot can be stored inside MMC partitions, so it makes sense to
read the partition table, looking for a partition number instead of using
a fixed sector address.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
[trini: Only add mmc_load_image_raw_partition() when
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to avoid warning, add missing
conversion in spl_mmc_load_image()]
Signed-off-by: Tom Rini <trini@ti.com>
9 years agoi2c: Correct spelling error
Mark Tomlinson [Mon, 1 Dec 2014 19:49:19 +0000 (08:49 +1300)]
i2c: Correct spelling error

"diconnect" and "disconnet" should both be "disconnect".

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoi2c: Fix deselection of muxes
Mark Tomlinson [Mon, 1 Dec 2014 19:49:18 +0000 (08:49 +1300)]
i2c: Fix deselection of muxes

Due to an uninitialised variable, when muxes were deselected, any value
could be written to the mux control register. On the PCA9548, this could
result in multiple channels being selected, thus enabling multiple
pull-up resistors, and much bus capacitance.

The fix is simply to initialise the written value to zero.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
9 years agoARM: UniPhier: merge UniPhier config headers into a single file
Masahiro Yamada [Fri, 5 Dec 2014 15:03:22 +0000 (00:03 +0900)]
ARM: UniPhier: merge UniPhier config headers into a single file

Some configurations have been moved to Kconfig and the difference
among the config headers of UniPhier SoC variants is getting smaller
and smaller.  Now is a good time to merge them into a single file.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: move support card select to Kconfig
Masahiro Yamada [Fri, 5 Dec 2014 15:03:21 +0000 (00:03 +0900)]
ARM: UniPhier: move support card select to Kconfig

There are two kinds of expansion boards which are often used for
the UniPhier platform and they are only exclusively selectable.
It can be better described by the "choice" menu of Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: move CONFIG_UNIPHIER_SMP to Kconfig
Masahiro Yamada [Fri, 5 Dec 2014 15:03:20 +0000 (00:03 +0900)]
ARM: UniPhier: move CONFIG_UNIPHIER_SMP to Kconfig

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: use boot_is_swapped() macro for readability
Masahiro Yamada [Fri, 5 Dec 2014 15:03:19 +0000 (00:03 +0900)]
ARM: UniPhier: use boot_is_swapped() macro for readability

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: disable autostart by default
Masahiro Yamada [Fri, 5 Dec 2014 15:03:18 +0000 (00:03 +0900)]
ARM: UniPhier: disable autostart by default

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoflash: do not fail even if flash_size is zero
Masahiro Yamada [Fri, 5 Dec 2014 03:20:58 +0000 (12:20 +0900)]
flash: do not fail even if flash_size is zero

CONFIG_SYS_MAX_FLASH_BANKS_DETECT allows to determine the number of
flash banks at run-time, that is, there is a possibility that no flash
bank is found.  Even in such cases, it makes sense to continue the
boot process without any flash device.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
9 years agoARM: UniPhier: remove Denali NAND controller fixup code
Masahiro Yamada [Fri, 28 Nov 2014 06:19:32 +0000 (15:19 +0900)]
ARM: UniPhier: remove Denali NAND controller fixup code

This ugly work-around code is unnecessary since commit f09eb52b3ffc
(mtd: denali: set some registers after nand_scan_ident()).

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agosocfpga: correctly increment freeze_controller_base address
Dinh Nguyen [Wed, 26 Nov 2014 18:14:33 +0000 (12:14 -0600)]
socfpga: correctly increment freeze_controller_base address

Correctly increment the base address of the freeze controller. And since
SYSMGR_FRZCTRL_VIOCTRL_SHIFT is not needed, remove it from the include file.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
9 years agosocfpga: add missing struct member fifo_triple_byte
Dinh Nguyen [Wed, 26 Nov 2014 18:14:32 +0000 (12:14 -0600)]
socfpga: add missing struct member fifo_triple_byte

socfpga_scan_manager structure was missing a data member.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
9 years agoarm: socfpga: DW_SPI: Remove clock info from config header
Stefan Roese [Sun, 16 Nov 2014 11:47:02 +0000 (12:47 +0100)]
arm: socfpga: DW_SPI: Remove clock info from config header

Remove the now unnecessary clocking info from the SoCFPGA
config header. As this info in now used directly in the SPI driver
itself.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
9 years agospi: designware_spi: Some fixes / changes
Stefan Roese [Sun, 16 Nov 2014 11:47:01 +0000 (12:47 +0100)]
spi: designware_spi: Some fixes / changes

As suggested by Pavel, here some fixes to the designware SPI driver:

- Spelling fixes
- Comment for timeout added
- Removed n_bytes completely (bits_per_word is enough for this)
- Unput clock now not defined via macro. The function to
  get the clock value is now called directly from within the driver

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agoarm: socfpga: Add missing DW master SPI clock prototyp to clock_manager.h
Stefan Roese [Sun, 16 Nov 2014 11:47:00 +0000 (12:47 +0100)]
arm: socfpga: Add missing DW master SPI clock prototyp to clock_manager.h

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
9 years agoarm: socfpga: Use only one clrbits_le32 call to deassert SPI reset bits
Stefan Roese [Sun, 16 Nov 2014 11:46:59 +0000 (12:46 +0100)]
arm: socfpga: Use only one clrbits_le32 call to deassert SPI reset bits

As suggested by Pavel, lets combine the two calls into one.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
9 years agoarm: socfpga: dts: altr,rst-mgr.h: Move to SPDX license identifiers
Stefan Roese [Sun, 16 Nov 2014 11:46:58 +0000 (12:46 +0100)]
arm: socfpga: dts: altr,rst-mgr.h: Move to SPDX license identifiers

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
9 years agoarm: socfpga: Add Designware (DW) SPI support to config header
Stefan Roese [Fri, 7 Nov 2014 12:50:34 +0000 (13:50 +0100)]
arm: socfpga: Add Designware (DW) SPI support to config header

Enable support for the DW master SPI controller in the config header
for the SoCFPGA. This controller can only be enabled, if DT support
is enabled.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
9 years agoarm: socfpga: dts: socrates: Add spi1/2 aliases needed DM SPI probing
Stefan Roese [Fri, 7 Nov 2014 12:50:33 +0000 (13:50 +0100)]
arm: socfpga: dts: socrates: Add spi1/2 aliases needed DM SPI probing

Without this alias, DM based probing does not work. So lets add this
alias to get the bus numbering correct for the Designware SPI
controllers.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
9 years agoarm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI devices
Stefan Roese [Fri, 7 Nov 2014 12:50:32 +0000 (13:50 +0100)]
arm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI devices

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
9 years agospi: Add designware master SPI DM driver used on SoCFPGA
Stefan Roese [Fri, 7 Nov 2014 12:50:31 +0000 (13:50 +0100)]
spi: Add designware master SPI DM driver used on SoCFPGA

This patch adds the driver for the Designware master SPI controller. This
IP core is integrated on the Altera SoCFPGA. This implementation is a
driver model (DM) implementation. So multiple SPI drivers can be used.
Thats necessary, since SoCFPGA also integrates the Cadence QSPI controller
used to connect the SPI NOR flashes. Without DM, using multiple SPI
drivers is not possible.

This driver is very loosely based on the Linux driver. Most of the Linux
driver is removed. Only the polling loop for the transfer is really used
from this driver, as we don't support interrupts and DMA right now.

This is tested on the SoCrates SoCFPGA board using the SPI pins on the
P14 header.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agoarm: socfpga: Add Cadence QSPI support to config header
Stefan Roese [Fri, 7 Nov 2014 11:37:52 +0000 (12:37 +0100)]
arm: socfpga: Add Cadence QSPI support to config header

With this driver enabled for SoCFPGA, access to SPI NOR flash is
supported.

The configuration (page size, timing info) will be taken from the
DT. See socrates as an example.

This QSPI supports depends on DT. So QSPI is only enabled if
CONFIG_OF_CONTROL is defined (see socfpga_socrates_defconfig).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agoarm: socfpga: dts: Add spi0 alias for Cadence QSPI driver
Stefan Roese [Fri, 7 Nov 2014 11:37:51 +0000 (12:37 +0100)]
arm: socfpga: dts: Add spi0 alias for Cadence QSPI driver

Without this alias, DM based probing does not work. So lets add this
alias to get the bus numbering correct.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agoarm: socfpga: dts: Add Cadence QSPI DT node to socfpga.dtsi
Stefan Roese [Fri, 7 Nov 2014 11:37:50 +0000 (12:37 +0100)]
arm: socfpga: dts: Add Cadence QSPI DT node to socfpga.dtsi

This DT node is taken from the Rocketboard.org Linux repsitory. And
is needed to enable (configure) the Cadence DM SPI driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agospi: Add Cadence QSPI DM driver used by SoCFPGA
Stefan Roese [Fri, 7 Nov 2014 11:37:49 +0000 (12:37 +0100)]
spi: Add Cadence QSPI DM driver used by SoCFPGA

This driver is cloned from the Altera Rockerboard.org U-Boot
repository. I used this git tag: ACDS14.0.1_REL_GSRD_RC2. With Some
modification to support the U-Boot driver model (DM).

As mentioned above, in this new version I ported this driver to the
new driver model (DM). One big advantage of this move is that now
multiple SPI drivers can be enabled on one platform. And since the
SoCFPGA also has the Designware SPI master controller integrated,
this feature is really needed to support both controllers.

Because of this, this series needs the DT support for SoCFPGA
to be applied. For DT based probing in the SPI DM.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agoarm: socfpga: dts: Move to SPDX license identifiers
Stefan Roese [Fri, 14 Nov 2014 07:10:44 +0000 (08:10 +0100)]
arm: socfpga: dts: Move to SPDX license identifiers

The socfpga dts files are copied from the Rocketboards.org repository.
In U-Boot we usually replace the full-blown license header text with
the SPDX license identifiers. Lets do this for these new dts files
as well.

I just forgot to do this while adding the DT support for socfpga.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
9 years agoarm: socfpga: set skew settings for ethernet phy
Dinh Nguyen [Thu, 13 Nov 2014 17:23:41 +0000 (11:23 -0600)]
arm: socfpga: set skew settings for ethernet phy

Set the PHY skew settings for the ethernet phy on the SOCFPGA Cyclone5
hardware.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Wolfgang Denk <wd@denx.de>