Sricharan R [Thu, 31 Jul 2014 06:35:50 +0000 (12:05 +0530)]
ARM: DRA7: Enable software leveling for dra7
Currently hw leveling is enabled by default on DRA7/72.
But the hardware team suggested to use sw leveling as hw leveling
is not characterized and seen some test case failures.
So enabling sw leveling on all DRA7 platforms.
Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM.
The Flash device is connected to GPMC controller on chip-select[0] and accessed
as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and
is CFI compatible.
As multiple devices are share GPMC pins on this board, so following board
settings are required to detect NOR device:
SW5.1 (NAND_BOOTn) = OFF (logic-1)
SW5.2 (NOR_BOOTn) = ON (logic-0) /* Active-low */
SW5.3 (eMMC_BOOTn) = OFF (logic-1)
SW5.4 (QSPI_BOOTn) = OFF (logic-1)
And also set appropriate SYSBOOT configurations:
SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */
SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */
SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */
SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */
SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */
SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */
Also, following changes are required to enable NOR Flash support in
dra7xx_evm board profile:
This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC
chip-select[0] on DRA7xx EVM.
As GPMC pins are shared by multiple devices, so in addition to this patch
following board settings are required for NAND device detection [1]:
SW5.9 (GPMC_WPN) = OFF (logic-1)
SW5.1 (NAND_BOOTn) = ON (logic-0) /* Active-low */
SW5.2 (NOR_BOOTn) = OFF (logic-1)
SW5.3 (eMMC_BOOTn) = OFF (logic-1)
SW5.4 (QSPI_BOOTn) = OFF (logic-1)
And also set appropriate SYSBOOT configurations
SW2.1 (SYSBOOT[0]) = ON (logic-1) /* selects NAND Boot */
SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */
SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */
SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */
SW2.5 (SYSBOOT[4]) = ON (logic-1) /* selects NAND Boot */
SW2.6 (SYSBOOT[5]) = ON (logic-1) /* selects NAND Boot */
SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */
SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */
SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */
SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */
SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */
SW3.5 (SYSBOOT[12])= ON (logic-1) /* device type: Addr/Data Muxed */
SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */
SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */
Following changes are required in board.cfg to enable NAND on J6-EVM:
This patch adds support for NAND device connected to GPMC chip-select on
following AM43xx EVM boards.
am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a
time either eMMC or NAND can be enabled. Selection between eMMC and NAND is
controlled by:
(a) Statically using Jumper on connecter (J89) present on board.
(a) If Jumper on J89 is NOT used, then selection can be dynamically controlled
by driving SPI2_CS0[MUX_MODE=GPIO] pin via software:
SPI2_CS0 == 0: NAND (default)
SPI2_CS0 == 1: eMMC
am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI,
Thus only one of the two can be used at a time. Selection is controlled by:
(a) Dynamically driving following GPIO pin from software
GPMC_A0(GPIO) == 0 NAND is selected (default)
NAND device (MT29F4G08AB) on these boards has:
- data-width=8bits
- blocksize=256KB
- pagesize=4KB
- oobsize=224 bytes
For above NAND device, ROM code expects the boot-loader to be flashed in BCH16
ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs.
board/ti/am335x: add support for beaglebone NOR Cape
This patch adds support of NOR cape[1] for both Beaglebone (white) and
Beaglebone(Black) boards. NOR Flash on this cape is connected to GPMC
chip-select[0] and accesses as external memory-mapped device.
This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device.
As GPMC chip-select[0] can be shared by multiple capes so NOR profile is
not enabled by default in boards.cfg. Following changes are required to
enable NOR cape detection when building am335x_boneblack board profile.
board/ti/am335x: add support for beaglebone NAND cape
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions of Beaglebone(AM335x) NAND capes
(a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64
(b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224
Further information and datasheets can be found at [1] and [2]
* How to boot from NAND using Memory Expander + NAND Cape ? *
- Important: As BOOTSEL values are sampled only at POR, so after changing any
setting on SW2 (DIP switch), disconnect and reconnect all board power supply
(including mini-USB console port) to POR the beaglebone.
- Selection of ECC scheme
for NAND cape(a), ROM code expects BCH8_HW ecc-scheme
for NAND cape(b), ROM code expects BCH16_HW ecc-scheme
- Selction of boot modes can be controlled via DIP switch(SW2) present on
Memory Expander cape.
SW2[SWITCH_BOOT] == OFF follow default boot order MMC-> SPI -> UART -> USB
SW2[SWITCH_BOOT] == ON boot mode selected via DIP switch(SW2)
So to flash NAND, first boot via MMC or other sources and then switch to
SW2[SWITCH_BOOT]=ON to boot from NAND Cape.
- For NAND boot following switch settings need to be followed
SW2[ 1] = OFF (SYSBOOT[ 0]==1: NAND boot mode selected )
SW2[ 2] = OFF (SYSBOOT[ 1]==1: -- do -- )
SW2[ 3] = ON (SYSBOOT[ 2]==0: -- do -- )
SW2[ 4] = ON (SYSBOOT[ 3]==0: -- do -- )
SW2[ 5] = OFF (SYSBOOT[ 4]==1: -- do -- )
SW2[ 6] = OFF (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device )
SW2[ 7] = ON (SYSBOOT[ 9]==0: ECC done by ROM )
SW2[ 8] = ON (SYSBOOT[10]==0: Non Muxed device )
SW2[ 9] = ON (SYSBOOT[11]==0: -- do -- )
*IMPORTANT NOTE*
As Beaglebone board shares the same config as AM335x EVM, so following
changes are required in addition to this patch for Beaglebone NAND cape.
(1) Enable NAND in am335x_beaglebone board profile
(2) Add CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config because:
- AM335x EVM has NAND device with datawidth=8, whereas
- Beaglebone NAND cape has NAND device with data-width=16
This patch
- consolidate CONFIG_SYS_NAND_xx and CONFIG_SPL_NAND_xx from various
configuration files into single file.
- update MTD Partition table to match AM335x_EVM DT in linux-kernel
- segregate CONFIGs based on different boot modes (like SPL and U-Boot)
Tom Rini [Fri, 18 Jul 2014 15:51:33 +0000 (11:51 -0400)]
tseries: Set CONFIG_ENV_IS_NOWHERE for SPL+NAND
In the case of SPL on these boards we only need environment for
SPL_USBETH, so it's safe to normally use ENV_IS_NOWHERE and SPL+NAND
does not support environment today.
Cc: Hannes Petermaier <oe5hpm@oevsv.at> Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Fri, 18 Jul 2014 15:51:32 +0000 (11:51 -0400)]
TI:armv7: Change CONFIG_SPL_STACK to not be CONFIG_SYS_INIT_SP_ADDR
There are times where we may need more than a few kilobytes of stack
space. We also will not be using CONFIG_SPL_STACK location prior to DDR
being initialized (CONFIG_SYS_INIT_SP_ADDR is still used there) so pick
a good location within DDR for this to be. Tested on
OMAP4/AM335x/OMAP5/DRA7xx.
Tom Rini [Fri, 18 Jul 2014 15:51:31 +0000 (11:51 -0400)]
am335x_evm: Move SPL network defines
On am335x_evm we only support USBETH for a networking SPL option so move
the rest of the defines under that area as that's the only time we need
(and want) environment support here.
Vasili Galka [Thu, 14 Aug 2014 14:42:05 +0000 (17:42 +0300)]
nios2: Fix printf size_t format related warnings (again...)
When compiling the current code on GCC 4.8.3, the following warnings
appear:
warning: format '%zu' expects argument of type 'size_t', but argument
2 has type 'long unsigned int' [-Wformat=]
There were many mails about such warnings on different architectures.
This patch limits itself to the nios2 architecture.
The problem is that for the size_t (%zu, %zd, ...) arguments of
printf GCC does not verify the type match to size_t type. It verifies
the type match to the compiler-defined __SIZE_TYPE__ type. Thus, if
size_t is defined different from __SIZE_TYPE__ - warnings inevitably
appear.
There is a comment by Thomas Chou to the (rejected) patch:
http://patchwork.ozlabs.org/patch/272102/
which explains that the older GCC toolchains (gcc-3.4.6 and gcc-4.1.2)
expect size_t to be "unsigned long" and the newer expect it to be
"unsigned int". Thus, no matter how we define size_t - either way
warnings appear when using some GCC version.
By rejecting that patch, a choice was made to prefer older GCC versions
and leave the warnings when building with the newer toolchains.
Personally, I disagree with this choice...
In any case, this patch proposes a way to fix the warnings for any GCC
version. Just define size_t using the __SIZE_TYPE__ compiler-defined
type and the type verification will pass.
I tested that this fixes the warning on GCC 4.8.3. I don't have an
older toolchain to test with, but __SIZE_TYPE__ was definitely defined
in GCC 3.4.6, so it should work there too.
Signed-off-by: Vasili Galka <vvv444@gmail.com> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Masahiro Yamada [Thu, 21 Aug 2014 02:44:34 +0000 (11:44 +0900)]
kconfig: convert Kconfig helper script into a shell script
Commit 51148790 added scripts/multiconfig.py written in Python 2
to adjust Kconfig for U-Boot.
It has been hard for Python 3 users because Python 2 and Python 3
are not compatible with each other.
We are not happy about adding a new host tool dependency
(in this case, Python version dependency) for the core build process.
After some discussion, we decided to use only basic tools.
The script may get a bit more unreadable by shell scripting,
but we believe it is worthwhile.
In addition, this commit revives "<board>_config" target that is
equivalent to "<board>_defconfig" for backwards compatibility.
It is annoying to adjust various projects which use U-Boot.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Stephen Warren <swarren@nvidia.com>
Roger Meier [Wed, 20 Aug 2014 20:10:29 +0000 (22:10 +0200)]
Makefile: remove generated boards.cfg within make distclean
Signed-off-by: Roger Meier <roger@bufferoverflow.ch> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org>
Thierry Reding [Tue, 19 Aug 2014 08:21:24 +0000 (10:21 +0200)]
net: More BOOTP retry timeout improvements
It's not unusual for DHCP servers to take a couple hundred milliseconds
to respond to DHCP discover messages. One possible reason for the delay
can be that the server checks (typically using an ARP request) that the
IP it's about to hand out isn't in use yet. To make matters worse, some
servers may also queue up requests and process them sequentially, which
can cause excessively long delays if clients retry too fast.
Commit f59be6e850b3 ("net: BOOTP retry timeout improvements") shortened
the retry timeouts significantly, but the BOOTP/DHCP implementation in
U-Boot doesn't handle that well because it will ignore incoming replies
to earlier requests. In one particular setup this increases the time it
takes to obtain a DHCP lease from 630 ms to 8313 ms.
This commit attempts to fix this in two ways. First it increases the
initial retry timeout from 10 ms to 250 ms to give DHCP servers some
more time to respond. At the same time a cache of outstanding DHCP
request IDs is kept so that the implementation will know to continue
transactions even after a retransmission of the DISCOVER message. The
maximum retry timeout is also increased from 1 second to 2 seconds. An
ID cache of size 4 will keep DHCP requests around for 8 seconds (once
the maximum retry timeout has been reached) before dropping them. This
should give servers plenty of time to respond. If it ever turns out
that this isn't enough, the size of the cache can easily be increased.
With this commit the DHCP lease on the above-mentioned setup still takes
longer (1230 ms) than originally, but that's an acceptable compromise to
improve DHCP lease acquisition time for a broader range of setups.
To make it easier to benchmark DHCP in the future, this commit also adds
the time it took to obtain a lease to the final "DHCP client bound to
address x.x.x.x" message.
Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Bryan Wu [Fri, 15 Aug 2014 23:51:38 +0000 (16:51 -0700)]
image: fix bootm failure for FIT image
Commit b3dd64f5d537 "bootm: use genimg_get_kernel_addr()" introduced
a bug for booting FIT image. It's because calling fit_parse_config()
twice will give us wrong value in img_addr.
Add a new function genimg_get_kernel_addr_fit() whichl will always
return fit_uname_config and fit_uname_kernel for CONFIG_FIT.
genimg_get_kernel_addr() will ignore those to parameters.
Reported-by: York Sun <yorksun@freescale.com> Signed-off-by: Bryan Wu <pengw@nvidia.com>
Masahiro Yamada [Fri, 15 Aug 2014 17:50:12 +0000 (02:50 +0900)]
kconfig: remove DEFCONFIG_LIST
CONFIG_DEFCONFIG_LIST specifies the default defconfig.
It is used by "make savedefconfig" when .config is missing.
But that's it. I could not find other useful cases.
As a side effect, CONFIG_DEFCONFIG_LIST="configs/sandbox_defconfig"
is contained in .config of every target board, which some people
think is odd. So, let's remove it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
Vasili Galka [Thu, 14 Aug 2014 09:40:55 +0000 (12:40 +0300)]
Makefile: Use Kbuild style for system_map.o generation step
The command generating the "common/system_map.o" file was always shown
during the build making the output messy. Now it is called using the
Kbuild "cmd" macro, so that the full command is shown only when
building in verbose mode.
Colin Cross [Tue, 12 Aug 2014 17:59:27 +0000 (10:59 -0700)]
add header for Android sparse image format
Add a BSD-3 relicensed version of the Android sparse format image
header from:
https://android.googlesource.com/platform/system/core/+/28fa5bc347390480fe190294c6c385b6a9f0d68b/libsparse/sparse_format.h
Unchanged except for the license header.
Cc: Tom Rini <trini@ti.com> Signed-off-by: Colin Cross <ccross@android.com>
Masahiro Yamada [Wed, 6 Aug 2014 04:42:34 +0000 (13:42 +0900)]
tools/genboardscfg.py: Do not output SPLCPU field
Prior to Kconfig, the CPU field of boards.cfg could optionally have
":SPLCPU", like "armv7:arm720t".
(Actually this syntax was only used for Tegra platform.)
Now it is not necessary at all because CPU is defined by
CONFIG_SYS_CPU in Kconfig.
For Tegra platform, the Kconfig option is described as follows:
config SYS_CPU
string
default "arm720t" if SPL_BUILD
default "armv7" if !SPL_BUILD
Masahiro Yamada [Tue, 5 Aug 2014 06:56:43 +0000 (15:56 +0900)]
kbuild: move extra gcc checks to scripts/Makefile.extrawarn
This commit was imported from Linux Kernel:
commit a86fe353 written by me.
W=... provides extra gcc checks.
Having such code in scripts/Makefile.build results in the same flags
being added to KBUILD_CFLAGS multiple times becuase
scripts/Makefile.build is invoked every time Kbuild descends into
the subdirectories.
Since the top Makefile is already too cluttered, this commit moves
all of extra gcc check stuff to a new file scripts/Makefile.extrawarn,
which is included from the top Makefile.
Masahiro Yamada [Fri, 15 Aug 2014 15:59:26 +0000 (00:59 +0900)]
tools, scripts: refactor error-out statements of Python scripts
In Python, sys.exit() function can also take an object other
than an integer.
If an integer is given to the argument, Python exits with the return
code of it. If a non-integer argument is given, Python outputs it
to stderr and exits with the return code of 1.
That means,
print >> sys.stderr, "Blah Blah"
sys.exit(1)
is equivalent to
sys.exit("Blah Blah")
The latter is a useful shorthand.
Note:
Some error messages in Buildman and Patman were output to stdout.
But they should go to stderr. They are also fixed by this commit.
This is a nice side effect.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
Shaohui Xie [Wed, 13 Aug 2014 10:19:15 +0000 (18:19 +0800)]
powerpc/T4240QDS/eth: some fix for XFI
XFI is supported on T4QDS-XFI board, which removed slot3, and four LANEs
of serdes2 are routed to a SFP+ cages, which to house fiber cable or
direct attach cable(copper), the copper cable is used to emulate the
10GBASE-KR scenario.
So, for XFI usage, there are two scenarios, one will use fiber cable,
another will use copper cable. For fiber cable, there is NO PHY, while
for copper cable, we need to use internal PHY which exist in Serdes to
do auto-negotiation and link training, which implemented in kernel.
We use hwconfig to define cable type for XFI, and fixup dtb based on the
cable type.
For copper cable, set below env in hwconfig:
fsl_10gkr_copper:<10g_mac_name>
the <10g_mac_name> can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2. The
four <10g_mac_name>s do not have to be coexist in hwconfig. For XFI ports,
if a given 10G port will use the copper cable for 10GBASE-KR, set the
<10g_mac_name> of the port in hwconfig, otherwise, fiber cable will be
assumed to be used for the port.
For ex. if four XFI ports will both use copper cable, the hwconfig
should contain:
1. give PHY address to a XFI port, otherwise, the XFI ports will not be
available in U-boot, there is no PHY physically for XFI when using fiber
cable, this is just to make U-boot happy and we can use the XFI ports
in U-boot.
2. fixup dtb to use fixed-link in case of fiber cable which has no PHY.
Kernel requests that a MAC must have a PHY or fixed-link.
When using XFI protocol, the MAC 9/10 on FM1 should init as 10G interface.
Change serdes 2 protocol 56 to 55 which has same feature as 56 since 56
is not valid any longer.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
km-powerpc: define CONFIG_PRAM to protect PHRAM and PNVRAM
When u-boot initializes the RAM (early in boot) it looks for the "pram"
env variable to know which is area it cannot use. If the "pram" env variable
is not found, the default CONFIG_PRAM value is used.
This value used to be 0 (no protection at all). This patch sets it to a
value that covers PHRAM and PNVRAM that must be protected in our case.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Reviewed-by: York Sun <yorksun@freescale.com>
powerpc/mpc85xx: Enabling CPC conditionally based on hwconfig options
If hwconfig does not contains "en_cpc" then by default all cpcs are enabled
If this config is defined then only those individual cpcs which are defined
in the subargument of "en_cpc" will be enabled e.g en_cpc:cpc1,cpc2; (this
will enable cpc1 and cpc2) or en_cpc:cpc2; (this enables just cpc2)
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Lukasz Majewski [Mon, 18 Aug 2014 10:12:27 +0000 (12:12 +0200)]
test: dfu: cosmetic: Add missing license information to DFU test scripts
By mistake I've forgotten to add the SPDX license tags for the DFU testing
scripts.
This commit fixes that and also provides some other relevant information.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Stephen Warren <swarren@nvidia.com>
Tim Harvey [Fri, 8 Aug 2014 05:35:45 +0000 (22:35 -0700)]
imx: ventana: add econfig command
The Gateworks Ventana EEPROM contains a set of configuration bits that
affect the removal of device-tree nodes that support peripherals that do not
exist on sub-loaded boards. This patch adds:
- a structure to define a config bit name, dt node alias, bit position
- an array of supported configuration items
- an econfig command to get/set/list configuration bits
- use of the array when adjusting the FDT prior to boot
Tim Harvey [Fri, 8 Aug 2014 05:35:48 +0000 (22:35 -0700)]
imx: ventana: configure i2c_dis# pin properly for gw53xx
The i2c_dis# pinmux/padconf was missing for the GW53xx (this feature was
added to the GW53xx on revB PCB's). Additionally, remove the duplicate
config for GW54xx.
Tim Harvey [Fri, 8 Aug 2014 05:35:41 +0000 (22:35 -0700)]
imx: ventana: set dynamic env var for flash layout
NAND devices have differing layouts with respect to page size and pages per
block. These parameters affect the parameters that need to be passed to
mkfs.ubifs and ubinize used to create UBI images. The various NAND chips
supported by Gateworks Ventana fall into two different layouts which we
refer to as 'normal' and 'large'. This layout is useful when referencing
ubi files to download and flash so we create a dynamic env variable for it.
Tim Harvey [Fri, 8 Aug 2014 05:57:29 +0000 (22:57 -0700)]
pci: mx6: fix occasional link failures
According to the IMX6 reference manuals, REF_SSP_EN (Reference clock enable
for SS function) must remain deasserted until the reference clock is running
at the appropriate frequency.
Without this patch we find a high link failure rate (>5%) on certain
IMX6 boards at various temperatures.
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Marek Vasut [Sun, 3 Aug 2014 23:47:10 +0000 (01:47 +0200)]
ARM: mx6: Handle the MMDCx_MDCTL COL field caprices
The COL field value cannot be easily calculated from the desired
column number. Instead, there are special cases for that, see the
datasheet, MMDCx_MDCTL field description, field COL . Cater for
those special cases.
Marek Vasut [Sun, 3 Aug 2014 23:47:09 +0000 (01:47 +0200)]
ARM: mx6: Prevent overflow in DRAM size detection
The MX6 DRAM controller can be configured to handle 4GiB of DRAM, but
only 3840 MiB of that can be really used. In case the controller is
configured to operate a 4GiB module, the imx_ddr_size() function will
correctly compute that there is 4GiB of DRAM in the system. Firstly,
the return value is 32-bit, so the function will effectively return
zero. Secondly, the MX6 cannot address the full 4GiB, but only 3840MiB
of all that. Thus, clamp the returned size to 3840MiB in such case.
Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
Gabriel Huau [Sat, 26 Jul 2014 18:35:43 +0000 (11:35 -0700)]
mx6: add support of multi-processor command
This allows u-boot to load different OS or Bare Metal application on
different cores of the i.MX6 SoC.
For example: running Android on cpu0 and a RT OS like QNX/FreeRTOS on cpu1.
Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Stefano Babic <sbabic@denx.de>
Stephen Warren [Thu, 31 Jul 2014 23:29:38 +0000 (17:29 -0600)]
ARM: tegra: remove custom define for Jetson TK1
Now that Kconfig has a per-board option, we can use that directly rather
than inventing a custom define for the AS3722 code to determine which
board it's being built for.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 2 Jul 2014 20:12:30 +0000 (14:12 -0600)]
ARM: tegra: Use mem size from MC rather than ODMDATA
In at least Tegra124, the Tegra memory controller (MC) has a register
that controls the memory size. Read this to determine the memory size
rather than requiring this to be redundantly encoded into the ODMDATA.
This way, changes to the BCT (i.e. MC configuration) automatically
updated SW's view of the memory size, without requiring manual changes
to the ODMDATA.
Future work potentially required:
* Clip the memory size to architectural limits; U-Boot probably doesn't
and won't support either LPAE or Tegra's "swiss cheese" memory layout,
at least one of which would be required for >2GB RAM.
* Subtract out any carveout required by firmware on future SoCs.
Based-on-work-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 25 Jul 2014 23:16:54 +0000 (17:16 -0600)]
ARM: tegra: enable DFU too
Enable DFU protocol support (via the "dfu" command) on Tegra boards where
USB device/gadget mode is enabled.
Note that for DFU to operate correctly on Tegra, we still need some DFU
fixes/enhancements that are going through the DFU -> USB trees. However,
the code builds just fine without those changes, and applying this patch
now will allow both sets of patches to meet in the main U-Boot tree much
more quickly.
In order to run test/dfu/dfu_gadget_test.sh, you would need to add the
following to the board configuration:
CONFIG_EXT4_WRITE
CONFIG_CMD_EXT4_WRITE
However, I haven't enabled those here, since I believe the main use-case
for DFU on Tegra is raw flash writing, rather than filesystem access, so
we don't need the additional code-size hit. However, I could be persuaded
otherwise! We should probably add a separate test script for raw flash
access.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Bryan Wu [Tue, 24 Jun 2014 02:45:29 +0000 (11:45 +0900)]
ARM: tegra: Disable VPR
On Tegra114 and Tegra124 platforms, certain display-related registers cannot
be accessed unless the VPR registers are programmed. For bootloader, we
probably don't care about VPR, so we disable it (which counts as programming
it, and allows those display-related registers to be accessed).
Sascha Silbe [Sun, 11 Aug 2013 14:40:45 +0000 (16:40 +0200)]
openrd: fail build if U-Boot would overlap with environment in flash
Set CONFIG_BOARD_SIZE_LIMIT so we'll notice at build time if U-Boot
has grown so large that it would overlap with the environment area in
flash, rather than bricking the device at run-time on first saveenv.
Sascha Silbe [Sun, 11 Aug 2013 14:40:43 +0000 (16:40 +0200)]
README: document CONFIG_BOARD_SIZE_LIMIT
CONFIG_BOARD_SIZE_LIMIT was introduced by f3a14d37 [Makefile: allow
boards to check file size limits] and is in use by several boards, but
never got documented.
Stephen Warren [Mon, 11 Aug 2014 22:09:28 +0000 (16:09 -0600)]
pci: fix overflow in __pci_hose_bus_to_phys w/ large RAM
If a 32-bit system has 2GB of RAM, and the base address of that RAM is
2GB, then start+size will overflow a 32-bit value (to a value of 0).
To avoid such an overflow, convert __pci_hose_bus_to_phys() to calculate
the offset of a bus address into a PCI region, rather than comparing a
bus address against the end of a PCI region.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Heiko Schocher [Mon, 11 Aug 2014 09:17:08 +0000 (11:17 +0200)]
tools, fit_info: increase buffer for command name
currently the buffer for command name is 50 bytes only. If using
fit_info with long absolute paths, this is not enough, so raise
it to 256 (as it is in fit_check_sign)
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
projects / karo-tx-uboot.git / log