karo-tx-uboot.git
7 years agoMerge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Wed, 19 Jun 2013 10:53:59 +0000 (12:53 +0200)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

Conflicts:
spl/Makefile

7 years agoMMC: DWMMC: Fix FIFO_DEPTH calculation
Rajeshwari Shinde [Fri, 24 May 2013 12:45:34 +0000 (18:15 +0530)]
MMC: DWMMC: Fix FIFO_DEPTH calculation

Current DWMMC driver used to give FIFO underrun/overrun error every 3rd time
for mmc rescan command.
In current code FIFO_DEPTH is getting calculated after reading the default FIFOTH
register and extracting the RX_WMARK bits from it i.e (RX_WMARK = FIFO_DEPTH/2 -1).
Instead of storing the correct value, we were recalculating the FIFO_DEPT each
time which is not correct.

Based on "[PATCH V9 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues"
http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/160247

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agopower: exynos-tmu: use the mux_addr bit fields in tmu_control register
Naveen Krishna Chatradhi [Fri, 5 Apr 2013 22:21:39 +0000 (15:21 -0700)]
power: exynos-tmu: use the mux_addr bit fields in tmu_control register

This patch implements the mux_addr bit fields defined in tmu_control
register (used for debugging purpose)

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agopower: exynos-tmu: fix warnings and clean up code
Naveen Krishna Chatradhi [Fri, 5 Apr 2013 22:21:38 +0000 (15:21 -0700)]
power: exynos-tmu: fix warnings and clean up code

This patch does the folowing
1. change the data types for unsigned int variable to unsigned
2. change the tmu_base type to struct exynos5_tmu_reg *
3. Add timer functionality for get_cur_temp()
4. error handling in the get_tmu_fdt_values()
5. Add check for curr_temp reading
6. some cosmotic changes.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoCOMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition
Amar [Sat, 27 Apr 2013 06:13:00 +0000 (11:43 +0530)]
COMMON: MMC: Command to support EMMC booting and to resize EMMC boot partition

This patch adds commands to access(open/close) and resize boot partitions on EMMC.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoSMDK5250: Enable EMMC booting
Amar [Sat, 27 Apr 2013 06:12:59 +0000 (11:42 +0530)]
SMDK5250: Enable EMMC booting

This patch adds support for EMMC booting on SMDK5250.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoMMC: APIs to support resize of EMMC boot partition
Amar [Sat, 27 Apr 2013 06:12:58 +0000 (11:42 +0530)]
MMC: APIs to support resize of EMMC boot partition

This patch adds APIs to access(open / close) and to resize boot partiton of EMMC.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoSMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
Amar [Sat, 27 Apr 2013 06:12:57 +0000 (11:42 +0530)]
SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT

This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
        exynos5-dt.c:   This file shall contain all code which supports FDT.
                        Any addition of FDT support for any module needs to be
                        added in this file.
        smdk5250.c:     This file shall contain the code which supports non-FDT.
                        version. Any addition of non-FDT support for any module
                        needs to be added in this file.
                        May be, the file smdk5250.c can be removed in near future
                        when non-FDT is not required.

The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.

NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoEXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.
Amar [Sat, 27 Apr 2013 06:12:56 +0000 (11:42 +0530)]
EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.

This patch initialises the local variable 'shift' to zero.
The uninitialised local variable 'shift' had garbage value and was
resulting in unwnated results in the functions exynos5_get_mmc_clk()
and exynos4_get_mmc_clk().

Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoEXYNOS5: DWMMC: Added FDT support for DWMMC
Amar [Sat, 27 Apr 2013 06:12:55 +0000 (11:42 +0530)]
EXYNOS5: DWMMC: Added FDT support for DWMMC

This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoDWMMC: Initialise dwmci and resolve EMMC read write issues
Amar [Sat, 27 Apr 2013 06:12:54 +0000 (11:42 +0530)]
DWMMC: Initialise dwmci and resolve EMMC read write issues

This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence modified the fifo size
computation to resolve EMMC read write issues.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoEXYNOS5: FDT: Add DWMMC device node data
Amar [Sat, 27 Apr 2013 06:12:53 +0000 (11:42 +0530)]
EXYNOS5: FDT: Add DWMMC device node data

This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoFDT: Add compatible string for DWMMC
Amar [Sat, 27 Apr 2013 06:12:52 +0000 (11:42 +0530)]
FDT: Add compatible string for DWMMC

Add required compatible information for DWMMC driver.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoarm:trats: change auto-booting to boot kernel with separate device tree blob
Arkadiusz Wlodarczyk [Tue, 2 Apr 2013 13:10:16 +0000 (15:10 +0200)]
arm:trats: change auto-booting to boot kernel with separate device tree blob

Signed-off-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Arkadiusz Wlodarczyk <a.wlodarczyk@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoarm: pxa: config option for PXA270 turbo mode
Sergey Yanovich [Tue, 21 May 2013 19:49:41 +0000 (23:49 +0400)]
arm: pxa: config option for PXA270 turbo mode

PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
default run mode. Activating the mode early significantly speeds
up boot process.

Signed-off-by: Sergey Yanovich <ynvich@gmail.com>
7 years agoarm: pxa: Add support for ICP DAS LP-8x4x
Sergey Yanovich [Mon, 20 May 2013 21:26:00 +0000 (01:26 +0400)]
arm: pxa: Add support for ICP DAS LP-8x4x

LP-8x4x is a programmable automation controller by ICP DAS. It is
shipped with outdated U-Boot v1.3.0

This patch adds enough supports to boot the board:
 - 128M of 128M SDRAM
 - 32M of 48M NOR Flash memory
 - 1 of 4 Serial consoles (PXA FFUART)
 - 2 of 2 Ethernet controllers (DM9000)

Signed-off-by: Sergey Yanovich <ynvich@gmail.com>
Series-to: u-boot
Series-cc: marex

7 years agocosmetic: arm: fix comments in arch/arm/lib/crt0.S
Masahiro Yamada [Wed, 15 May 2013 08:33:16 +0000 (17:33 +0900)]
cosmetic: arm: fix comments in arch/arm/lib/crt0.S

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
7 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 10 Jun 2013 16:28:37 +0000 (18:28 +0200)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

7 years agoarm/km: make local functions static
Holger Brunck [Mon, 6 May 2013 13:04:51 +0000 (15:04 +0200)]
arm/km: make local functions static

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
7 years agoarm: da830: moved pinmux configurations to the arch tree
Vishwanathrao Badarkhe, Manish [Wed, 29 May 2013 21:55:11 +0000 (21:55 +0000)]
arm: da830: moved pinmux configurations to the arch tree

Move pinmux configurations for the DA830 SoCs from board file
to the arch tree so that it can be used for all da830 based devices.
Also, avoids duplicate pinmuxing in case of NAND.

Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
7 years agoARM: DRA7: Add Maintainer
Lokesh Vutla [Fri, 7 Jun 2013 00:59:02 +0000 (00:59 +0000)]
ARM: DRA7: Add Maintainer

Adding Maintainer for DRA7xx.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoOMAP5: Enable access to auxclk registers
Lubomir Popov [Wed, 15 May 2013 04:41:01 +0000 (04:41 +0000)]
OMAP5: Enable access to auxclk registers

auxclk0 and auxclk1 are utilized on some OMAP5 boards.
Define the infrastructure needed for accessing them
without using magic numbers.

Also remove unrelated TPS62361 defines from clocks.h

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
7 years agoARM: OMAP: I2C: New read, write and probe functions
Lubomir Popov [Sat, 1 Jun 2013 06:44:38 +0000 (06:44 +0000)]
ARM: OMAP: I2C: New read, write and probe functions

New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4
(4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older
OMAPs and derivatives as well. The only anticipated exception would
be the OMAP2420, which shall require driver modification.
- Rewritten i2c_read to operate correctly with all types of chips
  (old function could not read consistent data from some I2C slaves).
- Optimised i2c_write.
- New i2c_probe, performs write access vs read. The old probe could
  hang the system under certain conditions (e.g. unconfigured pads).
- The read/write/probe functions try to identify unconfigured bus.
- Status functions now read irqstatus_raw as per TRM guidelines
  (except for OMAP243X and OMAP34XX).
- Driver now supports up to I2C5 (OMAP5).

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Tested-by: Heiko Schocher <hs@denx.de>
7 years agoarm: Remove OMAP2420H4 and all omap24xx support
Tom Rini [Tue, 4 Jun 2013 12:02:06 +0000 (12:02 +0000)]
arm: Remove OMAP2420H4 and all omap24xx support

The omap2420H4 was the only mainline omap24xx board.  Prior to being
fixed by Jon Hunter in time for v2013.04 it had been functionally broken
for a very long time.  Remove this board as there's not been interest in
it in U-Boot for quite a long time.

Signed-off-by: Tom Rini <trini@ti.com>
7 years agoda830: add MMC support
Vishwanathrao Badarkhe, Manish [Wed, 22 May 2013 03:38:48 +0000 (03:38 +0000)]
da830: add MMC support

Add MMC support for da830 boards in order to perform
mmc operations(read,write and erase).

Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
7 years agoARM: OMAP5: Power: Add more functionality to Palmas driver
Lubomir Popov [Thu, 6 Jun 2013 04:16:40 +0000 (04:16 +0000)]
ARM: OMAP5: Power: Add more functionality to Palmas driver

Add some useful functions, and the corresponding definitions.

Add support for powering on the dra7xx_evm SD/MMC LDO
(courtesy Lokesh Vutla <lokeshvutla@ti.com>).

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Reviewed-by: Tom Rini <trini@ti.com>
7 years agoARM: DRA7xx: EMIF: Change settings required for EVM board
Sricharan R [Thu, 30 May 2013 03:19:39 +0000 (03:19 +0000)]
ARM: DRA7xx: EMIF: Change settings required for EVM board

DRA7 EVM board has the below configuration. Adding the
settings for the same here.

   2Gb_1_35V_DDR3L part * 2 on EMIF1
   2Gb_1_35V_DDR3L part * 4 on EMIF2

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: DRA7xx: clocks: Update PLL values
Lokesh Vutla [Thu, 30 May 2013 03:19:38 +0000 (03:19 +0000)]
ARM: DRA7xx: clocks: Update PLL values

Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
7 years agoARM: DRA7xx: Update pinmux data
Lokesh Vutla [Thu, 30 May 2013 03:19:37 +0000 (03:19 +0000)]
ARM: DRA7xx: Update pinmux data

Updating pinmux data as specified in the latest DM

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Balaji T K <balajitk@ti.com>
7 years agommc: omap_hsmmc: Update pbias programming
Balaji T K [Thu, 6 Jun 2013 05:04:32 +0000 (05:04 +0000)]
mmc: omap_hsmmc: Update pbias programming

Update pbias programming sequence for OMAP5 ES2.0/DRA7

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: DRA7xx: Correct SRAM END address
Sricharan R [Thu, 30 May 2013 03:19:35 +0000 (03:19 +0000)]
ARM: DRA7xx: Correct SRAM END address

NON SECURE SRAM is 512KB in DRA7xx devices.
So fixing it here.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: DRA7xx: Correct the SYS_CLK to 20MHZ
Sricharan R [Thu, 30 May 2013 03:19:34 +0000 (03:19 +0000)]
ARM: DRA7xx: Correct the SYS_CLK to 20MHZ

The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
And also moving V_SCLK, V_OSCK defines to
arch/clock.h for OMAP4+ boards.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: DRA7xx: Change the Debug UART to UART1
Sricharan R [Thu, 30 May 2013 03:19:33 +0000 (03:19 +0000)]
ARM: DRA7xx: Change the Debug UART to UART1

Serial UART is connected to UART1. So add the change
for the same.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
7 years agoARM: DRA7xx: Do not enable srcomp for DRA7xx Soc's
Lokesh Vutla [Thu, 30 May 2013 03:19:32 +0000 (03:19 +0000)]
ARM: DRA7xx: Do not enable srcomp for DRA7xx Soc's

Slew rate compensation cells are not present for DRA7xx
Soc's. So return from function srcomp_enable() if soc is not
OMAP54xx.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: OMAP5: DRA7xx: support class 0 optimized voltages
Nishanth Menon [Thu, 30 May 2013 03:19:31 +0000 (03:19 +0000)]
ARM: OMAP5: DRA7xx: support class 0 optimized voltages

DRA752 now uses AVS Class 0 voltages which are voltages in efuse.

This means that we can now use the optimized voltages which are
stored as mV values in efuse and program PMIC accordingly.

This allows us to go with higher OPP as needed in the system without
the need for implementing complex AVS logic.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: DRA7xx: clocks: Fixing i2c_init for PMIC
Lokesh Vutla [Thu, 30 May 2013 03:19:30 +0000 (03:19 +0000)]
ARM: DRA7xx: clocks: Fixing i2c_init for PMIC

In DRA7xx Soc's voltage scaling is done using GPI2C.
So i2c_init should happen before scaling. I2C driver
uses __udelay which needs timer to be initialized.
So moving timer_init just before voltage scaling.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: DRA7xx: power Add support for tps659038 PMIC
Lokesh Vutla [Thu, 30 May 2013 03:19:29 +0000 (03:19 +0000)]
ARM: DRA7xx: power Add support for tps659038 PMIC

TPS659038 is the power IC used in DRA7XX boards.
Adding support for this and also adding pmic data
for DRA7XX boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: DRA7xx: Add control id code for DRA7xx
Lokesh Vutla [Thu, 30 May 2013 03:19:28 +0000 (03:19 +0000)]
ARM: DRA7xx: Add control id code for DRA7xx

The registers that are used for device identification
are changed from OMAP5 to DRA7xx.
Using the correct registers for DRA7xx.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: OMAP4+: pmic: Make generic bus init and write functions
Lokesh Vutla [Thu, 30 May 2013 02:54:33 +0000 (02:54 +0000)]
ARM: OMAP4+: pmic: Make generic bus init and write functions

Voltage scaling can be done in two ways:
-> Using SR I2C
-> Using GP I2C
In order to support both, have a function pointer in pmic_data
so that we can call as per our requirement.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.h
Lokesh Vutla [Thu, 30 May 2013 02:54:32 +0000 (02:54 +0000)]
ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.h

To be consistent with other ARM platforms,
renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: OMAP5: clocks: Do not enable sgx clocks
Sricharan R [Thu, 30 May 2013 02:54:31 +0000 (02:54 +0000)]
ARM: OMAP5: clocks: Do not enable sgx clocks

SGX clocks should be enabled only for OMAP5 ES1.0.
So this can be removed.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoARM: OMAP4+: Cleanup header files
Lokesh Vutla [Thu, 30 May 2013 02:54:30 +0000 (02:54 +0000)]
ARM: OMAP4+: Cleanup header files

After having the u-boot clean up series, there are
many definitions that are unused in header files.
Removing all those unused ones.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoOMAP5: Fix bug in omap5_es1_prcm struct
Lubomir Popov [Sun, 26 May 2013 10:03:17 +0000 (10:03 +0000)]
OMAP5: Fix bug in omap5_es1_prcm struct

The newly introduced function setup_warmreset_time(), called
from within prcm_init(), tries to write to the prm_rsttime
OMAP5 register. The struct member holding this register's
address is however initialized for OMAP5 ES2.0 only. On ES1.0
devices this uninitialized value causes a second (warm) reset
at startup.

Add .prm_rsttime address init to the ES1.0 struct.

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
Acked-by: Tom Rini <trini@ti.com>
7 years agoOMAP5: add ABB setup for MPU voltage domain
Andrii Tseglytskyi [Mon, 20 May 2013 22:42:09 +0000 (22:42 +0000)]
OMAP5: add ABB setup for MPU voltage domain

Patch adds a call of abb_setup() function, and proper registers
definitions needed for ABB setup sequence. ABB is initialized
for MPU voltage domain.

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
7 years agoOMAP3+: introduce generic ABB support
Andrii Tseglytskyi [Mon, 20 May 2013 22:42:08 +0000 (22:42 +0000)]
OMAP3+: introduce generic ABB support

Adaptive Body Biasing (ABB) modulates transistor bias voltages
dynamically in order to optimize switching speed versus leakage.
Adaptive Body-Bias ldos are present for some voltage domains
starting with OMAP3630. There are three modes of operation:

* Bypass - the default, it just follows the vdd voltage
* Foward Body-Bias - applies voltage bias to increase transistor
  performance at the cost of power.  Used to operate safely at high
  OPPs.
* Reverse Body-Bias - applies voltage bias to decrease leakage and
  save power.  Used to save power at lower OPPs.

Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
7 years agoam33xx: Board: Make CPSW section of ethernet initialization depend on CPSW driver
Joel A Fernandes [Tue, 7 May 2013 05:52:55 +0000 (05:52 +0000)]
am33xx: Board: Make CPSW section of ethernet initialization depend on CPSW driver

Not doing so breaks cases where CPSW is not required such as for USB RNDIS network boot.

Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
7 years agoMerge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Sat, 8 Jun 2013 12:35:10 +0000 (14:35 +0200)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

Conflicts:
drivers/serial/Makefile

7 years agoARM: tegra: only enable SCU on Tegra20
Tom Warren [Thu, 23 May 2013 12:26:18 +0000 (12:26 +0000)]
ARM: tegra: only enable SCU on Tegra20

The non-SPL build of U-Boot on Tegra only runs on a single CPU, and
hence there is no need to enable the SCU when running U-Boot. If an
SMP OS is booted, and it needs the SCU enabled, it will enable the SCU
itself. U-Boot doing so is redundant.

The one exception is Tegra20, where an enabled SCU is required for some
aspects of PCIe to work correctly.

Some Tegra SoCs contain CPUs without a software-controlled SCU. In this
case, attempting to turn it on actively causes problems. This is the case
for Tegra114. For example, when running Linux, the first (or at least
some very early) user-space process will trigger the following kernel
message:

Unhandled fault: imprecise external abort (0x406) at 0x00000000

This is typically accompanied by that process receving a fatal signal,
and exiting. Since this process is usually pid 1, this causes total
system boot failure.

Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, fleshed out description, ported to upstream chipid APIs]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agovf610twr: Drop unneeded 'status' variable
Fabio Estevam [Wed, 5 Jun 2013 11:34:48 +0000 (11:34 +0000)]
vf610twr: Drop unneeded 'status' variable

No need to use the 'status' variable, so just remove it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
7 years agoARM: imx: Fix incorrect usage of CONFIG_SYS_MMC_ENV_PART
Fabio Estevam [Tue, 4 Jun 2013 15:05:39 +0000 (15:05 +0000)]
ARM: imx: Fix incorrect usage of CONFIG_SYS_MMC_ENV_PART

When running the "save" command several times on a mx6qsabresd we see:

U-Boot > save
Saving Environment to MMC...
Writing to MMC(1)... done
U-Boot > save
Saving Environment to MMC...
MMC partition switch failed
U-Boot > save
Saving Environment to MMC...
Writing to MMC(1)... done
U-Boot > save
Saving Environment to MMC...
MMC partition switch failed
U-Boot > save
Saving Environment to MMC...
Writing to MMC(1)... done
U-Boot > save
Saving Environment to MMC...
MMC partition switch failed

This issue is caused by the incorrect usage of CONFIG_SYS_MMC_ENV_PART.

CONFIG_SYS_MMC_ENV_PART should be used to specify the mmc partition that stores
the environment variables.

On some imx boards it is been incorrectly used to pass the partition of kernel
and dtb files for the 'mmcpart' script variable.

Remove the CONFIG_SYS_MMC_ENV_PART usage and configure the 'mmcpart' variable
directly.

Reported-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
7 years agoam33xx/omap: Move save_omap_boot_params to omap-common/boot-common.c
Tom Rini [Fri, 31 May 2013 16:31:59 +0000 (12:31 -0400)]
am33xx/omap: Move save_omap_boot_params to omap-common/boot-common.c

We need to call the save_omap_boot_params function on am33xx/ti81xx and
other newer TI SoCs, so move the function to boot-common.  Only OMAP4+
has the omap_hw_init_context function so add ifdefs to not call it on
am33xx/ti81xx.  Call save_omap_boot_params from s_init on am33xx/ti81xx
boards.

Reviewed-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
7 years agoam33xx: Correct NON_SECURE_SRAM_START/END
Tom Rini [Fri, 31 May 2013 14:48:03 +0000 (10:48 -0400)]
am33xx: Correct NON_SECURE_SRAM_START/END

Prior to Sricharan's cleanup of the boot parameter saving code, we
did not make use of NON_SECURE_SRAM_START on am33xx, so it wasn't a
problem that the address was pointing to the middle of our running SPL.
Correct to point to the base location of the download image area.
Increase CONFIG_SPL_TEXT_BASE to account for this scratch area being
used.  As part of correcting these tests, make use of the fact that
we've always been placing our stack outside of the download image area
(which is fine, once the downloaded image is run, ROM is gone) so
correct the max size test to be the ROM defined top of the download area
to where we link/load at.

Signed-off-by: Tom Rini <trini@ti.com>
---
Changes in v2:
- Fix typo noted by Peter Korsgaard

7 years agoomap-common/hwinit-common.c: Mark omap_rev_string as static
Tom Rini [Fri, 31 May 2013 14:44:23 +0000 (10:44 -0400)]
omap-common/hwinit-common.c: Mark omap_rev_string as static

Only called in this file, mark as static.

Signed-off-by: Tom Rini <trini@ti.com>
7 years agoAdd support for Congatec Conga-QEVAl board
SARTRE Leo [Mon, 3 Jun 2013 23:30:36 +0000 (23:30 +0000)]
Add support for Congatec Conga-QEVAl board

Add minimal support (only boot from mmc device) for the Congatec
Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad
processor) module.

Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
7 years agoexynos: Update origen and smdkv310 to use common tzpc_init
Inderpal Singh [Thu, 4 Apr 2013 23:09:21 +0000 (23:09 +0000)]
exynos: Update origen and smdkv310 to use common tzpc_init

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoexynos: update tzpc to make it common for exynos4 and exynos5
Inderpal Singh [Thu, 4 Apr 2013 23:09:20 +0000 (23:09 +0000)]
exynos: update tzpc to make it common for exynos4 and exynos5

This requires that cpu_is_exynos4/5 should be made available before tzpc_init.
Hence this patch also makes necessary changes to have cpu_info in spl and
invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agoexynos: move tzpc_init to armv7/exynos
Inderpal Singh [Thu, 4 Apr 2013 23:09:19 +0000 (23:09 +0000)]
exynos: move tzpc_init to armv7/exynos

tzpc_init is common for all exynos5 boards, hence move it to
armv7/exynos so that all other boards can use it.

Also update the smdk5250 Makefile and config file.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
7 years agowandboard: Add Boot Splash image with Wandboard logo
Otavio Salvador [Mon, 27 May 2013 12:18:44 +0000 (12:18 +0000)]
wandboard: Add Boot Splash image with Wandboard logo

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
7 years agowandboard: Enable HDMI splashscreen
Fabio Estevam [Thu, 23 May 2013 07:50:23 +0000 (07:50 +0000)]
wandboard: Enable HDMI splashscreen

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
7 years agobuild: Use generic boot logo matching
Otavio Salvador [Mon, 27 May 2013 12:18:43 +0000 (12:18 +0000)]
build: Use generic boot logo matching

The boot logo matching is now done in following way:

 - use LOGO_BMP if it is set, or
 - use $(BOARD).bmp if it exists in tools/logos, or
 - use $(VENDOR).bmp if it exists in tools/logos, or
 - use denx.bmp otherwise.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Wolfgang Denk <wd@denx.de>
7 years agomx6: mx6qsabrelite/nitrogen6x: Remove incorrect setting of gpio CS signal
Andrew Gabbasov [Thu, 30 May 2013 04:47:38 +0000 (04:47 +0000)]
mx6: mx6qsabrelite/nitrogen6x: Remove incorrect setting of gpio CS signal

The number of gpio signal is packed inside CONFIG_SF_DEFAULT_CS macro
(shifted and or'ed with chip select), so it's incorrect to pass
that macro directly as an argument to gpio_direction_output() call.

Also, SPI driver sets the direction and initial value of a gpio,
used as a chip select signal, before any actual activity happens
on the bus.

So, it is safe to just remove the gpio_direction_output call,
that works incorrectly, thus making no effect, anyway.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Tested-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
7 years agomx6qsabreauto: Add Port Expander reset
Renato Frias [Mon, 13 May 2013 18:01:13 +0000 (18:01 +0000)]
mx6qsabreauto: Add Port Expander reset

There are 3 IO expanders on the mx6qsabreauto all reset by the
same GPIO, just set it to high to use the IO.

Signed-off-by: Renato Frias <b13784@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
7 years agomx6qsabreauto: Add i2c to mx6qsabreauto board
Renato Frias [Mon, 13 May 2013 18:01:12 +0000 (18:01 +0000)]
mx6qsabreauto: Add i2c to mx6qsabreauto board

Add i2c2 and 3 to mx6qsabreauto board, i2c3 is multiplexed
use gpio to set steering.

Signed-off-by: Renato Frias <b13784@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
7 years agomx6slevk: Allow booting a device tree kernel
Fabio Estevam [Thu, 23 May 2013 13:57:18 +0000 (13:57 +0000)]
mx6slevk: Allow booting a device tree kernel

When the mx6slevk board support was added in U-boot there was no device tree
support for mx6sl, so only a FSL 3.0.35 was tested at that time.

Now that mx6slevk support is available we can boot a device tree kernel, by
adjusting CONFIG_LOADADDR into a proper location, so that a non-dt and a dt
kernels can be booted.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
7 years agoarm: mxs: Fix vectoring table crafting
Marek Vasut [Thu, 25 Apr 2013 16:37:12 +0000 (16:37 +0000)]
arm: mxs: Fix vectoring table crafting

The vectoring table has to be placed at 0x0, but U-Boot on MX23/MX28
starts from RAM, so the vectoring table at 0x0 is not present. Craft
code that will be placed at 0x0 and will redirect interrupt vectoring
to proper location of the U-Boot in RAM.

Signed-off-by: Marek Vasut <marex@denx.de>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
7 years agoarm: vf610: Add basic support for Vybrid VF610TWR board
Alison Wang [Mon, 27 May 2013 22:55:47 +0000 (22:55 +0000)]
arm: vf610: Add basic support for Vybrid VF610TWR board

VF610TWR is a board based on Vybrid VF610 SoC.

This patch adds basic support for Vybrid VF610TWR board.

Signed-off-by: Alison Wang <b18965@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
7 years agoarm: vf610: Add Vybrid VF610 to mxc_ocotp document
Alison Wang [Mon, 27 May 2013 22:55:46 +0000 (22:55 +0000)]
arm: vf610: Add Vybrid VF610 to mxc_ocotp document

This patch adds Vybrid VF610 to mxc_ocotp document.

Signed-off-by: Alison Wang <b18965@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
7 years agoarm: vf610: Add uart support for Vybrid VF610
Alison Wang [Mon, 27 May 2013 22:55:45 +0000 (22:55 +0000)]
arm: vf610: Add uart support for Vybrid VF610

This patch adds lpuart support for Vybrid VF610 platform.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
7 years agoarm: vf610: Add watchdog support for Vybrid VF610
Alison Wang [Mon, 27 May 2013 22:55:44 +0000 (22:55 +0000)]
arm: vf610: Add watchdog support for Vybrid VF610

This patch adds watchdog support for Vybrid VF610 platform.

Signed-off-by: Alison Wang <b18965@freescale.com>
7 years agonet: fec_mxc: Add support for Vybrid VF610
Alison Wang [Mon, 27 May 2013 22:55:43 +0000 (22:55 +0000)]
net: fec_mxc: Add support for Vybrid VF610

This patch adds FEC support for Vybrid VF610 platform.

In function fec_open(), RCR register is only set as RGMII mode. But RCR
register should be set as RMII mode for VF610 platform.
This configuration is already done in fec_reg_setup(), so this piece of
code could just leave untouched the FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII /
FEC_RCNTRL_MII_MODE bits.

Signed-off-by: Alison Wang <b18965@freescale.com>
Reviewed-by: Benoit Thebaudeau <benoit.thebaudeau@advansee.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
7 years agoarm: vf610: Add Vybrid VF610 CPU support
Alison Wang [Mon, 27 May 2013 22:55:42 +0000 (22:55 +0000)]
arm: vf610: Add Vybrid VF610 CPU support

This patch adds generic codes to support Freescale's Vybrid VF610 CPU.

It aligns Vybrid VF610 platform with i.MX platform. As there are
some differences between VF610 and i.MX platforms, the specific
codes are in the arch/arm/cpu/armv7/vf610 directory.

Signed-off-by: Alison Wang <b18965@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
7 years agoarm: vf610: Add IOMUX support for Vybrid VF610
Alison Wang [Mon, 27 May 2013 22:55:41 +0000 (22:55 +0000)]
arm: vf610: Add IOMUX support for Vybrid VF610

This patch adds the IOMUX support for Vybrid VF610 platform.

There is a little difference for IOMUXC module between VF610 and i.MX
platform, the muxmode and pad configuration share one 32bit register on
VF610, but they are two independent registers on I.MX platform. A
CONFIG_IOMUX_SHARE_CONFIG_REG was introduced to fit this difference.

Signed-off-by: Alison Wang <b18965@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
7 years agoarm: factorize relocate_code routine
Albert ARIBAUD [Sun, 19 May 2013 01:48:15 +0000 (01:48 +0000)]
arm: factorize relocate_code routine

Replace all relocate_code routines from ARM start.S files
with a single instance in file arch/arm/lib/relocate.S.
For PXA, this requires moving the dcache unlocking code
from within relocate_code into c_runtime_cpu_setup.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Simon Glass <sjg@chromium.org>
7 years agoarm: do not compile relocate_code() for SPL builds
Albert ARIBAUD [Sun, 19 May 2013 01:48:14 +0000 (01:48 +0000)]
arm: do not compile relocate_code() for SPL builds

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Simon Glass <sjg@chromium.org>
7 years agotx25: copy SPL directly, not using relocate_code.
Albert ARIBAUD [Sun, 19 May 2013 01:48:13 +0000 (01:48 +0000)]
tx25: copy SPL directly, not using relocate_code.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Simon Glass <sjg@chromium.org>
7 years agomx31pdk: copy SPL directly, not using relocate_code.
Albert ARIBAUD [Sun, 19 May 2013 01:48:12 +0000 (01:48 +0000)]
mx31pdk: copy SPL directly, not using relocate_code.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Tested-by: Simon Glass <sjg@chromium.org>
7 years agoMerge branch 'u-boot/master' into 'u-boot-arm/master'
Albert ARIBAUD [Thu, 30 May 2013 12:45:06 +0000 (14:45 +0200)]
Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
common/cmd_fpga.c
drivers/usb/host/ohci-at91.c

7 years agotegra: Define CONFIG_SKIP_LOWLEVEL_INIT for SPL build
Axel Lin [Tue, 21 May 2013 13:45:18 +0000 (13:45 +0000)]
tegra: Define CONFIG_SKIP_LOWLEVEL_INIT for SPL build

Then we can get rid of the #ifdef CONFIG_TEGRA guard in cpu_init_crit.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: arm720t: Add missing CONFIG_SKIP_LOWLEVEL_INIT guard for cpu_init_crit
Axel Lin [Tue, 21 May 2013 13:44:10 +0000 (13:44 +0000)]
ARM: arm720t: Add missing CONFIG_SKIP_LOWLEVEL_INIT guard for cpu_init_crit

cpu_init_crit() can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: support SKU 7 of Tegra20
Stephen Warren [Fri, 17 May 2013 14:10:15 +0000 (14:10 +0000)]
ARM: tegra: support SKU 7 of Tegra20

Make U-Boot aware of the Tegra20 SKU 7, and treat it identically
to any other Tegra20.

My Whistler board has a SoC with this SKU.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoARM: tegra: support SKU 1 of Tegra114
Stephen Warren [Fri, 17 May 2013 14:10:14 +0000 (14:10 +0000)]
ARM: tegra: support SKU 1 of Tegra114

Make U-Boot aware of the Tegra114 SKU 1, and treat it identically
to any other Tegra114.

This value is used on (at least some) Dalmore boards with a production
rather than engineering chip. Such boards are in the hands of some
partners who want to use upstream U-Boot.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agotegra: always build u-boot-nodtb-tegra.bin
Stephen Warren [Tue, 14 May 2013 08:00:53 +0000 (08:00 +0000)]
tegra: always build u-boot-nodtb-tegra.bin

Even when eventually building u-boot-dtb-tegra.bin, separately building
u-boot-nodtb-tegra.bin can be useful, since building it encapsulates the
SPL padding step. If you want to tweak u-boot.dtb and regenerate
u-boot-dtb-tegra.bin, it is then a simple cat operation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoTegra: clk: always use find_best_divider() for periph clocks
Allen Martin [Fri, 10 May 2013 16:56:55 +0000 (16:56 +0000)]
Tegra: clk: always use find_best_divider() for periph clocks

When adjusting peripheral clocks always use find_best_divider()
instead of clk_get_divider() even when a secondary divider is not
available.  In the case where is requested clock is too slow to be
derived from the parent clock this allows a best effort to get close
to the requested clock.

This comes up for commands like "sf" where the user can pass a clock
speed on the command line or "sspi" where the clock is hardcoded to
1MHz, but the Tegra114 SPI controller can't go that low.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
7 years agoTegra: Remove unused/non-existent spl linker script reference
Tom Warren [Wed, 17 Apr 2013 15:24:57 +0000 (08:24 -0700)]
Tegra: Remove unused/non-existent spl linker script reference

Tegra builds use the common u-boot-spl.lds now.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
7 years agoTegra: T30: Beaver: Fix board/board_name env vars, s/b beaver, not cardhu
Tom Warren [Tue, 16 Apr 2013 22:57:51 +0000 (15:57 -0700)]
Tegra: T30: Beaver: Fix board/board_name env vars, s/b beaver, not cardhu

Did a 'strings u-boot-dtb-tegra.bin | less' and saw that both
board and board_name == beaver. Didn't test as I have no T30
Beaver board here.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
7 years agopowerpc/mpc85xx: Clear L1 D-cache lock
York Sun [Fri, 5 Apr 2013 13:07:13 +0000 (13:07 +0000)]
powerpc/mpc85xx: Clear L1 D-cache lock

dcbi instruction has been used to clear D-cache lock. However, the cache
lock is persistent for e6500 core. Use dcblc to clear the lock explicitly.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agoSECURE BOOT - Removed deletion of TLB entries code
Ruchika Gupta [Mon, 25 Mar 2013 07:40:25 +0000 (07:40 +0000)]
SECURE BOOT - Removed deletion of TLB entries code

Boot ROM code creates TLB entries for 3.5G space before entering
the u-boot. Earlier we were deleting these entries after early
initialization of CPU. In recent past, code has been added
to invalidate all these entries before relocation of u-boot code.
So this code to delete TLB entries after CPU initialization
is no longer required.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Acked-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/b4860qds: Add LAW Target ID and Create LAW entry for Maple
Shaveta Leekha [Mon, 25 Mar 2013 07:40:24 +0000 (07:40 +0000)]
powerpc/b4860qds: Add LAW Target ID and Create LAW entry for Maple

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/p5040: fix mdio mux for 10G port
Shaohui Xie [Mon, 25 Mar 2013 07:40:21 +0000 (07:40 +0000)]
powerpc/p5040: fix mdio mux for 10G port

Current driver of p5040 assumes 10G port follows 1G port DTSEC5 in
eth port enum structure, it will assign mdio mux depend on this assumption.
This is not true with Fman V3, which added more 1G ports after port DTSEC5
in eth port enum structure, then 10G ports on p5040 will have wrong mdio mux.
So we use dynamic index for 10G ports instead of hardcoded enum value
when doing mdio mux for 10G ports.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/B4: Merge B4420 and B4860 in config_mpc85xx.h
Poonam Aggrwal [Mon, 25 Mar 2013 07:40:20 +0000 (07:40 +0000)]
powerpc/B4: Merge B4420 and B4860 in config_mpc85xx.h

B4420 is a subset of B4860. Merge them in config_mpc85xx.h to simplify
the defines.
- Removed #define CONFIG_SYS_FSL_NUM_CLUSTERS as this is used nowhere.
- defined CONFIG_SYS_NUM_FM1_10GEC to 0 for B4420 as it does not have 10G.

Also move CONFIG_E6500 out of B4860QDSds.h into config_mpc85xx.h.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agosf: spansion: Add support for S25FL128S
Xie Xiaobo [Mon, 25 Mar 2013 07:40:19 +0000 (07:40 +0000)]
sf: spansion: Add support for S25FL128S

SPANSION recommend S25FL128S supersedes S25FL129P, and the two flash
memory have the same device ID and Memory architecture. So they can
use the same config parameters.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/p2041: fix serdes reference clock frequency display for PC board
Shaohui Xie [Mon, 25 Mar 2013 07:40:18 +0000 (07:40 +0000)]
powerpc/p2041: fix serdes reference clock frequency display for PC board

PC board has different serdes clock setting with PB board, it uses same
serdes frequency setting on bank2 as on bank1. PC board can be distingushed
from PB board by checking CPLD version, if running on PC board, then fix
the serdes reference clock frequency of bank2.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/b4860: fix for Serdes connectivity to SFP's
Shaveta Leekha [Mon, 25 Mar 2013 07:40:17 +0000 (07:40 +0000)]
powerpc/b4860: fix for Serdes connectivity to SFP's

Crossbar switches were wrongly programmed to
route the CPRI lanes to SFP as the connectivity table
was not correct.
Modified it correctly for SFPs connections.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/t4240qds: fix PHY reset timeout issue
Shengzhou Liu [Mon, 25 Mar 2013 07:40:15 +0000 (07:40 +0000)]
powerpc/t4240qds: fix PHY reset timeout issue

QSGMII card has different PHY address against previous SGMII card.
We check the type of card in slots and set correct PHY address to
avoid complainning "PHY reset timed out" during u-boot booting up.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/t4qds: Add SW7[4] in the DIP switch display
York Sun [Mon, 25 Mar 2013 07:40:14 +0000 (07:40 +0000)]
powerpc/t4qds: Add SW7[4] in the DIP switch display

SW7[4] is the new bit which controls the mapping of eMMC vs SDHC.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agoEnable XAUI interface for B4860QDS
Suresh Gupta [Mon, 25 Mar 2013 07:40:13 +0000 (07:40 +0000)]
Enable XAUI interface for B4860QDS

- Added SERDES2 PRTCLs = 0x98, 0x9E
- Default Phy Addresses for Teranetics PHY on XAUI card
The PHY addresses of Teranetics PHY on XAUI riser card are assigned
based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on
AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1
        and slot2
- Configure MDIO for 10Gig Mac

Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agoboard/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32M
Stephen George [Mon, 25 Mar 2013 07:40:12 +0000 (07:40 +0000)]
board/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32M

Debug trace buffers are memory mapped in DCSR space beyond 4M.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/p5040: enable PBL tool support
Shaohui Xie [Mon, 25 Mar 2013 07:40:11 +0000 (07:40 +0000)]
powerpc/p5040: enable PBL tool support

Provided a default RCW for P5040, then it can use PBL to build
ramboot image.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/t4qds: use clock measurement for sysclk and ddr clock
Ed Swarthout [Mon, 25 Mar 2013 07:40:10 +0000 (07:40 +0000)]
powerpc/t4qds: use clock measurement for sysclk and ddr clock

Use QIXIS measurement registers to obtain sysclk and ddr clock. This
allows using non-standard clock speeds, set by directly writing to
clock chip or store the values in qixis clock data eeprom.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/qixis: add clock measurement registers
Ed Swarthout [Mon, 25 Mar 2013 07:40:09 +0000 (07:40 +0000)]
powerpc/qixis: add clock measurement registers

QIXIS includes frequency measurement functions for each major processor
clock input. After reset (and after clocks are stable), QIXIS measures
the clocks against a reference frequency and stores the results in
CLK_FREQ registers. A base register supplies a multiplier which allows
directly obtaining the measured value, without requiring knowledge of
the target system or QIXIS core frequency.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>