Simon Glass [Sun, 30 Aug 2015 22:55:36 +0000 (16:55 -0600)]
rockchip: rk3288: Add SDRAM init
Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses
device tree for configuration so should be able to support other RAM
configurations. It may be possible to generalise the code to support other
SoCs at some point.
Simon Glass [Sun, 30 Aug 2015 22:55:29 +0000 (16:55 -0600)]
power: Add support for ACT8846 PMIC
Add a driver for the ACT8846 PMIC. This supports several LDOs and BUCKs and
is connected to the I2C bus. This driver supports using a regulator driver
to access the regulators.
Simon Glass [Sun, 30 Aug 2015 22:55:28 +0000 (16:55 -0600)]
rockchip: Add basic peripheral and clock definitions
Add header files for the peripherals and clocks supported on Rockchip
platforms. The particular implementation (and register set) for each is
SoC-specific, but it seems that the naming can be generic.
Simon Glass [Sun, 30 Aug 2015 22:55:26 +0000 (16:55 -0600)]
rockchip: Add support for the SPI image
The Rockchip boot ROM requires a particular file format for booting from SPI.
It consists of a 512-byte header encoded with RC4, some padding and then up
to 32KB of executable code in 2KB blocks, separated by 2KB empty blocks.
Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be
converted to this format. This allows booting from SPI flash on supported
machines.
Simon Glass [Sun, 30 Aug 2015 22:55:25 +0000 (16:55 -0600)]
rockchip: Add support for the SD image
The Rockchip boot ROM requires a particular file format. It consists of
64KB of zeroes, a 512-byte header encoded with RC4, and then some executable
code.
Add support to mkimage so that an SPL image (u-boot-spl-dtb.bin) can be
converted to this format.
Simon Glass [Sun, 30 Aug 2015 22:55:24 +0000 (16:55 -0600)]
rockchip: Add the rkimage format to mkimage
Rockchip SoCs require certain formats for code that they execute, The
simplest format is a 4-byte header at the start of a binary file. Add
support for this so that we can create images that the boot ROM understands.
Simon Glass [Sun, 30 Aug 2015 22:55:20 +0000 (16:55 -0600)]
rockchip: Bring in RK3288 device tree file includes and bindings
Bring in required device tree files from Linux. Since mainline Linux is
somewhat behind, use the files from the Chromium tree. We can re-sync once
further code is acccepted upstream.
Simon Glass [Sun, 30 Aug 2015 22:55:17 +0000 (16:55 -0600)]
dm: Provide better debugging when a device fails to bind
All devices should bind without error. But when they don't, they can cause
driver model init to fail. A real situation where this can happen is when
there is a missing uclass.
Add a debug() call to dm_scan_fdt_node to make this easier to track.
Simon Glass [Sun, 30 Aug 2015 22:55:16 +0000 (16:55 -0600)]
dm: Improve handling of a missing uclass
When a uclass definition is missing, no drivers in that uclass can operate.
This can happen if a board has a strange collection of options (e.g. the
driver is enabled but the uclass is not).
Unfortunately this is very confusing at present. Starting up driver model
results in a -ENOENT error, which is pretty generic. Quite a big of digging
is needed to get to the root cause.
To help with this, change the error to a very strange one with no other
users in U-Boot. Also add a debug message.
Simon Glass [Sun, 30 Aug 2015 22:55:15 +0000 (16:55 -0600)]
mmc: Support bypass mode with the get_mmc_clk() method
Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Simon Glass [Sun, 30 Aug 2015 22:55:14 +0000 (16:55 -0600)]
dm: led: Tidy up SPL options for the led and led-gpio
At present SPL does not have its own option. But these features can
increase SPL code size. Adjust the Kconfig and Makefile so that
separate a SPL option can be selected.
Simon Glass [Sun, 30 Aug 2015 22:55:13 +0000 (16:55 -0600)]
pinctrl: Add the concept of peripheral IDs
My original pinctrl patch operating using a peripheral ID enum. This was
shared between pinmux and clock and provides an easy way to specify a device
that needs to be controlled, even it is does not (yet) have a driver within
driver model.
Masahiro's new simple pinctrl gets around this by providing a
set_state_simple() pinctrl method. By passing a device to that call the
peripheral ID becomes unnecessary. If the driver needs it, it can calculate
it itself and use it internally.
However this does not solve the problem for peripheral clocks. The 'pure'
solution would be to pass a driver to the clock uclass also. But this
requires that all devices should have a driver, and a struct udevide. Also
a key optimisation of the clock uclass is allowing a peripheral clock to
be set even when there is no device for that clock.
There may be a better way to achive the same goal, but for now it seems
expedient to add in peripheral ID to the pinctrl uclass. Two methods are
added - one to get the peripheral ID and one to select it. The existing
set_state_simple() is effectively the union of these.
Peng Fan [Tue, 1 Sep 2015 09:15:03 +0000 (17:15 +0800)]
imx: vf610 add get_cpu_rev
Since we need to support runtime check for different drivers, we need
to add get_cpu_rev for vf610, otherwise there will be build errors.
This patch introduces a dummy CPU id which is not read from chip
silicon. Later when we can get the real id from chip, can fix the
value of MXC_CPU_VF610 then.
Peng Fan [Wed, 26 Aug 2015 07:40:47 +0000 (15:40 +0800)]
mxc: ocotp fix hole in shadow registers
There is a hole in shadow registers address map of size 0x100
between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL.
Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses,
we should account for this hole in address space.
Similar hole exists between bank 14 and bank 15 of size
0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX.
Note: iMX6SL has only 0-7 banks and there is no hole.
Note: iMX6UL doesn't have this one.
When reading, we use register offset, so need to account for holes
to get the correct address.
When writing, we use bank/word index, there is no need to account
for holes, always use bank/word index from fuse map.
Nikita Kiryanov [Sun, 30 Aug 2015 12:36:49 +0000 (15:36 +0300)]
arm: mx6: cm-fx6: switch to usb kbd polling via int queue
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE works better than
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP (keyboards that previously didn't
work such as Microsoft Comfort Curve 1000 now do work, and it's also faster).
Switch to CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE.
Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Sun, 30 Aug 2015 12:36:47 +0000 (15:36 +0300)]
arm: mx6: cm-fx6: force host mode on usb controller
On some CM-FX6 modules U-Boot attempts to configure the usb0 controller in
device mode, which renders it unavailable:
USB0: Port not available.
and also causes usb stop to report an error
EHCI failed to shut down host controller.
This happens mostly on MX6 Dual based modules, and is caused by the USBPHY_CTRL
register reporting USBPHY_CTRL_OTG_ID to be 1, even when it is pulled down.
Since we do not support device mode in cm-fx6 u-boot, force all controllers to
be configured as hosts.
Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Peng Fan [Wed, 19 Aug 2015 07:48:58 +0000 (15:48 +0800)]
imx: mx6ul_14x14_evk select MX6UL
There is no need to expose SoC choice to user, we already got
the SoC according to the build target. So default "select MX6UL"
for MX6UL_14x14_EVK target.
Peng Fan [Wed, 19 Aug 2015 07:48:57 +0000 (15:48 +0800)]
arm: Add SYS_L2CACHE_OFF Kconfig entry
To i.MX6UL, SYS_L2CACHE_OFF is selected, but there is no Kconfig entry
for SYS_L2CACHE_OFF. Then "select SYS_L2CACHE_OFF" does not effect for
i.MX6UL, which is not expected.
Since SYS_L2CACHE_OFF is mainly used by ARM architecture, add it to
arch/arm/Kconfig.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Mon, 17 Aug 2015 08:11:05 +0000 (16:11 +0800)]
imx: mx6slevk: add SPL support
Add SPL boot support for mx6slevk board.
1. Introduce a configuration file mx6slevk_spl_defconfig.
2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE.
3. Include imx6_spl.h and related SPL macro in mx6slevk.h.
4. select SUPPORT_SPL for TARGET_MX6SLEVK.
5. Add SPL board code to do related initialization.
Peng Fan [Mon, 17 Aug 2015 08:11:04 +0000 (16:11 +0800)]
imx: mx6: ddr: add LPDDR2 support
Add LPDDR2 support:
1. Implement a function mx6_lpddr2_cfg to initialize MMDC for LPDDR2.
2. Introduce a structure mx6_lpddr2_cfg, most entrys are same to
mx6_ddr3_cfg, but still keep it a single one for easy to choose
parameters for LPDDR2.
3. If ddr_type is LPDDR2, use mx6_lpddr2_cfg to init MMDC.
4. Update comments.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
Peng Fan [Mon, 17 Aug 2015 08:11:03 +0000 (16:11 +0800)]
imx: mx6: ddr init MMDC according to ddr_type
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
when ddr_type is for DDR3. Later we can use ddr_type to initialize
MMDC for LPDDR2.
Initialize ddr_type for different boards which enable SPL.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefan Roese <sr@denx.de>
Peng Fan [Mon, 17 Aug 2015 08:11:00 +0000 (16:11 +0800)]
imx: mx6: ddr add dram io configuration and header file for i.MX6SL
Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs.
Add a new function mx6sl_dram_iocfg to configure dram io.
Add header file to define macros for register address.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Mon, 17 Aug 2015 08:10:59 +0000 (16:10 +0800)]
imx: mx6: ddr correct tRFC and tXS
To Chip density 4Gb, tRFC should be 300ns, see
"Table 61 — Refresh parameters by device density" of JESD79-3E.
tXS(min) is max(5nCK, tRFC(min) + 10ns).
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
Heiko Schocher [Tue, 11 Aug 2015 06:09:44 +0000 (08:09 +0200)]
arm, imx6: aristainetos board updates
some small updates for the aristainetos boards:
- fix display timings for the aristainetos board
- fix pinmux for the aristainetos board
- fix pinmux for the aristainetos2 board
- fix default environment
Adrian Alonso [Tue, 11 Aug 2015 16:19:50 +0000 (11:19 -0500)]
imx: iomux-v3: add imx7d support for iomuxc
* Add imx7d support for iomux controller
* imx7d has two iomux controllers iomuxc (0x3033000) and iomuxc-lpsr
(0x302C0000) each conroller provides control and mux mode pad
registers but shares iomuxc input select register with iomuxc-lpsr
IOMUX_CONFIG_LPSR flag is used to properly set daisy chain settings
for iomuxc-lpsr pads.
* Since mx7d introduces LPSR IOMUX pins, add new base to IOMUX v3
driver for these LPSR pins.
Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
Peng Fan [Wed, 12 Aug 2015 09:46:50 +0000 (17:46 +0800)]
imx: clock support enet2 anatop clock support
To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
Peng Fan [Thu, 13 Aug 2015 02:55:34 +0000 (10:55 +0800)]
imx-common: consolidate macros and prototypes into sys_proto.h
Move most macro definitions and prototypes into
"arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated
function prototypes and marco definitions for different i.MX SoCs.
This patch do not remove the sys_proto.h for different i.MX SoCs,
because we need to modify lots of driver code and others. This patch
remove duplicated macros and prototypes and incude "sys_proto.h"
of imx-common for each sys_proto.h of different i.MX platforms.
Then later we should avoid add stuff in sys_proto.h of each platform,
and modify driver to include common sys_proto.h.
Peng Fan [Fri, 7 Aug 2015 12:35:24 +0000 (20:35 +0800)]
imx: mx6 move TARGET_xx Kconfig option to mx6 specific Kconfig file
Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig.
Add enable "CONFIG_ARCH_MX6" for boards based on mx6.
Then we can choose target boards using "make ARCH=arm menuconfig"
with ARCH_MX6 defined.
If using original way, we have no chance to enable ARCH_MX6 when
"make menuconfig". Even define CONFIG_ARCH_MX6=y in xx_defconfig,
kconfig will complains "arch/../configs/platinum_titanium_defconfig:3:
warning: override: TARGET_PLATINUM_TITANIUM changes choice state"
Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Bénard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Marek Vasut <marex@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Soeren Moch <smoch@web.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Soeren Moch <smoch@web.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Chris Smith [Sun, 12 Jul 2015 13:00:11 +0000 (15:00 +0200)]
mxs_ocotp: Shift the HBUS divider correctly
When the original HBUS divider value is retrieved in mxs_ocotp_scale_hclk()
for the purpose or restoring it back later, the value is not shifted by the
HBUS divider offset in that register. This is not a problem, since the shift
is zero on all MXS hardware. Add the shift anyway, for completeness and in
case FSL ever decides to re-use this driver on future designs.
Signed-off-by: Chris Smith <chris@zxdesign.info> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
Damien Riegel [Tue, 30 Jun 2015 21:17:48 +0000 (17:17 -0400)]
ARM: ts4800: add ethernet support
This commit adds ethernet support to the TS4800. Note that the
MAC address is not fused on this board and have to be read from
FEC PALR PAUR registers (this is how the kernel provided by
Technologic Systems does it).
Marek Vasut [Tue, 11 Aug 2015 01:08:07 +0000 (03:08 +0200)]
arm: mxs: Fix mkimage invocation
Remove this ad-hoc mkimage invocation in MXS Makefile and replace
it with the standard mkimage rule instead.
This patch fixes recent build issues introduced by the patch 92a655c mkimage: Set up a file size parameter and keep it updated
These build issues could be triggered by building for example the
MX28EVK and the u-boot.sb image:
$ make mx28evk_defconfig
$ make V=1 u-boot.sb
[...]
make -f ./scripts/Makefile.build obj=arch/arm/cpu/arm926ejs/mxs u-boot.sb
./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage u-boot.sb
./tools/mkimage: Can't open (null): Bad address
arch/arm/cpu/arm926ejs/mxs/Makefile:82: recipe for target 'u-boot.sb' failed
make[1]: *** [u-boot.sb] Error 1
Makefile:989: recipe for target 'u-boot.sb' failed
make: *** [u-boot.sb] Error 2
With this patch:
./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage -d arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg u-boot.sb
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Juha Lumme <juha.lumme@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
For pages of 2048 bytes the current setting of the ECC Error Correction Level
is only true for an oob size of 64 bytes and wrong for all others.
Instead of hard-coding every possible combination of page size and oob size use
the dynamic calculation of the ECC strength introduced in commit 6121560d7714d6d8e41ce1687a1388a1a8fea4cb.
Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
Stefan Roese [Wed, 5 Aug 2015 08:50:50 +0000 (10:50 +0200)]
arm: mx6: Remove SPI support from WRU-IV baseboard
This patch removes the SPI support from the WRU-IV baseboard as its
not used at all.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
tools/imximage: set DCD pointer to NULL when its length is 0
When dcd_len is 0 the Write Data command that the set_dcd_rst_v2() routine
generates is empty. This causes HAB to complain that the command is invalid.
To fix this set the DCD pointer in the IVT to NULL in this case. The DCD header
itself is still needed for detect_imximage_version() to determine the image
version.
pci/layerscape: Setup mmu-masters property for the PCIe
Setup mmu-masters property for the PCIe controllers. This would be
used by the Linux SMMU driver, while setting up stream ID table mappings
for the PCIe devices.
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
This patch rewrites MMU translation table entries. To start, all table
entries are written as "invalid", then "device-ngnrnr" and "normal" are
written to the entries to enable access to specific addresses.
Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
Zhuoyu Zhang [Mon, 17 Aug 2015 10:55:12 +0000 (18:55 +0800)]
arm/ls102xa:add hwconfig setting to support disable unused devices
DEVDISRn registers provides a mechanism for gating clocks of IP blocks
that are not used. Here we implement hwconfig option to allow users
to disable unused peripherals on the board.
For ex. If eSDHC/qDMA/eDMA are unused and with disabled status in dts,
User can enable CONFIG_FSL_DEVICE_DISABLE and set "devdis:esdhc,qdma,edma"
in hwconfig, thus ESDHC controller & eDMA/qDMA will be clock gated to
save more power.
Signed-off-by: Zhuoyu Zhang <Zhuoyu.Zhang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Thu, 13 Aug 2015 17:22:09 +0000 (10:22 -0700)]
armv8/ls2085a_emu: Drop DDR3 emulation target
The emulator with DDR3 model was used during model bringup. DDR4
controllers are used with ls2085a. Drop the DDR4 target defconfig
and enable DDR4 in ls2085a_emu_defconfig.
Claudiu Manoil [Wed, 12 Aug 2015 10:29:14 +0000 (13:29 +0300)]
ls102xa: etsec: Use proper settings for BE BDs
Replace the DMACTRL[LE] hack with recommended settings
for ETSECDMAMCR to get the same end effect - obtaining
big-endian buffer descriptors and frame data for eTSEC.
The reset / default value for ETSECDMAMCR is preserved,
excepting the BD and FR bits which are cleared to enable
the BE mode in accordance with the H/W specifications.
Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA" Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Acked-by: Alison Wang <alison.wang@freescale.com> Tested-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
armv8: ls2085qds: Add support of X-QSGMII-16PORT riser card
The X-QSGMII-16PORT is a 4xQSGMII/8xSGMII riser card with eighth SerDes
interfaces implemented in PCIe form factor board.
It supports followings
- Card can operate with up to 4 QSGMII lane simultaneously
- Card can operate with up to 8 SGMII lane simultaneously
Add support of X-QSGMII-16PORT riser card.
This patch also take care of back-ward compatiblity with old SGMII rise cards
used on LS2085QDS Platform.
Signed-off-by: King Chung Lo@freescale.com <KingChungLo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Add support of VSC8584 phy placed on new QSGMII/SGMII ethernet riser cards
used on LS2085QDS platforms.
Signed-off-by: King Chung Lo@freescale.com <KingChungLo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
projects / karo-tx-uboot.git / log