karo-tx-uboot.git
7 years agoUpdated README files KARO-TX-2012-10-24
Lothar Waßmann [Thu, 25 Oct 2012 06:37:26 +0000 (08:37 +0200)]
Updated README files

7 years agoKa-Ro TX U-Boot Release 2012-10-24 KARO-2012-10-24
Lothar Waßmann [Wed, 24 Oct 2012 16:14:40 +0000 (18:14 +0200)]
Ka-Ro TX U-Boot Release 2012-10-24

7 years agoUnified codebase for TX28, TX48, TX51, TX53
Lothar Waßmann [Wed, 24 Oct 2012 15:28:44 +0000 (17:28 +0200)]
Unified codebase for TX28, TX48, TX51, TX53

7 years agouse spl_ymodem_load_image() as fallback if NAND boot fails
Lothar Waßmann [Fri, 19 Oct 2012 06:59:37 +0000 (08:59 +0200)]
use spl_ymodem_load_image() as fallback if NAND boot fails

7 years agoadd return code to spl_nand_load_image()
Lothar Waßmann [Fri, 19 Oct 2012 06:58:51 +0000 (08:58 +0200)]
add return code to spl_nand_load_image()

7 years agoarm: omap5: correct boot device mode7 for eMMC
Balaji T K [Mon, 12 Mar 2012 02:25:47 +0000 (02:25 +0000)]
arm: omap5: correct boot device mode7 for eMMC

In OMAP5 Boot device mode of 6 and 7 should be mapped to mmc2/eMMC

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
7 years agoOMAP4/5: emif: Correct the emif power mgt shadow register bit fields.
SRICHARAN R [Mon, 12 Mar 2012 02:25:46 +0000 (02:25 +0000)]
OMAP4/5: emif: Correct the emif power mgt shadow register bit fields.

PD_TIM bit field which specifies the power down timing is defined
to occupy bits 8-11, where as it is actually from 12-15 bits.
So correcting this.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP5: ddr: Change the ddr device name.
SRICHARAN R [Mon, 12 Mar 2012 02:25:45 +0000 (02:25 +0000)]
OMAP5: ddr: Change the ddr device name.

The ddr part name used in OMAP5 ES1.0 soc is a SAMSUNG part and
not a ELPIDA part. So change this.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP5: defconfig: Align the defconfig for 5430 ES1.0
SRICHARAN R [Mon, 12 Mar 2012 02:25:44 +0000 (02:25 +0000)]
OMAP5: defconfig: Align the defconfig for 5430 ES1.0

Adding the nessecary changes for OMAP5430 ES1.0 silicon.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP4/5: device: Add support to get the device type.
SRICHARAN R [Mon, 12 Mar 2012 02:25:43 +0000 (02:25 +0000)]
OMAP4/5: device: Add support to get the device type.

Add support to identify the device as GP/EMU/HS.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP4/5: Make the sysctrl structure common
SRICHARAN R [Mon, 12 Mar 2012 02:25:42 +0000 (02:25 +0000)]
OMAP4/5: Make the sysctrl structure common

Make the sysctrl structure common, so that it can
be used in generic functions across socs.
Also change the base address of the system control module, to
include all the registers and not simply the io regs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP5: SRAM: Change the SRAM base address.
SRICHARAN R [Mon, 12 Mar 2012 02:25:41 +0000 (02:25 +0000)]
OMAP5: SRAM: Change the SRAM base address.

The full internal SRAM of size 128kb is public in the case of OMAP5 soc.
So change the base address accordingly.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP4/5: Make the silicon revision variable common.
SRICHARAN R [Mon, 12 Mar 2012 02:25:40 +0000 (02:25 +0000)]
OMAP4/5: Make the silicon revision variable common.

The different silicon revision variable names was defined for OMAP4 and
OMAP5 socs. Making the variable common so that some code can be
made generic.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP5: hwinit: Add the missing break statement
SRICHARAN R [Mon, 12 Mar 2012 02:25:39 +0000 (02:25 +0000)]
OMAP5: hwinit: Add the missing break statement

The break statement is missing in init_omap_revision function, resulting
in a wrong revision identification. So fixing this.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP5: palmas: Configure nominal opp vdd values
SRICHARAN R [Mon, 12 Mar 2012 02:25:38 +0000 (02:25 +0000)]
OMAP5: palmas: Configure nominal opp vdd values

The nominal opp vdd values as recommended for
ES1.0 silicon is set for mpu, core, mm domains using palmas.

Also used the right sequence to enable the vcores as per
a previous patch from Nishant Menon, which can be dropped now.
http://lists.denx.de/pipermail/u-boot/2012-March/119151.html

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.
SRICHARAN R [Mon, 12 Mar 2012 02:25:37 +0000 (02:25 +0000)]
OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon.

The OMAP5 silicon has new DDR PHY design, which includes a external PHY
as well. So configuring the ext PHY parameters here. Also the EMIF timimg
registers and a couple of DDR mode registers needs to be updated based on
the testing from the actual silicon.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP5: io: Configure the io settings for omap5430 sevm board.
SRICHARAN R [Mon, 12 Mar 2012 02:25:36 +0000 (02:25 +0000)]
OMAP5: io: Configure the io settings for omap5430 sevm board.

The control module provides options to set various signal
integrity parameters like the output impedance, slew rate,
load capacitance for different pad groups. Configure these
as required for the omap5430 sevm board.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP5: board: Add pinmux data for omap5_evm board.
SRICHARAN R [Mon, 12 Mar 2012 02:25:35 +0000 (02:25 +0000)]
OMAP5: board: Add pinmux data for omap5_evm board.

Adding the full pinmux data for OMAP5430 sevm board.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP5: clocks: Change clock settings as required for ES1.0 silicon.
SRICHARAN R [Mon, 12 Mar 2012 02:25:34 +0000 (02:25 +0000)]
OMAP5: clocks: Change clock settings as required for ES1.0 silicon.

Aligning all the clock related settings like the dpll frequencies, their
respective clock outputs, etc to the ideal values recommended for
OMAP5430 ES1.0 silicon.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
7 years agoOMAP3: igep00x0: Reduce lines of code for IGEP-based boards.
Enric Balletbò i Serra [Mon, 5 Mar 2012 11:32:16 +0000 (11:32 +0000)]
OMAP3: igep00x0: Reduce lines of code for IGEP-based boards.

This is rework on config files of IGEP-based boards with the aim to remove
duplicated code to be more maintainable. Basically this patch creates a
common configuration file for both boards and only sets the specific option
in the board config file.

On board files the hardcored mach type was replaced in favour of using the
CONFIG_MACH_TYPE option.

More than 200 duplicated lines have been deleted.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
7 years agoOMAP4: scale voltage of core before MPU scales
Nishanth Menon [Thu, 1 Mar 2012 14:17:39 +0000 (14:17 +0000)]
OMAP4: scale voltage of core before MPU scales

OMAP4 requires that parent domains scale ahead of dependent domains.
This is due to the restrictions in timing closure. To ensure
a consistent behavior across all OMAP4 SoC, ensure that
vdd_core scale first, then vdd_mpu and finally vdd_iva.

As part of doing this refactor the logic to allow for future
addition of OMAP4470 without much ado. OMAP4470 uses different
SMPS addresses and cannot be introduced in the current code
without major rewrite.

Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
7 years agoOMAP4460: TPS Ensure SET1 is selected after voltage configuration
Nishanth Menon [Thu, 1 Mar 2012 14:17:38 +0000 (14:17 +0000)]
OMAP4460: TPS Ensure SET1 is selected after voltage configuration

TPS SET0/SET1 register is selected by a GPIO pin on OMAP4460 platforms.
Currently we control this pin with a mux configuration as part of
boot sequence.
Current configuration results in the following voltage waveform:
                           |---------------| (SET1 default 1.4V)
                           |               --------(programmed voltage)
                           | <- (This switch happens on mux7,pullup)
vdd_mpu(TPS)         -----/ (OPP boot voltage)
                                             --------- (programmed voltage)
vdd_core(TWL6030)    -----------------------/ (OPP boot voltage)
Problem 1)                |<----- Tx ------>|
   timing violation for a duration Tx close to few milliseconds.
Problem 2) voltage of MPU goes beyond spec for even the highest of MPU OPP.

By using GPIO as recommended as standard procedure by TI, the sequence
changes to:
                                  -------- (programmed voltage)
vdd_mpu(TPS)         ------------/ (Opp boot voltage)
                                   --------- (programmed voltage)
vdd_core(TWL6030)    -------------/ (OPP boot voltage)

NOTE: This does not attempt to address OMAP5 - Aneesh please confirm

Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
7 years agoOMAP3+: Introduce generic logic for OMAP voltage controller
Nishanth Menon [Thu, 1 Mar 2012 14:17:37 +0000 (14:17 +0000)]
OMAP3+: Introduce generic logic for OMAP voltage controller

OMAP Voltage controller is used to generically talk to
PMICs on OMAP3,4,5 over I2C_SR. Instead of replicating code
in multiple SoC code, introduce a common voltage controller
logic which can be re-used from elsewhere.

With this change, we replace setup_sri2c with omap_vc_init which
has the same functionality, and replace the voltage scale
replication in do_scale_vcore and do_scale_tps62361 with
omap_vc_bypass_send_value. omap_vc_bypass_send_value can also
now be used with any configuration of PMIC.

NOTE: Voltage controller controlling I2C_SR is a write-only data
path, so no register read operation can be implemented.

Reported-by: Isabelle Gros <i-gros@ti.com>
Reported-by: Jerome Angeloni <j-angeloni@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
7 years agoARM:OMAP+:MMC: Add parameters to MMC init
Jonathan Solnit [Fri, 24 Feb 2012 11:30:18 +0000 (11:30 +0000)]
ARM:OMAP+:MMC: Add parameters to MMC init

Add parameters to the OMAP MMC initialization function so the board can
mask host capabilities and set the maximum clock frequency.  While the
OMAP supports a certain set of MMC host capabilities, individual boards
may be more restricted and the OMAP may need to be configured to match
the board.  The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example.

Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
7 years agokirkwood: add support for Cloud Engines Pogoplug E02
David Purdy [Tue, 27 Mar 2012 16:01:09 +0000 (16:01 +0000)]
kirkwood: add support for Cloud Engines Pogoplug E02

This patch adds support for Cloud Engines Pogoplug E02

Information regarding the CE Pogoplug E02 board can be found at:
http://archlinuxarm.org/platforms/armv5/pogoplug-v2-pinkgray

Signed-off-by: Dave Purdy <david.c.purdy@gmail.com>
Cc: prafulla@marvell.com
Cc: albert.u.boot@aribaud.net
7 years agokirkwood: add NAS62x0 board support
Luka Perkov [Tue, 17 Apr 2012 09:22:17 +0000 (09:22 +0000)]
kirkwood: add NAS62x0 board support

Add support for new boards RaidSonic ICY BOX NAS6210 and NAS6220.

NAS6210 has 1 SATA and 1 eSATA port while NAS6220 has 2 SATA ports.

More information about the boards can be found here:

http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7036
http://www.raidsonic.de/en/products/nas-systems.php?we_objectID=7515

Signed-off-by: Luka Perkov <uboot@lukaperkov.net>
Signed-off-by: Gerald Kerma <dreagle@doukki.net>
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
7 years agodevkit3250: add Timll DevKit3250 board initial support
Vladimir Zapolskiy [Thu, 19 Apr 2012 04:33:10 +0000 (04:33 +0000)]
devkit3250: add Timll DevKit3250 board initial support

This change adds a basic support for Embest/Timll DevKit3250 board,
NOR and UART are the only supported peripherals for a moment. The board
doesn't require low-level init, because the initial SDRAM and GPIO
configuration is performed during kickstart bootloader execution.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
7 years agoserial: add LPC32X0 high-speed UART devices support
Vladimir Zapolskiy [Thu, 19 Apr 2012 04:33:09 +0000 (04:33 +0000)]
serial: add LPC32X0 high-speed UART devices support

This change adds an implementation of high-speed UART found on NXP
LPC32X0 SoCs. Such UARTs are enumerated as UART1, UART2 and UART7.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
7 years agoarm926ejs: add NXP LPC32x0 cpu series support
Vladimir Zapolskiy [Thu, 19 Apr 2012 04:33:08 +0000 (04:33 +0000)]
arm926ejs: add NXP LPC32x0 cpu series support

This change adds initial support for NXP LPC32x0 SoC series.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
7 years agoARM: dreamplug: Enable FDT support
Ian Campbell [Mon, 27 Feb 2012 21:19:02 +0000 (21:19 +0000)]
ARM: dreamplug: Enable FDT support

I have tested booting both FDT and non-FDT based Linux kernels (based on
http://marc.info/?l=linux-arm-kernel&m=133002679716986 and
http://marc.info/?l=linux-arm-kernel&m=132328894303581 respectively).

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: Jason <jason@lakedaemon.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
7 years agoMerge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
Wolfgang Denk [Mon, 30 Apr 2012 16:19:28 +0000 (18:19 +0200)]
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
  lin_gadget: use common linux/compat.h
  linux/compat.h: rename from linux/mtd/compat.h
  lin_gadget: use common mdelay
  gunzip: rename z{alloc, free} to gz{alloc, free}
  fs/fat: align disk buffers on cache line to enable DMA and cache
  part_dos: align disk buffers on cache line to enable DMA and cache

7 years agoMerge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Mon, 30 Apr 2012 14:55:37 +0000 (16:55 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians

* 'master' of /home/wd/git/u-boot/custodians:
  powerpc/ppc4xx: Remove typedefs for gdsys FPGA
  powerpc/ppc4xx: Fix typo in gdsys_fpga.h
  powerpc/ppc4xx: Update gdsys board configurations
  powerpc/ppc4xx: Support gdsys dlvision-10g hardware 1.20
  powerpc/ppc4xx: Adapt gdsys 405ep boards to platform changes
  powerpc/ppc4xx: Make gdsys 405ep boards reset more generic
  powerpc/ppc4xx: Adjust environment size on neo

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Wolfgang Denk [Mon, 30 Apr 2012 14:55:25 +0000 (16:55 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx

* 'master' of git://git.denx.de/u-boot-ppc4xx:
  powerpc/ppc4xx: Remove typedefs for gdsys FPGA
  powerpc/ppc4xx: Fix typo in gdsys_fpga.h
  powerpc/ppc4xx: Update gdsys board configurations
  powerpc/ppc4xx: Support gdsys dlvision-10g hardware 1.20
  powerpc/ppc4xx: Adapt gdsys 405ep boards to platform changes
  powerpc/ppc4xx: Make gdsys 405ep boards reset more generic
  powerpc/ppc4xx: Adjust environment size on neo

7 years agolin_gadget: use common linux/compat.h
Mike Frysinger [Thu, 26 Apr 2012 02:34:44 +0000 (02:34 +0000)]
lin_gadget: use common linux/compat.h

Merge our duplicate definitions with the common header.

Also fix drivers/usb/gadget/s3c_udc_otg_xfer_dma.c to
use min() instead of min_t() since we remove the latter
from compat.h.

Additionally use memalign() directly as the lin_gadget
specific kmalloc() macro is removed from lin_gadget_compat.h
by this patch.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
7 years agolinux/compat.h: rename from linux/mtd/compat.h
Mike Frysinger [Mon, 9 Apr 2012 13:39:55 +0000 (13:39 +0000)]
linux/compat.h: rename from linux/mtd/compat.h

This lets us use it in more places than just mtd code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
7 years agolin_gadget: use common mdelay
Mike Frysinger [Mon, 9 Apr 2012 13:39:54 +0000 (13:39 +0000)]
lin_gadget: use common mdelay

No need to provide our own mdelay() macro when we have a func for it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
7 years agogunzip: rename z{alloc, free} to gz{alloc, free}
Mike Frysinger [Mon, 9 Apr 2012 13:39:53 +0000 (13:39 +0000)]
gunzip: rename z{alloc, free} to gz{alloc, free}

This allows us to add a proper zalloc() func (one that does a zeroing
alloc), and removes duplicate prototypes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
7 years agofs/fat: align disk buffers on cache line to enable DMA and cache
Eric Nelson [Wed, 11 Apr 2012 04:08:53 +0000 (04:08 +0000)]
fs/fat: align disk buffers on cache line to enable DMA and cache

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
7 years agopart_dos: align disk buffers on cache line to enable DMA and cache
Eric Nelson [Sat, 3 Mar 2012 12:02:20 +0000 (12:02 +0000)]
part_dos: align disk buffers on cache line to enable DMA and cache

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
7 years agoAllow for parallel builds and saved output
Andy Fleming [Tue, 24 Apr 2012 19:33:51 +0000 (19:33 +0000)]
Allow for parallel builds and saved output

The MAKEALL script cleverly runs make with the appropriate options
to use all of the cores on the system, but your average U-Boot build
can't make much use of more than a few cores.  If you happen to have
a many-core server, your builds will leave most of the system idle.

In order to make full use of such a system, we need to build multiple
targets in parallel, and this requires directing make output into
multiple directories. We add a BUILD_NBUILDS variable, which allows
users to specify how many builds to run in parallel.
When BUILD_NBUILDS is set greater than 1, we redefine BUILD_DIR for
each build to be ${BUILD_DIR}/${target}. Also, we make "./build" the
default BUILD_DIR when BUILD_NBUILDS is greater than 1.

MAKEALL now tracks which builds are still running, and when one
finishes, it starts a new build.

Once each build finishes, we run "make tidy" on its directory, to reduce
the footprint.

As a result, we are left with a build directory with all of the built
targets still there for use, which means anyone who wanted to use
MAKEALL as part of a test harness can now do so.

Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agoMerge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Mon, 30 Apr 2012 14:45:59 +0000 (16:45 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians

* 'master' of /home/wd/git/u-boot/custodians:
  powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
  powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
  cmd_bdinfo: display the address map size (32-bit vs. 36-bit)
  PowerPC: correct the SATA for p1/p2 rdb-pc platform
  powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
  powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
  powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
  powerpc/corenet_ds: Slave module for boot from SRIO
  powerpc/corenet_ds: Master module for boot from SRIO
  powerpc/corenet_ds: Document for the boot from SRIO
  powerpc/corenet_ds: Correct the compilation errors about ENV
  powerpc/srio: Rewrite the struct ccsr_rio
  powerpc/85xx:Fix lds for nand boot debug info
  powerpc/p2041rdb: add env in NAND support
  powerpc/p2041rdb: add NAND and NAND boot support
  powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
  powerpc/85xx:Avoid vector table compilation for nand_spl
  powerpc/85xx:Fix IVORs addr after vector table relocation
  powerpc/85xx:Avoid hardcoded vector address for IVORs
  powerpc/p1023rds: Disable nor flash node and enable nand flash node

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Wolfgang Denk [Mon, 30 Apr 2012 14:45:56 +0000 (16:45 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
  powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
  powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
  cmd_bdinfo: display the address map size (32-bit vs. 36-bit)
  PowerPC: correct the SATA for p1/p2 rdb-pc platform
  powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
  powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
  powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
  powerpc/corenet_ds: Slave module for boot from SRIO
  powerpc/corenet_ds: Master module for boot from SRIO
  powerpc/corenet_ds: Document for the boot from SRIO
  powerpc/corenet_ds: Correct the compilation errors about ENV
  powerpc/srio: Rewrite the struct ccsr_rio
  powerpc/85xx:Fix lds for nand boot debug info
  powerpc/p2041rdb: add env in NAND support
  powerpc/p2041rdb: add NAND and NAND boot support
  powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
  powerpc/85xx:Avoid vector table compilation for nand_spl
  powerpc/85xx:Fix IVORs addr after vector table relocation
  powerpc/85xx:Avoid hardcoded vector address for IVORs
  powerpc/p1023rds: Disable nor flash node and enable nand flash node

7 years agoMerge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Mon, 30 Apr 2012 14:43:52 +0000 (16:43 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians

* 'master' of /home/wd/git/u-boot/custodians:
  i2c:designware Turn off the ctrl when setting the speed
  i2c: Add support for designware i2c controller
  sh: i2c: Add support I2C controller of SH7734

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Wolfgang Denk [Mon, 30 Apr 2012 14:43:49 +0000 (16:43 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

* 'master' of git://git.denx.de/u-boot-i2c:
  i2c:designware Turn off the ctrl when setting the speed
  i2c: Add support for designware i2c controller
  sh: i2c: Add support I2C controller of SH7734

7 years agoMerge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Mon, 30 Apr 2012 14:41:25 +0000 (16:41 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians

* 'master' of /home/wd/git/u-boot/custodians:
  Blackfin: bfin_sdh: drop dos part hardcode
  Blackfin: move gd/bd to bss by default
  Blackfin: gd_t: relocate volatile markings

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-blackfin
Wolfgang Denk [Mon, 30 Apr 2012 14:41:23 +0000 (16:41 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin

* 'master' of git://git.denx.de/u-boot-blackfin:
  Blackfin: bfin_sdh: drop dos part hardcode
  Blackfin: move gd/bd to bss by default
  Blackfin: gd_t: relocate volatile markings

7 years agoimage/fit: drop inline markings on parser code
Mike Frysinger [Sun, 22 Apr 2012 06:59:06 +0000 (06:59 +0000)]
image/fit: drop inline markings on parser code

Putting "inline" on extern funcs makes no sense, so drop them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-nds32
Wolfgang Denk [Mon, 30 Apr 2012 14:29:16 +0000 (16:29 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-nds32

* 'master' of git://git.denx.de/u-boot-nds32:
  board/adp-ag102: add configuration of adp-ag102
  board/adp-ag102: add board specific files
  nds32/ag102: add ag102 soc support
  nds32/ag102: add header support of ag102 soc

7 years agopowerpc/ppc4xx: Remove typedefs for gdsys FPGA
Dirk Eibach [Fri, 27 Apr 2012 08:33:46 +0000 (10:33 +0200)]
powerpc/ppc4xx: Remove typedefs for gdsys FPGA

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agopowerpc/ppc4xx: Fix typo in gdsys_fpga.h
Dirk Eibach [Thu, 26 Apr 2012 03:54:26 +0000 (03:54 +0000)]
powerpc/ppc4xx: Fix typo in gdsys_fpga.h

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agopowerpc/ppc4xx: Update gdsys board configurations
Dirk Eibach [Thu, 26 Apr 2012 03:54:25 +0000 (03:54 +0000)]
powerpc/ppc4xx: Update gdsys board configurations

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agopowerpc/ppc4xx: Support gdsys dlvision-10g hardware 1.20
Dirk Eibach [Thu, 26 Apr 2012 03:54:24 +0000 (03:54 +0000)]
powerpc/ppc4xx: Support gdsys dlvision-10g hardware 1.20

In hardware revision 1.20 one more fan controller is added to dlvision-10g.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agopowerpc/ppc4xx: Adapt gdsys 405ep boards to platform changes
Dirk Eibach [Thu, 26 Apr 2012 03:54:23 +0000 (03:54 +0000)]
powerpc/ppc4xx: Adapt gdsys 405ep boards to platform changes

Print fpga info at last_stage_init on gdsys 405ep boards.
Use dtt_init() to startup fans.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agopowerpc/ppc4xx: Make gdsys 405ep boards reset more generic
Dirk Eibach [Thu, 26 Apr 2012 03:54:22 +0000 (03:54 +0000)]
powerpc/ppc4xx: Make gdsys 405ep boards reset more generic

In order to add boards that have different hardware for fpga reset,
any 405ep gdsys board now provides these functions:

void gd405ep_init(void);
void gd405ep_set_fpga_reset(unsigned state);
void gd405ep_setup_hw(void);
int gd405ep_get_fpga_done(unsigned fpga);

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agopowerpc/ppc4xx: Adjust environment size on neo
Dirk Eibach [Thu, 26 Apr 2012 03:54:21 +0000 (03:54 +0000)]
powerpc/ppc4xx: Adjust environment size on neo

Environment size on neo has to be 0x20000 for compatibilty reasons.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agopatman: Change the location of patman path
Vikram Narayanan [Fri, 27 Apr 2012 06:39:31 +0000 (06:39 +0000)]
patman: Change the location of patman path

Fix the location of patman path in README

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
7 years agopatman: Fix a typo error
Vikram Narayanan [Wed, 25 Apr 2012 05:45:05 +0000 (05:45 +0000)]
patman: Fix a typo error

Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoGCC47: Fix warning in md5.c
Marek Vasut [Sat, 28 Apr 2012 22:28:40 +0000 (00:28 +0200)]
GCC47: Fix warning in md5.c

md5.c: In function ‘MD5Final’:
md5.c:156:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
md5.c:157:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
7 years agoGCC47: Fix warning in cmd_nand.c
Marek Vasut [Sat, 28 Apr 2012 22:28:39 +0000 (00:28 +0200)]
GCC47: Fix warning in cmd_nand.c

cmd_nand.c: In function ‘arg_off_size’:
cmd_nand.c:216:5: warning: ‘maxsize’ may be used uninitialized in this function [-Wmaybe-uninitialized]

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
7 years agoMerge branch 'marex@denx.de' of git://git.denx.de/u-boot-staging
Wolfgang Denk [Fri, 27 Apr 2012 11:03:26 +0000 (13:03 +0200)]
Merge branch 'marex@denx.de' of git://git.denx.de/u-boot-staging

* 'marex@denx.de' of git://git.denx.de/u-boot-staging:
  CMD: CONFIG_CMD_SETECPR -> CONFIG_CMD_SETEXPR on omap3_logic
  CMD: Fix CONFIG_CMD_SAVEBP_WRITE_SIZE -> CONFIG_CMD_SPL_WRITE_SIZE
  CMD: Fix typo CMD_FSL -> CMD_MFSL in readme
  HWW1U1A: Fix CMD_SHA1 -> CMD_SHA1SUM
  CMD: Remove CMD_LOG, it's unused
  CMD: Fix typo KGBD -> KGDB on debris board
  CMD: Drop CONFIG_CMD_EMMC, it's not used
  CMD: Drop CONFIG_CMD_DFL, it's not used
  CMD: Drop CMD_DCR, it's not used
  CMD: Drop CMD_CAN, it's not used
  CMD: Remove CMD_AUTOSCRIPT, it's not used
  AT91: Drop AT91_SPIMUX command from cmd_all

7 years agoPrepare v2012.04.01 v2012.04.01
Wolfgang Denk [Wed, 25 Apr 2012 13:22:50 +0000 (15:22 +0200)]
Prepare v2012.04.01

Signed-off-by: Wolfgang Denk <wd@denx.de>
7 years agopowerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
Timur Tabi [Mon, 26 Mar 2012 09:49:08 +0000 (09:49 +0000)]
powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR

The CCSR relocation code in start.S writes to MAS7 on all e500 parts, but
that register does not exist on e500v1.

Signed-off-by: Timur Tabi <timur@freescale.com>
7 years agopowerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
Timur Tabi [Thu, 15 Mar 2012 11:42:27 +0000 (11:42 +0000)]
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot

Most 85xx boards can be built as a 32-bit or a 36-bit.  Current code sometimes
displays which of these is actually built, but it's inconsistent.  This is
especially problematic since the "default" build for a given 85xx board can
be either one, so if you don't see a message, you can't always know which
size is being used.  Not only that, but each board includes code that displays
the message, so there is duplication.

The 'bdinfo' command has been updated to display this information, so
we don't need to display it at boot time.  The board-specific code is
deleted.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agocmd_bdinfo: display the address map size (32-bit vs. 36-bit)
Timur Tabi [Thu, 15 Mar 2012 11:42:26 +0000 (11:42 +0000)]
cmd_bdinfo: display the address map size (32-bit vs. 36-bit)

Some Freescale SOCs support 32-bit and 36-bit physical addressing, and
U-Boot must be built to enable one or the other.  Add this information
to the bdinfo command.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agoPowerPC: correct the SATA for p1/p2 rdb-pc platform
Jerry Huang [Sun, 11 Mar 2012 16:15:04 +0000 (16:15 +0000)]
PowerPC: correct the SATA for p1/p2 rdb-pc platform

For p1/p2 rdb-pc platform, use the PCIe-SATA Silicon Image SATA controller.
Therefore, the SATA driver will use sata_sil, instead sata_sil3114.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Andy Fleming <afleming@gmail.com>
7 years agopowerpc/corenet_ds: Slave core in holdoff when boot from SRIO
Liu Gang [Thu, 8 Mar 2012 00:33:21 +0000 (00:33 +0000)]
powerpc/corenet_ds: Slave core in holdoff when boot from SRIO

When boot from SRIO, slave's core can be in holdoff after powered on for
some specific requirements. Master can release the slave's core at the
right time by SRIO interface.

Master needs to:
1. Set outbound SRIO windows in order to configure slave's registers
   for the core's releasing.
2. Check the SRIO port status when release slave core, if no errors,
   will implement the process of the slave core's releasing.
Slave needs to:
1. Set all the cores in holdoff by RCW.
2. Be powered on before master's boot.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
7 years agopowerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
Liu Gang [Thu, 8 Mar 2012 00:33:20 +0000 (00:33 +0000)]
powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO

When boot from SRIO, slave's ENV can be stored in master's memory space,
then slave can fetch the ENV through SRIO interface.

NOTE: Because the slave can not erase, write master's NOR flash by SRIO
  interface, so it can not modify the ENV parameters stored in
  master's NOR flash using "saveenv" or other commands.

Master needs to:
1. Put the slave's ENV into it's own memory space.
2. Set an inbound SRIO window covered slave's ENV stored in master's
   memory space.
Slave needs to:
1. Set a specific TLB entry in order to fetch ucode and ENV from master.
2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode and ENV.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
7 years agopowerpc/corenet_ds: Slave uploads ucode when boot from SRIO
Liu Gang [Thu, 8 Mar 2012 00:33:19 +0000 (00:33 +0000)]
powerpc/corenet_ds: Slave uploads ucode when boot from SRIO

When boot from SRIO, slave's ucode can be stored in master's memory space,
then slave can fetch the ucode image through SRIO interface. For the
corenet platform, ucode is for Fman.

Master needs to:
1. Put the slave's ucode image into it's own memory space.
2. Set an inbound SRIO window covered slave's ucode stored in master's
   memory space.
Slave needs to:
1. Set a specific TLB entry in order to fetch ucode from master.
2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
7 years agopowerpc/corenet_ds: Slave module for boot from SRIO
Liu Gang [Thu, 8 Mar 2012 00:33:18 +0000 (00:33 +0000)]
powerpc/corenet_ds: Slave module for boot from SRIO

For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.

The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:

master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure SRIO switch system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to SRIO1 or SRIO2 by RCW.
3. RCW should configure the SerDes, SRIO interfaces correctly.
4. Slave must be powered on after master's boot.
5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode
   locally.

For the slave module, need to finish these processes:
1. Set the boot location to SRIO1 or SRIO2 by RCW.
    2. Set a specific TLB entry for the boot process.
3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot.
4. Slave's u-boot image should be generated specifically by
   make xxxx_SRIOBOOT_SLAVE_config.
   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
7 years agopowerpc/corenet_ds: Master module for boot from SRIO
Liu Gang [Thu, 8 Mar 2012 00:33:17 +0000 (00:33 +0000)]
powerpc/corenet_ds: Master module for boot from SRIO

For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.

The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:

master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure SRIO switch system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to SRIO1 or SRIO2 by RCW.
3. RCW should configure the SerDes, SRIO interfaces correctly.
4. Slave must be powered on after master's boot.

For the master module, need to finish these processes:
1. Initialize the SRIO port and address space.
2. Set inbound SRIO windows covered slave's u-boot image stored in
   master's NOR flash.
3. Master's u-boot image should be generated specifically by
   make xxxx_SRIOBOOT_MASTER_config
4. Master must boot first, and then slave can be powered on.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
7 years agopowerpc/corenet_ds: Document for the boot from SRIO
Liu Gang [Thu, 8 Mar 2012 00:33:16 +0000 (00:33 +0000)]
powerpc/corenet_ds: Document for the boot from SRIO

This document describes the implementation of the boot from SRIO,
includes the introduction of envionment, an example based on P4080DS
platform, an example of the slave's RCW, and the description about
how to use this feature.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
7 years agopowerpc/corenet_ds: Correct the compilation errors about ENV
Liu Gang [Thu, 8 Mar 2012 00:33:15 +0000 (00:33 +0000)]
powerpc/corenet_ds: Correct the compilation errors about ENV

When defined CONFIG_ENV_IS_NOWHERE, there will be some
compilation errors:

./common/env_nowhere.o: In function `env_relocate_spec':
./common/env_nowhere.c:38: multiple definition of `env_relocate_spec'
./common/env_flash.o: ./common/env_flash.c:326: first defined here
./common/env_nowhere.o: In function `env_get_char_spec':
./common/env_nowhere.c:42: multiple definition of `env_get_char_spec'
./common/env_flash.o:./common/env_flash.c:78: first defined here
./common/env_nowhere.o: In function `env_init':
./common/env_nowhere.c:51: multiple definition of `env_init'
./common/env_flash.o:./common/env_flash.c:237: first defined here
make[1]: *** [./common/libcommon.o] Error 1
make[1]: Leaving directory `./common'
make: *** [./common/libcommon.o] Error 2

Remove the CONFIG_ENV_IS_IN_FLASH if defined CONFIG_ENV_IS_NOWHERE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
7 years agopowerpc/srio: Rewrite the struct ccsr_rio
Liu Gang [Thu, 8 Mar 2012 00:33:14 +0000 (00:33 +0000)]
powerpc/srio: Rewrite the struct ccsr_rio

Rewrite this struct for the support of two ports and two message
units registers.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
7 years agopowerpc/85xx:Fix lds for nand boot debug info
Prabhakar Kushwaha [Wed, 29 Feb 2012 18:00:23 +0000 (18:00 +0000)]
powerpc/85xx:Fix lds for nand boot debug info

Currently "u-boot", the elf file generated via u-boot-nand.lds does not
contain required debug information i.e. .debug_{line, info, abbrev, aranges,
ranges} into their respective _global_ sections.

The original ld script line arch/powerpc/cpu/mpc85xx/start.o
KEEP(*(.bootpg)) is not entirely correct because the start.o file is already
processed by the linker,therefore the file wildcard in "KEEP(*(.bootpg))" will
not process start.o again for bootpg.

So Fix u-boot-nand.lds to generate these debug information.

Signed-off-by: Anmol Paralkar <b07584@freescale.com>
Signed-off-by: John Russo <John.Russo@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/p2041rdb: add env in NAND support
Shaohui Xie [Tue, 28 Feb 2012 23:28:40 +0000 (23:28 +0000)]
powerpc/p2041rdb: add env in NAND support

Add env in NAND support when boot from NAND.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/p2041rdb: add NAND and NAND boot support
Shaohui Xie [Tue, 28 Feb 2012 23:28:07 +0000 (23:28 +0000)]
powerpc/p2041rdb: add NAND and NAND boot support

New P2041RDB board will add a NAND chip, so add support for NAND and
NAND boot.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
York Sun [Wed, 29 Feb 2012 12:36:51 +0000 (12:36 +0000)]
powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards

P1010RDB and p1_pc_rdb_pc has incorrect configuration for
CONFIG_DDR_RAW_TIMING. It should be CONFIG_SYS_DDR_RAW_TIMING.
Incorrect setting causes DDR failure in case of SPD absent.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/85xx:Avoid vector table compilation for nand_spl
Prabhakar Kushwaha [Tue, 14 Feb 2012 22:50:02 +0000 (22:50 +0000)]
powerpc/85xx:Avoid vector table compilation for nand_spl

NAND SPL code never compile the vector table.
So no need to setup interrupt vector table for NAND SPL.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/85xx:Fix IVORs addr after vector table relocation
Prabhakar Kushwaha [Tue, 14 Feb 2012 22:49:49 +0000 (22:49 +0000)]
powerpc/85xx:Fix IVORs addr after vector table relocation

After relocation of vector table in SDRAM's lower address, IVORs value should
be updated with new handler addresses.

As vector tables are relocated to 0x100,0x200... 0xf00 address in DDR.IVORs
are updated with 0x100, 0x200,....f00  hard-coded values.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/85xx:Avoid hardcoded vector address for IVORs
Prabhakar Kushwaha [Tue, 14 Feb 2012 22:49:29 +0000 (22:49 +0000)]
powerpc/85xx:Avoid hardcoded vector address for IVORs

For e500 and e500v2 architecturees processor IVPR address should be alinged on
64K boundary.

in start.S, CONFIG_SYS_MONITOR_BASE is stored blindly in IVPR assuming it to be
64K aligned. It may not be true always. If it is not aligned, IVPR + IVORs may
not point to an exception handler.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agopowerpc/p1023rds: Disable nor flash node and enable nand flash node
Chunhe Lan [Wed, 18 Apr 2012 20:58:56 +0000 (15:58 -0500)]
powerpc/p1023rds: Disable nor flash node and enable nand flash node

In the p1023rds, when system boots from nor flash, kernel only accesses nor
flash and can not access nand flash with BR0/OR0; when system boots from
nand flash, kernel only accesses nand flash and can not access nor flash
with BR0/OR0.

Default device tree nor and nand node should have the following structure:

Example:

nor_flash: nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x02000000>;
bank-width = <2>;
device-width = <1>;
status = "okay";

partition@0 {
label = "ramdisk";
reg = <0x00000000 0x01c00000>;
};
}

nand_flash: nand@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,p1023-fcm-nand",
     "fsl,elbc-fcm-nand";
reg = <0x2 0x0 0x00040000>;
status = "disabled";

u-boot-nand@0 {
/* This location must not be altered  */
/* 1MB for u-boot Bootloader Image */
reg = <0x0 0x00100000>;
read-only;
};
}

When booting from nor flash, the status of nor node is enabled and the
status of nand node is disabled in the default dts file, so do not do
anything.

But, when booting from nand flash, need to do some operations:

o Disable the NOR node by setting status = "disabled";
o Enable the NAND node by setting status = "okay";

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
7 years agoi2c:designware Turn off the ctrl when setting the speed
Armando Visconti [Thu, 29 Mar 2012 20:10:17 +0000 (20:10 +0000)]
i2c:designware Turn off the ctrl when setting the speed

The designware i2c controller must be turned off before
setting the speed in IC_CON register, as stated in the
section 6.3.1 of the dw_apb_i2c_db.pdf.

Signed-off-by: Michel Sanches <michel.sanches@st.com>
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
7 years agoi2c: Add support for designware i2c controller
Vipin KUMAR [Sun, 26 Feb 2012 23:13:29 +0000 (23:13 +0000)]
i2c: Add support for designware i2c controller

Earlier, a driver exists in the u-boot source for designware i2c interface. That
driver was specific to spear platforms. This patch implements the i2c controller
as a generic driver which can be used by multiple platforms

The driver files are now renamed to designware_i2c.c and designware_i2c.h and
these are moved into drivers/i2c folder for reusability by other
platforms

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
7 years agosh: i2c: Add support I2C controller of SH7734
Nobuhiro Iwamatsu [Thu, 1 Mar 2012 17:56:35 +0000 (17:56 +0000)]
sh: i2c: Add support I2C controller of SH7734

Renesas SH7734 has two I2C interfaceis.
This supports these I2C.

V5: - include i2c.h.
    - Add check of icsr bit polling logic.
- Implement i2c_probe.
V4: - Remove sh_i2c_dump_reg function.
    - Use puts() when there's no format.
    - Chnage check for I2C bus number.
    - Remove space before the semi-colon.
V3: - Fix error for whitespace.
V2: - Changed bit control to use the clr|set|clrsetbits_* functions.
    - Fix wrong comment style.
    - Add new line before for loop in i2c_read.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
7 years agosandbox: Use the new run_command()
Simon Glass [Fri, 30 Mar 2012 21:30:57 +0000 (21:30 +0000)]
sandbox: Use the new run_command()

Now that run_command() handles both parsers, clean up sandbox to use it.
This fixes a build error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
7 years agoarm: restore fdt_fixup_ethernet call to do_bootm_linux
Stephen Warren [Thu, 19 Apr 2012 11:09:49 +0000 (11:09 +0000)]
arm: restore fdt_fixup_ethernet call to do_bootm_linux

Commit 0a672d4 "arm: Add Prep subcommand support to bootm" re-organized
do_bootm_linux for ARM. During the re-organization, the call to
fdt_fixup_ethernet() was removed. I assume this was useful, so add it
back.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
7 years agoarm: fix bootm with device tree
Stephen Warren [Thu, 19 Apr 2012 11:34:00 +0000 (11:34 +0000)]
arm: fix bootm with device tree

Commit 0a672d4 "arm: Add Prep subcommand support to bootm" re-organized
do_bootm_linux() for ARM. During the re-organization, the code to pass
the device tree to the kernel was removed. Add it back. This restores
the ability to boot a kernel using device tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Allen Martin <amartin@nvidia.com>
Tested-by: Allen Martin <amartin@nvidia.com>
7 years agoFix the behaviour of the 'run' command
Timo Ketola [Sun, 22 Apr 2012 23:57:27 +0000 (23:57 +0000)]
Fix the behaviour of the 'run' command

If one command fails, 'run' command should terminate and not execute
any remaining variables.

Signed-off-by: Timo Ketola <timo@exertus.fi>
Tested-by: Wolfgang Denk <wd@denx.de>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoBlackfin: bfin_sdh: drop dos part hardcode
Mike Frysinger [Sun, 26 Feb 2012 18:50:45 +0000 (13:50 -0500)]
Blackfin: bfin_sdh: drop dos part hardcode

No other driver sets up the part type to DOS in their init, and it
doesn't seem to be needed as `mmcinfo` and `mmc part` stll work, so
drop it.

Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
7 years agoBlackfin: move gd/bd to bss by default
Mike Frysinger [Thu, 1 Mar 2012 03:48:10 +0000 (22:48 -0500)]
Blackfin: move gd/bd to bss by default

We don't need these setup manually, so let the bss do the rest.  On
Blackfin systems, we clear the bss before executing any C code that
would use these, so this should be fine.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
7 years agoBlackfin: gd_t: relocate volatile markings
Mike Frysinger [Thu, 16 Feb 2012 06:10:43 +0000 (01:10 -0500)]
Blackfin: gd_t: relocate volatile markings

This makes Blackfin behave the same as other ports, and fixes many gcc
warnings that show up with 4.5+:
board.c:40:1: warning: optimization may eliminate reads and/or
writes to register variables

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
7 years agoboard/adp-ag102: add configuration of adp-ag102
Macpaul Lin [Fri, 23 Sep 2011 08:49:59 +0000 (16:49 +0800)]
board/adp-ag102: add configuration of adp-ag102

board:
Add config file of board adp-ag102
Add adp-ag102 into boards.cfg
Add adp-ag102 into MAINTAINERS

doc:
add README of ag102

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
7 years agoboard/adp-ag102: add board specific files
Macpaul Lin [Fri, 23 Sep 2011 08:48:16 +0000 (16:48 +0800)]
board/adp-ag102: add board specific files

Add board specific files.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
7 years agonds32/ag102: add ag102 soc support
Macpaul Lin [Fri, 23 Sep 2011 09:03:19 +0000 (17:03 +0800)]
nds32/ag102: add ag102 soc support

Add lowlevel ag102 soc support.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
7 years agonds32/ag102: add header support of ag102 soc
Macpaul Lin [Fri, 23 Sep 2011 09:31:27 +0000 (17:31 +0800)]
nds32/ag102: add header support of ag102 soc

Add device address offsets header of ag102 soc.
Add ag102 into mach-types.h.
Add asm-offsets.c for helping convert C headers into asm.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
7 years agoPrepare v2012.04 v2012.04
Wolfgang Denk [Sat, 21 Apr 2012 16:55:26 +0000 (18:55 +0200)]
Prepare v2012.04

Also tiny style cleanup to tools/patman/README

Signed-off-by: Wolfgang Denk <wd@denx.de>
7 years agonet: ll_temac: drop obsolete "NAMESIZE" define
Stephan Linz [Tue, 10 Apr 2012 06:20:57 +0000 (06:20 +0000)]
net: ll_temac: drop obsolete "NAMESIZE" define

... after commit "net/miiphy/serial: drop duplicate NAMESIZE
define" (sha1:f6add13) was applied. The building of the new
LL TEMAC network driver fails with error below:

xilinx_ll_temac.c: In function 'xilinx_ll_temac_initialize':
xilinx_ll_temac.c:301: error: 'NAMESIZE' undeclared (first use in this function)
xilinx_ll_temac.c:301: error: (Each undeclared identifier is reported only once
xilinx_ll_temac.c:301: error: for each function it appears in.)

Signed-off-by: Stephan Linz <linz@li-pro.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
7 years agoAdd 'patman' patch generation, checking and submission script
Simon Glass [Sat, 14 Jan 2012 15:12:45 +0000 (15:12 +0000)]
Add 'patman' patch generation, checking and submission script

What is this?

=============

This tool is a Python script which:
- Creates patch directly from your branch
- Cleans them up by removing unwanted tags
- Inserts a cover letter with change lists
- Runs the patches through checkpatch.pl and its own checks
- Optionally emails them out to selected people

It is intended to automate patch creation and make it a less
error-prone process. It is useful for U-Boot and Linux work so far,
since it uses the checkpatch.pl script.

It is configured almost entirely by tags it finds in your commits.
This means that you can work on a number of different branches at
once, and keep the settings with each branch rather than having to
git format-patch, git send-email, etc. with the correct parameters
each time. So for example if you put:

in one of your commits, the series will be sent there.

See the README file for full details.
END

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoeb_cpux9k2: add USB host support to board
Jens Scharsig [Mon, 11 Jul 2011 09:25:42 +0000 (09:25 +0000)]
eb_cpux9k2: add USB host support to board

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
7 years agommc: Fix warning if CONFIG_MMC_TRACE is enabled
Dirk Behme [Thu, 8 Mar 2012 02:35:34 +0000 (02:35 +0000)]
mmc: Fix warning if CONFIG_MMC_TRACE is enabled

Fix the warning

mmc.c: In function 'mmc_send_cmd':
mmc.c:87: warning: assignment from incompatible pointer type

in case CONFIG_MMC_TRACE is enabled.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Andy Fleming <afleming@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>