From 46820177934be3a51aa557af5daa87b8add12852 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Lothar=20Wa=C3=9Fmann?= Date: Fri, 24 Oct 2014 12:27:20 +0200 Subject: [PATCH] karo: tx53: add support for TX53-1232 (2GiB SDRAM) --- board/karo/tx53/lowlevel_init.S | 35 +++++++++++++++++++++++++++++++-- board/karo/tx53/tx53.c | 6 +++++- boards.cfg | 1 + 3 files changed, 39 insertions(+), 3 deletions(-) diff --git a/board/karo/tx53/lowlevel_init.S b/board/karo/tx53/lowlevel_init.S index 15f2245c41..566667cd8e 100644 --- a/board/karo/tx53/lowlevel_init.S +++ b/board/karo/tx53/lowlevel_init.S @@ -105,6 +105,7 @@ dcd_end: #define CK_TO_NS(ck) (((ck) * 1000 + SDRAM_CLK / 2) / SDRAM_CLK) #define NS_TO_CK(ns) (((ns) * SDRAM_CLK + 999) / 1000) #define NS_TO_CK10(ns) DIV_ROUND_UP(NS_TO_CK(ns), 10) +#define NS_TO_CK100(ns) DIV_ROUND_UP(NS_TO_CK(ns), 100) .macro CK_VAL, name, clks, offs, max .iflt \clks - \offs @@ -152,7 +153,6 @@ dcd_end: #define ADDR_MIRROR 0 #define DDR_TYPE ESDMISC_DDR_TYPE_DDR3 -/* 512/1024MiB SDRAM: NT5CB128M16FP-DII */ #if SDRAM_CLK > 666 && SDRAM_CLK <= 800 #define CL_VAL 11 #define CWL_VAL 8 @@ -172,6 +172,8 @@ dcd_end: #error SDRAM clock out of range: 303 .. 800 #endif +#if SDRAM_SIZE < 2048 +/* 512/1024MiB SDRAM: NT5CB128M16FP-DII */ /* ESDCFG0 0x0c */ NS_VAL tRFC, 160, 1, 255 /* clks - 1 (0..255) */ CK_MAX tXS, NS_TO_CK(CK_TO_NS(tRFC + 1) + 10), 5, 1, 255 /* clks - 1 (0..255) tRFC + 10 */ @@ -198,13 +200,42 @@ CK_MAX tRRD, NS_TO_CK(10), 4, 1, 7 /* clks - 1 (0..7) */ /* ESDOR 0x30 */ CK_MAX tXPR, NS_TO_CK(CK_TO_NS(tRFC + 1) + 10), 5, 1, 255 /* clks - 1 (0..255) max(tRFC + 10, 5CK) */ +#else +/* 4096MiB SDRAM: IM4G16D3EABG-125I */ +/* ESDCFG0 0x0c */ +NS_VAL tRFC, 260, 1, 255 /* clks - 1 (0..255) */ +CK_MAX tXS, NS_TO_CK(CK_TO_NS(tRFC + 1) + 10), 5, 1, 255 /* clks - 1 (0..255) tRFC + 10 */ +CK_MAX tXP, NS_TO_CK(6), 3, 1, 7 /* clks - 1 (0..7) */ /* max(3tCK, 7.5ns) */ +CK_MAX tXPDLL, NS_TO_CK(24), 2, 1, 15 /* clks - 1 (0..15) */ +NS_VAL tFAW, 30, 1, 31 /* clks - 1 (0..31) */ +CK_VAL tCL, CL_VAL, 3, 8 /* clks - 3 (0..8) CAS Latency */ + +/* ESDCFG1 0x10 */ +CK_VAL tRCD, NS_TO_CK100(1375), 1, 7 /* clks - 1 (0..7) */ /* 13.75 */ +CK_VAL tRP, NS_TO_CK100(1375), 1, 7 /* clks - 1 (0..7) */ /* 13.75 */ +CK_VAL tRC, NS_TO_CK100(4875), 1, 31 /* clks - 1 (0..31) */ /* 48.75 */ +CK_VAL tRAS, NS_TO_CK(35), 1, 31 /* clks - 1 (0..31) */ /* 35 */ +CK_VAL tRPA, 1, 0, 1 /* clks (0..1) */ +NS_VAL tWR, 15, 1, 15 /* clks - 1 (0..15) */ +CK_VAL tMRD, 4, 1, 15 /* clks - 1 (0..15) */ +CK_VAL tCWL, CWL_VAL, 2, 6 /* clks - 2 (0..6) */ + +/* ESDCFG2 0x14 */ +CK_VAL tDLLK, 512, 1, 511 /* clks - 1 (0..511) */ +CK_MAX tRTP, NS_TO_CK10(75), 4, 1, 7 /* clks - 1 (0..7) */ /* max(4tCK, 7.5ns) */ +CK_MAX tWTR, NS_TO_CK10(75), 4, 1, 7 /* clks - 1 (0..7) */ /* max(4tCK, 7.5ns) */ +CK_MAX tRRD, NS_TO_CK10(75), 4, 1, 7 /* clks - 1 (0..7) */ /* max(4tCK, 7.5ns) */ + +/* ESDOR 0x30 */ +CK_MAX tXPR, NS_TO_CK(CK_TO_NS(tRFC + 1) + 10), 5, 1, 255 /* clks - 1 (0..255) max(tRFC + 10, 5CK) */ +#endif + #define tSDE_RST (DIV_ROUND_UP(200000, ESDOR_CLK_PERIOD_ns) + 1) /* Add an extra (or two?) ESDOR_CLK_PERIOD_ns according to * erroneous Erratum Engcm12377 */ #define tRST_CKE (DIV_ROUND_UP(500000 + 2 * ESDOR_CLK_PERIOD_ns, ESDOR_CLK_PERIOD_ns) + 1) - /* ESDOTC 0x08 */ CK_VAL tAOFPD, NS_TO_CK10(85), 1, 7 /* clks - 1 (0..7) */ /* 8.5ns */ CK_VAL tAONPD, NS_TO_CK10(85), 1, 7 /* clks - 1 (0..7) */ /* 8.5ns */ diff --git a/board/karo/tx53/tx53.c b/board/karo/tx53/tx53.c index 50314f6fec..06a9a4b5a2 100644 --- a/board/karo/tx53/tx53.c +++ b/board/karo/tx53/tx53.c @@ -1369,8 +1369,12 @@ int checkboard(void) #if CONFIG_SYS_SDRAM_SIZE < SZ_1G printf("Board: Ka-Ro TX53-8%d3%c\n", is_lvds(), '0' + CONFIG_SYS_SDRAM_SIZE / SZ_1G); +#elif CONFIG_SYS_SDRAM_SIZE < SZ_2G + printf("Board: Ka-Ro TX53-1%d3%c\n", + is_lvds() + 2, '0' + CONFIG_SYS_SDRAM_SIZE / SZ_1G); #else - printf("Board: Ka-Ro TX53-1%d31\n", is_lvds() + 2); + printf("Board: Ka-Ro TX53-123%c\n", + '0' + CONFIG_SYS_SDRAM_SIZE / SZ_1G); #endif return 0; } diff --git a/boards.cfg b/boards.cfg index c6ae7856c0..6e3c5d4f69 100644 --- a/boards.cfg +++ b/boards.cfg @@ -280,6 +280,7 @@ tx51-8xx1_2 arm armv7 tx51 karo m tx53-x030 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=1 tx53-x130 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=1,SYS_LVDS_IF tx53-x131 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=2,SYS_LVDS_IF +tx53-1232 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=2,SYS_SDRAM_SIZE=SZ_2G tx6q-1010 arm armv7 tx6 karo mx6 tx6:MX6Q tx6q-1010_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG tx6q-1010_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE -- 2.39.2