From bd7a756cd38badee1b0e42bf4cde737f7aef9809 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Lothar=20Wa=C3=9Fmann?= Date: Fri, 8 Aug 2014 14:45:21 +0200 Subject: [PATCH] arm: mx5: print some more clocks in the 'clock' command --- arch/arm/cpu/armv7/mx5/clock.c | 27 ++++++++++++++++++++++++++- arch/arm/include/asm/arch-mx5/clock.h | 3 +++ 2 files changed, 29 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c index db8f752218..fe2f86f2d8 100644 --- a/arch/arm/cpu/armv7/mx5/clock.c +++ b/arch/arm/cpu/armv7/mx5/clock.c @@ -46,6 +46,8 @@ struct mxc_pll_reg *mxc_plls[PLL_CLOCKS] = { #define EMI_DIV_MAX 8 #define NFC_DIV_MAX 8 +#define MXC_IPG_PER_CLK MXC_IPG_PERCLK + struct fixed_pll_mfd { u32 ref_clk_hz; u32 mfd; @@ -626,6 +628,17 @@ static u32 get_emi_slow_clk(void) return get_periph_clk() / (pdf + 1); } +static u32 get_nfc_clk(void) +{ + u32 parent_rate = get_emi_slow_clk(); + u32 div = readl(&mxc_ccm->cbcdr); + + div &= MXC_CCM_CBCDR_NFC_PODF_MASK; + div >>= MXC_CCM_CBCDR_NFC_PODF_OFFSET; + div++; + return parent_rate / div; +} + static u32 get_ddr_clk(void) { u32 ret_val = 0; @@ -695,6 +708,14 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return get_ahb_clk(); case MXC_DDR_CLK: return get_ddr_clk(); + case MXC_AXI_A_CLK: + return get_axi_a_clk(); + case MXC_AXI_B_CLK: + return get_axi_b_clk(); + case MXC_EMI_SLOW_CLK: + return get_emi_slow_clk(); + case MXC_NFC_CLK: + return get_nfc_clk(); default: break; } @@ -1140,9 +1161,13 @@ static int do_mx5_showclocks(void) printf("\n"); pr_clk(AHB); + pr_clk(AXI_A); + pr_clk(AXI_B); pr_clk(IPG); - pr_clk(IPG); + pr_clk(IPG_PER); pr_clk(DDR); + pr_clk(EMI_SLOW); + pr_clk(NFC); #ifdef CONFIG_MXC_SPI pr_clk(CSPI); #endif diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index 6de0077383..47f4c0e276 100644 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h @@ -39,6 +39,9 @@ enum mxc_clock { MXC_NFC_CLK, MXC_PERIPH_CLK, MXC_I2C_CLK, + MXC_AXI_A_CLK, + MXC_AXI_B_CLK, + MXC_EMI_SLOW_CLK, }; -- 2.39.2