2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
6 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/adc.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/mmc.h>
17 #include <asm/arch/pinmux.h>
18 #include <asm/arch/watchdog.h>
21 #include <power/pmic.h>
22 #include <usb/s3c_udc.h>
23 #include <asm/arch/cpu.h>
24 #include <power/max8998_pmic.h>
26 DECLARE_GLOBAL_DATA_PTR;
28 struct exynos4_gpio_part1 *gpio1;
29 struct exynos4_gpio_part2 *gpio2;
30 unsigned int board_rev;
32 u32 get_board_rev(void)
37 static int get_hwrev(void)
39 return board_rev & 0xFF;
42 static void init_pmic_lcd(void);
44 int power_init_board(void)
48 ret = pmic_init(I2C_5);
59 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
60 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
65 void dram_init_banksize(void)
67 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
68 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
69 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
70 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
73 static unsigned short get_adc_value(int channel)
75 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
76 unsigned short ret = 0;
78 unsigned int loop = 0;
80 writel(channel & 0xF, &adc->adcmux);
81 writel((1 << 14) | (49 << 6), &adc->adccon);
82 writel(1000 & 0xffff, &adc->adcdly);
83 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
85 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
90 reg = readl(&adc->adccon);
91 } while (!(reg & (1 << 15)) && (loop++ < 1000));
93 ret = readl(&adc->adcdat0) & 0xFFF;
98 static int adc_power_control(int on)
101 struct pmic *p = pmic_get("MAX8998_PMIC");
108 ret = pmic_set_output(p,
115 static unsigned int get_hw_revision(void)
117 int hwrev, mode0, mode1;
119 adc_power_control(1);
121 mode0 = get_adc_value(1); /* HWREV_MODE0 */
122 mode1 = get_adc_value(2); /* HWREV_MODE1 */
125 * XXX Always set the default hwrev as the latest board
126 * ADC = (voltage) / 3.3 * 4096
130 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
131 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
132 hwrev = 0x0; /* 0.01V 0.01V */
133 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
134 hwrev = 0x1; /* 610mV 0.01V */
135 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
136 hwrev = 0x2; /* 1.16V 0.01V */
137 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
138 hwrev = 0x3; /* 1.79V 0.01V */
141 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
143 adc_power_control(0);
148 static void check_hw_revision(void)
152 hwrev = get_hw_revision();
157 #ifdef CONFIG_DISPLAY_BOARDINFO
160 puts("Board:\tUniversal C210\n");
165 #ifdef CONFIG_GENERIC_MMC
166 int board_mmc_init(bd_t *bis)
170 switch (get_hwrev()) {
173 * Set the low to enable LDO_EN
174 * But when you use the test board for eMMC booting
175 * you should set it HIGH since it removes the inverter
177 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
178 s5p_gpio_direction_output(&gpio1->e3, 6, 0);
182 * Default reset state is High and there's no inverter
183 * But set it as HIGH to ensure
185 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
186 s5p_gpio_direction_output(&gpio1->e1, 3, 1);
192 * mmc0 : eMMC (8-bit buswidth)
193 * mmc2 : SD card (4-bit buswidth)
195 err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
197 debug("SDMMC0 not configured\n");
199 err = s5p_mmc_init(0, 8);
202 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
203 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
206 * Check the T-flash detect pin
207 * GPX3[4] T-flash detect pin
209 if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
210 err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
212 debug("SDMMC2 not configured\n");
214 err = s5p_mmc_init(2, 4);
222 #ifdef CONFIG_USB_GADGET
223 static int s5pc210_phy_control(int on)
226 struct pmic *p = pmic_get("MAX8998_PMIC");
234 ret |= pmic_set_output(p,
235 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
236 MAX8998_SAFEOUT1, LDO_ON);
237 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
238 MAX8998_LDO3, LDO_ON);
239 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
240 MAX8998_LDO8, LDO_ON);
243 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
244 MAX8998_LDO8, LDO_OFF);
245 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
246 MAX8998_LDO3, LDO_OFF);
247 ret |= pmic_set_output(p,
248 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
249 MAX8998_SAFEOUT1, LDO_OFF);
253 puts("MAX8998 LDO setting error!\n");
260 struct s3c_plat_otg_data s5pc210_otg_data = {
261 .phy_control = s5pc210_phy_control,
262 .regs_phy = EXYNOS4_USBPHY_BASE,
263 .regs_otg = EXYNOS4_USBOTG_BASE,
264 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
265 .usb_flags = PHY0_SLEEP,
269 int board_early_init_f(void)
276 #ifdef CONFIG_SOFT_SPI
277 static void soft_spi_init(void)
279 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_SCLK,
280 CONFIG_SOFT_SPI_MODE & SPI_CPOL);
281 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_MOSI, 1);
282 gpio_direction_input(CONFIG_SOFT_SPI_GPIO_MISO);
283 gpio_direction_output(CONFIG_SOFT_SPI_GPIO_CS,
284 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
287 void spi_cs_activate(struct spi_slave *slave)
289 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
290 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
292 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
293 CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH);
296 void spi_cs_deactivate(struct spi_slave *slave)
298 gpio_set_value(CONFIG_SOFT_SPI_GPIO_CS,
299 !(CONFIG_SOFT_SPI_MODE & SPI_CS_HIGH));
302 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
304 return bus == 0 && cs == 0;
307 void universal_spi_scl(int bit)
309 gpio_set_value(CONFIG_SOFT_SPI_GPIO_SCLK, bit);
312 void universal_spi_sda(int bit)
314 gpio_set_value(CONFIG_SOFT_SPI_GPIO_MOSI, bit);
317 int universal_spi_read(void)
319 return gpio_get_value(CONFIG_SOFT_SPI_GPIO_MISO);
323 static void init_pmic_lcd(void)
328 struct pmic *p = pmic_get("MAX8998_PMIC");
337 val = 0x02; /* (1800 - 1600) / 100; */
338 ret |= pmic_reg_write(p, MAX8998_REG_LDO7, val);
341 val = 0xe; /* (3000 - 1600) / 100; */
342 ret |= pmic_reg_write(p, MAX8998_REG_LDO17, val);
344 /* Disable unneeded regulators */
347 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
348 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
351 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF1, val);
354 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
355 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
358 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF2, val);
361 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
362 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
365 ret |= pmic_reg_write(p, MAX8998_REG_ONOFF3, val);
368 puts("LCD pmic initialisation error!\n");
371 void exynos_cfg_lcd_gpio(void)
373 unsigned int i, f3_end = 4;
375 for (i = 0; i < 8; i++) {
376 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
377 s5p_gpio_cfg_pin(&gpio1->f0, i, GPIO_FUNC(2));
378 s5p_gpio_cfg_pin(&gpio1->f1, i, GPIO_FUNC(2));
379 s5p_gpio_cfg_pin(&gpio1->f2, i, GPIO_FUNC(2));
380 /* pull-up/down disable */
381 s5p_gpio_set_pull(&gpio1->f0, i, GPIO_PULL_NONE);
382 s5p_gpio_set_pull(&gpio1->f1, i, GPIO_PULL_NONE);
383 s5p_gpio_set_pull(&gpio1->f2, i, GPIO_PULL_NONE);
385 /* drive strength to max (24bit) */
386 s5p_gpio_set_drv(&gpio1->f0, i, GPIO_DRV_4X);
387 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
388 s5p_gpio_set_drv(&gpio1->f1, i, GPIO_DRV_4X);
389 s5p_gpio_set_rate(&gpio1->f1, i, GPIO_DRV_SLOW);
390 s5p_gpio_set_drv(&gpio1->f2, i, GPIO_DRV_4X);
391 s5p_gpio_set_rate(&gpio1->f0, i, GPIO_DRV_SLOW);
394 for (i = 0; i < f3_end; i++) {
395 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
396 s5p_gpio_cfg_pin(&gpio1->f3, i, GPIO_FUNC(2));
397 /* pull-up/down disable */
398 s5p_gpio_set_pull(&gpio1->f3, i, GPIO_PULL_NONE);
399 /* drive strength to max (24bit) */
400 s5p_gpio_set_drv(&gpio1->f3, i, GPIO_DRV_4X);
401 s5p_gpio_set_rate(&gpio1->f3, i, GPIO_DRV_SLOW);
404 /* gpio pad configuration for LCD reset. */
405 s5p_gpio_cfg_pin(&gpio2->y4, 5, GPIO_OUTPUT);
410 void exynos_reset_lcd(void)
412 s5p_gpio_set_value(&gpio2->y4, 5, 1);
414 s5p_gpio_set_value(&gpio2->y4, 5, 0);
416 s5p_gpio_set_value(&gpio2->y4, 5, 1);
420 void exynos_lcd_power_on(void)
422 struct pmic *p = pmic_get("MAX8998_PMIC");
430 pmic_set_output(p, MAX8998_REG_ONOFF3, MAX8998_LDO17, LDO_ON);
431 pmic_set_output(p, MAX8998_REG_ONOFF2, MAX8998_LDO7, LDO_ON);
434 vidinfo_t panel_info = {
440 .vl_clkp = CONFIG_SYS_HIGH,
441 .vl_hsp = CONFIG_SYS_HIGH,
442 .vl_vsp = CONFIG_SYS_HIGH,
443 .vl_dp = CONFIG_SYS_HIGH,
445 .vl_bpix = 5, /* Bits per pixel */
447 /* LD9040 LCD Panel */
455 .vl_cmd_allow_len = 0xf,
458 .dual_lcd_enabled = 0,
461 .power_on_delay = 10000,
462 .reset_delay = 10000,
463 .interface_mode = FIMD_RGB_INTERFACE,
467 void exynos_cfg_ldo(void)
472 void exynos_enable_ldo(unsigned int onoff)
474 ld9040_enable_ldo(onoff);
477 void init_panel_info(vidinfo_t *vid)
480 vid->resolution = HD_RESOLUTION;
481 vid->rgb_mode = MODE_RGB_P;
484 get_tizen_logo_info(vid);
488 vid->pclk_name = 1; /* MPLL */
491 setenv("lcdinfo", "lcd=ld9040");
496 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
497 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
499 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
500 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
502 #ifdef CONFIG_SOFT_SPI
506 printf("HW Revision:\t0x%x\n", board_rev);