2 * LIRC SIR driver, (C) 2000 Milan Pikula <www@fornax.sk>
4 * lirc_sir - Device driver for use with SIR (serial infra red)
5 * mode of IrDA on many notebooks.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * 2000/09/16 Frank Przybylski <mail@frankprzybylski.de> :
23 * added timeout and relaxed pulse detection, removed gap bug
25 * 2000/12/15 Christoph Bartelmus <lirc@bartelmus.de> :
26 * added support for Tekram Irmate 210 (sending does not work yet,
27 * kind of disappointing that nobody was able to implement that
31 * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
32 * added support for StrongARM SA1100 embedded microprocessor
33 * parts cut'n'pasted from sa1100_ir.c (C) 2000 Russell King
36 #include <linux/module.h>
37 #include <linux/sched.h>
38 #include <linux/errno.h>
39 #include <linux/signal.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/serial_reg.h>
45 #include <linux/time.h>
46 #include <linux/string.h>
47 #include <linux/types.h>
48 #include <linux/wait.h>
50 #include <linux/delay.h>
51 #include <linux/poll.h>
52 #include <asm/system.h>
55 #include <linux/fcntl.h>
57 #include <asm/hardware.h>
58 #ifdef CONFIG_SA1100_COLLIE
59 #include <asm/arch/tc35143.h>
60 #include <asm/ucb1200.h>
64 #include <linux/timer.h>
66 #include <media/lirc.h>
67 #include <media/lirc_dev.h>
69 /* SECTION: Definitions */
71 /*** Tekram dongle ***/
72 #ifdef LIRC_SIR_TEKRAM
73 /* stolen from kernel source */
74 /* definitions for Tekram dongle */
75 #define TEKRAM_115200 0x00
76 #define TEKRAM_57600 0x01
77 #define TEKRAM_38400 0x02
78 #define TEKRAM_19200 0x03
79 #define TEKRAM_9600 0x04
80 #define TEKRAM_2400 0x08
82 #define TEKRAM_PW 0x10 /* Pulse select bit */
84 /* 10bit * 1s/115200bit in milliseconds = 87ms*/
85 #define TIME_CONST (10000000ul/115200ul)
89 #ifdef LIRC_SIR_ACTISYS_ACT200L
90 static void init_act200(void);
91 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
92 static void init_act220(void);
97 struct sa1100_ser2_registers {
98 /* HSSP control register */
111 static int irq = IRQ_Ser2ICP;
113 #define LIRC_ON_SA1100_TRANSMITTER_LATENCY 0
115 /* pulse/space ratio of 50/50 */
116 static unsigned long pulse_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
117 /* 1000000/freq-pulse_width */
118 static unsigned long space_width = (13-LIRC_ON_SA1100_TRANSMITTER_LATENCY);
119 static unsigned int freq = 38000; /* modulation frequency */
120 static unsigned int duty_cycle = 50; /* duty cycle of 50% */
124 #define RBUF_LEN 1024
125 #define WBUF_LEN 1024
127 #define LIRC_DRIVER_NAME "lirc_sir"
131 #ifndef LIRC_SIR_TEKRAM
132 /* 9bit * 1s/115200bit in milli seconds = 78.125ms*/
133 #define TIME_CONST (9000000ul/115200ul)
137 /* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */
138 #define SIR_TIMEOUT (HZ*5/100)
140 #ifndef LIRC_ON_SA1100
145 /* for external dongles, default to com1 */
146 #if defined(LIRC_SIR_ACTISYS_ACT200L) || \
147 defined(LIRC_SIR_ACTISYS_ACT220L) || \
148 defined(LIRC_SIR_TEKRAM)
149 #define LIRC_PORT 0x3f8
151 /* onboard sir ports are typically com3 */
152 #define LIRC_PORT 0x3e8
156 static int io = LIRC_PORT;
157 static int irq = LIRC_IRQ;
158 static int threshold = 3;
161 static DEFINE_SPINLOCK(timer_lock);
162 static struct timer_list timerlist;
163 /* time of last signal change detected */
164 static struct timeval last_tv = {0, 0};
165 /* time of last UART data ready interrupt */
166 static struct timeval last_intr_tv = {0, 0};
167 static int last_value;
169 static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
171 static DEFINE_SPINLOCK(hardware_lock);
173 static int rx_buf[RBUF_LEN];
174 static unsigned int rx_tail, rx_head;
177 #define dprintk(fmt, args...) \
180 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
184 /* SECTION: Prototypes */
186 /* Communication with user-space */
187 static unsigned int lirc_poll(struct file *file, poll_table *wait);
188 static ssize_t lirc_read(struct file *file, char *buf, size_t count,
190 static ssize_t lirc_write(struct file *file, const char *buf, size_t n,
192 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
193 static void add_read_queue(int flag, unsigned long val);
194 static int init_chrdev(void);
195 static void drop_chrdev(void);
197 static irqreturn_t sir_interrupt(int irq, void *dev_id);
198 static void send_space(unsigned long len);
199 static void send_pulse(unsigned long len);
200 static int init_hardware(void);
201 static void drop_hardware(void);
203 static int init_port(void);
204 static void drop_port(void);
206 #ifdef LIRC_ON_SA1100
212 static void off(void)
217 static inline unsigned int sinp(int offset)
219 return inb(io + offset);
222 static inline void soutp(int offset, int value)
224 outb(value, io + offset);
228 #ifndef MAX_UDELAY_MS
229 #define MAX_UDELAY_US 5000
231 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
234 static void safe_udelay(unsigned long usecs)
236 while (usecs > MAX_UDELAY_US) {
237 udelay(MAX_UDELAY_US);
238 usecs -= MAX_UDELAY_US;
243 /* SECTION: Communication with user-space */
245 static unsigned int lirc_poll(struct file *file, poll_table *wait)
247 poll_wait(file, &lirc_read_queue, wait);
248 if (rx_head != rx_tail)
249 return POLLIN | POLLRDNORM;
253 static ssize_t lirc_read(struct file *file, char *buf, size_t count,
258 DECLARE_WAITQUEUE(wait, current);
260 if (count % sizeof(int))
263 add_wait_queue(&lirc_read_queue, &wait);
264 set_current_state(TASK_INTERRUPTIBLE);
266 if (rx_head != rx_tail) {
267 if (copy_to_user((void *) buf + n,
268 (void *) (rx_buf + rx_head),
273 rx_head = (rx_head + 1) & (RBUF_LEN - 1);
276 if (file->f_flags & O_NONBLOCK) {
280 if (signal_pending(current)) {
281 retval = -ERESTARTSYS;
285 set_current_state(TASK_INTERRUPTIBLE);
288 remove_wait_queue(&lirc_read_queue, &wait);
289 set_current_state(TASK_RUNNING);
290 return n ? n : retval;
292 static ssize_t lirc_write(struct file *file, const char *buf, size_t n,
299 count = n / sizeof(int);
300 if (n % sizeof(int) || count % 2 == 0)
302 tx_buf = memdup_user(buf, n);
304 return PTR_ERR(tx_buf);
306 #ifdef LIRC_ON_SA1100
307 /* disable receiver */
310 local_irq_save(flags);
315 send_pulse(tx_buf[i]);
320 send_space(tx_buf[i]);
323 local_irq_restore(flags);
324 #ifdef LIRC_ON_SA1100
326 udelay(1000); /* wait 1ms for IR diode to recover */
328 /* clear status register to prevent unwanted interrupts */
329 Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
330 /* enable receiver */
331 Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
337 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
341 #ifdef LIRC_ON_SA1100
343 if (cmd == LIRC_GET_FEATURES)
344 value = LIRC_CAN_SEND_PULSE |
345 LIRC_CAN_SET_SEND_DUTY_CYCLE |
346 LIRC_CAN_SET_SEND_CARRIER |
348 else if (cmd == LIRC_GET_SEND_MODE)
349 value = LIRC_MODE_PULSE;
350 else if (cmd == LIRC_GET_REC_MODE)
351 value = LIRC_MODE_MODE2;
353 if (cmd == LIRC_GET_FEATURES)
354 value = LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2;
355 else if (cmd == LIRC_GET_SEND_MODE)
356 value = LIRC_MODE_PULSE;
357 else if (cmd == LIRC_GET_REC_MODE)
358 value = LIRC_MODE_MODE2;
362 case LIRC_GET_FEATURES:
363 case LIRC_GET_SEND_MODE:
364 case LIRC_GET_REC_MODE:
365 retval = put_user(value, (__u32 *) arg);
368 case LIRC_SET_SEND_MODE:
369 case LIRC_SET_REC_MODE:
370 retval = get_user(value, (__u32 *) arg);
372 #ifdef LIRC_ON_SA1100
373 case LIRC_SET_SEND_DUTY_CYCLE:
374 retval = get_user(value, (__u32 *) arg);
377 if (value <= 0 || value > 100)
379 /* (value/100)*(1000000/freq) */
381 pulse_width = (unsigned long) duty_cycle*10000/freq;
382 space_width = (unsigned long) 1000000L/freq-pulse_width;
383 if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
384 pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
385 if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
386 space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
388 case LIRC_SET_SEND_CARRIER:
389 retval = get_user(value, (__u32 *) arg);
392 if (value > 500000 || value < 20000)
395 pulse_width = (unsigned long) duty_cycle*10000/freq;
396 space_width = (unsigned long) 1000000L/freq-pulse_width;
397 if (pulse_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
398 pulse_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
399 if (space_width >= LIRC_ON_SA1100_TRANSMITTER_LATENCY)
400 space_width -= LIRC_ON_SA1100_TRANSMITTER_LATENCY;
404 retval = -ENOIOCTLCMD;
410 if (cmd == LIRC_SET_REC_MODE) {
411 if (value != LIRC_MODE_MODE2)
413 } else if (cmd == LIRC_SET_SEND_MODE) {
414 if (value != LIRC_MODE_PULSE)
421 static void add_read_queue(int flag, unsigned long val)
423 unsigned int new_rx_tail;
426 dprintk("add flag %d with val %lu\n", flag, val);
428 newval = val & PULSE_MASK;
431 * statistically, pulses are ~TIME_CONST/2 too long. we could
432 * maybe make this more exact, but this is good enough
436 if (newval > TIME_CONST/2)
437 newval -= TIME_CONST/2;
438 else /* should not ever happen */
442 newval += TIME_CONST/2;
444 new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
445 if (new_rx_tail == rx_head) {
446 dprintk("Buffer overrun.\n");
449 rx_buf[rx_tail] = newval;
450 rx_tail = new_rx_tail;
451 wake_up_interruptible(&lirc_read_queue);
454 static const struct file_operations lirc_fops = {
455 .owner = THIS_MODULE,
459 .unlocked_ioctl = lirc_ioctl,
461 .compat_ioctl = lirc_ioctl,
463 .open = lirc_dev_fop_open,
464 .release = lirc_dev_fop_close,
468 static int set_use_inc(void *data)
473 static void set_use_dec(void *data)
477 static struct lirc_driver driver = {
478 .name = LIRC_DRIVER_NAME,
484 .set_use_inc = set_use_inc,
485 .set_use_dec = set_use_dec,
488 .owner = THIS_MODULE,
492 static int init_chrdev(void)
494 driver.minor = lirc_register_driver(&driver);
495 if (driver.minor < 0) {
496 printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n");
502 static void drop_chrdev(void)
504 lirc_unregister_driver(driver.minor);
507 /* SECTION: Hardware */
508 static long delta(struct timeval *tv1, struct timeval *tv2)
512 deltv = tv2->tv_sec - tv1->tv_sec;
516 deltv = deltv*1000000 +
522 static void sir_timeout(unsigned long data)
525 * if last received signal was a pulse, but receiving stopped
526 * within the 9 bit frame, we need to finish this pulse and
527 * simulate a signal change to from pulse to space. Otherwise
528 * upper layers will receive two sequences next time.
532 unsigned long pulse_end;
534 /* avoid interference with interrupt */
535 spin_lock_irqsave(&timer_lock, flags);
537 #ifndef LIRC_ON_SA1100
538 /* clear unread bits in UART and restart */
539 outb(UART_FCR_CLEAR_RCVR, io + UART_FCR);
541 /* determine 'virtual' pulse end: */
542 pulse_end = delta(&last_tv, &last_intr_tv);
543 dprintk("timeout add %d for %lu usec\n", last_value, pulse_end);
544 add_read_queue(last_value, pulse_end);
546 last_tv = last_intr_tv;
548 spin_unlock_irqrestore(&timer_lock, flags);
551 static irqreturn_t sir_interrupt(int irq, void *dev_id)
554 struct timeval curr_tv;
555 static unsigned long deltv;
556 #ifdef LIRC_ON_SA1100
562 * Deal with any receive errors first. The bytes in error may be
563 * the only bytes in the receive FIFO, so we do this first.
565 while (status & UTSR0_EIF) {
572 if (bstat & UTSR1_FRE)
573 dprintk("frame error\n");
574 if (bstat & UTSR1_ROR)
575 dprintk("receive fifo overrun\n");
576 if (bstat & UTSR1_PRE)
577 dprintk("parity error\n");
585 if (status & (UTSR0_RFS | UTSR0_RID)) {
586 do_gettimeofday(&curr_tv);
587 deltv = delta(&last_tv, &curr_tv);
590 dprintk("%d data: %u\n", n, (unsigned int) data);
592 } while (status & UTSR0_RID && /* do not empty fifo in order to
593 * get UTSR0_RID in any case */
594 Ser2UTSR1 & UTSR1_RNE); /* data ready */
596 if (status&UTSR0_RID) {
597 add_read_queue(0 , deltv - n * TIME_CONST); /*space*/
598 add_read_queue(1, n * TIME_CONST); /*pulse*/
604 if (status & UTSR0_TFS)
605 printk(KERN_ERR "transmit fifo not full, shouldn't happen\n");
607 /* We must clear certain bits. */
608 status &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
612 unsigned long deltintrtv;
616 while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) {
617 switch (iir&UART_IIR_ID) { /* FIXME toto treba preriedit */
619 (void) inb(io + UART_MSR);
622 (void) inb(io + UART_LSR);
626 if (lsr & UART_LSR_THRE) /* FIFO is empty */
627 outb(data, io + UART_TX)
631 /* avoid interference with timer */
632 spin_lock_irqsave(&timer_lock, flags);
634 del_timer(&timerlist);
635 data = inb(io + UART_RX);
636 do_gettimeofday(&curr_tv);
637 deltv = delta(&last_tv, &curr_tv);
638 deltintrtv = delta(&last_intr_tv, &curr_tv);
639 dprintk("t %lu, d %d\n", deltintrtv, (int)data);
641 * if nothing came in last X cycles,
644 if (deltintrtv > TIME_CONST * threshold) {
647 /* simulate signal change */
648 add_read_queue(last_value,
655 last_intr_tv.tv_usec;
660 if (data ^ last_value) {
662 * deltintrtv > 2*TIME_CONST, remember?
663 * the other case is timeout
665 add_read_queue(last_value,
669 if (last_tv.tv_usec >= TIME_CONST) {
670 last_tv.tv_usec -= TIME_CONST;
673 last_tv.tv_usec += 1000000 -
677 last_intr_tv = curr_tv;
680 * start timer for end of
683 timerlist.expires = jiffies +
685 add_timer(&timerlist);
688 lsr = inb(io + UART_LSR);
689 } while (lsr & UART_LSR_DR); /* data ready */
690 spin_unlock_irqrestore(&timer_lock, flags);
697 return IRQ_RETVAL(IRQ_HANDLED);
700 #ifdef LIRC_ON_SA1100
701 static void send_pulse(unsigned long length)
703 unsigned long k, delay;
709 * this won't give us the carrier frequency we really want
710 * due to integer arithmetic, but we can accept this inaccuracy
713 for (k = flag = 0; k < length; k += delay, flag = !flag) {
726 static void send_space(unsigned long length)
734 static void send_space(unsigned long len)
739 static void send_pulse(unsigned long len)
741 long bytes_out = len / TIME_CONST;
746 while (bytes_out--) {
747 outb(PULSE, io + UART_TX);
748 /* FIXME treba seriozne cakanie z char/serial.c */
749 while (!(inb(io + UART_LSR) & UART_LSR_THRE))
755 #ifdef CONFIG_SA1100_COLLIE
756 static int sa1100_irda_set_power_collie(int state)
761 * 1 - short range, lowest power
762 * 2 - medium range, medium power
763 * 3 - maximum range, high power
765 ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
766 TC35143_IODIR_OUTPUT);
767 ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_LOW);
771 ucb1200_set_io_direction(TC35143_GPIO_IR_ON,
772 TC35143_IODIR_OUTPUT);
773 ucb1200_set_io(TC35143_GPIO_IR_ON, TC35143_IODAT_HIGH);
779 static int init_hardware(void)
783 spin_lock_irqsave(&hardware_lock, flags);
785 #ifdef LIRC_ON_SA1100
786 #ifdef CONFIG_SA1100_BITSY
787 if (machine_is_bitsy()) {
788 printk(KERN_INFO "Power on IR module\n");
789 set_bitsy_egpio(EGPIO_BITSY_IR_ON);
792 #ifdef CONFIG_SA1100_COLLIE
793 sa1100_irda_set_power_collie(3); /* power on */
795 sr.hscr0 = Ser2HSCR0;
797 sr.utcr0 = Ser2UTCR0;
798 sr.utcr1 = Ser2UTCR1;
799 sr.utcr2 = Ser2UTCR2;
800 sr.utcr3 = Ser2UTCR3;
801 sr.utcr4 = Ser2UTCR4;
804 sr.utsr0 = Ser2UTSR0;
805 sr.utsr1 = Ser2UTSR1;
811 /* set output to 0 */
814 /* Enable HP-SIR modulation, and ensure that the port is disabled. */
816 Ser2HSCR0 = sr.hscr0 & (~HSCR0_HSSP);
818 /* clear status register to prevent unwanted interrupts */
819 Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
822 Ser2UTCR0 = UTCR0_1StpBit|UTCR0_7BitData;
826 /* use HPSIR, 1.6 usec pulses */
827 Ser2UTCR4 = UTCR4_HPSIR|UTCR4_Z1_6us;
829 /* enable receiver, receive fifo interrupt */
830 Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
832 /* clear status register to prevent unwanted interrupts */
833 Ser2UTSR0 &= (UTSR0_RID | UTSR0_RBB | UTSR0_REB);
835 #elif defined(LIRC_SIR_TEKRAM)
843 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
845 /* First of all, disable all interrupts */
846 soutp(UART_IER, sinp(UART_IER) &
847 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
850 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
852 /* Set divisor to 12 => 9600 Baud */
857 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
860 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
861 safe_udelay(50*1000);
863 /* -DTR low -> reset PIC */
864 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
867 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
871 /* -RTS low -> send control byte */
872 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
874 soutp(UART_TX, TEKRAM_115200|TEKRAM_PW);
876 /* one byte takes ~1042 usec to transmit at 9600,8N1 */
879 /* back to normal operation */
880 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
885 /* read previous control byte */
886 printk(KERN_INFO LIRC_DRIVER_NAME
887 ": 0x%02x\n", sinp(UART_RX));
890 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
892 /* Set divisor to 1 => 115200 Baud */
896 /* Set DLAB 0, 8 Bit */
897 soutp(UART_LCR, UART_LCR_WLEN8);
898 /* enable interrupts */
899 soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
901 outb(0, io + UART_MCR);
902 outb(0, io + UART_IER);
904 /* set DLAB, speed = 115200 */
905 outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR);
906 outb(1, io + UART_DLL); outb(0, io + UART_DLM);
907 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */
908 outb(UART_LCR_WLEN7, io + UART_LCR);
910 outb(UART_FCR_ENABLE_FIFO, io + UART_FCR);
912 /* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */
913 outb(UART_IER_RDI, io + UART_IER);
915 outb(UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2, io + UART_MCR);
916 #ifdef LIRC_SIR_ACTISYS_ACT200L
918 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
922 spin_unlock_irqrestore(&hardware_lock, flags);
926 static void drop_hardware(void)
930 spin_lock_irqsave(&hardware_lock, flags);
932 #ifdef LIRC_ON_SA1100
935 Ser2UTCR0 = sr.utcr0;
936 Ser2UTCR1 = sr.utcr1;
937 Ser2UTCR2 = sr.utcr2;
938 Ser2UTCR4 = sr.utcr4;
939 Ser2UTCR3 = sr.utcr3;
941 Ser2HSCR0 = sr.hscr0;
942 #ifdef CONFIG_SA1100_BITSY
943 if (machine_is_bitsy())
944 clr_bitsy_egpio(EGPIO_BITSY_IR_ON);
946 #ifdef CONFIG_SA1100_COLLIE
947 sa1100_irda_set_power_collie(0); /* power off */
950 /* turn off interrupts */
951 outb(0, io + UART_IER);
953 spin_unlock_irqrestore(&hardware_lock, flags);
956 /* SECTION: Initialisation */
958 static int init_port(void)
962 /* get I/O port access and IRQ line */
963 #ifndef LIRC_ON_SA1100
964 if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
965 printk(KERN_ERR LIRC_DRIVER_NAME
966 ": i/o port 0x%.4x already in use.\n", io);
970 retval = request_irq(irq, sir_interrupt, 0,
971 LIRC_DRIVER_NAME, NULL);
973 # ifndef LIRC_ON_SA1100
974 release_region(io, 8);
976 printk(KERN_ERR LIRC_DRIVER_NAME
977 ": IRQ %d already in use.\n",
981 #ifndef LIRC_ON_SA1100
982 printk(KERN_INFO LIRC_DRIVER_NAME
983 ": I/O port 0x%.4x, IRQ %d.\n",
987 init_timer(&timerlist);
988 timerlist.function = sir_timeout;
989 timerlist.data = 0xabadcafe;
994 static void drop_port(void)
997 del_timer_sync(&timerlist);
998 #ifndef LIRC_ON_SA1100
999 release_region(io, 8);
1003 #ifdef LIRC_SIR_ACTISYS_ACT200L
1004 /* Crystal/Cirrus CS8130 IR transceiver, used in Actisys Act200L dongle */
1005 /* some code borrowed from Linux IRDA driver */
1007 /* Register 0: Control register #1 */
1008 #define ACT200L_REG0 0x00
1009 #define ACT200L_TXEN 0x01 /* Enable transmitter */
1010 #define ACT200L_RXEN 0x02 /* Enable receiver */
1011 #define ACT200L_ECHO 0x08 /* Echo control chars */
1013 /* Register 1: Control register #2 */
1014 #define ACT200L_REG1 0x10
1015 #define ACT200L_LODB 0x01 /* Load new baud rate count value */
1016 #define ACT200L_WIDE 0x04 /* Expand the maximum allowable pulse */
1018 /* Register 3: Transmit mode register #2 */
1019 #define ACT200L_REG3 0x30
1020 #define ACT200L_B0 0x01 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
1021 #define ACT200L_B1 0x02 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P) */
1022 #define ACT200L_CHSY 0x04 /* StartBit Synced 0=bittime, 1=startbit */
1024 /* Register 4: Output Power register */
1025 #define ACT200L_REG4 0x40
1026 #define ACT200L_OP0 0x01 /* Enable LED1C output */
1027 #define ACT200L_OP1 0x02 /* Enable LED2C output */
1028 #define ACT200L_BLKR 0x04
1030 /* Register 5: Receive Mode register */
1031 #define ACT200L_REG5 0x50
1032 #define ACT200L_RWIDL 0x01 /* fixed 1.6us pulse mode */
1033 /*.. other various IRDA bit modes, and TV remote modes..*/
1035 /* Register 6: Receive Sensitivity register #1 */
1036 #define ACT200L_REG6 0x60
1037 #define ACT200L_RS0 0x01 /* receive threshold bit 0 */
1038 #define ACT200L_RS1 0x02 /* receive threshold bit 1 */
1040 /* Register 7: Receive Sensitivity register #2 */
1041 #define ACT200L_REG7 0x70
1042 #define ACT200L_ENPOS 0x04 /* Ignore the falling edge */
1044 /* Register 8,9: Baud Rate Divider register #1,#2 */
1045 #define ACT200L_REG8 0x80
1046 #define ACT200L_REG9 0x90
1048 #define ACT200L_2400 0x5f
1049 #define ACT200L_9600 0x17
1050 #define ACT200L_19200 0x0b
1051 #define ACT200L_38400 0x05
1052 #define ACT200L_57600 0x03
1053 #define ACT200L_115200 0x01
1055 /* Register 13: Control register #3 */
1056 #define ACT200L_REG13 0xd0
1057 #define ACT200L_SHDW 0x01 /* Enable access to shadow registers */
1059 /* Register 15: Status register */
1060 #define ACT200L_REG15 0xf0
1062 /* Register 21: Control register #4 */
1063 #define ACT200L_REG21 0x50
1064 #define ACT200L_EXCK 0x02 /* Disable clock output driver */
1065 #define ACT200L_OSCL 0x04 /* oscillator in low power, medium accuracy mode */
1067 static void init_act200(void)
1072 ACT200L_REG13 | ACT200L_SHDW,
1073 ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL,
1075 ACT200L_REG7 | ACT200L_ENPOS,
1076 ACT200L_REG6 | ACT200L_RS0 | ACT200L_RS1,
1077 ACT200L_REG5 | ACT200L_RWIDL,
1078 ACT200L_REG4 | ACT200L_OP0 | ACT200L_OP1 | ACT200L_BLKR,
1079 ACT200L_REG3 | ACT200L_B0,
1080 ACT200L_REG0 | ACT200L_TXEN | ACT200L_RXEN,
1081 ACT200L_REG8 | (ACT200L_115200 & 0x0f),
1082 ACT200L_REG9 | ((ACT200L_115200 >> 4) & 0x0f),
1083 ACT200L_REG1 | ACT200L_LODB | ACT200L_WIDE
1087 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
1089 /* Set divisor to 12 => 9600 Baud */
1091 soutp(UART_DLL, 12);
1094 soutp(UART_LCR, UART_LCR_WLEN8);
1095 /* Set divisor to 12 => 9600 Baud */
1098 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1099 for (i = 0; i < 50; i++)
1102 /* Reset the dongle : set RTS low for 25 ms */
1103 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
1104 for (i = 0; i < 25; i++)
1107 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1110 /* Clear DTR and set RTS to enter command mode */
1111 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
1114 /* send out the control register settings for 115K 7N1 SIR operation */
1115 for (i = 0; i < sizeof(control); i++) {
1116 soutp(UART_TX, control[i]);
1117 /* one byte takes ~1042 usec to transmit at 9600,8N1 */
1121 /* back to normal operation */
1122 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1126 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
1129 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
1131 /* Set divisor to 1 => 115200 Baud */
1136 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1138 /* Set DLAB 0, 7 Bit */
1139 soutp(UART_LCR, UART_LCR_WLEN7);
1141 /* enable interrupts */
1142 soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
1146 #ifdef LIRC_SIR_ACTISYS_ACT220L
1148 * Derived from linux IrDA driver (net/irda/actisys.c)
1149 * Drop me a mail for any kind of comment: maxx@spaceboyz.net
1152 void init_act220(void)
1157 soutp(UART_LCR, UART_LCR_DLAB|UART_LCR_WLEN7);
1161 soutp(UART_DLL, 12);
1164 soutp(UART_LCR, UART_LCR_WLEN7);
1166 /* reset the dongle, set DTR low for 10us */
1167 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
1170 /* back to normal (still 9600) */
1171 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2);
1174 * send RTS pulses until we reach 115200
1175 * i hope this is really the same for act220l/act220l+
1177 for (i = 0; i < 3; i++) {
1179 /* set RTS low for 10 us */
1180 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
1182 /* set RTS high for 10 us */
1183 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
1186 /* back to normal operation */
1187 udelay(1500); /* better safe than sorry ;) */
1190 soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
1192 /* Set divisor to 1 => 115200 Baud */
1196 /* Set DLAB 0, 7 Bit */
1197 /* The dongle doesn't seem to have any problems with operation at 7N1 */
1198 soutp(UART_LCR, UART_LCR_WLEN7);
1200 /* enable interrupts */
1201 soutp(UART_IER, UART_IER_RDI);
1205 static int init_lirc_sir(void)
1209 init_waitqueue_head(&lirc_read_queue);
1210 retval = init_port();
1214 printk(KERN_INFO LIRC_DRIVER_NAME
1220 static int __init lirc_sir_init(void)
1224 retval = init_chrdev();
1227 retval = init_lirc_sir();
1235 static void __exit lirc_sir_exit(void)
1240 printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n");
1243 module_init(lirc_sir_init);
1244 module_exit(lirc_sir_exit);
1246 #ifdef LIRC_SIR_TEKRAM
1247 MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210");
1248 MODULE_AUTHOR("Christoph Bartelmus");
1249 #elif defined(LIRC_ON_SA1100)
1250 MODULE_DESCRIPTION("LIRC driver for StrongARM SA1100 embedded microprocessor");
1251 MODULE_AUTHOR("Christoph Bartelmus");
1252 #elif defined(LIRC_SIR_ACTISYS_ACT200L)
1253 MODULE_DESCRIPTION("LIRC driver for Actisys Act200L");
1254 MODULE_AUTHOR("Karl Bongers");
1255 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
1256 MODULE_DESCRIPTION("LIRC driver for Actisys Act220L(+)");
1257 MODULE_AUTHOR("Jan Roemisch");
1259 MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports");
1260 MODULE_AUTHOR("Milan Pikula");
1262 MODULE_LICENSE("GPL");
1264 #ifdef LIRC_ON_SA1100
1265 module_param(irq, int, S_IRUGO);
1266 MODULE_PARM_DESC(irq, "Interrupt (16)");
1268 module_param(io, int, S_IRUGO);
1269 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1271 module_param(irq, int, S_IRUGO);
1272 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1274 module_param(threshold, int, S_IRUGO);
1275 MODULE_PARM_DESC(threshold, "space detection threshold (3)");
1278 module_param(debug, bool, S_IRUGO | S_IWUSR);
1279 MODULE_PARM_DESC(debug, "Enable debugging messages");