2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __M53EVK_CONFIG_H__
9 #define __M53EVK_CONFIG_H__
11 #define CONFIG_SYS_GENERIC_BOARD
12 #define CONFIG_MXC_GPIO
14 #include <asm/arch/imx-regs.h>
16 #define CONFIG_DISPLAY_CPUINFO
17 #define CONFIG_BOARD_EARLY_INIT_F
18 #define CONFIG_REVISION_TAG
19 #define CONFIG_SYS_NO_FLASH
23 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
28 #include <config_cmd_default.h>
29 #define CONFIG_DISPLAY_BOARDINFO
30 #define CONFIG_DOS_PARTITION
31 #define CONFIG_FAT_WRITE
33 #define CONFIG_CMD_ASKENV
34 #define CONFIG_CMD_BMP
35 #define CONFIG_CMD_DATE
36 #define CONFIG_CMD_DHCP
37 #define CONFIG_CMD_EXT4
38 #define CONFIG_CMD_EXT4_WRITE
39 #define CONFIG_CMD_FAT
40 #define CONFIG_CMD_FS_GENERIC
41 #define CONFIG_CMD_GREPENV
42 #define CONFIG_CMD_I2C
43 #define CONFIG_CMD_MII
44 #define CONFIG_CMD_MMC
45 #define CONFIG_CMD_NAND
46 #define CONFIG_CMD_NET
47 #define CONFIG_CMD_PING
48 #define CONFIG_CMD_SATA
49 #define CONFIG_CMD_USB
54 * Memory configurations
56 #define CONFIG_NR_DRAM_BANKS 2
57 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
58 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
59 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
60 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
61 #define PHYS_SDRAM_SIZE (gd->ram_size)
62 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
63 #define CONFIG_SYS_MEMTEST_START 0x70000000
64 #define CONFIG_SYS_MEMTEST_END 0x8ff00000
66 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
67 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
68 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
70 #define CONFIG_SYS_INIT_SP_OFFSET \
71 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
72 #define CONFIG_SYS_INIT_SP_ADDR \
73 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
75 #define CONFIG_SYS_TEXT_BASE 0x71000000
78 * U-Boot general configurations
80 #define CONFIG_SYS_LONGHELP
81 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
82 #define CONFIG_SYS_PBSIZE \
83 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
84 /* Print buffer size */
85 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
86 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
87 /* Boot argument buffer size */
88 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
89 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
90 #define CONFIG_CMDLINE_EDITING /* Command history etc */
91 #define CONFIG_SYS_HUSH_PARSER
96 #define CONFIG_MXC_UART
97 #define CONFIG_MXC_UART_BASE UART2_BASE
98 #define CONFIG_CONS_INDEX 1
99 #define CONFIG_BAUDRATE 115200
104 #ifdef CONFIG_CMD_MMC
106 #define CONFIG_GENERIC_MMC
107 #define CONFIG_FSL_ESDHC
108 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
109 #define CONFIG_SYS_FSL_ESDHC_NUM 1
115 #define CONFIG_ENV_SIZE (16 * 1024)
116 #ifdef CONFIG_CMD_NAND
117 #define CONFIG_SYS_MAX_NAND_DEVICE 1
118 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
119 #define CONFIG_NAND_MXC
120 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
121 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
122 #define CONFIG_SYS_NAND_LARGEPAGE
123 #define CONFIG_MXC_NAND_HWECC
124 #define CONFIG_SYS_NAND_USE_FLASH_BBT
126 /* Environment is in NAND */
127 #define CONFIG_ENV_IS_IN_NAND
128 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
129 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
130 #define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SECT_SIZE)
131 #define CONFIG_ENV_OFFSET (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
132 #define CONFIG_ENV_OFFSET_REDUND \
133 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
135 #define CONFIG_CMD_UBI
136 #define CONFIG_CMD_UBIFS
137 #define CONFIG_CMD_MTDPARTS
138 #define CONFIG_RBTREE
140 #define CONFIG_MTD_DEVICE
141 #define CONFIG_MTD_PARTITIONS
142 #define MTDIDS_DEFAULT "nand0=mxc_nand"
143 #define MTDPARTS_DEFAULT \
144 "mtdparts=mxc_nand:" \
152 #define CONFIG_ENV_IS_NOWHERE
156 * Ethernet on SOC (FEC)
158 #ifdef CONFIG_CMD_NET
159 #define CONFIG_FEC_MXC
160 #define IMX_FEC_BASE FEC_BASE_ADDR
161 #define CONFIG_FEC_MXC_PHYADDR 0x0
163 #define CONFIG_DISCOVER_PHY
164 #define CONFIG_FEC_XCV_TYPE RMII
165 #define CONFIG_PHYLIB
166 #define CONFIG_PHY_MICREL
167 #define CONFIG_ETHPRIME "FEC0"
173 #ifdef CONFIG_CMD_I2C
174 #define CONFIG_SYS_I2C
175 #define CONFIG_SYS_I2C_MXC
176 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
177 #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
183 #ifdef CONFIG_CMD_DATE
184 #define CONFIG_RTC_M41T62
185 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
186 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
192 #ifdef CONFIG_CMD_USB
193 #define CONFIG_USB_EHCI
194 #define CONFIG_USB_EHCI_MX5
195 #define CONFIG_USB_STORAGE
196 #define CONFIG_USB_HOST_ETHER
197 #define CONFIG_USB_ETHER_ASIX
198 #define CONFIG_USB_ETHER_MCS7830
199 #define CONFIG_USB_ETHER_SMSC95XX
200 #define CONFIG_MXC_USB_PORT 1
201 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
202 #define CONFIG_MXC_USB_FLAGS 0
208 #ifdef CONFIG_CMD_SATA
209 #define CONFIG_DWC_AHSATA
210 #define CONFIG_SYS_SATA_MAX_DEVICE 1
211 #define CONFIG_DWC_AHSATA_PORT_ID 0
212 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
214 #define CONFIG_LIBATA
221 #define CONFIG_VIDEO_IPUV3
222 #define CONFIG_CFB_CONSOLE
223 #define CONFIG_VGA_AS_SINGLE_DEVICE
224 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
225 #define CONFIG_VIDEO_BMP_RLE8
226 #define CONFIG_VIDEO_BMP_GZIP
227 #define CONFIG_SPLASH_SCREEN
228 #define CONFIG_SPLASHIMAGE_GUARD
229 #define CONFIG_SPLASH_SCREEN_ALIGN
230 #define CONFIG_BMP_16BPP
231 #define CONFIG_VIDEO_LOGO
232 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
233 #define CONFIG_IPUV3_CLK 200000000
239 #define CONFIG_CMDLINE_TAG
240 #define CONFIG_INITRD_TAG
241 #define CONFIG_REVISION_TAG
242 #define CONFIG_SETUP_MEMORY_TAGS
243 #define CONFIG_BOOTDELAY 3
244 #define CONFIG_BOOTFILE "fitImage"
245 #define CONFIG_BOOTARGS "console=ttymxc1,115200"
246 #define CONFIG_LOADADDR 0x70800000
247 #define CONFIG_BOOTCOMMAND "run mmc_mmc"
248 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
249 #define CONFIG_OF_LIBFDT
254 #define CONFIG_SPL_FRAMEWORK
255 #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
256 #define CONFIG_SPL_BOARD_INIT
257 #define CONFIG_SPL_TEXT_BASE 0x70008000
258 #define CONFIG_SPL_PAD_TO 0x8000
259 #define CONFIG_SPL_STACK 0x70004000
260 #define CONFIG_SPL_GPIO_SUPPORT
261 #define CONFIG_SPL_LIBCOMMON_SUPPORT
262 #define CONFIG_SPL_LIBGENERIC_SUPPORT
263 #define CONFIG_SPL_NAND_SUPPORT
264 #define CONFIG_SPL_SERIAL_SUPPORT
266 #define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
267 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
268 #define CONFIG_SYS_NAND_OOBSIZE 64
269 #define CONFIG_SYS_NAND_PAGE_COUNT 64
270 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
271 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
276 #define CONFIG_PREBOOT "run try_bootscript"
277 #define CONFIG_HOSTNAME m53evk
279 #define CONFIG_EXTRA_ENV_SETTINGS \
280 "consdev=ttymxc1\0" \
281 "baudrate=115200\0" \
282 "bootscript=boot.scr\0" \
283 "bootdev=/dev/mmcblk0p1\0" \
284 "rootdev=/dev/mmcblk0p2\0" \
286 "rootpath=/opt/eldk-5.5/armv7a-hf/rootfs-qte-sdk\0" \
287 "kernel_addr_r=0x72000000\0" \
289 "setenv bootargs ${bootargs} " \
290 "console=${consdev},${baudrate}\0" \
292 "setenv bootargs ${bootargs} " \
293 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
294 "${netmask}:${hostname}:${netdev}:off\0" \
296 "setenv bootargs ${bootargs} ${miscargs}\0" \
298 "if test \"x${mtdparts}\" == \"x\" ; then " \
299 "mtdparts default ; " \
302 "run adddfltmtd ; " \
303 "setenv bootargs ${bootargs} ${mtdparts}\0" \
304 "addargs=run addcons addmtd addmisc\0" \
307 "load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
309 "ubi part UBI ; ubifsmount ubi0:rootfs ; " \
310 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
312 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
313 "miscargs=nohlt panic=1\0" \
314 "mmcargs=setenv bootargs root=${rootdev} rw rootwait\0" \
316 "setenv bootargs ubi.mtd=5 " \
317 "root=ubi0:rootfs rootfstype=ubifs\0" \
319 "setenv bootargs root=/dev/nfs rw " \
320 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
322 "run mmcload mmcargs addargs ; " \
323 "bootm ${kernel_addr_r}\0" \
325 "run mmcload ubiargs addargs ; " \
326 "bootm ${kernel_addr_r}\0" \
328 "run mmcload nfsargs addip addargs ; " \
329 "bootm ${kernel_addr_r}\0" \
331 "run ubiload mmcargs addargs ; " \
332 "bootm ${kernel_addr_r}\0" \
334 "run ubiload ubiargs addargs ; " \
335 "bootm ${kernel_addr_r}\0" \
337 "run ubiload nfsargs addip addargs ; " \
338 "bootm ${kernel_addr_r}\0" \
340 "run netload mmcargs addargs ; " \
341 "bootm ${kernel_addr_r}\0" \
343 "run netload ubiargs addargs ; " \
344 "bootm ${kernel_addr_r}\0" \
346 "run netload nfsargs addip addargs ; " \
347 "bootm ${kernel_addr_r}\0" \
350 "if test -e mmc 0:1 ${bootscript} ; then " \
351 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
353 "echo Running bootscript... ; " \
354 "source ${kernel_addr_r} ; " \
358 #endif /* __M53EVK_CONFIG_H__ */