#include <common.h>
#include <malloc.h>
#include <net.h>
+#include <netdev.h>
#include <asm/io.h>
#include <pci.h>
-#if defined(CONFIG_CMD_NET) \
- && defined(CONFIG_NET_MULTI) && defined(CONFIG_NATSEMI)
-
/* defines */
#define EEPROM_SIZE 0xb /*12 16-bit chunks, or 24 bytes*/
static void natsemi_init_rxd(struct eth_device *dev);
static void natsemi_set_rx_mode(struct eth_device *dev);
static void natsemi_check_duplex(struct eth_device *dev);
-static int natsemi_send(struct eth_device *dev, volatile void *packet,
- int length);
+static int natsemi_send(struct eth_device *dev, void *packet, int length);
static int natsemi_poll(struct eth_device *dev);
static void natsemi_disable(struct eth_device *dev);
* ready to send and receive packets.
*
* Side effects:
- * leaves the natsemi initialized, and ready to recieve packets.
+ * leaves the natsemi initialized, and ready to receive packets.
*
* Returns: struct eth_device *: pointer to NIC data structure
*/
}
dev = (struct eth_device *) malloc(sizeof *dev);
+ if (!dev) {
+ printf("natsemi: Can not allocate memory\n");
+ break;
+ }
+ memset(dev, 0, sizeof(*dev));
sprintf(dev->name, "dp83815#%d", card_number);
dev->iobase = bus_to_phys(iobase);
The EEPROM code is for common 93c06/46 EEPROMs w/ 6bit addresses. */
/* Delay between EEPROM clock transitions.
- No extra delay is needed with 33Mhz PCI, but future 66Mhz
+ No extra delay is needed with 33MHz PCI, but future 66MHz
access may need a delay. */
#define eeprom_delay(ee_addr) INL(dev, ee_addr)
* Description: transmits a packet and waits for completion or timeout.
*
* Returns: void. */
-static int
-natsemi_send(struct eth_device *dev, volatile void *packet, int length)
+static int natsemi_send(struct eth_device *dev, void *packet, int length)
{
u32 i, status = 0;
u32 tx_status = 0;
- vu_long *res = (vu_long *)&tx_status;
+ u32 *tx_ptr = &tx_status;
+ vu_long *res = (vu_long *)tx_ptr;
/* Stop the transmitter */
OUTL(dev, TxOff, ChipCmd);
/* Restore PME enable bit */
OUTL(dev, SavedClkRun, ClkRun);
}
-
-#endif