X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=board%2Fesd%2Fpmc405%2Fpmc405.c;h=975b6d6d949fd3cc47bf23e91e2ced544f9cb75e;hb=2fb2604d5c20beb061b0a94282b7f6eb14d00cb8;hp=7499671aaf5d031c81994df148aa40a9a94a7dc8;hpb=7a635e004ec12bd2a0bae9f90fbb5769b524a42e;p=karo-tx-uboot.git

diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c
index 7499671aaf..975b6d6d94 100644
--- a/board/esd/pmc405/pmc405.c
+++ b/board/esd/pmc405/pmc405.c
@@ -72,23 +72,23 @@ int board_early_init_f (void)
 	 * Setup GPIO pins
 	 */
 
-	mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_FPGA_INIT | \
-					CFG_FPGA_DONE | \
-					CFG_XEREADY | \
-					CFG_NONMONARCH | \
-					CFG_REV1_2) << 5));
+	mtdcr(cntrl0, mfdcr(cntrl0) | ((CONFIG_SYS_FPGA_INIT | \
+					CONFIG_SYS_FPGA_DONE | \
+					CONFIG_SYS_XEREADY | \
+					CONFIG_SYS_NONMONARCH | \
+					CONFIG_SYS_REV1_2) << 5));
 
-	if (!(in32(GPIO0_IR) & CFG_REV1_2)) {
+	if (!(in32(GPIO0_IR) & CONFIG_SYS_REV1_2)) {
 		/* rev 1.2 boards */
-		mtdcr(cntrl0, mfdcr(cntrl0) | ((CFG_INTA_FAKE | \
-						CFG_SELF_RST) << 5));
+		mtdcr(cntrl0, mfdcr(cntrl0) | ((CONFIG_SYS_INTA_FAKE | \
+						CONFIG_SYS_SELF_RST) << 5));
 	}
 
 	out32(GPIO0_OR, 0);
-	out32(GPIO0_TCR, CFG_FPGA_PRG | CFG_FPGA_CLK | CFG_FPGA_DATA | CFG_XEREADY); /* setup for output */
+	out32(GPIO0_TCR, CONFIG_SYS_FPGA_PRG | CONFIG_SYS_FPGA_CLK | CONFIG_SYS_FPGA_DATA | CONFIG_SYS_XEREADY); /* setup for output */
 
 	/* - check if rev1_2 is low, then:
-	 * - set/reset CFG_INTA_FAKE/CFG_SELF_RST in TCR to assert INTA# or SELFRST#
+	 * - set/reset CONFIG_SYS_INTA_FAKE/CONFIG_SYS_SELF_RST in TCR to assert INTA# or SELFRST#
 	 */
 
 	return 0;
@@ -104,7 +104,7 @@ int misc_init_r (void)
 	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
 	gd->bd->bi_flashoffset = 0;
 
-	out32(GPIO0_OR, in32(GPIO0_OR) | CFG_XEREADY); /* deassert EREADY# */
+	out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_XEREADY); /* deassert EREADY# */
 	return (0);
 }
 
@@ -112,13 +112,13 @@ ushort pmc405_pci_subsys_deviceid(void)
 {
 	ulong val;
 	val = in32(GPIO0_IR);
-	if (!(val & CFG_REV1_2)) { /* low=rev1.2 */
-		if (val & CFG_NONMONARCH) { /* monarch# signal */
-			return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH;
+	if (!(val & CONFIG_SYS_REV1_2)) { /* low=rev1.2 */
+		if (val & CONFIG_SYS_NONMONARCH) { /* monarch# signal */
+			return CONFIG_SYS_PCI_SUBSYS_DEVICEID_NONMONARCH;
 		}
-		return CFG_PCI_SUBSYS_DEVICEID_MONARCH;
+		return CONFIG_SYS_PCI_SUBSYS_DEVICEID_MONARCH;
 	}
-	return CFG_PCI_SUBSYS_DEVICEID_NONMONARCH;
+	return CONFIG_SYS_PCI_SUBSYS_DEVICEID_NONMONARCH;
 }
 
 /*
@@ -140,9 +140,9 @@ int checkboard (void)
 	}
 
 	val = in32(GPIO0_IR);
-	if (!(val & CFG_REV1_2)) { /* low=rev1.2 */
+	if (!(val & CONFIG_SYS_REV1_2)) { /* low=rev1.2 */
 		puts(" rev1.2 (");
-		if (val & CFG_NONMONARCH) { /* monarch# signal */
+		if (val & CONFIG_SYS_NONMONARCH) { /* monarch# signal */
 			puts("non-");
 		}
 		puts("monarch)");
@@ -155,24 +155,6 @@ int checkboard (void)
 	return 0;
 }
 
-/* ------------------------------------------------------------------------- */
-
-long int initdram (int board_type)
-{
-	unsigned long val;
-
-	mtdcr(memcfga, mem_mb0cf);
-	val = mfdcr(memcfgd);
-
-#if 0
-	printf("\nmb0cf=%x\n", val); /* test-only */
-	printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
-	return (4*1024*1024 << ((val & 0x000e0000) >> 17));
-}
-
-
 /* ------------------------------------------------------------------------- */
 void reset_phy(void)
 {
@@ -221,6 +203,6 @@ int do_cantest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 }
 U_BOOT_CMD(
 	cantest,	3,	1,	do_cantest,
-	"cantest - Test CAN controller",
+	"Test CAN controller",
 	NULL
 	);