X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=drivers%2Fqe%2Fqe.h;h=c82ac7b0710eaac96497d3539e2d5dbf525c6bf8;hb=8b485ba12b0defa0c4ed3559789250238f8331a8;hp=741ed7fa4a3261702f42f1e378ab3bb0c866741a;hpb=ed2cf548cac80cd3cf8154dcfe7b2685bef45938;p=karo-tx-uboot.git

diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h
index 741ed7fa4a..c82ac7b071 100644
--- a/drivers/qe/qe.h
+++ b/drivers/qe/qe.h
@@ -1,23 +1,10 @@
 /*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
  *
  * Dave Liu <daveliu@freescale.com>
  * based on source code of Shlomi Gridish
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __QE_H__
@@ -25,7 +12,6 @@
 
 #include "common.h"
 
-#define QE_NUM_OF_SNUM	28
 #define QE_NUM_OF_BRGS	16
 #define UCC_MAX_NUM	8
 
@@ -40,17 +26,22 @@ typedef enum qe_snum_state {
 } qe_snum_state_e;
 
 typedef struct qe_snum {
-	u8		num;   /* snum  */
+	u8		num;   /* snum	*/
 	qe_snum_state_e	state; /* state */
 } qe_snum_t;
 
 /* QE RISC allocation
 */
-typedef enum qe_risc_allocation {
-	QE_RISC_ALLOCATION_RISC1		= 1,  /* RISC 1 */
-	QE_RISC_ALLOCATION_RISC2		= 2,  /* RISC 2 */
-	QE_RISC_ALLOCATION_RISC1_AND_RISC2	= 3   /* RISC 1 or RISC 2 */
-} qe_risc_allocation_e;
+#define	QE_RISC_ALLOCATION_RISC1	0x1  /* RISC 1 */
+#define	QE_RISC_ALLOCATION_RISC2	0x2  /* RISC 2 */
+#define	QE_RISC_ALLOCATION_RISC3	0x4  /* RISC 3 */
+#define	QE_RISC_ALLOCATION_RISC4	0x8  /* RISC 4 */
+#define	QE_RISC_ALLOCATION_RISC1_AND_RISC2 	(QE_RISC_ALLOCATION_RISC1 | \
+						 QE_RISC_ALLOCATION_RISC2)
+#define	QE_RISC_ALLOCATION_FOUR_RISCS	(QE_RISC_ALLOCATION_RISC1 | \
+					 QE_RISC_ALLOCATION_RISC2 | \
+					 QE_RISC_ALLOCATION_RISC3 | \
+					 QE_RISC_ALLOCATION_RISC4)
 
 /* QE CECR commands for UCC fast.
 */
@@ -154,30 +145,30 @@ typedef enum qe_clock {
 	QE_BRG14,    /* Baud Rate Generator 14 */
 	QE_BRG15,    /* Baud Rate Generator 15 */
 	QE_BRG16,    /* Baud Rate Generator 16 */
-	QE_CLK1,     /* Clock  1               */
-	QE_CLK2,     /* Clock  2               */
-	QE_CLK3,     /* Clock  3               */
-	QE_CLK4,     /* Clock  4               */
-	QE_CLK5,     /* Clock  5               */
-	QE_CLK6,     /* Clock  6               */
-	QE_CLK7,     /* Clock  7               */
-	QE_CLK8,     /* Clock  8               */
-	QE_CLK9,     /* Clock  9               */
-	QE_CLK10,    /* Clock 10               */
-	QE_CLK11,    /* Clock 11               */
-	QE_CLK12,    /* Clock 12               */
-	QE_CLK13,    /* Clock 13               */
-	QE_CLK14,    /* Clock 14               */
-	QE_CLK15,    /* Clock 15               */
-	QE_CLK16,    /* Clock 16               */
-	QE_CLK17,    /* Clock 17               */
-	QE_CLK18,    /* Clock 18               */
-	QE_CLK19,    /* Clock 19               */
-	QE_CLK20,    /* Clock 20               */
-	QE_CLK21,    /* Clock 21               */
-	QE_CLK22,    /* Clock 22               */
-	QE_CLK23,    /* Clock 23               */
-	QE_CLK24,    /* Clock 24               */
+	QE_CLK1,     /* Clock  1	       */
+	QE_CLK2,     /* Clock  2	       */
+	QE_CLK3,     /* Clock  3	       */
+	QE_CLK4,     /* Clock  4	       */
+	QE_CLK5,     /* Clock  5	       */
+	QE_CLK6,     /* Clock  6	       */
+	QE_CLK7,     /* Clock  7	       */
+	QE_CLK8,     /* Clock  8	       */
+	QE_CLK9,     /* Clock  9	       */
+	QE_CLK10,    /* Clock 10	       */
+	QE_CLK11,    /* Clock 11	       */
+	QE_CLK12,    /* Clock 12	       */
+	QE_CLK13,    /* Clock 13	       */
+	QE_CLK14,    /* Clock 14	       */
+	QE_CLK15,    /* Clock 15	       */
+	QE_CLK16,    /* Clock 16	       */
+	QE_CLK17,    /* Clock 17	       */
+	QE_CLK18,    /* Clock 18	       */
+	QE_CLK19,    /* Clock 19	       */
+	QE_CLK20,    /* Clock 20	       */
+	QE_CLK21,    /* Clock 21	       */
+	QE_CLK22,    /* Clock 22	       */
+	QE_CLK23,    /* Clock 23	       */
+	QE_CLK24,    /* Clock 24	       */
 	QE_CLK_DUMMY
 } qe_clock_e;
 
@@ -230,6 +221,7 @@ typedef enum qe_clock {
 /* I-RAM */
 #define QE_IRAM_IADD_AIE	0x80000000	/* Auto Increment Enable */
 #define QE_IRAM_IADD_BADDR	0x00080000	/* Base Address */
+#define QE_IRAM_READY		0x80000000
 
 /* Structure that defines QE firmware binary files.
  *
@@ -237,34 +229,34 @@ typedef enum qe_clock {
  */
 struct qe_firmware {
 	struct qe_header {
-		u32 length;  /* Length of the entire structure, in bytes */
-		u8 magic[3];    /* Set to { 'Q', 'E', 'F' } */
-		u8 version;     /* Version of this layout. First ver is '1' */
+		u32 length;	/* Length of the entire structure, in bytes */
+		u8 magic[3];	/* Set to { 'Q', 'E', 'F' } */
+		u8 version;	/* Version of this layout. First ver is '1' */
 	} header;
-	u8 id[62];      /* Null-terminated identifier string */
-	u8 split;	/* 0 = shared I-RAM, 1 = split I-RAM */
-	u8 count;       /* Number of microcode[] structures */
+	u8 id[62];		/* Null-terminated identifier string */
+	u8 split;		/* 0 = shared I-RAM, 1 = split I-RAM */
+	u8 count;		/* Number of microcode[] structures */
 	struct {
-		u16 model;   	/* The SOC model  */
-		u8 major;       	/* The SOC revision major */
-		u8 minor;       	/* The SOC revision minor */
+		u16 model;	/* The SOC model  */
+		u8 major;	/* The SOC revision major */
+		u8 minor;	/* The SOC revision minor */
 	} __attribute__ ((packed)) soc;
-	u8 padding[4];			/* Reserved, for alignment */
-	u64 extended_modes;		/* Extended modes */
+	u8 padding[4];		/* Reserved, for alignment */
+	u64 extended_modes;	/* Extended modes */
 	u32 vtraps[8];		/* Virtual trap addresses */
-	u8 reserved[4];			/* Reserved, for future expansion */
+	u8 reserved[4];		/* Reserved, for future expansion */
 	struct qe_microcode {
-		u8 id[32];      	/* Null-terminated identifier */
-		u32 traps[16];       /* Trap addresses, 0 == ignore */
-		u32 eccr;    	/* The value for the ECCR register */
-		u32 iram_offset;     /* Offset into I-RAM for the code */
-		u32 count;   	/* Number of 32-bit words of the code */
-		u32 code_offset;     /* Offset of the actual microcode */
-		u8 major;       	/* The microcode version major */
-		u8 minor;       	/* The microcode version minor */
-		u8 revision;		/* The microcode version revision */
-		u8 padding;		/* Reserved, for alignment */
-		u8 reserved[4];		/* Reserved, for future expansion */
+		u8 id[32];	/* Null-terminated identifier */
+		u32 traps[16];	/* Trap addresses, 0 == ignore */
+		u32 eccr;	/* The value for the ECCR register */
+		u32 iram_offset;/* Offset into I-RAM for the code */
+		u32 count;	/* Number of 32-bit words of the code */
+		u32 code_offset;/* Offset of the actual microcode */
+		u8 major;	/* The microcode version major */
+		u8 minor;	/* The microcode version minor */
+		u8 revision;	/* The microcode version revision */
+		u8 padding;	/* Reserved, for alignment */
+		u8 reserved[4];	/* Reserved, for future expansion */
 	} __attribute__ ((packed)) microcode[1];
 	/* All microcode binaries should be located here */
 	/* CRC32 should be located here, after the microcode binaries */