X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=include%2Fconfigs%2FMPC8536DS.h;h=131243826d85c49b98abea9d75a2834488022276;hb=c3143486acf427e559e5e272c8239327b8c7843f;hp=72f5fde16a7b7331338ce487916cd5caae07ce0c;hpb=c534d2fdcf7aa80230a0f1ed54d5e3164ba595eb;p=karo-tx-uboot.git diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 72f5fde16a..131243826d 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -19,18 +19,6 @@ #define CONFIG_PHYS_64BIT 1 #endif -#ifdef CONFIG_NAND -#define CONFIG_NAND_U_BOOT 1 -#define CONFIG_RAMBOOT_NAND 1 -#ifdef CONFIG_NAND_SPL -#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ -#else -#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds -#define CONFIG_SYS_TEXT_BASE 0xf8f82000 -#endif /* CONFIG_NAND_SPL */ -#endif - #ifdef CONFIG_SDCARD #define CONFIG_RAMBOOT_SDCARD 1 #define CONFIG_SYS_TEXT_BASE 0xf8f40000 @@ -62,7 +50,6 @@ #define CONFIG_MPC8536DS 1 #define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ -#define CONFIG_SPI_FLASH 1 /* Has SPI Flash */ #define CONFIG_PCI 1 /* Enable PCI/PCIE */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */ @@ -74,7 +61,6 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ -#define CONFIG_E1000 1 /* Defind e1000 pci Ethernet card*/ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -222,8 +208,7 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \ - defined(CONFIG_RAMBOOT_SPIFLASH) +#if defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_EXTRA_ENV_RELOC #else @@ -321,7 +306,6 @@ CONFIG_SYS_NAND_BASE + 0x80000, \ CONFIG_SYS_NAND_BASE + 0xC0000} #define CONFIG_SYS_MAX_NAND_DEVICE 4 -#define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_CMD_NAND 1 #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) @@ -352,17 +336,10 @@ | OR_FCM_TRLX \ | OR_FCM_EHTR) -#ifdef CONFIG_RAMBOOT_NAND -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#define CONFIG_SYS_BR2_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ -#define CONFIG_SYS_OR2_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ -#else #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ -#endif #define CONFIG_SYS_BR4_PRELIM \ (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS + 0x40000) \ @@ -625,12 +602,7 @@ */ #if defined(CONFIG_SYS_RAMBOOT) -#if defined(CONFIG_RAMBOOT_NAND) -#define CONFIG_ENV_IS_IN_NAND 1 -#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) -#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) -#elif defined(CONFIG_RAMBOOT_SPIFLASH) +#if defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 @@ -662,20 +634,16 @@ /* * Command line configuration. */ -#include - #define CONFIG_CMD_IRQ #define CONFIG_CMD_PING #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_ELF #define CONFIG_CMD_IRQ -#define CONFIG_CMD_SETEXPR #define CONFIG_CMD_REGINFO #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -#define CONFIG_CMD_NET #endif #undef CONFIG_WATCHDOG /* watchdog disabled */ @@ -746,13 +714,9 @@ /* The mac addresses for all ethernet interface */ #if defined(CONFIG_TSEC_ENET) #define CONFIG_HAS_ETH0 -#define CONFIG_ETHADDR 00:E0:0C:02:00:FD #define CONFIG_HAS_ETH1 -#define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD #define CONFIG_HAS_ETH2 -#define CONFIG_ETH2ADDR 00:E0:0C:02:02:FD #define CONFIG_HAS_ETH3 -#define CONFIG_ETH3ADDR 00:E0:0C:02:03:FD #endif #define CONFIG_IPADDR 192.168.1.254