X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=include%2Fconfigs%2FYukon8220.h;h=cbc1ed688a74a07fae91e16782be13069e831df6;hb=0e8d158664a913392cb01fb11a948d83f72e105e;hp=1b4195a08fd0e2bb90f5c13308c75973d84ab44f;hpb=1859e42fbf996e0e883cdb9829ef6d260bf4cdd6;p=karo-tx-uboot.git

diff --git a/include/configs/Yukon8220.h b/include/configs/Yukon8220.h
index 1b4195a08f..cbc1ed688a 100644
--- a/include/configs/Yukon8220.h
+++ b/include/configs/Yukon8220.h
@@ -133,9 +133,9 @@
 #define CFG_EEPROM_PAGE_WRITE_BITS	3
 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS	70
 /*
-#define CFG_ENV_IS_IN_EEPROM	1
-#define CFG_ENV_OFFSET		0
-#define CFG_ENV_SIZE		256
+#define CONFIG_ENV_IS_IN_EEPROM	1
+#define CONFIG_ENV_OFFSET		0
+#define CONFIG_ENV_SIZE		256
 */
 
 /* If CFG_AMD_BOOT is defined, the the system will boot from AMD.
@@ -205,34 +205,34 @@
 /*
  * Environment settings
  */
-#define CFG_ENV_IS_IN_FLASH	1
+#define CONFIG_ENV_IS_IN_FLASH	1
 #if defined (CFG_AMD_BOOT)
-#define CFG_ENV_ADDR		(CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_AMD_SECT_SIZE)
-#define CFG_ENV_SIZE		PHYS_AMD_SECT_SIZE
-#define CFG_ENV_SECT_SIZE	PHYS_AMD_SECT_SIZE
-#define CFG_ENV1_ADDR		(CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_INTEL_SECT_SIZE)
-#define CFG_ENV1_SIZE		PHYS_INTEL_SECT_SIZE
-#define CFG_ENV1_SECT_SIZE	PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV_ADDR		(CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_AMD_SECT_SIZE)
+#define CONFIG_ENV_SIZE		PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE	PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV1_ADDR		(CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_INTEL_SECT_SIZE)
+#define CONFIG_ENV1_SIZE		PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV1_SECT_SIZE	PHYS_INTEL_SECT_SIZE
 #else
-#define CFG_ENV_ADDR		(CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_INTEL_SECT_SIZE)
-#define CFG_ENV_SIZE		PHYS_INTEL_SECT_SIZE
-#define CFG_ENV_SECT_SIZE	PHYS_INTEL_SECT_SIZE
-#define CFG_ENV1_ADDR		(CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_AMD_SECT_SIZE)
-#define CFG_ENV1_SIZE		PHYS_AMD_SECT_SIZE
-#define CFG_ENV1_SECT_SIZE	PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV_ADDR		(CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_INTEL_SECT_SIZE)
+#define CONFIG_ENV_SIZE		PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE	PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV1_ADDR		(CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_AMD_SECT_SIZE)
+#define CONFIG_ENV1_SIZE		PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV1_SECT_SIZE	PHYS_AMD_SECT_SIZE
 #endif
 
 #define CONFIG_ENV_OVERWRITE	1
 
-#if defined CFG_ENV_IS_IN_FLASH
-#undef CFG_ENV_IS_IN_NVRAM
-#undef CFG_ENV_IS_IN_EEPROM
-#elif defined CFG_ENV_IS_IN_NVRAM
-#undef CFG_ENV_IS_IN_FLASH
-#undef CFG_ENV_IS_IN_EEPROM
-#elif defined CFG_ENV_IS_IN_EEPROM
-#undef CFG_ENV_IS_IN_NVRAM
-#undef CFG_ENV_IS_IN_FLASH
+#if defined CONFIG_ENV_IS_IN_FLASH
+#undef CONFIG_ENV_IS_IN_NVRAM
+#undef CONFIG_ENV_IS_IN_EEPROM
+#elif defined CONFIG_ENV_IS_IN_NVRAM
+#undef CONFIG_ENV_IS_IN_FLASH
+#undef CONFIG_ENV_IS_IN_EEPROM
+#elif defined CONFIG_ENV_IS_IN_EEPROM
+#undef CONFIG_ENV_IS_IN_NVRAM
+#undef CONFIG_ENV_IS_IN_FLASH
 #endif
 
 #ifndef CFG_JFFS2_FIRST_SECTOR