X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=include%2Fconfigs%2Fgw8260.h;h=2a40de1fae0f5f2a549837393d85abb9a28d79ec;hb=606a76f8ef479e42ae4d06f8f3ce87e9a1c72acf;hp=53a001d21192417f40628310d500cb2e5d3ff0b4;hpb=156feb90d200f186cdfd856d7f6f1878bb1bec1e;p=karo-tx-uboot.git diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h index 53a001d211..2a40de1fae 100644 --- a/include/configs/gw8260.h +++ b/include/configs/gw8260.h @@ -50,6 +50,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#define CONFIG_SYS_TEXT_BASE 0x40000000 + /* Enable debug prints */ #undef DEBUG_BOOTP_EXT /* Debug received vendor fields */ @@ -83,7 +85,7 @@ #define CONFIG_SYS_SBC_BOOT_LOW 1 /* What should the base address of the main FLASH be and how big is - * it (in MBytes)? This must contain TEXT_BASE from board/sbc8260/config.mk + * it (in MBytes)? This must contain CONFIG_SYS_TEXT_BASE. * The main FLASH is whichever is connected to *CS0. U-Boot expects * this to be the SIMM. */ @@ -212,6 +214,11 @@ * Port pins used for bit-banged MII communictions (if applicable). */ #define MDIO_PORT 2 /* Port C */ + +#define MDIO_DECLARE volatile ioport_t *iop = ioport_addr ( \ + (immap_t *) CONFIG_SYS_IMMR, MDIO_PORT ) +#define MDC_DECLARE MDIO_DECLARE + #define MDIO_ACTIVE (iop->pdir |= 0x00400000) #define MDIO_TRISTATE (iop->pdir &= ~0x00400000) #define MDIO_READ ((iop->pdat & 0x00400000) != 0) @@ -233,8 +240,8 @@ * - Select bus for bd/buffers (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB) @@ -246,8 +253,8 @@ * - Select bus for bd/buffers (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) +# define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB) @@ -431,9 +438,8 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR -#define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in DPRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- @@ -814,13 +820,4 @@ ORxG_SCY_11_CLK |\ ORxG_EHTR) #endif /* CONFIG_SYS_IO_BASE */ - -/* - * Internal Definitions - * - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - #endif /* __CONFIG_H */