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1 /*
2  * Device Tree file for Synology DS414
3  *
4  * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
5  *
6  * This file is dual-licensed: you can use it either under the terms
7  * of the GPL or the X11 license, at your option. Note that this dual
8  * licensing only applies to this file, and not this project as a
9  * whole.
10  *
11  *  a) This file is free software; you can redistribute it and/or
12  *     modify it under the terms of the GNU General Public License as
13  *     published by the Free Software Foundation; either version 2 of the
14  *     License, or (at your option) any later version.
15  *
16  *     This file is distributed in the hope that it will be useful
17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  *     GNU General Public License for more details.
20  *
21  * Or, alternatively
22  *
23  *  b) Permission is hereby granted, free of charge, to any person
24  *     obtaining a copy of this software and associated documentation
25  *     files (the "Software"), to deal in the Software without
26  *     restriction, including without limitation the rights to use
27  *     copy, modify, merge, publish, distribute, sublicense, and/or
28  *     sell copies of the Software, and to permit persons to whom the
29  *     Software is furnished to do so, subject to the following
30  *     conditions:
31  *
32  *     The above copyright notice and this permission notice shall be
33  *     included in all copies or substantial portions of the Software.
34  *
35  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42  *     OTHER DEALINGS IN THE SOFTWARE.
43  *
44  * Note: this Device Tree assumes that the bootloader has remapped the
45  * internal registers to 0xf1000000 (instead of the old 0xd0000000).
46  * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
47  * bootloaders provided by Marvell. It is used in recent versions of
48  * DSM software provided by Synology. Nonetheless, some earlier boards
49  * were delivered with an older version of u-boot that left internal
50  * registers mapped at 0xd0000000. If you have such a device you will
51  * not be able to directly boot a kernel based on this Device Tree. In
52  * that case, the preferred solution is to update your bootloader (e.g.
53  * by upgrading to latest version of DSM, or building a new one and
54  * installing it from u-boot prompt) or adjust the Devive Tree
55  * (s/0xf1000000/0xd0000000/ in 'ranges' below).
56  */
57
58 /dts-v1/;
59
60 #include <dt-bindings/input/input.h>
61 #include <dt-bindings/gpio/gpio.h>
62 #include "armada-xp-mv78230.dtsi"
63
64 / {
65         model = "Synology DS414";
66         compatible = "synology,ds414", "marvell,armadaxp-mv78230",
67                      "marvell,armadaxp", "marvell,armada-370-xp";
68
69         chosen {
70                 stdout-path = "serial0:115200n8";
71         };
72
73         memory {
74                 device_type = "memory";
75                 reg = <0 0x00000000 0 0x40000000>; /* 1GB */
76         };
77
78         soc {
79                 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
80                           MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
81                           MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
82                           MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
83
84                 pcie-controller {
85                         status = "okay";
86
87                         /*
88                          * Connected to Marvell 88SX7042 SATA-II controller
89                          * handling the four disks.
90                          */
91                         pcie@1,0 {
92                                 /* Port 0, Lane 0 */
93                                 status = "okay";
94                         };
95
96                         /*
97                          * Connected to EtronTech EJ168A XHCI controller
98                          * providing the two rear USB 3.0 ports.
99                          */
100                         pcie@5,0 {
101                                 /* Port 1, Lane 0 */
102                                 status = "okay";
103                         };
104                 };
105
106                 internal-regs {
107
108                         /* RTC is provided by Seiko S-35390A below */
109                         rtc@10300 {
110                                 status = "disabled";
111                         };
112
113                         spi0: spi@10600 {
114                                 status = "okay";
115
116                                 spi-flash@0 {
117                                         #address-cells = <1>;
118                                         #size-cells = <1>;
119                                         compatible = "micron,n25q064", "jedec,spi-nor";
120                                         reg = <0>; /* Chip select 0 */
121                                         spi-max-frequency = <20000000>;
122
123                                         /*
124                                          * Warning!
125                                          *
126                                          * Synology u-boot uses its compiled-in environment
127                                          * and it seems Synology did not care to change u-boot
128                                          * default configuration in order to allow saving a
129                                          * modified environment at a sensible location. So,
130                                          * if you do a 'saveenv' under u-boot, your modified
131                                          * environment will be saved at 1MB after the start
132                                          * of the flash, i.e. in the middle of the uImage.
133                                          * For that reason, it is strongly advised not to
134                                          * change the default environment, unless you know
135                                          * what you are doing.
136                                          */
137                                         partition@00000000 { /* u-boot */
138                                                 label = "RedBoot";
139                                                 reg = <0x00000000 0x000d0000>; /* 832KB */
140                                         };
141
142                                         partition@000c0000 { /* uImage */
143                                                 label = "zImage";
144                                                 reg = <0x000d0000 0x002d0000>; /* 2880KB */
145                                         };
146
147                                         partition@003a0000 { /* uInitramfs */
148                                                 label = "rd.gz";
149                                                 reg = <0x003a0000 0x00430000>; /* 4250KB */
150                                         };
151
152                                         partition@007d0000 { /* MAC address and serial number */
153                                                 label = "vendor";
154                                                 reg = <0x007d0000 0x00010000>; /* 64KB */
155                                         };
156
157                                         partition@007e0000 {
158                                                 label = "RedBoot config";
159                                                 reg = <0x007e0000 0x00010000>; /* 64KB */
160                                         };
161
162                                         partition@007f0000 {
163                                                 label = "FIS directory";
164                                                 reg = <0x007f0000 0x00010000>; /* 64KB */
165                                         };
166                                 };
167                         };
168
169                         i2c@11000 {
170                                 clock-frequency = <400000>;
171                                 status = "okay";
172
173                                 s35390a: s35390a@30 {
174                                          compatible = "sii,s35390a";
175                                          reg = <0x30>;
176                                 };
177                         };
178
179                         /* Connected to a header on device's PCB. This
180                          * provides the main console for the device.
181                          *
182                          * Warning: the device may not boot with a 3.3V
183                          * USB-serial converter connected when the power
184                          * button is pressed. The converter needs to be
185                          * connected a few seconds after pressing the
186                          * power button. This is possibly due to UART0_TXD
187                          * pin being sampled at reset (bit 0 of SAR).
188                          */
189                         serial@12000 {
190                                 status = "okay";
191                         };
192
193                         /* Connected to a Microchip PIC16F883 for power control */
194                         serial@12100 {
195                                 status = "okay";
196                         };
197
198                         poweroff@12100 {
199                                 compatible = "synology,power-off";
200                                 reg = <0x12100 0x100>;
201                                 clocks = <&coreclk 0>;
202                         };
203
204                         /* Front USB 2.0 port */
205                         usb@50000 {
206                                 status = "okay";
207                         };
208
209                         mdio {
210                                 phy0: ethernet-phy@0 { /* Marvell 88E1512 */
211                                         reg = <0>;
212                                 };
213
214                                 phy1: ethernet-phy@1 { /* Marvell 88E1512 */
215                                         reg = <1>;
216                                 };
217                         };
218
219                         ethernet@70000 {
220                                 status = "okay";
221                                 pinctrl-0 = <&ge0_rgmii_pins>;
222                                 pinctrl-names = "default";
223                                 phy = <&phy1>;
224                                 phy-mode = "rgmii-id";
225                         };
226
227                         ethernet@74000 {
228                                 pinctrl-0 = <&ge1_rgmii_pins>;
229                                 pinctrl-names = "default";
230                                 status = "okay";
231                                 phy = <&phy0>;
232                                 phy-mode = "rgmii-id";
233                         };
234                 };
235         };
236
237         regulators {
238                 compatible = "simple-bus";
239                 #address-cells = <1>;
240                 #size-cells = <0>;
241                 pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
242                              &sata3_pwr_pin &sata4_pwr_pin>;
243                 pinctrl-names = "default";
244
245                 sata1_regulator: sata1-regulator {
246                         compatible = "regulator-fixed";
247                         reg = <1>;
248                         regulator-name = "SATA1 Power";
249                         regulator-min-microvolt = <5000000>;
250                         regulator-max-microvolt = <5000000>;
251                         startup-delay-us = <2000000>;
252                         enable-active-high;
253                         regulator-always-on;
254                         regulator-boot-on;
255                         gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
256                 };
257
258                 sata2_regulator: sata2-regulator {
259                         compatible = "regulator-fixed";
260                         reg = <2>;
261                         regulator-name = "SATA2 Power";
262                         regulator-min-microvolt = <5000000>;
263                         regulator-max-microvolt = <5000000>;
264                         startup-delay-us = <4000000>;
265                         enable-active-high;
266                         regulator-always-on;
267                         regulator-boot-on;
268                         gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
269                 };
270
271                 sata3_regulator: sata3-regulator {
272                         compatible = "regulator-fixed";
273                         reg = <3>;
274                         regulator-name = "SATA3 Power";
275                         regulator-min-microvolt = <5000000>;
276                         regulator-max-microvolt = <5000000>;
277                         startup-delay-us = <6000000>;
278                         enable-active-high;
279                         regulator-always-on;
280                         regulator-boot-on;
281                         gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
282                 };
283
284                 sata4_regulator: sata4-regulator {
285                         compatible = "regulator-fixed";
286                         reg = <4>;
287                         regulator-name = "SATA4 Power";
288                         regulator-min-microvolt = <5000000>;
289                         regulator-max-microvolt = <5000000>;
290                         startup-delay-us = <8000000>;
291                         enable-active-high;
292                         regulator-always-on;
293                         regulator-boot-on;
294                         gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
295                 };
296         };
297 };
298
299 &pinctrl {
300         sata1_pwr_pin: sata1-pwr-pin {
301                 marvell,pins = "mpp42";
302                 marvell,function = "gpio";
303         };
304
305         sata2_pwr_pin: sata2-pwr-pin {
306                 marvell,pins = "mpp44";
307                 marvell,function = "gpio";
308         };
309
310         sata3_pwr_pin: sata3-pwr-pin {
311                 marvell,pins = "mpp45";
312                 marvell,function = "gpio";
313         };
314
315         sata4_pwr_pin: sata4-pwr-pin {
316                 marvell,pins = "mpp46";
317                 marvell,function = "gpio";
318         };
319
320         sata1_pres_pin: sata1-pres-pin {
321                 marvell,pins = "mpp34";
322                 marvell,function = "gpio";
323         };
324
325         sata2_pres_pin: sata2-pres-pin {
326                 marvell,pins = "mpp35";
327                 marvell,function = "gpio";
328         };
329
330         sata3_pres_pin: sata3-pres-pin {
331                 marvell,pins = "mpp40";
332                 marvell,function = "gpio";
333         };
334
335         sata4_pres_pin: sata4-pres-pin {
336                 marvell,pins = "mpp41";
337                 marvell,function = "gpio";
338         };
339
340         syno_id_bit0_pin: syno-id-bit0-pin {
341                 marvell,pins = "mpp26";
342                 marvell,function = "gpio";
343         };
344
345         syno_id_bit1_pin: syno-id-bit1-pin {
346                 marvell,pins = "mpp28";
347                 marvell,function = "gpio";
348         };
349
350         syno_id_bit2_pin: syno-id-bit2-pin {
351                 marvell,pins = "mpp29";
352                 marvell,function = "gpio";
353         };
354
355         fan1_alarm_pin: fan1-alarm-pin {
356                 marvell,pins = "mpp33";
357                 marvell,function = "gpio";
358         };
359
360         fan2_alarm_pin: fan2-alarm-pin {
361                 marvell,pins = "mpp32";
362                 marvell,function = "gpio";
363         };
364 };