arch/arm/boot/dts/at91sam9263.dtsi

   1 /*
   2  * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
   3  *
   4  *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   5  *
   6  * Licensed under GPLv2 only.
   7  */
   8
   9 #include "skeleton.dtsi"
  10 #include <dt-bindings/pinctrl/at91.h>
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/clock/at91.h>
  14
  15 / {
  16         model = "Atmel AT91SAM9263 family SoC";
  17         compatible = "atmel,at91sam9263";
  18         interrupt-parent = <&aic>;
  19
  20         aliases {
  21                 serial0 = &dbgu;
  22                 serial1 = &usart0;
  23                 serial2 = &usart1;
  24                 serial3 = &usart2;
  25                 gpio0 = &pioA;
  26                 gpio1 = &pioB;
  27                 gpio2 = &pioC;
  28                 gpio3 = &pioD;
  29                 gpio4 = &pioE;
  30                 tcb0 = &tcb0;
  31                 i2c0 = &i2c0;
  32                 ssc0 = &ssc0;
  33                 ssc1 = &ssc1;
  34                 pwm0 = &pwm0;
  35         };
  36
  37         cpus {
  38                 #address-cells = <0>;
  39                 #size-cells = <0>;
  40
  41                 cpu {
  42                         compatible = "arm,arm926ej-s";
  43                         device_type = "cpu";
  44                 };
  45         };
  46
  47         memory {
  48                 reg = <0x20000000 0x08000000>;
  49         };
  50
  51         clocks {
  52                 main_xtal: main_xtal {
  53                         compatible = "fixed-clock";
  54                         #clock-cells = <0>;
  55                         clock-frequency = <0>;
  56                 };
  57
  58                 slow_xtal: slow_xtal {
  59                         compatible = "fixed-clock";
  60                         #clock-cells = <0>;
  61                         clock-frequency = <0>;
  62                 };
  63         };
  64
  65         sram0: sram@00300000 {
  66                 compatible = "mmio-sram";
  67                 reg = <0x00300000 0x14000>;
  68         };
  69
  70         sram1: sram@00500000 {
  71                 compatible = "mmio-sram";
  72                 reg = <0x00500000 0x4000>;
  73         };
  74
  75         ahb {
  76                 compatible = "simple-bus";
  77                 #address-cells = <1>;
  78                 #size-cells = <1>;
  79                 ranges;
  80
  81                 apb {
  82                         compatible = "simple-bus";
  83                         #address-cells = <1>;
  84                         #size-cells = <1>;
  85                         ranges;
  86
  87                         aic: interrupt-controller@fffff000 {
  88                                 #interrupt-cells = <3>;
  89                                 compatible = "atmel,at91rm9200-aic";
  90                                 interrupt-controller;
  91                                 reg = <0xfffff000 0x200>;
  92                                 atmel,external-irqs = <30 31>;
  93                         };
  94
  95                         pmc: pmc@fffffc00 {
  96                                 compatible = "atmel,at91rm9200-pmc", "syscon";
  97                                 reg = <0xfffffc00 0x100>;
  98                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  99                                 interrupt-controller;
 100                                 #address-cells = <1>;
 101                                 #size-cells = <0>;
 102                                 #interrupt-cells = <1>;
 103
 104                                 main_osc: main_osc {
 105                                         compatible = "atmel,at91rm9200-clk-main-osc";
 106                                         #clock-cells = <0>;
 107                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 108                                         clocks = <&main_xtal>;
 109                                 };
 110
 111                                 main: mainck {
 112                                         compatible = "atmel,at91rm9200-clk-main";
 113                                         #clock-cells = <0>;
 114                                         clocks = <&main_osc>;
 115                                 };
 116
 117                                 plla: pllack {
 118                                         compatible = "atmel,at91rm9200-clk-pll";
 119                                         #clock-cells = <0>;
 120                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 121                                         clocks = <&main>;
 122                                         reg = <0>;
 123                                         atmel,clk-input-range = <1000000 32000000>;
 124                                         #atmel,pll-clk-output-range-cells = <4>;
 125                                         atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
 126                                                                 <190000000 240000000 2 1>;
 127                                 };
 128
 129                                 pllb: pllbck {
 130                                         compatible = "atmel,at91rm9200-clk-pll";
 131                                         #clock-cells = <0>;
 132                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
 133                                         clocks = <&main>;
 134                                         reg = <1>;
 135                                         atmel,clk-input-range = <1000000 32000000>;
 136                                         #atmel,pll-clk-output-range-cells = <4>;
 137                                         atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
 138                                                                 <190000000 240000000 2 1>;
 139                                 };
 140
 141                                 mck: masterck {
 142                                         compatible = "atmel,at91rm9200-clk-master";
 143                                         #clock-cells = <0>;
 144                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 145                                         clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
 146                                         atmel,clk-output-range = <0 120000000>;
 147                                         atmel,clk-divisors = <1 2 4 0>;
 148                                 };
 149
 150                                 usb: usbck {
 151                                         compatible = "atmel,at91rm9200-clk-usb";
 152                                         #clock-cells = <0>;
 153                                         atmel,clk-divisors = <1 2 4 0>;
 154                                         clocks = <&pllb>;
 155                                 };
 156
 157                                 prog: progck {
 158                                         compatible = "atmel,at91rm9200-clk-programmable";
 159                                         #address-cells = <1>;
 160                                         #size-cells = <0>;
 161                                         interrupt-parent = <&pmc>;
 162                                         clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
 163
 164                                         prog0: prog0 {
 165                                                 #clock-cells = <0>;
 166                                                 reg = <0>;
 167                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 168                                         };
 169
 170                                         prog1: prog1 {
 171                                                 #clock-cells = <0>;
 172                                                 reg = <1>;
 173                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 174                                         };
 175
 176                                         prog2: prog2 {
 177                                                 #clock-cells = <0>;
 178                                                 reg = <2>;
 179                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
 180                                         };
 181
 182                                         prog3: prog3 {
 183                                                 #clock-cells = <0>;
 184                                                 reg = <3>;
 185                                                 interrupts = <AT91_PMC_PCKRDY(3)>;
 186                                         };
 187                                 };
 188
 189                                 systemck {
 190                                         compatible = "atmel,at91rm9200-clk-system";
 191                                         #address-cells = <1>;
 192                                         #size-cells = <0>;
 193
 194                                         uhpck: uhpck {
 195                                                 #clock-cells = <0>;
 196                                                 reg = <6>;
 197                                                 clocks = <&usb>;
 198                                         };
 199
 200                                         udpck: udpck {
 201                                                 #clock-cells = <0>;
 202                                                 reg = <7>;
 203                                                 clocks = <&usb>;
 204                                         };
 205
 206                                         pck0: pck0 {
 207                                                 #clock-cells = <0>;
 208                                                 reg = <8>;
 209                                                 clocks = <&prog0>;
 210                                         };
 211
 212                                         pck1: pck1 {
 213                                                 #clock-cells = <0>;
 214                                                 reg = <9>;
 215                                                 clocks = <&prog1>;
 216                                         };
 217
 218                                         pck2: pck2 {
 219                                                 #clock-cells = <0>;
 220                                                 reg = <10>;
 221                                                 clocks = <&prog2>;
 222                                         };
 223
 224                                         pck3: pck3 {
 225                                                 #clock-cells = <0>;
 226                                                 reg = <11>;
 227                                                 clocks = <&prog3>;
 228                                         };
 229                                 };
 230
 231                                 periphck {
 232                                         compatible = "atmel,at91rm9200-clk-peripheral";
 233                                         #address-cells = <1>;
 234                                         #size-cells = <0>;
 235                                         clocks = <&mck>;
 236
 237                                         pioA_clk: pioA_clk {
 238                                                 #clock-cells = <0>;
 239                                                 reg = <2>;
 240                                         };
 241
 242                                         pioB_clk: pioB_clk {
 243                                                 #clock-cells = <0>;
 244                                                 reg = <3>;
 245                                         };
 246
 247                                         pioCDE_clk: pioCDE_clk {
 248                                                 #clock-cells = <0>;
 249                                                 reg = <4>;
 250                                         };
 251
 252                                         usart0_clk: usart0_clk {
 253                                                 #clock-cells = <0>;
 254                                                 reg = <7>;
 255                                         };
 256
 257                                         usart1_clk: usart1_clk {
 258                                                 #clock-cells = <0>;
 259                                                 reg = <8>;
 260                                         };
 261
 262                                         usart2_clk: usart2_clk {
 263                                                 #clock-cells = <0>;
 264                                                 reg = <9>;
 265                                         };
 266
 267                                         mci0_clk: mci0_clk {
 268                                                 #clock-cells = <0>;
 269                                                 reg = <10>;
 270                                         };
 271
 272                                         mci1_clk: mci1_clk {
 273                                                 #clock-cells = <0>;
 274                                                 reg = <11>;
 275                                         };
 276
 277                                         can_clk: can_clk {
 278                                                 #clock-cells = <0>;
 279                                                 reg = <12>;
 280                                         };
 281
 282                                         twi0_clk: twi0_clk {
 283                                                 #clock-cells = <0>;
 284                                                 reg = <13>;
 285                                         };
 286
 287                                         spi0_clk: spi0_clk {
 288                                                 #clock-cells = <0>;
 289                                                 reg = <14>;
 290                                         };
 291
 292                                         spi1_clk: spi1_clk {
 293                                                 #clock-cells = <0>;
 294                                                 reg = <15>;
 295                                         };
 296
 297                                         ssc0_clk: ssc0_clk {
 298                                                 #clock-cells = <0>;
 299                                                 reg = <16>;
 300                                         };
 301
 302                                         ssc1_clk: ssc1_clk {
 303                                                 #clock-cells = <0>;
 304                                                 reg = <17>;
 305                                         };
 306
 307                                         ac97_clk: ac97_clk {
 308                                                 #clock-cells = <0>;
 309                                                 reg = <18>;
 310                                         };
 311
 312                                         tcb_clk: tcb_clk {
 313                                                 #clock-cells = <0>;
 314                                                 reg = <19>;
 315                                         };
 316
 317                                         pwm_clk: pwm_clk {
 318                                                 #clock-cells = <0>;
 319                                                 reg = <20>;
 320                                         };
 321
 322                                         macb0_clk: macb0_clk {
 323                                                 #clock-cells = <0>;
 324                                                 reg = <21>;
 325                                         };
 326
 327                                         g2de_clk: g2de_clk {
 328                                                 #clock-cells = <0>;
 329                                                 reg = <23>;
 330                                         };
 331
 332                                         udc_clk: udc_clk {
 333                                                 #clock-cells = <0>;
 334                                                 reg = <24>;
 335                                         };
 336
 337                                         isi_clk: isi_clk {
 338                                                 #clock-cells = <0>;
 339                                                 reg = <25>;
 340                                         };
 341
 342                                         lcd_clk: lcd_clk {
 343                                                 #clock-cells = <0>;
 344                                                 reg = <26>;
 345                                         };
 346
 347                                         dma_clk: dma_clk {
 348                                                 #clock-cells = <0>;
 349                                                 reg = <27>;
 350                                         };
 351
 352                                         ohci_clk: ohci_clk {
 353                                                 #clock-cells = <0>;
 354                                                 reg = <29>;
 355                                         };
 356                                 };
 357                         };
 358
 359                         ramc0: ramc@ffffe200 {
 360                                 compatible = "atmel,at91sam9260-sdramc";
 361                                 reg = <0xffffe200 0x200>;
 362                         };
 363
 364                         ramc1: ramc@ffffe800 {
 365                                 compatible = "atmel,at91sam9260-sdramc";
 366                                 reg = <0xffffe800 0x200>;
 367                         };
 368
 369                         pit: timer@fffffd30 {
 370                                 compatible = "atmel,at91sam9260-pit";
 371                                 reg = <0xfffffd30 0xf>;
 372                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 373                                 clocks = <&mck>;
 374                         };
 375
 376                         tcb0: timer@fff7c000 {
 377                                 compatible = "atmel,at91rm9200-tcb";
 378                                 reg = <0xfff7c000 0x100>;
 379                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
 380                                 clocks = <&tcb_clk>, <&slow_xtal>;
 381                                 clock-names = "t0_clk", "slow_clk";
 382                         };
 383
 384                         rstc@fffffd00 {
 385                                 compatible = "atmel,at91sam9260-rstc";
 386                                 reg = <0xfffffd00 0x10>;
 387                                 clocks = <&slow_xtal>;
 388                         };
 389
 390                         shdwc@fffffd10 {
 391                                 compatible = "atmel,at91sam9260-shdwc";
 392                                 reg = <0xfffffd10 0x10>;
 393                                 clocks = <&slow_xtal>;
 394                         };
 395
 396                         pinctrl@fffff200 {
 397                                 #address-cells = <1>;
 398                                 #size-cells = <1>;
 399                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 400                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 401
 402                                 atmel,mux-mask = <
 403                                       /*    A         B     */
 404                                        0xfffffffb 0xffffe07f  /* pioA */
 405                                        0x0007ffff 0x39072fff  /* pioB */
 406                                        0xffffffff 0x3ffffff8  /* pioC */
 407                                        0xfffffbff 0xffffffff  /* pioD */
 408                                        0xffe00fff 0xfbfcff00  /* pioE */
 409                                       >;
 410
 411                                 /* shared pinctrl settings */
 412                                 dbgu {
 413                                         pinctrl_dbgu: dbgu-0 {
 414                                                 atmel,pins =
 415                                                         <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC30 periph A */
 416                                                          AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PC31 periph with pullup */
 417                                         };
 418                                 };
 419
 420                                 usart0 {
 421                                         pinctrl_usart0: usart0-0 {
 422                                                 atmel,pins =
 423                                                         <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA26 periph A with pullup */
 424                                                          AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
 425                                         };
 426
 427                                         pinctrl_usart0_rts: usart0_rts-0 {
 428                                                 atmel,pins =
 429                                                         <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
 430                                         };
 431
 432                                         pinctrl_usart0_cts: usart0_cts-0 {
 433                                                 atmel,pins =
 434                                                         <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
 435                                         };
 436                                 };
 437
 438                                 usart1 {
 439                                         pinctrl_usart1: usart1-0 {
 440                                                 atmel,pins =
 441                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
 442                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD1 periph A */
 443                                         };
 444
 445                                         pinctrl_usart1_rts: usart1_rts-0 {
 446                                                 atmel,pins =
 447                                                         <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD7 periph B */
 448                                         };
 449
 450                                         pinctrl_usart1_cts: usart1_cts-0 {
 451                                                 atmel,pins =
 452                                                         <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD8 periph B */
 453                                         };
 454                                 };
 455
 456                                 usart2 {
 457                                         pinctrl_usart2: usart2-0 {
 458                                                 atmel,pins =
 459                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
 460                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD3 periph A */
 461                                         };
 462
 463                                         pinctrl_usart2_rts: usart2_rts-0 {
 464                                                 atmel,pins =
 465                                                         <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD5 periph B */
 466                                         };
 467
 468                                         pinctrl_usart2_cts: usart2_cts-0 {
 469                                                 atmel,pins =
 470                                                         <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD6 periph B */
 471                                         };
 472                                 };
 473
 474                                 nand {
 475                                         pinctrl_nand: nand-0 {
 476                                                 atmel,pins =
 477                                                         <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP     /* PA22 gpio RDY pin pull_up*/
 478                                                          AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;   /* PD15 gpio enable pin pull_up */
 479                                         };
 480                                 };
 481
 482                                 macb {
 483                                         pinctrl_macb_rmii: macb_rmii-0 {
 484                                                 atmel,pins =
 485                                                         <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC25 periph B */
 486                                                          AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE21 periph A */
 487                                                          AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE23 periph A */
 488                                                          AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE24 periph A */
 489                                                          AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE25 periph A */
 490                                                          AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE26 periph A */
 491                                                          AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE27 periph A */
 492                                                          AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE28 periph A */
 493                                                          AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE29 periph A */
 494                                                          AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
 495                                         };
 496
 497                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 498                                                 atmel,pins =
 499                                                         <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC20 periph B */
 500                                                          AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC21 periph B */
 501                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC22 periph B */
 502                                                          AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC23 periph B */
 503                                                          AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC24 periph B */
 504                                                          AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC25 periph B */
 505                                                          AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC27 periph B */
 506                                                          AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
 507                                         };
 508                                 };
 509
 510                                 mmc0 {
 511                                         pinctrl_mmc0_clk: mmc0_clk-0 {
 512                                                 atmel,pins =
 513                                                         <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
 514                                         };
 515
 516                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
 517                                                 atmel,pins =
 518                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
 519                                                          AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA0 periph A with pullup */
 520                                         };
 521
 522                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 523                                                 atmel,pins =
 524                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
 525                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
 526                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA5 periph A with pullup */
 527                                         };
 528
 529                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
 530                                                 atmel,pins =
 531                                                         <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 532                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA17 periph A with pullup */
 533                                         };
 534
 535                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
 536                                                 atmel,pins =
 537                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 538                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 539                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 540                                         };
 541                                 };
 542
 543                                 mmc1 {
 544                                         pinctrl_mmc1_clk: mmc1_clk-0 {
 545                                                 atmel,pins =
 546                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA6 periph A */
 547                                         };
 548
 549                                         pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
 550                                                 atmel,pins =
 551                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 552                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA8 periph A with pullup */
 553                                         };
 554
 555                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 556                                                 atmel,pins =
 557                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
 558                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA10 periph A with pullup */
 559                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA11 periph A with pullup */
 560                                         };
 561
 562                                         pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
 563                                                 atmel,pins =
 564                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA21 periph A with pullup */
 565                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA22 periph A with pullup */
 566                                         };
 567
 568                                         pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
 569                                                 atmel,pins =
 570                                                         <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA23 periph A with pullup */
 571                                                          AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA24 periph A with pullup */
 572                                                          AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA25 periph A with pullup */
 573                                         };
 574                                 };
 575
 576                                 ssc0 {
 577                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 578                                                 atmel,pins =
 579                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB0 periph B */
 580                                                          AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB1 periph B */
 581                                                          AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB2 periph B */
 582                                         };
 583
 584                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 585                                                 atmel,pins =
 586                                                         <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB3 periph B */
 587                                                          AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB4 periph B */
 588                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB5 periph B */
 589                                         };
 590                                 };
 591
 592                                 ssc1 {
 593                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 594                                                 atmel,pins =
 595                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB6 periph A */
 596                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB7 periph A */
 597                                                          AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB8 periph A */
 598                                         };
 599
 600                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 601                                                 atmel,pins =
 602                                                         <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB9 periph A */
 603                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB10 periph A */
 604                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
 605                                         };
 606                                 };
 607
 608                                 spi0 {
 609                                         pinctrl_spi0: spi0-0 {
 610                                                 atmel,pins =
 611                                                         <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA0 periph B SPI0_MISO pin */
 612                                                          AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA1 periph B SPI0_MOSI pin */
 613                                                          AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PA2 periph B SPI0_SPCK pin */
 614                                         };
 615                                 };
 616
 617                                 spi1 {
 618                                         pinctrl_spi1: spi1-0 {
 619                                                 atmel,pins =
 620                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB12 periph A SPI1_MISO pin */
 621                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB13 periph A SPI1_MOSI pin */
 622                                                          AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
 623                                         };
 624                                 };
 625
 626                                 tcb0 {
 627                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 628                                                 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 629                                         };
 630
 631                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 632                                                 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 633                                         };
 634
 635                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 636                                                 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 637                                         };
 638
 639                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 640                                                 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 641                                         };
 642
 643                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 644                                                 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 645                                         };
 646
 647                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 648                                                 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 649                                         };
 650
 651                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 652                                                 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 653                                         };
 654
 655                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 656                                                 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 657                                         };
 658
 659                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 660                                                 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 661                                         };
 662                                 };
 663
 664                                 fb {
 665                                         pinctrl_fb: fb-0 {
 666                                                 atmel,pins =
 667                                                         <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC1 periph A */
 668                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC2 periph A */
 669                                                          AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC3 periph A */
 670                                                          AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB9 periph B */
 671                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC6 periph A */
 672                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC7 periph A */
 673                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC8 periph A */
 674                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC9 periph A */
 675                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC10 periph A */
 676                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC11 periph A */
 677                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC14 periph A */
 678                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC15 periph A */
 679                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A */
 680                                                          AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC12 periph B */
 681                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC18 periph A */
 682                                                          AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A */
 683                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A */
 684                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A */
 685                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC24 periph A */
 686                                                          AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC17 periph B */
 687                                                          AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC26 periph A */
 688                                                          AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
 689                                         };
 690                                 };
 691
 692                                 can {
 693                                         pinctrl_can_rx_tx: can_rx_tx {
 694                                                 atmel,pins =
 695                                                         <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* CANRX, conflicts with IRQ0 */
 696                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */
 697                                         };
 698                                 };
 699
 700                                 ac97 {
 701                                         pinctrl_ac97: ac97-0 {
 702                                                 atmel,pins =
 703                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB12 periph A AC97FS pin */
 704                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB13 periph A AC97CK pin */
 705                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB14 periph A AC97TX pin */
 706                                                          AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB14 periph A AC97RX pin */
 707                                         };
 708                                 };
 709
 710                                 pioA: gpio@fffff200 {
 711                                         compatible = "atmel,at91rm9200-gpio";
 712                                         reg = <0xfffff200 0x200>;
 713                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 714                                         #gpio-cells = <2>;
 715                                         gpio-controller;
 716                                         interrupt-controller;
 717                                         #interrupt-cells = <2>;
 718                                         clocks = <&pioA_clk>;
 719                                 };
 720
 721                                 pioB: gpio@fffff400 {
 722                                         compatible = "atmel,at91rm9200-gpio";
 723                                         reg = <0xfffff400 0x200>;
 724                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 725                                         #gpio-cells = <2>;
 726                                         gpio-controller;
 727                                         interrupt-controller;
 728                                         #interrupt-cells = <2>;
 729                                         clocks = <&pioB_clk>;
 730                                 };
 731
 732                                 pioC: gpio@fffff600 {
 733                                         compatible = "atmel,at91rm9200-gpio";
 734                                         reg = <0xfffff600 0x200>;
 735                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 736                                         #gpio-cells = <2>;
 737                                         gpio-controller;
 738                                         interrupt-controller;
 739                                         #interrupt-cells = <2>;
 740                                         clocks = <&pioCDE_clk>;
 741                                 };
 742
 743                                 pioD: gpio@fffff800 {
 744                                         compatible = "atmel,at91rm9200-gpio";
 745                                         reg = <0xfffff800 0x200>;
 746                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 747                                         #gpio-cells = <2>;
 748                                         gpio-controller;
 749                                         interrupt-controller;
 750                                         #interrupt-cells = <2>;
 751                                         clocks = <&pioCDE_clk>;
 752                                 };
 753
 754                                 pioE: gpio@fffffa00 {
 755                                         compatible = "atmel,at91rm9200-gpio";
 756                                         reg = <0xfffffa00 0x200>;
 757                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 758                                         #gpio-cells = <2>;
 759                                         gpio-controller;
 760                                         interrupt-controller;
 761                                         #interrupt-cells = <2>;
 762                                         clocks = <&pioCDE_clk>;
 763                                 };
 764                         };
 765
 766                         dbgu: serial@ffffee00 {
 767                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 768                                 reg = <0xffffee00 0x200>;
 769                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 770                                 pinctrl-names = "default";
 771                                 pinctrl-0 = <&pinctrl_dbgu>;
 772                                 clocks = <&mck>;
 773                                 clock-names = "usart";
 774                                 status = "disabled";
 775                         };
 776
 777                         usart0: serial@fff8c000 {
 778                                 compatible = "atmel,at91sam9260-usart";
 779                                 reg = <0xfff8c000 0x200>;
 780                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 781                                 atmel,use-dma-rx;
 782                                 atmel,use-dma-tx;
 783                                 pinctrl-names = "default";
 784                                 pinctrl-0 = <&pinctrl_usart0>;
 785                                 clocks = <&usart0_clk>;
 786                                 clock-names = "usart";
 787                                 status = "disabled";
 788                         };
 789
 790                         usart1: serial@fff90000 {
 791                                 compatible = "atmel,at91sam9260-usart";
 792                                 reg = <0xfff90000 0x200>;
 793                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 794                                 atmel,use-dma-rx;
 795                                 atmel,use-dma-tx;
 796                                 pinctrl-names = "default";
 797                                 pinctrl-0 = <&pinctrl_usart1>;
 798                                 clocks = <&usart1_clk>;
 799                                 clock-names = "usart";
 800                                 status = "disabled";
 801                         };
 802
 803                         usart2: serial@fff94000 {
 804                                 compatible = "atmel,at91sam9260-usart";
 805                                 reg = <0xfff94000 0x200>;
 806                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 807                                 atmel,use-dma-rx;
 808                                 atmel,use-dma-tx;
 809                                 pinctrl-names = "default";
 810                                 pinctrl-0 = <&pinctrl_usart2>;
 811                                 clocks = <&usart2_clk>;
 812                                 clock-names = "usart";
 813                                 status = "disabled";
 814                         };
 815
 816                         ssc0: ssc@fff98000 {
 817                                 compatible = "atmel,at91rm9200-ssc";
 818                                 reg = <0xfff98000 0x4000>;
 819                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 820                                 pinctrl-names = "default";
 821                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 822                                 clocks = <&ssc0_clk>;
 823                                 clock-names = "pclk";
 824                                 status = "disabled";
 825                         };
 826
 827                         ssc1: ssc@fff9c000 {
 828                                 compatible = "atmel,at91rm9200-ssc";
 829                                 reg = <0xfff9c000 0x4000>;
 830                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
 831                                 pinctrl-names = "default";
 832                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 833                                 clocks = <&ssc1_clk>;
 834                                 clock-names = "pclk";
 835                                 status = "disabled";
 836                         };
 837
 838                         ac97: sound@fffa0000 {
 839                                 compatible = "atmel,at91sam9263-ac97c";
 840                                 reg = <0xfffa0000 0x4000>;
 841                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
 842                                 pinctrl-names = "default";
 843                                 pinctrl-0 = <&pinctrl_ac97>;
 844                                 clocks = <&ac97_clk>;
 845                                 clock-names = "ac97_clk";
 846                                 status = "disabled";
 847                         };
 848
 849                         macb0: ethernet@fffbc000 {
 850                                 compatible = "cdns,at91sam9260-macb", "cdns,macb";
 851                                 reg = <0xfffbc000 0x100>;
 852                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
 853                                 pinctrl-names = "default";
 854                                 pinctrl-0 = <&pinctrl_macb_rmii>;
 855                                 clocks = <&macb0_clk>, <&macb0_clk>;
 856                                 clock-names = "hclk", "pclk";
 857                                 status = "disabled";
 858                         };
 859
 860                         usb1: gadget@fff78000 {
 861                                 compatible = "atmel,at91sam9263-udc";
 862                                 reg = <0xfff78000 0x4000>;
 863                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
 864                                 clocks = <&udc_clk>, <&udpck>;
 865                                 clock-names = "pclk", "hclk";
 866                                 status = "disabled";
 867                         };
 868
 869                         i2c0: i2c@fff88000 {
 870                                 compatible = "atmel,at91sam9260-i2c";
 871                                 reg = <0xfff88000 0x100>;
 872                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
 873                                 #address-cells = <1>;
 874                                 #size-cells = <0>;
 875                                 clocks = <&twi0_clk>;
 876                                 status = "disabled";
 877                         };
 878
 879                         mmc0: mmc@fff80000 {
 880                                 compatible = "atmel,hsmci";
 881                                 reg = <0xfff80000 0x600>;
 882                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
 883                                 pinctrl-names = "default";
 884                                 #address-cells = <1>;
 885                                 #size-cells = <0>;
 886                                 clocks = <&mci0_clk>;
 887                                 clock-names = "mci_clk";
 888                                 status = "disabled";
 889                         };
 890
 891                         mmc1: mmc@fff84000 {
 892                                 compatible = "atmel,hsmci";
 893                                 reg = <0xfff84000 0x600>;
 894                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
 895                                 pinctrl-names = "default";
 896                                 #address-cells = <1>;
 897                                 #size-cells = <0>;
 898                                 clocks = <&mci1_clk>;
 899                                 clock-names = "mci_clk";
 900                                 status = "disabled";
 901                         };
 902
 903                         watchdog@fffffd40 {
 904                                 compatible = "atmel,at91sam9260-wdt";
 905                                 reg = <0xfffffd40 0x10>;
 906                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 907                                 clocks = <&slow_xtal>;
 908                                 atmel,watchdog-type = "hardware";
 909                                 atmel,reset-type = "all";
 910                                 atmel,dbg-halt;
 911                                 status = "disabled";
 912                         };
 913
 914                         spi0: spi@fffa4000 {
 915                                 #address-cells = <1>;
 916                                 #size-cells = <0>;
 917                                 compatible = "atmel,at91rm9200-spi";
 918                                 reg = <0xfffa4000 0x200>;
 919                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
 920                                 pinctrl-names = "default";
 921                                 pinctrl-0 = <&pinctrl_spi0>;
 922                                 clocks = <&spi0_clk>;
 923                                 clock-names = "spi_clk";
 924                                 status = "disabled";
 925                         };
 926
 927                         spi1: spi@fffa8000 {
 928                                 #address-cells = <1>;
 929                                 #size-cells = <0>;
 930                                 compatible = "atmel,at91rm9200-spi";
 931                                 reg = <0xfffa8000 0x200>;
 932                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
 933                                 pinctrl-names = "default";
 934                                 pinctrl-0 = <&pinctrl_spi1>;
 935                                 clocks = <&spi1_clk>;
 936                                 clock-names = "spi_clk";
 937                                 status = "disabled";
 938                         };
 939
 940                         pwm0: pwm@fffb8000 {
 941                                 compatible = "atmel,at91sam9rl-pwm";
 942                                 reg = <0xfffb8000 0x300>;
 943                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
 944                                 #pwm-cells = <3>;
 945                                 clocks = <&pwm_clk>;
 946                                 clock-names = "pwm_clk";
 947                                 status = "disabled";
 948                         };
 949
 950                         can: can@fffac000 {
 951                                 compatible = "atmel,at91sam9263-can";
 952                                 reg = <0xfffac000 0x300>;
 953                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
 954                                 pinctrl-names = "default";
 955                                 pinctrl-0 = <&pinctrl_can_rx_tx>;
 956                                 clocks = <&can_clk>;
 957                                 clock-names = "can_clk";
 958                         };
 959
 960                         rtc@fffffd20 {
 961                                 compatible = "atmel,at91sam9260-rtt";
 962                                 reg = <0xfffffd20 0x10>;
 963                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 964                                 clocks = <&slow_xtal>;
 965                                 status = "disabled";
 966                         };
 967
 968                         rtc@fffffd50 {
 969                                 compatible = "atmel,at91sam9260-rtt";
 970                                 reg = <0xfffffd50 0x10>;
 971                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 972                                 clocks = <&slow_xtal>;
 973                                 status = "disabled";
 974                         };
 975
 976                         gpbr: syscon@fffffd60 {
 977                                 compatible = "atmel,at91sam9260-gpbr", "syscon";
 978                                 reg = <0xfffffd60 0x50>;
 979                                 status = "disabled";
 980                         };
 981                 };
 982
 983                 fb0: fb@0x00700000 {
 984                         compatible = "atmel,at91sam9263-lcdc";
 985                         reg = <0x00700000 0x1000>;
 986                         interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
 987                         pinctrl-names = "default";
 988                         pinctrl-0 = <&pinctrl_fb>;
 989                         clocks = <&lcd_clk>, <&lcd_clk>;
 990                         clock-names = "lcdc_clk", "hclk";
 991                         status = "disabled";
 992                 };
 993
 994                 nand0: nand@40000000 {
 995                         compatible = "atmel,at91rm9200-nand";
 996                         #address-cells = <1>;
 997                         #size-cells = <1>;
 998                         reg = <0x40000000 0x10000000
 999                                0xffffe000 0x200
1000                               >;
1001                         atmel,nand-addr-offset = <21>;
1002                         atmel,nand-cmd-offset = <22>;
1003                         pinctrl-names = "default";
1004                         pinctrl-0 = <&pinctrl_nand>;
1005                         gpios = <&pioA 22 GPIO_ACTIVE_HIGH
1006                                  &pioD 15 GPIO_ACTIVE_HIGH
1007                                  0
1008                                 >;
1009                         status = "disabled";
1010                 };
1011
1012                 usb0: ohci@00a00000 {
1013                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1014                         reg = <0x00a00000 0x100000>;
1015                         interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
1016                         clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1017                         clock-names = "ohci_clk", "hclk", "uhpck";
1018                         status = "disabled";
1019                 };
1020         };
1021
1022         i2c@0 {
1023                 compatible = "i2c-gpio";
1024                 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1025                          &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1026                         >;
1027                 i2c-gpio,sda-open-drain;
1028                 i2c-gpio,scl-open-drain;
1029                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1030                 #address-cells = <1>;
1031                 #size-cells = <0>;
1032                 status = "disabled";
1033         };
1034 };