arch/arm/boot/dts/imx6qdl-sabrelite.dtsi

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * This file is dual-licensed: you can use it either under the terms
   6  * of the GPL or the X11 license, at your option. Note that this dual
   7  * licensing only applies to this file, and not this project as a
   8  * whole.
   9  *
  10  *  a) This file is free software; you can redistribute it and/or
  11  *     modify it under the terms of the GNU General Public License
  12  *     version 2 as published by the Free Software Foundation.
  13  *
  14  *     This file is distributed in the hope that it will be useful
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42 #include <dt-bindings/gpio/gpio.h>
  43 #include <dt-bindings/input/input.h>
  44
  45 / {
  46         chosen {
  47                 stdout-path = &uart2;
  48         };
  49
  50         memory {
  51                 reg = <0x10000000 0x40000000>;
  52         };
  53
  54         regulators {
  55                 compatible = "simple-bus";
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 reg_2p5v: regulator@0 {
  60                         compatible = "regulator-fixed";
  61                         reg = <0>;
  62                         regulator-name = "2P5V";
  63                         regulator-min-microvolt = <2500000>;
  64                         regulator-max-microvolt = <2500000>;
  65                         regulator-always-on;
  66                 };
  67
  68                 reg_3p3v: regulator@1 {
  69                         compatible = "regulator-fixed";
  70                         reg = <1>;
  71                         regulator-name = "3P3V";
  72                         regulator-min-microvolt = <3300000>;
  73                         regulator-max-microvolt = <3300000>;
  74                         regulator-always-on;
  75                 };
  76
  77                 reg_usb_otg_vbus: regulator@2 {
  78                         compatible = "regulator-fixed";
  79                         reg = <2>;
  80                         regulator-name = "usb_otg_vbus";
  81                         regulator-min-microvolt = <5000000>;
  82                         regulator-max-microvolt = <5000000>;
  83                         gpio = <&gpio3 22 0>;
  84                         enable-active-high;
  85                 };
  86
  87                 reg_can_xcvr: regulator@3 {
  88                         compatible = "regulator-fixed";
  89                         reg = <3>;
  90                         regulator-name = "CAN XCVR";
  91                         regulator-min-microvolt = <3300000>;
  92                         regulator-max-microvolt = <3300000>;
  93                         pinctrl-names = "default";
  94                         pinctrl-0 = <&pinctrl_can_xcvr>;
  95                         gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
  96                 };
  97         };
  98
  99         gpio-keys {
 100                 compatible = "gpio-keys";
 101                 pinctrl-names = "default";
 102                 pinctrl-0 = <&pinctrl_gpio_keys>;
 103
 104                 power {
 105                         label = "Power Button";
 106                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
 107                         linux,code = <KEY_POWER>;
 108                         gpio-key,wakeup;
 109                 };
 110
 111                 menu {
 112                         label = "Menu";
 113                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 114                         linux,code = <KEY_MENU>;
 115                 };
 116
 117                 home {
 118                         label = "Home";
 119                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
 120                         linux,code = <KEY_HOME>;
 121                 };
 122
 123                 back {
 124                         label = "Back";
 125                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
 126                         linux,code = <KEY_BACK>;
 127                 };
 128
 129                 volume-up {
 130                         label = "Volume Up";
 131                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
 132                         linux,code = <KEY_VOLUMEUP>;
 133                 };
 134
 135                 volume-down {
 136                         label = "Volume Down";
 137                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
 138                         linux,code = <KEY_VOLUMEDOWN>;
 139                 };
 140         };
 141
 142         sound {
 143                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
 144                              "fsl,imx-audio-sgtl5000";
 145                 model = "imx6q-sabrelite-sgtl5000";
 146                 ssi-controller = <&ssi1>;
 147                 audio-codec = <&codec>;
 148                 audio-routing =
 149                         "MIC_IN", "Mic Jack",
 150                         "Mic Jack", "Mic Bias",
 151                         "Headphone Jack", "HP_OUT";
 152                 mux-int-port = <1>;
 153                 mux-ext-port = <4>;
 154         };
 155
 156         backlight_lcd: backlight_lcd {
 157                 compatible = "pwm-backlight";
 158                 pwms = <&pwm1 0 5000000>;
 159                 brightness-levels = <0 4 8 16 32 64 128 255>;
 160                 default-brightness-level = <7>;
 161                 power-supply = <&reg_3p3v>;
 162                 status = "okay";
 163         };
 164
 165         backlight_lvds: backlight_lvds {
 166                 compatible = "pwm-backlight";
 167                 pwms = <&pwm4 0 5000000>;
 168                 brightness-levels = <0 4 8 16 32 64 128 255>;
 169                 default-brightness-level = <7>;
 170                 power-supply = <&reg_3p3v>;
 171                 status = "okay";
 172         };
 173
 174         lcd_display: display@di0 {
 175                 compatible = "fsl,imx-parallel-display";
 176                 #address-cells = <1>;
 177                 #size-cells = <0>;
 178                 interface-pix-fmt = "bgr666";
 179                 pinctrl-names = "default";
 180                 pinctrl-0 = <&pinctrl_j15>;
 181                 status = "okay";
 182
 183                 port@0 {
 184                         reg = <0>;
 185
 186                         lcd_display_in: endpoint {
 187                                 remote-endpoint = <&ipu1_di0_disp0>;
 188                         };
 189                 };
 190
 191                 port@1 {
 192                         reg = <1>;
 193
 194                         lcd_display_out: endpoint {
 195                                 remote-endpoint = <&lcd_panel_in>;
 196                         };
 197                 };
 198         };
 199
 200         lcd_panel {
 201                 compatible = "okaya,rs800480t-7x0gp";
 202                 backlight = <&backlight_lcd>;
 203
 204                 port {
 205                         lcd_panel_in: endpoint {
 206                                 remote-endpoint = <&lcd_display_out>;
 207                         };
 208                 };
 209         };
 210
 211         panel {
 212                 compatible = "hannstar,hsd100pxn1";
 213                 backlight = <&backlight_lvds>;
 214
 215                 port {
 216                         panel_in: endpoint {
 217                                 remote-endpoint = <&lvds0_out>;
 218                         };
 219                 };
 220         };
 221 };
 222
 223 &audmux {
 224         pinctrl-names = "default";
 225         pinctrl-0 = <&pinctrl_audmux>;
 226         status = "okay";
 227 };
 228
 229 &can1 {
 230         pinctrl-names = "default";
 231         pinctrl-0 = <&pinctrl_can1>;
 232         xceiver-supply = <&reg_can_xcvr>;
 233         status = "okay";
 234 };
 235
 236 &clks {
 237         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 238                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 239         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 240                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 241 };
 242
 243 &ecspi1 {
 244         fsl,spi-num-chipselects = <1>;
 245         cs-gpios = <&gpio3 19 0>;
 246         pinctrl-names = "default";
 247         pinctrl-0 = <&pinctrl_ecspi1>;
 248         status = "okay";
 249
 250         flash: m25p80@0 {
 251                 compatible = "sst,sst25vf016b", "jedec,spi-nor";
 252                 spi-max-frequency = <20000000>;
 253                 reg = <0>;
 254         };
 255 };
 256
 257 &fec {
 258         pinctrl-names = "default";
 259         pinctrl-0 = <&pinctrl_enet>;
 260         phy-mode = "rgmii";
 261         phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 262         txen-skew-ps = <0>;
 263         txc-skew-ps = <3000>;
 264         rxdv-skew-ps = <0>;
 265         rxc-skew-ps = <3000>;
 266         rxd0-skew-ps = <0>;
 267         rxd1-skew-ps = <0>;
 268         rxd2-skew-ps = <0>;
 269         rxd3-skew-ps = <0>;
 270         txd0-skew-ps = <0>;
 271         txd1-skew-ps = <0>;
 272         txd2-skew-ps = <0>;
 273         txd3-skew-ps = <0>;
 274         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 275                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 276         status = "okay";
 277 };
 278
 279 &hdmi {
 280         ddc-i2c-bus = <&i2c2>;
 281         status = "okay";
 282 };
 283
 284 &i2c1 {
 285         clock-frequency = <100000>;
 286         pinctrl-names = "default";
 287         pinctrl-0 = <&pinctrl_i2c1>;
 288         status = "okay";
 289
 290         codec: sgtl5000@0a {
 291                 compatible = "fsl,sgtl5000";
 292                 reg = <0x0a>;
 293                 clocks = <&clks 201>;
 294                 VDDA-supply = <&reg_2p5v>;
 295                 VDDIO-supply = <&reg_3p3v>;
 296         };
 297 };
 298
 299 &i2c2 {
 300         clock-frequency = <100000>;
 301         pinctrl-names = "default";
 302         pinctrl-0 = <&pinctrl_i2c2>;
 303         status = "okay";
 304 };
 305
 306 &i2c3 {
 307         clock-frequency = <100000>;
 308         pinctrl-names = "default";
 309         pinctrl-0 = <&pinctrl_i2c3>;
 310         status = "okay";
 311 };
 312
 313 &iomuxc {
 314         pinctrl-names = "default";
 315         pinctrl-0 = <&pinctrl_hog>;
 316
 317         imx6q-sabrelite {
 318                 pinctrl_hog: hoggrp {
 319                         fsl,pins = <
 320                                 /* SGTL5000 sys_mclk */
 321                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
 322                         >;
 323                 };
 324
 325                 pinctrl_audmux: audmuxgrp {
 326                         fsl,pins = <
 327                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 328                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 329                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 330                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 331                         >;
 332                 };
 333
 334                 pinctrl_can1: can1grp {
 335                         fsl,pins = <
 336                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b0
 337                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b0
 338                         >;
 339                 };
 340
 341                 pinctrl_can_xcvr: can-xcvrgrp {
 342                         fsl,pins = <
 343                                 /* Flexcan XCVR enable */
 344                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1b0b0
 345                         >;
 346                 };
 347
 348                 pinctrl_ecspi1: ecspi1grp {
 349                         fsl,pins = <
 350                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 351                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 352                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 353                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
 354                         >;
 355                 };
 356
 357                 pinctrl_enet: enetgrp {
 358                         fsl,pins = <
 359                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 360                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 361                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
 362                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
 363                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
 364                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
 365                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
 366                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
 367                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 368                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 369                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 370                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 371                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 372                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 373                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 374                                 /* Phy reset */
 375                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x000b0
 376                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 377                         >;
 378                 };
 379
 380                 pinctrl_gpio_keys: gpio_keysgrp {
 381                         fsl,pins = <
 382                                 /* Power Button */
 383                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 384                                 /* Menu Button */
 385                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 386                                 /* Home Button */
 387                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 388                                 /* Back Button */
 389                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
 390                                 /* Volume Up Button */
 391                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 392                                 /* Volume Down Button */
 393                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 394                         >;
 395                 };
 396
 397                 pinctrl_i2c1: i2c1grp {
 398                         fsl,pins = <
 399                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 400                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 401                         >;
 402                 };
 403
 404                 pinctrl_i2c2: i2c2grp {
 405                         fsl,pins = <
 406                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 407                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 408                         >;
 409                 };
 410
 411                 pinctrl_i2c3: i2c3grp {
 412                         fsl,pins = <
 413                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 414                                 MX6QDL_PAD_GPIO_16__I2C3_SDA            0x4001b8b1
 415                         >;
 416                 };
 417
 418                 pinctrl_j15: j15grp {
 419                         fsl,pins = <
 420                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
 421                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
 422                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
 423                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
 424                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
 425                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
 426                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
 427                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
 428                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
 429                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
 430                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
 431                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
 432                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
 433                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
 434                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
 435                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
 436                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
 437                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
 438                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
 439                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
 440                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
 441                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
 442                                 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
 443                                 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
 444                                 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
 445                                 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
 446                                 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
 447                                 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
 448                         >;
 449                 };
 450
 451                 pinctrl_pwm1: pwm1grp {
 452                         fsl,pins = <
 453                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
 454                         >;
 455                 };
 456
 457                 pinctrl_pwm3: pwm3grp {
 458                         fsl,pins = <
 459                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
 460                         >;
 461                 };
 462
 463                 pinctrl_pwm4: pwm4grp {
 464                         fsl,pins = <
 465                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
 466                         >;
 467                 };
 468
 469                 pinctrl_uart1: uart1grp {
 470                         fsl,pins = <
 471                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 472                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 473                         >;
 474                 };
 475
 476                 pinctrl_uart2: uart2grp {
 477                         fsl,pins = <
 478                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 479                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 480                         >;
 481                 };
 482
 483                 pinctrl_usbotg: usbotggrp {
 484                         fsl,pins = <
 485                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 486                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
 487                                 /* power enable, high active */
 488                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
 489                         >;
 490                 };
 491
 492                 pinctrl_usdhc3: usdhc3grp {
 493                         fsl,pins = <
 494                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 495                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 496                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 497                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 498                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 499                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 500                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
 501                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
 502                         >;
 503                 };
 504
 505                 pinctrl_usdhc4: usdhc4grp {
 506                         fsl,pins = <
 507                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 508                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 509                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 510                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 511                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 512                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 513                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
 514                         >;
 515                 };
 516         };
 517 };
 518
 519 &ipu1_di0_disp0 {
 520         remote-endpoint = <&lcd_display_in>;
 521 };
 522
 523 &ldb {
 524         status = "okay";
 525
 526         lvds-channel@0 {
 527                 fsl,data-mapping = "spwg";
 528                 fsl,data-width = <18>;
 529                 status = "okay";
 530
 531                 port@4 {
 532                         reg = <4>;
 533
 534                         lvds0_out: endpoint {
 535                                 remote-endpoint = <&panel_in>;
 536                         };
 537                 };
 538         };
 539 };
 540
 541 &pcie {
 542         status = "okay";
 543 };
 544
 545 &pwm1 {
 546         pinctrl-names = "default";
 547         pinctrl-0 = <&pinctrl_pwm1>;
 548         status = "okay";
 549 };
 550
 551 &pwm3 {
 552         pinctrl-names = "default";
 553         pinctrl-0 = <&pinctrl_pwm3>;
 554         status = "okay";
 555 };
 556
 557 &pwm4 {
 558         pinctrl-names = "default";
 559         pinctrl-0 = <&pinctrl_pwm4>;
 560         status = "okay";
 561 };
 562
 563 &ssi1 {
 564         status = "okay";
 565 };
 566
 567 &uart1 {
 568         pinctrl-names = "default";
 569         pinctrl-0 = <&pinctrl_uart1>;
 570         status = "okay";
 571 };
 572
 573 &uart2 {
 574         pinctrl-names = "default";
 575         pinctrl-0 = <&pinctrl_uart2>;
 576         status = "okay";
 577 };
 578
 579 &usbh1 {
 580         status = "okay";
 581 };
 582
 583 &usbotg {
 584         vbus-supply = <&reg_usb_otg_vbus>;
 585         pinctrl-names = "default";
 586         pinctrl-0 = <&pinctrl_usbotg>;
 587         disable-over-current;
 588         status = "okay";
 589 };
 590
 591 &usdhc3 {
 592         pinctrl-names = "default";
 593         pinctrl-0 = <&pinctrl_usdhc3>;
 594         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 595         wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
 596         vmmc-supply = <&reg_3p3v>;
 597         status = "okay";
 598 };
 599
 600 &usdhc4 {
 601         pinctrl-names = "default";
 602         pinctrl-0 = <&pinctrl_usdhc4>;
 603         cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
 604         vmmc-supply = <&reg_3p3v>;
 605         status = "okay";
 606 };