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1 /*
2  * Common device tree for IGEP boards based on AM/DM37x
3  *
4  * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
5  * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 /dts-v1/;
12
13 #include "omap36xx.dtsi"
14
15 / {
16         memory {
17                 device_type = "memory";
18                 reg = <0x80000000 0x20000000>; /* 512 MB */
19         };
20
21         sound {
22                 compatible = "ti,omap-twl4030";
23                 ti,model = "igep2";
24                 ti,mcbsp = <&mcbsp2>;
25         };
26
27         vdd33: regulator-vdd33 {
28                 compatible = "regulator-fixed";
29                 regulator-name = "vdd33";
30                 regulator-always-on;
31         };
32
33 };
34
35 &omap3_pmx_core {
36         uart1_pins: pinmux_uart1_pins {
37                 pinctrl-single,pins = <
38                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)        /* uart1_rx.uart1_rx */
39                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)       /* uart1_tx.uart1_tx */
40                 >;
41         };
42
43         uart3_pins: pinmux_uart3_pins {
44                 pinctrl-single,pins = <
45                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)        /* uart3_rx.uart3_rx */
46                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)       /* uart3_tx.uart3_tx */
47                 >;
48         };
49
50         mcbsp2_pins: pinmux_mcbsp2_pins {
51                 pinctrl-single,pins = <
52                         OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx.mcbsp2_fsx */
53                         OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx.mcbsp2_clkx */
54                         OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr.mcbsp2.dr */
55                         OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx.mcbsp2_dx */
56                 >;
57         };
58
59         mmc1_pins: pinmux_mmc1_pins {
60                 pinctrl-single,pins = <
61                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
62                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
63                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
64                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
65                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
66                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
67                 >;
68         };
69
70         mmc2_pins: pinmux_mmc2_pins {
71                 pinctrl-single,pins = <
72                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
73                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
74                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
75                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
76                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
77                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
78                 >;
79         };
80
81         i2c1_pins: pinmux_i2c1_pins {
82                 pinctrl-single,pins = <
83                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */
84                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */
85                 >;
86         };
87
88         i2c3_pins: pinmux_i2c3_pins {
89                 pinctrl-single,pins = <
90                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)        /* i2c3_scl.i2c3_scl */
91                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)        /* i2c3_sda.i2c3_sda */
92                 >;
93         };
94 };
95
96 &gpmc {
97         nand@0,0 {
98                 linux,mtd-name= "micron,mt29c4g96maz";
99                 reg = <0 0 4>;  /* CS0, offset 0, IO size 4 */
100                 nand-bus-width = <16>;
101                 gpmc,device-width = <2>;
102                 ti,nand-ecc-opt = "bch8";
103
104                 gpmc,sync-clk-ps = <0>;
105                 gpmc,cs-on-ns = <0>;
106                 gpmc,cs-rd-off-ns = <44>;
107                 gpmc,cs-wr-off-ns = <44>;
108                 gpmc,adv-on-ns = <6>;
109                 gpmc,adv-rd-off-ns = <34>;
110                 gpmc,adv-wr-off-ns = <44>;
111                 gpmc,we-off-ns = <40>;
112                 gpmc,oe-off-ns = <54>;
113                 gpmc,access-ns = <64>;
114                 gpmc,rd-cycle-ns = <82>;
115                 gpmc,wr-cycle-ns = <82>;
116                 gpmc,wr-access-ns = <40>;
117                 gpmc,wr-data-mux-bus-ns = <0>;
118
119                 #address-cells = <1>;
120                 #size-cells = <1>;
121
122                 partition@0 {
123                         label = "SPL";
124                         reg = <0 0x100000>;
125                 };
126                 partition@80000 {
127                         label = "U-Boot";
128                         reg = <0x100000 0x180000>;
129                 };
130                 partition@1c0000 {
131                         label = "Environment";
132                         reg = <0x280000 0x100000>;
133                 };
134                 partition@280000 {
135                         label = "Kernel";
136                         reg = <0x380000 0x300000>;
137                 };
138                 partition@780000 {
139                         label = "Filesystem";
140                         reg = <0x680000 0x1f980000>;
141                 };
142         };
143 };
144
145 &i2c1 {
146         pinctrl-names = "default";
147         pinctrl-0 = <&i2c1_pins>;
148         clock-frequency = <2600000>;
149
150         twl: twl@48 {
151                 reg = <0x48>;
152                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
153                 interrupt-parent = <&intc>;
154
155                 twl_audio: audio {
156                         compatible = "ti,twl4030-audio";
157                         codec {
158                         };
159                 };
160         };
161 };
162
163 #include "twl4030.dtsi"
164 #include "twl4030_omap3.dtsi"
165
166 &i2c3 {
167         pinctrl-names = "default";
168         pinctrl-0 = <&i2c3_pins>;
169 };
170
171 &mcbsp2 {
172         pinctrl-names = "default";
173         pinctrl-0 = <&mcbsp2_pins>;
174         status = "okay";
175 };
176
177 &mmc1 {
178         pinctrl-names = "default";
179         pinctrl-0 = <&mmc1_pins>;
180         vmmc-supply = <&vmmc1>;
181         vmmc_aux-supply = <&vsim>;
182         bus-width = <4>;
183 };
184
185 &mmc3 {
186         status = "disabled";
187 };
188
189 &uart1 {
190         pinctrl-names = "default";
191         pinctrl-0 = <&uart1_pins>;
192 };
193
194 &uart3 {
195         pinctrl-names = "default";
196         pinctrl-0 = <&uart3_pins>;
197 };
198
199 &twl_gpio {
200         ti,use-leds;
201 };
202
203 &usb_otg_hs {
204         interface-type = <0>;
205         usb-phy = <&usb2_phy>;
206         phys = <&usb2_phy>;
207         phy-names = "usb2-phy";
208         mode = <3>;
209         power = <50>;
210 };