arch/arm/boot/dts/tegra124-venice2.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra124.dtsi"
   5
   6 / {
   7         model = "NVIDIA Tegra124 Venice2";
   8         compatible = "nvidia,venice2", "nvidia,tegra124";
   9
  10         aliases {
  11                 rtc0 = "/i2c@0,7000d000/pmic@40";
  12                 rtc1 = "/rtc@0,7000e000";
  13                 serial0 = &uarta;
  14         };
  15
  16         memory {
  17                 reg = <0x0 0x80000000 0x0 0x80000000>;
  18         };
  19
  20         host1x@0,50000000 {
  21                 hdmi@0,54280000 {
  22                         status = "okay";
  23
  24                         vdd-supply = <&vdd_3v3_hdmi>;
  25                         pll-supply = <&vdd_hdmi_pll>;
  26                         hdmi-supply = <&vdd_5v0_hdmi>;
  27
  28                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  29                         nvidia,hpd-gpio =
  30                                 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  31                 };
  32
  33                 sor@0,54540000 {
  34                         status = "okay";
  35
  36                         nvidia,dpaux = <&dpaux>;
  37                         nvidia,panel = <&panel>;
  38                 };
  39
  40                 dpaux@0,545c0000 {
  41                         vdd-supply = <&vdd_3v3_panel>;
  42                         status = "okay";
  43                 };
  44         };
  45
  46         gpu@0,57000000 {
  47                 /*
  48                  * Node left disabled on purpose - the bootloader will enable
  49                  * it after having set the VPR up
  50                  */
  51                 vdd-supply = <&vdd_gpu>;
  52         };
  53
  54         pinmux: pinmux@0,70000868 {
  55                 pinctrl-names = "boot";
  56                 pinctrl-0 = <&pinmux_boot>;
  57
  58                 pinmux_boot: common {
  59                         dap_mclk1_pw4 {
  60                                 nvidia,pins = "dap_mclk1_pw4";
  61                                 nvidia,function = "extperiph1";
  62                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  63                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  64                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  65                         };
  66                         dap1_din_pn1 {
  67                                 nvidia,pins = "dap1_din_pn1";
  68                                 nvidia,function = "i2s0";
  69                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  70                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  71                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  72                         };
  73                         dap1_dout_pn2 {
  74                                 nvidia,pins = "dap1_dout_pn2",
  75                                               "dap1_fs_pn0",
  76                                               "dap1_sclk_pn3";
  77                                 nvidia,function = "i2s0";
  78                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  79                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  80                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  81                         };
  82                         dap2_din_pa4 {
  83                                 nvidia,pins = "dap2_din_pa4";
  84                                 nvidia,function = "i2s1";
  85                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
  86                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  87                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  88                         };
  89                         dap2_dout_pa5 {
  90                                 nvidia,pins = "dap2_dout_pa5",
  91                                               "dap2_fs_pa2",
  92                                               "dap2_sclk_pa3";
  93                                 nvidia,function = "i2s1";
  94                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
  95                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  96                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  97                         };
  98                         dvfs_pwm_px0 {
  99                                 nvidia,pins = "dvfs_pwm_px0",
 100                                               "dvfs_clk_px2";
 101                                 nvidia,function = "cldvfs";
 102                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 103                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 104                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 105                         };
 106                         ulpi_clk_py0 {
 107                                 nvidia,pins = "ulpi_clk_py0",
 108                                               "ulpi_nxt_py2",
 109                                               "ulpi_stp_py3";
 110                                 nvidia,function = "spi1";
 111                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 112                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 113                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 114                         };
 115                         ulpi_dir_py1 {
 116                                 nvidia,pins = "ulpi_dir_py1";
 117                                 nvidia,function = "spi1";
 118                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 119                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 120                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 121                         };
 122                         cam_i2c_scl_pbb1 {
 123                                 nvidia,pins = "cam_i2c_scl_pbb1",
 124                                               "cam_i2c_sda_pbb2";
 125                                 nvidia,function = "i2c3";
 126                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 127                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 128                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 129                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 130                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 131                         };
 132                         gen2_i2c_scl_pt5 {
 133                                 nvidia,pins = "gen2_i2c_scl_pt5",
 134                                               "gen2_i2c_sda_pt6";
 135                                 nvidia,function = "i2c2";
 136                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 137                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 138                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 139                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 140                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 141                         };
 142                         pg4 {
 143                                 nvidia,pins = "pg4",
 144                                               "pg5",
 145                                               "pg6",
 146                                               "pi3";
 147                                 nvidia,function = "spi4";
 148                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 149                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 150                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 151                         };
 152                         pg7 {
 153                                 nvidia,pins = "pg7";
 154                                 nvidia,function = "spi4";
 155                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 156                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 157                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 158                         };
 159                         ph1 {
 160                                 nvidia,pins = "ph1";
 161                                 nvidia,function = "pwm1";
 162                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 163                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 164                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 165                         };
 166                         pk0 {
 167                                 nvidia,pins = "pk0",
 168                                               "kb_row15_ps7",
 169                                               "clk_32k_out_pa0";
 170                                 nvidia,function = "soc";
 171                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 172                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 173                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 174                         };
 175                         sdmmc1_clk_pz0 {
 176                                 nvidia,pins = "sdmmc1_clk_pz0";
 177                                 nvidia,function = "sdmmc1";
 178                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 179                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 180                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 181                         };
 182                         sdmmc1_cmd_pz1 {
 183                                 nvidia,pins = "sdmmc1_cmd_pz1",
 184                                               "sdmmc1_dat0_py7",
 185                                               "sdmmc1_dat1_py6",
 186                                               "sdmmc1_dat2_py5",
 187                                               "sdmmc1_dat3_py4";
 188                                 nvidia,function = "sdmmc1";
 189                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 190                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 191                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 192                         };
 193                         sdmmc3_clk_pa6 {
 194                                 nvidia,pins = "sdmmc3_clk_pa6";
 195                                 nvidia,function = "sdmmc3";
 196                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 197                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 198                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 199                         };
 200                         sdmmc3_cmd_pa7 {
 201                                 nvidia,pins = "sdmmc3_cmd_pa7",
 202                                               "sdmmc3_dat0_pb7",
 203                                               "sdmmc3_dat1_pb6",
 204                                               "sdmmc3_dat2_pb5",
 205                                               "sdmmc3_dat3_pb4",
 206                                               "sdmmc3_clk_lb_out_pee4",
 207                                               "sdmmc3_clk_lb_in_pee5";
 208                                 nvidia,function = "sdmmc3";
 209                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 210                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 211                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 212                         };
 213                         sdmmc4_clk_pcc4 {
 214                                 nvidia,pins = "sdmmc4_clk_pcc4";
 215                                 nvidia,function = "sdmmc4";
 216                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 217                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 218                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 219                         };
 220                         sdmmc4_cmd_pt7 {
 221                                 nvidia,pins = "sdmmc4_cmd_pt7",
 222                                               "sdmmc4_dat0_paa0",
 223                                               "sdmmc4_dat1_paa1",
 224                                               "sdmmc4_dat2_paa2",
 225                                               "sdmmc4_dat3_paa3",
 226                                               "sdmmc4_dat4_paa4",
 227                                               "sdmmc4_dat5_paa5",
 228                                               "sdmmc4_dat6_paa6",
 229                                               "sdmmc4_dat7_paa7";
 230                                 nvidia,function = "sdmmc4";
 231                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 232                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 233                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 234                         };
 235                         pwr_i2c_scl_pz6 {
 236                                 nvidia,pins = "pwr_i2c_scl_pz6",
 237                                               "pwr_i2c_sda_pz7";
 238                                 nvidia,function = "i2cpwr";
 239                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 240                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 241                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 242                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 243                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 244                         };
 245                         jtag_rtck {
 246                                 nvidia,pins = "jtag_rtck";
 247                                 nvidia,function = "rtck";
 248                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 249                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 250                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 251                         };
 252                         clk_32k_in {
 253                                 nvidia,pins = "clk_32k_in";
 254                                 nvidia,function = "clk";
 255                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 256                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 257                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 258                         };
 259                         core_pwr_req {
 260                                 nvidia,pins = "core_pwr_req";
 261                                 nvidia,function = "pwron";
 262                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 263                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 264                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 265                         };
 266                         cpu_pwr_req {
 267                                 nvidia,pins = "cpu_pwr_req";
 268                                 nvidia,function = "cpu";
 269                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 270                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 271                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 272                         };
 273                         pwr_int_n {
 274                                 nvidia,pins = "pwr_int_n";
 275                                 nvidia,function = "pmi";
 276                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 277                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 278                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 279                         };
 280                         reset_out_n {
 281                                 nvidia,pins = "reset_out_n";
 282                                 nvidia,function = "reset_out_n";
 283                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 284                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 285                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 286                         };
 287                         clk3_out_pee0 {
 288                                 nvidia,pins = "clk3_out_pee0";
 289                                 nvidia,function = "extperiph3";
 290                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 291                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 292                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 293                         };
 294                         dap4_din_pp5 {
 295                                 nvidia,pins = "dap4_din_pp5";
 296                                 nvidia,function = "i2s3";
 297                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 298                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 299                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 300                         };
 301                         dap4_dout_pp6 {
 302                                 nvidia,pins = "dap4_dout_pp6",
 303                                               "dap4_fs_pp4",
 304                                               "dap4_sclk_pp7";
 305                                 nvidia,function = "i2s3";
 306                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 307                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 308                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 309                         };
 310                         gen1_i2c_sda_pc5 {
 311                                 nvidia,pins = "gen1_i2c_sda_pc5",
 312                                               "gen1_i2c_scl_pc4";
 313                                 nvidia,function = "i2c1";
 314                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 315                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 316                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 317                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 318                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 319                         };
 320                         uart2_cts_n_pj5 {
 321                                 nvidia,pins = "uart2_cts_n_pj5";
 322                                 nvidia,function = "uartb";
 323                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 324                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 325                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 326                         };
 327                         uart2_rts_n_pj6 {
 328                                 nvidia,pins = "uart2_rts_n_pj6";
 329                                 nvidia,function = "uartb";
 330                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 331                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 332                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 333                         };
 334                         uart2_rxd_pc3 {
 335                                 nvidia,pins = "uart2_rxd_pc3";
 336                                 nvidia,function = "irda";
 337                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 338                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 339                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 340                         };
 341                         uart2_txd_pc2 {
 342                                 nvidia,pins = "uart2_txd_pc2";
 343                                 nvidia,function = "irda";
 344                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 345                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 346                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 347                         };
 348                         uart3_cts_n_pa1 {
 349                                 nvidia,pins = "uart3_cts_n_pa1",
 350                                               "uart3_rxd_pw7";
 351                                 nvidia,function = "uartc";
 352                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 353                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 354                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 355                         };
 356                         uart3_rts_n_pc0 {
 357                                 nvidia,pins = "uart3_rts_n_pc0",
 358                                               "uart3_txd_pw6";
 359                                 nvidia,function = "uartc";
 360                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 361                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 362                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 363                         };
 364                         hdmi_cec_pee3 {
 365                                 nvidia,pins = "hdmi_cec_pee3";
 366                                 nvidia,function = "cec";
 367                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 368                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 369                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 370                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 371                                 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
 372                         };
 373                         hdmi_int_pn7 {
 374                                 nvidia,pins = "hdmi_int_pn7";
 375                                 nvidia,function = "rsvd1";
 376                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 377                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 378                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 379                         };
 380                         ddc_scl_pv4 {
 381                                 nvidia,pins = "ddc_scl_pv4",
 382                                               "ddc_sda_pv5";
 383                                 nvidia,function = "i2c4";
 384                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 385                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 386                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 387                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 388                                 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
 389                         };
 390                         pj7 {
 391                                 nvidia,pins = "pj7",
 392                                               "pk7";
 393                                 nvidia,function = "uartd";
 394                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 395                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 396                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 397                         };
 398                         pb0 {
 399                                 nvidia,pins = "pb0",
 400                                               "pb1";
 401                                 nvidia,function = "uartd";
 402                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 403                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 404                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 405                         };
 406                         ph0 {
 407                                 nvidia,pins = "ph0";
 408                                 nvidia,function = "pwm0";
 409                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 410                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 411                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 412                         };
 413                         kb_row10_ps2 {
 414                                 nvidia,pins = "kb_row10_ps2";
 415                                 nvidia,function = "uarta";
 416                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 417                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 418                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 419                         };
 420                         kb_row9_ps1 {
 421                                 nvidia,pins = "kb_row9_ps1";
 422                                 nvidia,function = "uarta";
 423                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 424                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 425                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 426                         };
 427                         kb_row6_pr6 {
 428                                 nvidia,pins = "kb_row6_pr6";
 429                                 nvidia,function = "displaya_alt";
 430                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 431                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 432                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 433                         };
 434                         usb_vbus_en0_pn4 {
 435                                 nvidia,pins = "usb_vbus_en0_pn4",
 436                                               "usb_vbus_en1_pn5";
 437                                 nvidia,function = "usb";
 438                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 439                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 440                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 441                                 nvidia,lock = <TEGRA_PIN_DISABLE>;
 442                                 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
 443                         };
 444                         drive_sdio1 {
 445                                 nvidia,pins = "drive_sdio1";
 446                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 447                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 448                                 nvidia,pull-down-strength = <32>;
 449                                 nvidia,pull-up-strength = <42>;
 450                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 451                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 452                         };
 453                         drive_sdio3 {
 454                                 nvidia,pins = "drive_sdio3";
 455                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 456                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 457                                 nvidia,pull-down-strength = <20>;
 458                                 nvidia,pull-up-strength = <36>;
 459                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 460                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 461                         };
 462                         drive_gma {
 463                                 nvidia,pins = "drive_gma";
 464                                 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
 465                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 466                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 467                                 nvidia,pull-down-strength = <1>;
 468                                 nvidia,pull-up-strength = <2>;
 469                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 470                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
 471                                 nvidia,drive-type = <1>;
 472                         };
 473                         als_irq_l {
 474                                 nvidia,pins = "gpio_x3_aud_px3";
 475                                 nvidia,function = "gmi";
 476                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 477                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 478                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 479                         };
 480                         codec_irq_l {
 481                                 nvidia,pins = "ph4";
 482                                 nvidia,function = "gmi";
 483                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 484                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 485                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 486                         };
 487                         lcd_bl_en {
 488                                 nvidia,pins = "ph2";
 489                                 nvidia,function = "gmi";
 490                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 491                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 492                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 493                         };
 494                         touch_irq_l {
 495                                 nvidia,pins = "gpio_w3_aud_pw3";
 496                                 nvidia,function = "spi6";
 497                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 498                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 499                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 500                         };
 501                         tpm_davint_l {
 502                                 nvidia,pins = "ph6";
 503                                 nvidia,function = "gmi";
 504                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 505                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 506                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 507                         };
 508                         ts_irq_l {
 509                                 nvidia,pins = "pk2";
 510                                 nvidia,function = "gmi";
 511                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 512                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 513                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 514                         };
 515                         ts_reset_l {
 516                                 nvidia,pins = "pk4";
 517                                 nvidia,function = "gmi";
 518                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 519                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 520                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 521                         };
 522                         ts_shdn_l {
 523                                 nvidia,pins = "pk1";
 524                                 nvidia,function = "gmi";
 525                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 526                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 527                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 528                         };
 529                         ph7 {
 530                                 nvidia,pins = "ph7";
 531                                 nvidia,function = "gmi";
 532                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 533                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 534                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 535                         };
 536                         kb_col0_ap {
 537                                 nvidia,pins = "kb_col0_pq0";
 538                                 nvidia,function = "rsvd4";
 539                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 540                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 541                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 542                         };
 543                         lid_open {
 544                                 nvidia,pins = "kb_row4_pr4";
 545                                 nvidia,function = "rsvd3";
 546                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 547                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 548                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 549                         };
 550                         en_vdd_sd {
 551                                 nvidia,pins = "kb_row0_pr0";
 552                                 nvidia,function = "rsvd4";
 553                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 554                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 555                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 556                         };
 557                         ac_ok {
 558                                 nvidia,pins = "pj0";
 559                                 nvidia,function = "gmi";
 560                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 561                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 562                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 563                         };
 564                         sensor_irq_l {
 565                                 nvidia,pins = "pi6";
 566                                 nvidia,function = "gmi";
 567                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 568                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 569                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 570                         };
 571                         wifi_en {
 572                                 nvidia,pins = "gpio_x7_aud_px7";
 573                                 nvidia,function = "rsvd4";
 574                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 575                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 576                                 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
 577                         };
 578                         wifi_rst_l {
 579                                 nvidia,pins = "clk2_req_pcc5";
 580                                 nvidia,function = "dap";
 581                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 582                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 583                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 584                         };
 585                         hp_det_l {
 586                                 nvidia,pins = "ulpi_data1_po2";
 587                                 nvidia,function = "spi3";
 588                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 589                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 590                                 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
 591                         };
 592                 };
 593         };
 594
 595         serial@0,70006000 {
 596                 status = "okay";
 597         };
 598
 599         pwm@0,7000a000 {
 600                 status = "okay";
 601         };
 602
 603         i2c@0,7000c000 {
 604                 status = "okay";
 605                 clock-frequency = <100000>;
 606
 607                 acodec: audio-codec@10 {
 608                         compatible = "maxim,max98090";
 609                         reg = <0x10>;
 610                         interrupt-parent = <&gpio>;
 611                         interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
 612                 };
 613         };
 614
 615         i2c@0,7000c400 {
 616                 status = "okay";
 617                 clock-frequency = <100000>;
 618
 619                 trackpad@4b {
 620                         compatible = "atmel,maxtouch";
 621                         reg = <0x4b>;
 622                         interrupt-parent = <&gpio>;
 623                         interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>;
 624                         linux,gpio-keymap = <0 0 0 BTN_LEFT>;
 625                 };
 626         };
 627
 628         i2c@0,7000c500 {
 629                 status = "okay";
 630                 clock-frequency = <100000>;
 631         };
 632
 633         hdmi_ddc: i2c@0,7000c700 {
 634                 status = "okay";
 635                 clock-frequency = <100000>;
 636         };
 637
 638         i2c@0,7000d000 {
 639                 status = "okay";
 640                 clock-frequency = <400000>;
 641
 642                 pmic: pmic@40 {
 643                         compatible = "ams,as3722";
 644                         reg = <0x40>;
 645                         interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
 646
 647                         ams,system-power-controller;
 648
 649                         #interrupt-cells = <2>;
 650                         interrupt-controller;
 651
 652                         gpio-controller;
 653                         #gpio-cells = <2>;
 654
 655                         pinctrl-names = "default";
 656                         pinctrl-0 = <&as3722_default>;
 657
 658                         as3722_default: pinmux {
 659                                 gpio0 {
 660                                         pins = "gpio0";
 661                                         function = "gpio";
 662                                         bias-pull-down;
 663                                 };
 664
 665                                 gpio1_2_4_7 {
 666                                         pins = "gpio1", "gpio2", "gpio4", "gpio7";
 667                                         function = "gpio";
 668                                         bias-pull-up;
 669                                 };
 670
 671                                 gpio3_6 {
 672                                         pins = "gpio3", "gpio6";
 673                                         bias-high-impedance;
 674                                 };
 675
 676                                 gpio5 {
 677                                         pins = "gpio5";
 678                                         function = "clk32k-out";
 679                                 };
 680                         };
 681
 682                         regulators {
 683                                 vsup-sd2-supply = <&vdd_5v0_sys>;
 684                                 vsup-sd3-supply = <&vdd_5v0_sys>;
 685                                 vsup-sd4-supply = <&vdd_5v0_sys>;
 686                                 vsup-sd5-supply = <&vdd_5v0_sys>;
 687                                 vin-ldo0-supply = <&vdd_1v35_lp0>;
 688                                 vin-ldo1-6-supply = <&vdd_3v3_run>;
 689                                 vin-ldo2-5-7-supply = <&vddio_1v8>;
 690                                 vin-ldo3-4-supply = <&vdd_3v3_sys>;
 691                                 vin-ldo9-10-supply = <&vdd_5v0_sys>;
 692                                 vin-ldo11-supply = <&vdd_3v3_run>;
 693
 694                                 sd0 {
 695                                         regulator-name = "+VDD_CPU_AP";
 696                                         regulator-min-microvolt = <700000>;
 697                                         regulator-max-microvolt = <1400000>;
 698                                         regulator-min-microamp = <3500000>;
 699                                         regulator-max-microamp = <3500000>;
 700                                         regulator-always-on;
 701                                         regulator-boot-on;
 702                                         ams,ext-control = <2>;
 703                                 };
 704
 705                                 sd1 {
 706                                         regulator-name = "+VDD_CORE";
 707                                         regulator-min-microvolt = <700000>;
 708                                         regulator-max-microvolt = <1350000>;
 709                                         regulator-min-microamp = <2500000>;
 710                                         regulator-max-microamp = <2500000>;
 711                                         regulator-always-on;
 712                                         regulator-boot-on;
 713                                         ams,ext-control = <1>;
 714                                 };
 715
 716                                 vdd_1v35_lp0: sd2 {
 717                                         regulator-name = "+1.35V_LP0(sd2)";
 718                                         regulator-min-microvolt = <1350000>;
 719                                         regulator-max-microvolt = <1350000>;
 720                                         regulator-always-on;
 721                                         regulator-boot-on;
 722                                 };
 723
 724                                 sd3 {
 725                                         regulator-name = "+1.35V_LP0(sd3)";
 726                                         regulator-min-microvolt = <1350000>;
 727                                         regulator-max-microvolt = <1350000>;
 728                                         regulator-always-on;
 729                                         regulator-boot-on;
 730                                 };
 731
 732                                 vdd_1v05_run: sd4 {
 733                                         regulator-name = "+1.05V_RUN";
 734                                         regulator-min-microvolt = <1050000>;
 735                                         regulator-max-microvolt = <1050000>;
 736                                 };
 737
 738                                 vddio_1v8: sd5 {
 739                                         regulator-name = "+1.8V_VDDIO";
 740                                         regulator-min-microvolt = <1800000>;
 741                                         regulator-max-microvolt = <1800000>;
 742                                         regulator-boot-on;
 743                                         regulator-always-on;
 744                                 };
 745
 746                                 vdd_gpu: sd6 {
 747                                         regulator-name = "+VDD_GPU_AP";
 748                                         regulator-min-microvolt = <650000>;
 749                                         regulator-max-microvolt = <1200000>;
 750                                         regulator-min-microamp = <3500000>;
 751                                         regulator-max-microamp = <3500000>;
 752                                         regulator-boot-on;
 753                                         regulator-always-on;
 754                                 };
 755
 756                                 ldo0 {
 757                                         regulator-name = "+1.05V_RUN_AVDD";
 758                                         regulator-min-microvolt = <1050000>;
 759                                         regulator-max-microvolt = <1050000>;
 760                                         regulator-boot-on;
 761                                         regulator-always-on;
 762                                         ams,ext-control = <1>;
 763                                 };
 764
 765                                 ldo1 {
 766                                         regulator-name = "+1.8V_RUN_CAM";
 767                                         regulator-min-microvolt = <1800000>;
 768                                         regulator-max-microvolt = <1800000>;
 769                                 };
 770
 771                                 ldo2 {
 772                                         regulator-name = "+1.2V_GEN_AVDD";
 773                                         regulator-min-microvolt = <1200000>;
 774                                         regulator-max-microvolt = <1200000>;
 775                                         regulator-boot-on;
 776                                         regulator-always-on;
 777                                 };
 778
 779                                 ldo3 {
 780                                         regulator-name = "+1.00V_LP0_VDD_RTC";
 781                                         regulator-min-microvolt = <1000000>;
 782                                         regulator-max-microvolt = <1000000>;
 783                                         regulator-boot-on;
 784                                         regulator-always-on;
 785                                         ams,enable-tracking;
 786                                 };
 787
 788                                 vdd_run_cam: ldo4 {
 789                                         regulator-name = "+3.3V_RUN_CAM";
 790                                         regulator-min-microvolt = <2800000>;
 791                                         regulator-max-microvolt = <2800000>;
 792                                 };
 793
 794                                 ldo5 {
 795                                         regulator-name = "+1.2V_RUN_CAM_FRONT";
 796                                         regulator-min-microvolt = <1200000>;
 797                                         regulator-max-microvolt = <1200000>;
 798                                 };
 799
 800                                 vddio_sdmmc3: ldo6 {
 801                                         regulator-name = "+VDDIO_SDMMC3";
 802                                         regulator-min-microvolt = <1800000>;
 803                                         regulator-max-microvolt = <3300000>;
 804                                 };
 805
 806                                 ldo7 {
 807                                         regulator-name = "+1.05V_RUN_CAM_REAR";
 808                                         regulator-min-microvolt = <1050000>;
 809                                         regulator-max-microvolt = <1050000>;
 810                                 };
 811
 812                                 ldo9 {
 813                                         regulator-name = "+2.8V_RUN_TOUCH";
 814                                         regulator-min-microvolt = <2800000>;
 815                                         regulator-max-microvolt = <2800000>;
 816                                 };
 817
 818                                 ldo10 {
 819                                         regulator-name = "+2.8V_RUN_CAM_AF";
 820                                         regulator-min-microvolt = <2800000>;
 821                                         regulator-max-microvolt = <2800000>;
 822                                 };
 823
 824                                 ldo11 {
 825                                         regulator-name = "+1.8V_RUN_VPP_FUSE";
 826                                         regulator-min-microvolt = <1800000>;
 827                                         regulator-max-microvolt = <1800000>;
 828                                 };
 829                         };
 830                 };
 831         };
 832
 833         spi@0,7000d400 {
 834                 status = "okay";
 835
 836                 cros_ec: cros-ec@0 {
 837                         compatible = "google,cros-ec-spi";
 838                         spi-max-frequency = <4000000>;
 839                         interrupt-parent = <&gpio>;
 840                         interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
 841                         reg = <0>;
 842
 843                         google,cros-ec-spi-msg-delay = <2000>;
 844
 845                         i2c-tunnel {
 846                                 compatible = "google,cros-ec-i2c-tunnel";
 847                                 #address-cells = <1>;
 848                                 #size-cells = <0>;
 849
 850                                 google,remote-bus = <0>;
 851
 852                                 charger: bq24735@9 {
 853                                         compatible = "ti,bq24735";
 854                                         reg = <0x9>;
 855                                         interrupt-parent = <&gpio>;
 856                                         interrupts = <TEGRA_GPIO(J, 0)
 857                                                         GPIO_ACTIVE_HIGH>;
 858                                         ti,ac-detect-gpios = <&gpio
 859                                                         TEGRA_GPIO(J, 0)
 860                                                         GPIO_ACTIVE_HIGH>;
 861                                 };
 862
 863                                 battery: sbs-battery@b {
 864                                         compatible = "sbs,sbs-battery";
 865                                         reg = <0xb>;
 866                                         sbs,i2c-retry-count = <2>;
 867                                         sbs,poll-retry-count = <1>;
 868                                 };
 869                         };
 870                 };
 871         };
 872
 873         spi@0,7000da00 {
 874                 status = "okay";
 875                 spi-max-frequency = <25000000>;
 876                 spi-flash@0 {
 877                         compatible = "winbond,w25q32dw";
 878                         reg = <0>;
 879                         spi-max-frequency = <20000000>;
 880                 };
 881         };
 882
 883         pmc@0,7000e400 {
 884                 nvidia,invert-interrupt;
 885                 nvidia,suspend-mode = <1>;
 886                 nvidia,cpu-pwr-good-time = <500>;
 887                 nvidia,cpu-pwr-off-time = <300>;
 888                 nvidia,core-pwr-good-time = <641 3845>;
 889                 nvidia,core-pwr-off-time = <61036>;
 890                 nvidia,core-power-req-active-high;
 891                 nvidia,sys-clock-req-active-high;
 892         };
 893
 894         hda@0,70030000 {
 895                 status = "okay";
 896         };
 897
 898         sdhci@0,700b0400 {
 899                 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
 900                 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
 901                 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
 902                 status = "okay";
 903                 bus-width = <4>;
 904                 vqmmc-supply = <&vddio_sdmmc3>;
 905         };
 906
 907         sdhci@0,700b0600 {
 908                 status = "okay";
 909                 bus-width = <8>;
 910                 non-removable;
 911         };
 912
 913         ahub@0,70300000 {
 914                 i2s@0,70301100 {
 915                         status = "okay";
 916                 };
 917         };
 918
 919         usb@0,7d000000 {
 920                 status = "okay";
 921         };
 922
 923         usb-phy@0,7d000000 {
 924                 status = "okay";
 925                 vbus-supply = <&vdd_usb1_vbus>;
 926         };
 927
 928         usb@0,7d004000 {
 929                 status = "okay";
 930         };
 931
 932         usb-phy@0,7d004000 {
 933                 status = "okay";
 934                 vbus-supply = <&vdd_run_cam>;
 935         };
 936
 937         usb@0,7d008000 {
 938                 status = "okay";
 939         };
 940
 941         usb-phy@0,7d008000 {
 942                 status = "okay";
 943                 vbus-supply = <&vdd_usb3_vbus>;
 944         };
 945
 946         backlight: backlight {
 947                 compatible = "pwm-backlight";
 948
 949                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
 950                 power-supply = <&vdd_led>;
 951                 pwms = <&pwm 1 1000000>;
 952
 953                 brightness-levels = <0 4 8 16 32 64 128 255>;
 954                 default-brightness-level = <6>;
 955         };
 956
 957         clocks {
 958                 compatible = "simple-bus";
 959                 #address-cells = <1>;
 960                 #size-cells = <0>;
 961
 962                 clk32k_in: clock@0 {
 963                         compatible = "fixed-clock";
 964                         reg = <0>;
 965                         #clock-cells = <0>;
 966                         clock-frequency = <32768>;
 967                 };
 968         };
 969
 970         gpio-keys {
 971                 compatible = "gpio-keys";
 972
 973                 power {
 974                         label = "Power";
 975                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
 976                         linux,code = <KEY_POWER>;
 977                         debounce-interval = <10>;
 978                         gpio-key,wakeup;
 979                 };
 980         };
 981
 982         panel: panel {
 983                 compatible = "lg,lp129qe", "simple-panel";
 984
 985                 backlight = <&backlight>;
 986                 ddc-i2c-bus = <&dpaux>;
 987         };
 988
 989         regulators {
 990                 compatible = "simple-bus";
 991                 #address-cells = <1>;
 992                 #size-cells = <0>;
 993
 994                 vdd_mux: regulator@0 {
 995                         compatible = "regulator-fixed";
 996                         reg = <0>;
 997                         regulator-name = "+VDD_MUX";
 998                         regulator-min-microvolt = <12000000>;
 999                         regulator-max-microvolt = <12000000>;
1000                         regulator-always-on;
1001                         regulator-boot-on;
1002                 };
1003
1004                 vdd_5v0_sys: regulator@1 {
1005                         compatible = "regulator-fixed";
1006                         reg = <1>;
1007                         regulator-name = "+5V_SYS";
1008                         regulator-min-microvolt = <5000000>;
1009                         regulator-max-microvolt = <5000000>;
1010                         regulator-always-on;
1011                         regulator-boot-on;
1012                         vin-supply = <&vdd_mux>;
1013                 };
1014
1015                 vdd_3v3_sys: regulator@2 {
1016                         compatible = "regulator-fixed";
1017                         reg = <2>;
1018                         regulator-name = "+3.3V_SYS";
1019                         regulator-min-microvolt = <3300000>;
1020                         regulator-max-microvolt = <3300000>;
1021                         regulator-always-on;
1022                         regulator-boot-on;
1023                         vin-supply = <&vdd_mux>;
1024                 };
1025
1026                 vdd_3v3_run: regulator@3 {
1027                         compatible = "regulator-fixed";
1028                         reg = <3>;
1029                         regulator-name = "+3.3V_RUN";
1030                         regulator-min-microvolt = <3300000>;
1031                         regulator-max-microvolt = <3300000>;
1032                         regulator-always-on;
1033                         regulator-boot-on;
1034                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1035                         enable-active-high;
1036                         vin-supply = <&vdd_3v3_sys>;
1037                 };
1038
1039                 vdd_3v3_hdmi: regulator@4 {
1040                         compatible = "regulator-fixed";
1041                         reg = <4>;
1042                         regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1043                         regulator-min-microvolt = <3300000>;
1044                         regulator-max-microvolt = <3300000>;
1045                         vin-supply = <&vdd_3v3_run>;
1046                 };
1047
1048                 vdd_led: regulator@5 {
1049                         compatible = "regulator-fixed";
1050                         reg = <5>;
1051                         regulator-name = "+VDD_LED";
1052                         regulator-min-microvolt = <3300000>;
1053                         regulator-max-microvolt = <3300000>;
1054                         gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1055                         enable-active-high;
1056                         vin-supply = <&vdd_mux>;
1057                 };
1058
1059                 vdd_5v0_ts: regulator@6 {
1060                         compatible = "regulator-fixed";
1061                         reg = <6>;
1062                         regulator-name = "+5V_VDD_TS_SW";
1063                         regulator-min-microvolt = <5000000>;
1064                         regulator-max-microvolt = <5000000>;
1065                         regulator-boot-on;
1066                         gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1067                         enable-active-high;
1068                         vin-supply = <&vdd_5v0_sys>;
1069                 };
1070
1071                 vdd_usb1_vbus: regulator@7 {
1072                         compatible = "regulator-fixed";
1073                         reg = <7>;
1074                         regulator-name = "+5V_USB_HS";
1075                         regulator-min-microvolt = <5000000>;
1076                         regulator-max-microvolt = <5000000>;
1077                         gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1078                         enable-active-high;
1079                         gpio-open-drain;
1080                         vin-supply = <&vdd_5v0_sys>;
1081                 };
1082
1083                 vdd_usb3_vbus: regulator@8 {
1084                         compatible = "regulator-fixed";
1085                         reg = <8>;
1086                         regulator-name = "+5V_USB_SS";
1087                         regulator-min-microvolt = <5000000>;
1088                         regulator-max-microvolt = <5000000>;
1089                         gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1090                         enable-active-high;
1091                         gpio-open-drain;
1092                         vin-supply = <&vdd_5v0_sys>;
1093                 };
1094
1095                 vdd_3v3_panel: regulator@9 {
1096                         compatible = "regulator-fixed";
1097                         reg = <9>;
1098                         regulator-name = "+3.3V_PANEL";
1099                         regulator-min-microvolt = <3300000>;
1100                         regulator-max-microvolt = <3300000>;
1101                         gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
1102                         enable-active-high;
1103                         vin-supply = <&vdd_3v3_run>;
1104                 };
1105
1106                 vdd_3v3_lp0: regulator@10 {
1107                         compatible = "regulator-fixed";
1108                         reg = <10>;
1109                         regulator-name = "+3.3V_LP0";
1110                         regulator-min-microvolt = <3300000>;
1111                         regulator-max-microvolt = <3300000>;
1112                         /*
1113                          * TODO: find a way to wire this up with the USB EHCI
1114                          * controllers so that it can be enabled on demand.
1115                          */
1116                         regulator-always-on;
1117                         gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1118                         enable-active-high;
1119                         vin-supply = <&vdd_3v3_sys>;
1120                 };
1121
1122                 vdd_hdmi_pll: regulator@11 {
1123                         compatible = "regulator-fixed";
1124                         reg = <11>;
1125                         regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1126                         regulator-min-microvolt = <1050000>;
1127                         regulator-max-microvolt = <1050000>;
1128                         gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1129                         vin-supply = <&vdd_1v05_run>;
1130                 };
1131
1132                 vdd_5v0_hdmi: regulator@12 {
1133                         compatible = "regulator-fixed";
1134                         reg = <12>;
1135                         regulator-name = "+5V_HDMI_CON";
1136                         regulator-min-microvolt = <5000000>;
1137                         regulator-max-microvolt = <5000000>;
1138                         gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1139                         enable-active-high;
1140                         vin-supply = <&vdd_5v0_sys>;
1141                 };
1142         };
1143
1144         sound {
1145                 compatible = "nvidia,tegra-audio-max98090-venice2",
1146                              "nvidia,tegra-audio-max98090";
1147                 nvidia,model = "NVIDIA Tegra Venice2";
1148
1149                 nvidia,audio-routing =
1150                         "Headphones", "HPR",
1151                         "Headphones", "HPL",
1152                         "Speakers", "SPKR",
1153                         "Speakers", "SPKL",
1154                         "Mic Jack", "MICBIAS",
1155                         "IN34", "Mic Jack";
1156
1157                 nvidia,i2s-controller = <&tegra_i2s1>;
1158                 nvidia,audio-codec = <&acodec>;
1159
1160                 clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
1161                          <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1162                          <&tegra_car TEGRA124_CLK_EXTERN1>;
1163                 clock-names = "pll_a", "pll_a_out0", "mclk";
1164         };
1165 };
1166
1167 #include "cros-ec-keyboard.dtsi"