arch/arm/boot/dts/uniphier-ph1-ld4.dtsi

   1 /*
   2  * Device Tree Source for UniPhier PH1-LD4 SoC
   3  *
   4  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 /include/ "skeleton.dtsi"
  46
  47 / {
  48         compatible = "socionext,ph1-ld4";
  49
  50         cpus {
  51                 #address-cells = <1>;
  52                 #size-cells = <0>;
  53
  54                 cpu@0 {
  55                         device_type = "cpu";
  56                         compatible = "arm,cortex-a9";
  57                         reg = <0>;
  58                 };
  59         };
  60
  61         clocks {
  62                 arm_timer_clk: arm_timer_clk {
  63                         #clock-cells = <0>;
  64                         compatible = "fixed-clock";
  65                         clock-frequency = <50000000>;
  66                 };
  67
  68                 uart_clk: uart_clk {
  69                         #clock-cells = <0>;
  70                         compatible = "fixed-clock";
  71                         clock-frequency = <36864000>;
  72                 };
  73
  74                 iobus_clk: iobus_clk {
  75                         #clock-cells = <0>;
  76                         compatible = "fixed-clock";
  77                         clock-frequency = <100000000>;
  78                 };
  79         };
  80
  81         soc {
  82                 compatible = "simple-bus";
  83                 #address-cells = <1>;
  84                 #size-cells = <1>;
  85                 ranges;
  86                 interrupt-parent = <&intc>;
  87
  88                 extbus: extbus {
  89                         compatible = "simple-bus";
  90                         #address-cells = <2>;
  91                         #size-cells = <1>;
  92                 };
  93
  94                 serial0: serial@54006800 {
  95                         compatible = "socionext,uniphier-uart";
  96                         status = "disabled";
  97                         reg = <0x54006800 0x40>;
  98                         pinctrl-names = "default";
  99                         pinctrl-0 = <&pinctrl_uart0>;
 100                         interrupts = <0 33 4>;
 101                         clocks = <&uart_clk>;
 102                         fifo-size = <64>;
 103                 };
 104
 105                 serial1: serial@54006900 {
 106                         compatible = "socionext,uniphier-uart";
 107                         status = "disabled";
 108                         reg = <0x54006900 0x40>;
 109                         pinctrl-names = "default";
 110                         pinctrl-0 = <&pinctrl_uart1>;
 111                         interrupts = <0 35 4>;
 112                         clocks = <&uart_clk>;
 113                         fifo-size = <64>;
 114                 };
 115
 116                 serial2: serial@54006a00 {
 117                         compatible = "socionext,uniphier-uart";
 118                         status = "disabled";
 119                         reg = <0x54006a00 0x40>;
 120                         pinctrl-names = "default";
 121                         pinctrl-0 = <&pinctrl_uart2>;
 122                         interrupts = <0 37 4>;
 123                         clocks = <&uart_clk>;
 124                         fifo-size = <64>;
 125                 };
 126
 127                 serial3: serial@54006b00 {
 128                         compatible = "socionext,uniphier-uart";
 129                         status = "disabled";
 130                         reg = <0x54006b00 0x40>;
 131                         pinctrl-names = "default";
 132                         pinctrl-0 = <&pinctrl_uart3>;
 133                         interrupts = <0 29 4>;
 134                         clocks = <&uart_clk>;
 135                         fifo-size = <64>;
 136                 };
 137
 138                 i2c0: i2c@58400000 {
 139                         compatible = "socionext,uniphier-i2c";
 140                         status = "disabled";
 141                         reg = <0x58400000 0x40>;
 142                         #address-cells = <1>;
 143                         #size-cells = <0>;
 144                         pinctrl-names = "default";
 145                         pinctrl-0 = <&pinctrl_i2c0>;
 146                         interrupts = <0 41 1>;
 147                         clocks = <&iobus_clk>;
 148                         clock-frequency = <100000>;
 149                 };
 150
 151                 i2c1: i2c@58480000 {
 152                         compatible = "socionext,uniphier-i2c";
 153                         status = "disabled";
 154                         reg = <0x58480000 0x40>;
 155                         #address-cells = <1>;
 156                         #size-cells = <0>;
 157                         pinctrl-names = "default";
 158                         pinctrl-0 = <&pinctrl_i2c1>;
 159                         interrupts = <0 42 1>;
 160                         clocks = <&iobus_clk>;
 161                         clock-frequency = <100000>;
 162                 };
 163
 164                 /* chip-internal connection for DMD */
 165                 i2c2: i2c@58500000 {
 166                         compatible = "socionext,uniphier-i2c";
 167                         reg = <0x58500000 0x40>;
 168                         #address-cells = <1>;
 169                         #size-cells = <0>;
 170                         pinctrl-names = "default";
 171                         pinctrl-0 = <&pinctrl_i2c2>;
 172                         interrupts = <0 43 1>;
 173                         clocks = <&iobus_clk>;
 174                         clock-frequency = <400000>;
 175                 };
 176
 177                 i2c3: i2c@58580000 {
 178                         compatible = "socionext,uniphier-i2c";
 179                         status = "disabled";
 180                         reg = <0x58580000 0x40>;
 181                         #address-cells = <1>;
 182                         #size-cells = <0>;
 183                         pinctrl-names = "default";
 184                         pinctrl-0 = <&pinctrl_i2c3>;
 185                         interrupts = <0 44 1>;
 186                         clocks = <&iobus_clk>;
 187                         clock-frequency = <100000>;
 188                 };
 189
 190                 system-bus-controller-misc@59800000 {
 191                         compatible = "socionext,uniphier-system-bus-controller-misc",
 192                                      "syscon";
 193                         reg = <0x59800000 0x2000>;
 194                 };
 195
 196                 usb0: usb@5a800100 {
 197                         compatible = "socionext,uniphier-ehci", "generic-ehci";
 198                         status = "disabled";
 199                         reg = <0x5a800100 0x100>;
 200                         pinctrl-names = "default";
 201                         pinctrl-0 = <&pinctrl_usb0>;
 202                         interrupts = <0 80 4>;
 203                 };
 204
 205                 usb1: usb@5a810100 {
 206                         compatible = "socionext,uniphier-ehci", "generic-ehci";
 207                         status = "disabled";
 208                         reg = <0x5a810100 0x100>;
 209                         pinctrl-names = "default";
 210                         pinctrl-0 = <&pinctrl_usb1>;
 211                         interrupts = <0 81 4>;
 212                 };
 213
 214                 usb2: usb@5a820100 {
 215                         compatible = "socionext,uniphier-ehci", "generic-ehci";
 216                         status = "disabled";
 217                         reg = <0x5a820100 0x100>;
 218                         pinctrl-names = "default";
 219                         pinctrl-0 = <&pinctrl_usb2>;
 220                         interrupts = <0 82 4>;
 221                 };
 222
 223                 pinctrl: pinctrl@5f801000 {
 224                         compatible = "socionext,ph1-ld4-pinctrl",
 225                                      "syscon";
 226                         reg = <0x5f801000 0xe00>;
 227                 };
 228
 229                 timer@60000200 {
 230                         compatible = "arm,cortex-a9-global-timer";
 231                         reg = <0x60000200 0x20>;
 232                         interrupts = <1 11 0x104>;
 233                         clocks = <&arm_timer_clk>;
 234                 };
 235
 236                 timer@60000600 {
 237                         compatible = "arm,cortex-a9-twd-timer";
 238                         reg = <0x60000600 0x20>;
 239                         interrupts = <1 13 0x104>;
 240                         clocks = <&arm_timer_clk>;
 241                 };
 242
 243                 intc: interrupt-controller@60001000 {
 244                         compatible = "arm,cortex-a9-gic";
 245                         #interrupt-cells = <3>;
 246                         interrupt-controller;
 247                         reg = <0x60001000 0x1000>,
 248                               <0x60000100 0x100>;
 249                 };
 250         };
 251 };
 252
 253 /include/ "uniphier-pinctrl.dtsi"