arch/arm/boot/dts/uniphier-ph1-pro5.dtsi

   1 /*
   2  * Device Tree Source for UniPhier PH1-Pro5 SoC
   3  *
   4  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 /include/ "skeleton.dtsi"
  46
  47 / {
  48         compatible = "socionext,ph1-pro5";
  49
  50         cpus {
  51                 #address-cells = <1>;
  52                 #size-cells = <0>;
  53                 enable-method = "socionext,uniphier-smp";
  54
  55                 cpu@0 {
  56                         device_type = "cpu";
  57                         compatible = "arm,cortex-a9";
  58                         reg = <0>;
  59                 };
  60
  61                 cpu@1 {
  62                         device_type = "cpu";
  63                         compatible = "arm,cortex-a9";
  64                         reg = <1>;
  65                 };
  66         };
  67
  68         clocks {
  69                 arm_timer_clk: arm_timer_clk {
  70                         #clock-cells = <0>;
  71                         compatible = "fixed-clock";
  72                         clock-frequency = <50000000>;
  73                 };
  74
  75                 uart_clk: uart_clk {
  76                         #clock-cells = <0>;
  77                         compatible = "fixed-clock";
  78                         clock-frequency = <73728000>;
  79                 };
  80
  81                 i2c_clk: i2c_clk {
  82                         #clock-cells = <0>;
  83                         compatible = "fixed-clock";
  84                         clock-frequency = <50000000>;
  85                 };
  86         };
  87
  88         soc {
  89                 compatible = "simple-bus";
  90                 #address-cells = <1>;
  91                 #size-cells = <1>;
  92                 ranges;
  93                 interrupt-parent = <&intc>;
  94
  95                 extbus: extbus {
  96                         compatible = "simple-bus";
  97                         #address-cells = <2>;
  98                         #size-cells = <1>;
  99                 };
 100
 101                 serial0: serial@54006800 {
 102                         compatible = "socionext,uniphier-uart";
 103                         status = "disabled";
 104                         reg = <0x54006800 0x40>;
 105                         pinctrl-names = "default";
 106                         pinctrl-0 = <&pinctrl_uart0>;
 107                         interrupts = <0 33 4>;
 108                         clocks = <&uart_clk>;
 109                 };
 110
 111                 serial1: serial@54006900 {
 112                         compatible = "socionext,uniphier-uart";
 113                         status = "disabled";
 114                         reg = <0x54006900 0x40>;
 115                         pinctrl-names = "default";
 116                         pinctrl-0 = <&pinctrl_uart1>;
 117                         interrupts = <0 35 4>;
 118                         clocks = <&uart_clk>;
 119                 };
 120
 121                 serial2: serial@54006a00 {
 122                         compatible = "socionext,uniphier-uart";
 123                         status = "disabled";
 124                         reg = <0x54006a00 0x40>;
 125                         pinctrl-names = "default";
 126                         pinctrl-0 = <&pinctrl_uart2>;
 127                         interrupts = <0 37 4>;
 128                         clocks = <&uart_clk>;
 129                 };
 130
 131                 serial3: serial@54006b00 {
 132                         compatible = "socionext,uniphier-uart";
 133                         status = "disabled";
 134                         reg = <0x54006b00 0x40>;
 135                         pinctrl-names = "default";
 136                         pinctrl-0 = <&pinctrl_uart3>;
 137                         interrupts = <0 177 4>;
 138                         clocks = <&uart_clk>;
 139                 };
 140
 141                 i2c0: i2c@58780000 {
 142                         compatible = "socionext,uniphier-fi2c";
 143                         status = "disabled";
 144                         reg = <0x58780000 0x80>;
 145                         #address-cells = <1>;
 146                         #size-cells = <0>;
 147                         pinctrl-names = "default";
 148                         pinctrl-0 = <&pinctrl_i2c0>;
 149                         interrupts = <0 41 4>;
 150                         clocks = <&i2c_clk>;
 151                         clock-frequency = <100000>;
 152                 };
 153
 154                 i2c1: i2c@58781000 {
 155                         compatible = "socionext,uniphier-fi2c";
 156                         status = "disabled";
 157                         reg = <0x58781000 0x80>;
 158                         #address-cells = <1>;
 159                         #size-cells = <0>;
 160                         pinctrl-names = "default";
 161                         pinctrl-0 = <&pinctrl_i2c1>;
 162                         interrupts = <0 42 4>;
 163                         clocks = <&i2c_clk>;
 164                         clock-frequency = <100000>;
 165                 };
 166
 167                 i2c2: i2c@58782000 {
 168                         compatible = "socionext,uniphier-fi2c";
 169                         status = "disabled";
 170                         reg = <0x58782000 0x80>;
 171                         #address-cells = <1>;
 172                         #size-cells = <0>;
 173                         pinctrl-names = "default";
 174                         pinctrl-0 = <&pinctrl_i2c2>;
 175                         interrupts = <0 43 4>;
 176                         clocks = <&i2c_clk>;
 177                         clock-frequency = <100000>;
 178                 };
 179
 180                 i2c3: i2c@58783000 {
 181                         compatible = "socionext,uniphier-fi2c";
 182                         status = "disabled";
 183                         reg = <0x58783000 0x80>;
 184                         #address-cells = <1>;
 185                         #size-cells = <0>;
 186                         pinctrl-names = "default";
 187                         pinctrl-0 = <&pinctrl_i2c3>;
 188                         interrupts = <0 44 4>;
 189                         clocks = <&i2c_clk>;
 190                         clock-frequency = <100000>;
 191                 };
 192
 193                 /* i2c4 does not exist */
 194
 195                 /* chip-internal connection for DMD */
 196                 i2c5: i2c@58785000 {
 197                         compatible = "socionext,uniphier-fi2c";
 198                         reg = <0x58785000 0x80>;
 199                         #address-cells = <1>;
 200                         #size-cells = <0>;
 201                         interrupts = <0 25 4>;
 202                         clocks = <&i2c_clk>;
 203                         clock-frequency = <400000>;
 204                 };
 205
 206                 /* chip-internal connection for HDMI */
 207                 i2c6: i2c@58786000 {
 208                         compatible = "socionext,uniphier-fi2c";
 209                         reg = <0x58786000 0x80>;
 210                         #address-cells = <1>;
 211                         #size-cells = <0>;
 212                         interrupts = <0 26 4>;
 213                         clocks = <&i2c_clk>;
 214                         clock-frequency = <400000>;
 215                 };
 216
 217                 system-bus-controller-misc@59800000 {
 218                         compatible = "socionext,uniphier-system-bus-controller-misc",
 219                                      "syscon";
 220                         reg = <0x59800000 0x2000>;
 221                 };
 222
 223                 pinctrl: pinctrl@5f801000 {
 224                         compatible = "socionext,ph1-pro5-pinctrl", "syscon";
 225                         reg = <0x5f801000 0xe00>;
 226                 };
 227
 228                 timer@60000200 {
 229                         compatible = "arm,cortex-a9-global-timer";
 230                         reg = <0x60000200 0x20>;
 231                         interrupts = <1 11 0x304>;
 232                         clocks = <&arm_timer_clk>;
 233                 };
 234
 235                 timer@60000600 {
 236                         compatible = "arm,cortex-a9-twd-timer";
 237                         reg = <0x60000600 0x20>;
 238                         interrupts = <1 13 0x304>;
 239                         clocks = <&arm_timer_clk>;
 240                 };
 241
 242                 intc: interrupt-controller@60001000 {
 243                         compatible = "arm,cortex-a9-gic";
 244                         #interrupt-cells = <3>;
 245                         interrupt-controller;
 246                         reg = <0x60001000 0x1000>,
 247                               <0x60000100 0x100>;
 248                 };
 249         };
 250 };
 251
 252 /include/ "uniphier-pinctrl.dtsi"