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1 /*
2  *  linux/arch/arm/kernel/swp_emulate.c
3  *
4  *  Copyright (C) 2009 ARM Limited
5  *  __user_* functions adapted from include/asm/uaccess.h
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  *  Implements emulation of the SWP/SWPB instructions using load-exclusive and
12  *  store-exclusive for processors that have them disabled (or future ones that
13  *  might not implement them).
14  *
15  *  Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
16  *  Where: Rt  = destination
17  *         Rt2 = source
18  *         Rn  = address
19  */
20
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/proc_fs.h>
24 #include <linux/seq_file.h>
25 #include <linux/sched.h>
26 #include <linux/syscalls.h>
27 #include <linux/perf_event.h>
28
29 #include <asm/opcodes.h>
30 #include <asm/system_info.h>
31 #include <asm/traps.h>
32 #include <asm/uaccess.h>
33
34 /*
35  * Error-checking SWP macros implemented using ldrex{b}/strex{b}
36  */
37 #define __user_swpX_asm(data, addr, res, temp, B)               \
38         __asm__ __volatile__(                                   \
39         "       mov             %2, %1\n"                       \
40         "0:     ldrex"B"        %1, [%3]\n"                     \
41         "1:     strex"B"        %0, %2, [%3]\n"                 \
42         "       cmp             %0, #0\n"                       \
43         "       movne           %0, %4\n"                       \
44         "2:\n"                                                  \
45         "       .section         .text.fixup,\"ax\"\n"          \
46         "       .align          2\n"                            \
47         "3:     mov             %0, %5\n"                       \
48         "       b               2b\n"                           \
49         "       .previous\n"                                    \
50         "       .section         __ex_table,\"a\"\n"            \
51         "       .align          3\n"                            \
52         "       .long           0b, 3b\n"                       \
53         "       .long           1b, 3b\n"                       \
54         "       .previous"                                      \
55         : "=&r" (res), "+r" (data), "=&r" (temp)                \
56         : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT)              \
57         : "cc", "memory")
58
59 #define __user_swp_asm(data, addr, res, temp) \
60         __user_swpX_asm(data, addr, res, temp, "")
61 #define __user_swpb_asm(data, addr, res, temp) \
62         __user_swpX_asm(data, addr, res, temp, "b")
63
64 /*
65  * Macros/defines for extracting register numbers from instruction.
66  */
67 #define EXTRACT_REG_NUM(instruction, offset) \
68         (((instruction) & (0xf << (offset))) >> (offset))
69 #define RN_OFFSET  16
70 #define RT_OFFSET  12
71 #define RT2_OFFSET  0
72 /*
73  * Bit 22 of the instruction encoding distinguishes between
74  * the SWP and SWPB variants (bit set means SWPB).
75  */
76 #define TYPE_SWPB (1 << 22)
77
78 static unsigned long swpcounter;
79 static unsigned long swpbcounter;
80 static unsigned long abtcounter;
81 static pid_t         previous_pid;
82
83 #ifdef CONFIG_PROC_FS
84 static int proc_status_show(struct seq_file *m, void *v)
85 {
86         seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
87         seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
88         seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
89         if (previous_pid != 0)
90                 seq_printf(m, "Last process:\t\t%d\n", previous_pid);
91         return 0;
92 }
93
94 static int proc_status_open(struct inode *inode, struct file *file)
95 {
96         return single_open(file, proc_status_show, PDE_DATA(inode));
97 }
98
99 static const struct file_operations proc_status_fops = {
100         .open           = proc_status_open,
101         .read           = seq_read,
102         .llseek         = seq_lseek,
103         .release        = single_release,
104 };
105 #endif
106
107 /*
108  * Set up process info to signal segmentation fault - called on access error.
109  */
110 static void set_segfault(struct pt_regs *regs, unsigned long addr)
111 {
112         siginfo_t info;
113
114         down_read(&current->mm->mmap_sem);
115         if (find_vma(current->mm, addr) == NULL)
116                 info.si_code = SEGV_MAPERR;
117         else
118                 info.si_code = SEGV_ACCERR;
119         up_read(&current->mm->mmap_sem);
120
121         info.si_signo = SIGSEGV;
122         info.si_errno = 0;
123         info.si_addr  = (void *) instruction_pointer(regs);
124
125         pr_debug("SWP{B} emulation: access caused memory abort!\n");
126         arm_notify_die("Illegal memory access", regs, &info, 0, 0);
127
128         abtcounter++;
129 }
130
131 static int emulate_swpX(unsigned int address, unsigned int *data,
132                         unsigned int type)
133 {
134         unsigned int res = 0;
135
136         if ((type != TYPE_SWPB) && (address & 0x3)) {
137                 /* SWP to unaligned address not permitted */
138                 pr_debug("SWP instruction on unaligned pointer!\n");
139                 return -EFAULT;
140         }
141
142         while (1) {
143                 unsigned long temp;
144                 unsigned int __ua_flags;
145
146                 __ua_flags = uaccess_save_and_enable();
147                 if (type == TYPE_SWPB)
148                         __user_swpb_asm(*data, address, res, temp);
149                 else
150                         __user_swp_asm(*data, address, res, temp);
151                 uaccess_restore(__ua_flags);
152
153                 if (likely(res != -EAGAIN) || signal_pending(current))
154                         break;
155
156                 cond_resched();
157         }
158
159         if (res == 0) {
160                 if (type == TYPE_SWPB)
161                         swpbcounter++;
162                 else
163                         swpcounter++;
164         }
165
166         return res;
167 }
168
169 /*
170  * swp_handler logs the id of calling process, dissects the instruction, sanity
171  * checks the memory location, calls emulate_swpX for the actual operation and
172  * deals with fixup/error handling before returning
173  */
174 static int swp_handler(struct pt_regs *regs, unsigned int instr)
175 {
176         unsigned int address, destreg, data, type;
177         unsigned int res = 0;
178
179         perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
180
181         res = arm_check_condition(instr, regs->ARM_cpsr);
182         switch (res) {
183         case ARM_OPCODE_CONDTEST_PASS:
184                 break;
185         case ARM_OPCODE_CONDTEST_FAIL:
186                 /* Condition failed - return to next instruction */
187                 regs->ARM_pc += 4;
188                 return 0;
189         case ARM_OPCODE_CONDTEST_UNCOND:
190                 /* If unconditional encoding - not a SWP, undef */
191                 return -EFAULT;
192         default:
193                 return -EINVAL;
194         }
195
196         if (current->pid != previous_pid) {
197                 pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
198                          current->comm, (unsigned long)current->pid);
199                 previous_pid = current->pid;
200         }
201
202         address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
203         data    = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
204         destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
205
206         type = instr & TYPE_SWPB;
207
208         pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
209                  EXTRACT_REG_NUM(instr, RN_OFFSET), address,
210                  destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
211
212         /* Check access in reasonable access range for both SWP and SWPB */
213         if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) {
214                 pr_debug("SWP{B} emulation: access to %p not allowed!\n",
215                          (void *)address);
216                 res = -EFAULT;
217         } else {
218                 res = emulate_swpX(address, &data, type);
219         }
220
221         if (res == 0) {
222                 /*
223                  * On successful emulation, revert the adjustment to the PC
224                  * made in kernel/traps.c in order to resume execution at the
225                  * instruction following the SWP{B}.
226                  */
227                 regs->ARM_pc += 4;
228                 regs->uregs[destreg] = data;
229         } else if (res == -EFAULT) {
230                 /*
231                  * Memory errors do not mean emulation failed.
232                  * Set up signal info to return SEGV, then return OK
233                  */
234                 set_segfault(regs, address);
235         }
236
237         return 0;
238 }
239
240 /*
241  * Only emulate SWP/SWPB executed in ARM state/User mode.
242  * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
243  */
244 static struct undef_hook swp_hook = {
245         .instr_mask = 0x0fb00ff0,
246         .instr_val  = 0x01000090,
247         .cpsr_mask  = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
248         .cpsr_val   = USR_MODE,
249         .fn         = swp_handler
250 };
251
252 /*
253  * Register handler and create status file in /proc/cpu
254  * Invoked as late_initcall, since not needed before init spawned.
255  */
256 static int __init swp_emulation_init(void)
257 {
258         if (cpu_architecture() < CPU_ARCH_ARMv7)
259                 return 0;
260
261 #ifdef CONFIG_PROC_FS
262         if (!proc_create("cpu/swp_emulation", S_IRUGO, NULL, &proc_status_fops))
263                 return -ENOMEM;
264 #endif /* CONFIG_PROC_FS */
265
266         pr_notice("Registering SWP/SWPB emulation handler\n");
267         register_undef_hook(&swp_hook);
268
269         return 0;
270 }
271
272 late_initcall(swp_emulation_init);