arch/arm/mach-sa1100/generic.c

   1 /*
   2  * linux/arch/arm/mach-sa1100/generic.c
   3  *
   4  * Author: Nicolas Pitre
   5  *
   6  * Code common to all SA11x0 machines.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <linux/config.h>
  13 #include <linux/module.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/pm.h>
  18 #include <linux/cpufreq.h>
  19 #include <linux/ioport.h>
  20 #include <linux/sched.h>        /* just for sched_clock() - funny that */
  21 #include <linux/platform_device.h>
  22
  23 #include <asm/div64.h>
  24 #include <asm/hardware.h>
  25 #include <asm/system.h>
  26 #include <asm/pgtable.h>
  27 #include <asm/mach/map.h>
  28 #include <asm/mach/flash.h>
  29 #include <asm/irq.h>
  30
  31 #include "generic.h"
  32
  33 #define NR_FREQS        16
  34
  35 /*
  36  * This table is setup for a 3.6864MHz Crystal.
  37  */
  38 static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
  39          590,   /*  59.0 MHz */
  40          737,   /*  73.7 MHz */
  41          885,   /*  88.5 MHz */
  42         1032,   /* 103.2 MHz */
  43         1180,   /* 118.0 MHz */
  44         1327,   /* 132.7 MHz */
  45         1475,   /* 147.5 MHz */
  46         1622,   /* 162.2 MHz */
  47         1769,   /* 176.9 MHz */
  48         1917,   /* 191.7 MHz */
  49         2064,   /* 206.4 MHz */
  50         2212,   /* 221.2 MHz */
  51         2359,   /* 235.9 MHz */
  52         2507,   /* 250.7 MHz */
  53         2654,   /* 265.4 MHz */
  54         2802    /* 280.2 MHz */
  55 };
  56
  57 #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
  58 /* rounds up(!)  */
  59 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  60 {
  61         int i;
  62
  63         khz /= 100;
  64
  65         for (i = 0; i < NR_FREQS; i++)
  66                 if (cclk_frequency_100khz[i] >= khz)
  67                         break;
  68
  69         return i;
  70 }
  71
  72 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  73 {
  74         unsigned int freq = 0;
  75         if (idx < NR_FREQS)
  76                 freq = cclk_frequency_100khz[idx] * 100;
  77         return freq;
  78 }
  79
  80
  81 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
  82  * this platform, anyway.
  83  */
  84 int sa11x0_verify_speed(struct cpufreq_policy *policy)
  85 {
  86         unsigned int tmp;
  87         if (policy->cpu)
  88                 return -EINVAL;
  89
  90         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  91
  92         /* make sure that at least one frequency is within the policy */
  93         tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
  94         if (tmp > policy->max)
  95                 policy->max = tmp;
  96
  97         cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  98
  99         return 0;
 100 }
 101
 102 unsigned int sa11x0_getspeed(unsigned int cpu)
 103 {
 104         if (cpu)
 105                 return 0;
 106         return cclk_frequency_100khz[PPCR & 0xf] * 100;
 107 }
 108
 109 #else
 110 /*
 111  * We still need to provide this so building without cpufreq works.
 112  */
 113 unsigned int cpufreq_get(unsigned int cpu)
 114 {
 115         return cclk_frequency_100khz[PPCR & 0xf] * 100;
 116 }
 117 EXPORT_SYMBOL(cpufreq_get);
 118 #endif
 119
 120 /*
 121  * This is the SA11x0 sched_clock implementation.  This has
 122  * a resolution of 271ns, and a maximum value of 1165s.
 123  *  ( * 1E9 / 3686400 => * 78125 / 288)
 124  */
 125 unsigned long long sched_clock(void)
 126 {
 127         unsigned long long v;
 128
 129         v = (unsigned long long)OSCR * 78125;
 130         do_div(v, 288);
 131
 132         return v;
 133 }
 134
 135 /*
 136  * Default power-off for SA1100
 137  */
 138 static void sa1100_power_off(void)
 139 {
 140         mdelay(100);
 141         local_irq_disable();
 142         /* disable internal oscillator, float CS lines */
 143         PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
 144         /* enable wake-up on GPIO0 (Assabet...) */
 145         PWER = GFER = GRER = 1;
 146         /*
 147          * set scratchpad to zero, just in case it is used as a
 148          * restart address by the bootloader.
 149          */
 150         PSPR = 0;
 151         /* enter sleep mode */
 152         PMCR = PMCR_SF;
 153 }
 154
 155 static struct resource sa11x0udc_resources[] = {
 156         [0] = {
 157                 .start  = 0x80000000,
 158                 .end    = 0x8000ffff,
 159                 .flags  = IORESOURCE_MEM,
 160         },
 161 };
 162
 163 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
 164
 165 static struct platform_device sa11x0udc_device = {
 166         .name           = "sa11x0-udc",
 167         .id             = -1,
 168         .dev            = {
 169                 .dma_mask = &sa11x0udc_dma_mask,
 170                 .coherent_dma_mask = 0xffffffff,
 171         },
 172         .num_resources  = ARRAY_SIZE(sa11x0udc_resources),
 173         .resource       = sa11x0udc_resources,
 174 };
 175
 176 static struct resource sa11x0uart1_resources[] = {
 177         [0] = {
 178                 .start  = 0x80010000,
 179                 .end    = 0x8001ffff,
 180                 .flags  = IORESOURCE_MEM,
 181         },
 182 };
 183
 184 static struct platform_device sa11x0uart1_device = {
 185         .name           = "sa11x0-uart",
 186         .id             = 1,
 187         .num_resources  = ARRAY_SIZE(sa11x0uart1_resources),
 188         .resource       = sa11x0uart1_resources,
 189 };
 190
 191 static struct resource sa11x0uart3_resources[] = {
 192         [0] = {
 193                 .start  = 0x80050000,
 194                 .end    = 0x8005ffff,
 195                 .flags  = IORESOURCE_MEM,
 196         },
 197 };
 198
 199 static struct platform_device sa11x0uart3_device = {
 200         .name           = "sa11x0-uart",
 201         .id             = 3,
 202         .num_resources  = ARRAY_SIZE(sa11x0uart3_resources),
 203         .resource       = sa11x0uart3_resources,
 204 };
 205
 206 static struct resource sa11x0mcp_resources[] = {
 207         [0] = {
 208                 .start  = 0x80060000,
 209                 .end    = 0x8006ffff,
 210                 .flags  = IORESOURCE_MEM,
 211         },
 212 };
 213
 214 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
 215
 216 static struct platform_device sa11x0mcp_device = {
 217         .name           = "sa11x0-mcp",
 218         .id             = -1,
 219         .dev = {
 220                 .dma_mask = &sa11x0mcp_dma_mask,
 221                 .coherent_dma_mask = 0xffffffff,
 222         },
 223         .num_resources  = ARRAY_SIZE(sa11x0mcp_resources),
 224         .resource       = sa11x0mcp_resources,
 225 };
 226
 227 void sa11x0_set_mcp_data(struct mcp_plat_data *data)
 228 {
 229         sa11x0mcp_device.dev.platform_data = data;
 230 }
 231
 232 static struct resource sa11x0ssp_resources[] = {
 233         [0] = {
 234                 .start  = 0x80070000,
 235                 .end    = 0x8007ffff,
 236                 .flags  = IORESOURCE_MEM,
 237         },
 238 };
 239
 240 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
 241
 242 static struct platform_device sa11x0ssp_device = {
 243         .name           = "sa11x0-ssp",
 244         .id             = -1,
 245         .dev = {
 246                 .dma_mask = &sa11x0ssp_dma_mask,
 247                 .coherent_dma_mask = 0xffffffff,
 248         },
 249         .num_resources  = ARRAY_SIZE(sa11x0ssp_resources),
 250         .resource       = sa11x0ssp_resources,
 251 };
 252
 253 static struct resource sa11x0fb_resources[] = {
 254         [0] = {
 255                 .start  = 0xb0100000,
 256                 .end    = 0xb010ffff,
 257                 .flags  = IORESOURCE_MEM,
 258         },
 259         [1] = {
 260                 .start  = IRQ_LCD,
 261                 .end    = IRQ_LCD,
 262                 .flags  = IORESOURCE_IRQ,
 263         },
 264 };
 265
 266 static struct platform_device sa11x0fb_device = {
 267         .name           = "sa11x0-fb",
 268         .id             = -1,
 269         .dev = {
 270                 .coherent_dma_mask = 0xffffffff,
 271         },
 272         .num_resources  = ARRAY_SIZE(sa11x0fb_resources),
 273         .resource       = sa11x0fb_resources,
 274 };
 275
 276 static struct platform_device sa11x0pcmcia_device = {
 277         .name           = "sa11x0-pcmcia",
 278         .id             = -1,
 279 };
 280
 281 static struct platform_device sa11x0mtd_device = {
 282         .name           = "flash",
 283         .id             = -1,
 284 };
 285
 286 void sa11x0_set_flash_data(struct flash_platform_data *flash,
 287                            struct resource *res, int nr)
 288 {
 289         flash->name = "sa1100";
 290         sa11x0mtd_device.dev.platform_data = flash;
 291         sa11x0mtd_device.resource = res;
 292         sa11x0mtd_device.num_resources = nr;
 293 }
 294
 295 static struct resource sa11x0ir_resources[] = {
 296         {
 297                 .start  = __PREG(Ser2UTCR0),
 298                 .end    = __PREG(Ser2UTCR0) + 0x24 - 1,
 299                 .flags  = IORESOURCE_MEM,
 300         }, {
 301                 .start  = __PREG(Ser2HSCR0),
 302                 .end    = __PREG(Ser2HSCR0) + 0x1c - 1,
 303                 .flags  = IORESOURCE_MEM,
 304         }, {
 305                 .start  = __PREG(Ser2HSCR2),
 306                 .end    = __PREG(Ser2HSCR2) + 0x04 - 1,
 307                 .flags  = IORESOURCE_MEM,
 308         }, {
 309                 .start  = IRQ_Ser2ICP,
 310                 .end    = IRQ_Ser2ICP,
 311                 .flags  = IORESOURCE_IRQ,
 312         }
 313 };
 314
 315 static struct platform_device sa11x0ir_device = {
 316         .name           = "sa11x0-ir",
 317         .id             = -1,
 318         .num_resources  = ARRAY_SIZE(sa11x0ir_resources),
 319         .resource       = sa11x0ir_resources,
 320 };
 321
 322 void sa11x0_set_irda_data(struct irda_platform_data *irda)
 323 {
 324         sa11x0ir_device.dev.platform_data = irda;
 325 }
 326
 327 static struct platform_device *sa11x0_devices[] __initdata = {
 328         &sa11x0udc_device,
 329         &sa11x0uart1_device,
 330         &sa11x0uart3_device,
 331         &sa11x0mcp_device,
 332         &sa11x0ssp_device,
 333         &sa11x0pcmcia_device,
 334         &sa11x0fb_device,
 335         &sa11x0mtd_device,
 336 };
 337
 338 static int __init sa1100_init(void)
 339 {
 340         pm_power_off = sa1100_power_off;
 341
 342         if (sa11x0ir_device.dev.platform_data)
 343                 platform_device_register(&sa11x0ir_device);
 344
 345         return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
 346 }
 347
 348 arch_initcall(sa1100_init);
 349
 350 void (*sa1100fb_backlight_power)(int on);
 351 void (*sa1100fb_lcd_power)(int on);
 352
 353 EXPORT_SYMBOL(sa1100fb_backlight_power);
 354 EXPORT_SYMBOL(sa1100fb_lcd_power);
 355
 356
 357 /*
 358  * Common I/O mapping:
 359  *
 360  * Typically, static virtual address mappings are as follow:
 361  *
 362  * 0xf0000000-0xf3ffffff:       miscellaneous stuff (CPLDs, etc.)
 363  * 0xf4000000-0xf4ffffff:       SA-1111
 364  * 0xf5000000-0xf5ffffff:       reserved (used by cache flushing area)
 365  * 0xf6000000-0xfffeffff:       reserved (internal SA1100 IO defined above)
 366  * 0xffff0000-0xffff0fff:       SA1100 exception vectors
 367  * 0xffff2000-0xffff2fff:       Minicache copy_user_page area
 368  *
 369  * Below 0xe8000000 is reserved for vm allocation.
 370  *
 371  * The machine specific code must provide the extra mapping beside the
 372  * default mapping provided here.
 373  */
 374
 375 static struct map_desc standard_io_desc[] __initdata = {
 376         {       /* PCM */
 377                 .virtual        =  0xf8000000,
 378                 .pfn            = __phys_to_pfn(0x80000000),
 379                 .length         = 0x00100000,
 380                 .type           = MT_DEVICE
 381         }, {    /* SCM */
 382                 .virtual        =  0xfa000000,
 383                 .pfn            = __phys_to_pfn(0x90000000),
 384                 .length         = 0x00100000,
 385                 .type           = MT_DEVICE
 386         }, {    /* MER */
 387                 .virtual        =  0xfc000000,
 388                 .pfn            = __phys_to_pfn(0xa0000000),
 389                 .length         = 0x00100000,
 390                 .type           = MT_DEVICE
 391         }, {    /* LCD + DMA */
 392                 .virtual        =  0xfe000000,
 393                 .pfn            = __phys_to_pfn(0xb0000000),
 394                 .length         = 0x00200000,
 395                 .type           = MT_DEVICE
 396         },
 397 };
 398
 399 void __init sa1100_map_io(void)
 400 {
 401         iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
 402 }
 403
 404 /*
 405  * Disable the memory bus request/grant signals on the SA1110 to
 406  * ensure that we don't receive spurious memory requests.  We set
 407  * the MBGNT signal false to ensure the SA1111 doesn't own the
 408  * SDRAM bus.
 409  */
 410 void __init sa1110_mb_disable(void)
 411 {
 412         unsigned long flags;
 413
 414         local_irq_save(flags);
 415
 416         PGSR &= ~GPIO_MBGNT;
 417         GPCR = GPIO_MBGNT;
 418         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 419
 420         GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
 421
 422         local_irq_restore(flags);
 423 }
 424
 425 /*
 426  * If the system is going to use the SA-1111 DMA engines, set up
 427  * the memory bus request/grant pins.
 428  */
 429 void __init sa1110_mb_enable(void)
 430 {
 431         unsigned long flags;
 432
 433         local_irq_save(flags);
 434
 435         PGSR &= ~GPIO_MBGNT;
 436         GPCR = GPIO_MBGNT;
 437         GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
 438
 439         GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
 440         TUCR |= TUCR_MR;
 441
 442         local_irq_restore(flags);
 443 }
 444